/usr/src/sys/dev/ic/rt2560.c

Bug Summary

File:	dev/ic/rt2560.c
Warning:	line 642, column 9 Result of 'malloc' is converted to a pointer of type 'struct ieee80211_node', which is incompatible with sizeof operand type 'struct rt2560_node'

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.0 -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name rt2560.c -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/lib/clang/13.0.0 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -D CONFIG_DRM_AMD_DC_DCN3_0 -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /usr/obj/sys/arch/amd64/compile/GENERIC.MP/scan-build/2022-01-12-131800-47421-1 -x c /usr/src/sys/dev/ic/rt2560.c

1	/* $OpenBSD: rt2560.c,v 1.89 2022/01/09 05:42:38 jsg Exp $ */
2
3	/*-
4	* Copyright (c) 2005, 2006
5	* Damien Bergamini <damien.bergamini@free.fr>
6	*
7	* Permission to use, copy, modify, and distribute this software for any
8	* purpose with or without fee is hereby granted, provided that the above
9	* copyright notice and this permission notice appear in all copies.
10	*
11	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18	*/
19
20	/*-
21	* Ralink Technology RT2560 chipset driver
22	* http://www.ralinktech.com/
23	*/
24
25	#include "bpfilter.h"
26
27	#include <sys/param.h>
28	#include <sys/sockio.h>
29	#include <sys/mbuf.h>
30	#include <sys/kernel.h>
31	#include <sys/socket.h>
32	#include <sys/systm.h>
33	#include <sys/malloc.h>
34	#include <sys/timeout.h>
35	#include <sys/conf.h>
36	#include <sys/device.h>
37	#include <sys/endian.h>
38
39	#include <machine/bus.h>
40	#include <machine/intr.h>
41
42	#if NBPFILTER1 > 0
43	#include <net/bpf.h>
44	#endif
45	#include <net/if.h>
46	#include <net/if_dl.h>
47	#include <net/if_media.h>
48
49	#include <netinet/in.h>
50	#include <netinet/if_ether.h>
51
52	#include <net80211/ieee80211_var.h>
53	#include <net80211/ieee80211_amrr.h>
54	#include <net80211/ieee80211_radiotap.h>
55
56	#include <dev/ic/rt2560reg.h>
57	#include <dev/ic/rt2560var.h>
58
59	#ifdef RAL_DEBUG
60	#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0)
61	#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0)
62	int rt2560_debug = 1;
63	#else
64	#define DPRINTF(x)
65	#define DPRINTFN(n, x)
66	#endif
67
68	int rt2560_alloc_tx_ring(struct rt2560_softc *,
69	struct rt2560_tx_ring *, int);
70	void rt2560_reset_tx_ring(struct rt2560_softc *,
71	struct rt2560_tx_ring *);
72	void rt2560_free_tx_ring(struct rt2560_softc *,
73	struct rt2560_tx_ring *);
74	int rt2560_alloc_rx_ring(struct rt2560_softc *,
75	struct rt2560_rx_ring *, int);
76	void rt2560_reset_rx_ring(struct rt2560_softc *,
77	struct rt2560_rx_ring *);
78	void rt2560_free_rx_ring(struct rt2560_softc *,
79	struct rt2560_rx_ring *);
80	struct ieee80211_node rt2560_node_alloc(struct ieee80211com );
81	int rt2560_media_change(struct ifnet *);
82	void rt2560_next_scan(void *);
83	void rt2560_iter_func(void , struct ieee80211_node );
84	void rt2560_amrr_timeout(void *);
85	void rt2560_newassoc(struct ieee80211com , struct ieee80211_node ,
86	int);
87	int rt2560_newstate(struct ieee80211com *, enum ieee80211_state,
88	int);
89	uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
90	void rt2560_encryption_intr(struct rt2560_softc *);
91	void rt2560_tx_intr(struct rt2560_softc *);
92	void rt2560_prio_intr(struct rt2560_softc *);
93	void rt2560_decryption_intr(struct rt2560_softc *);
94	void rt2560_rx_intr(struct rt2560_softc *);
95	#ifndef IEEE80211_STA_ONLY
96	void rt2560_beacon_expire(struct rt2560_softc *);
97	#endif
98	void rt2560_wakeup_expire(struct rt2560_softc *);
99	#if NBPFILTER1 > 0
100	uint8_t rt2560_rxrate(const struct rt2560_rx_desc *);
101	#endif
102	int rt2560_ack_rate(struct ieee80211com *, int);
103	uint16_t rt2560_txtime(int, int, uint32_t);
104	uint8_t rt2560_plcp_signal(int);
105	void rt2560_setup_tx_desc(struct rt2560_softc *,
106	struct rt2560_tx_desc *, uint32_t, int, int, int,
107	bus_addr_t);
108	#ifndef IEEE80211_STA_ONLY
109	int rt2560_tx_bcn(struct rt2560_softc , struct mbuf ,
110	struct ieee80211_node *);
111	#endif
112	int rt2560_tx_mgt(struct rt2560_softc , struct mbuf ,
113	struct ieee80211_node *);
114	int rt2560_tx_data(struct rt2560_softc , struct mbuf ,
115	struct ieee80211_node *);
116	void rt2560_start(struct ifnet *);
117	void rt2560_watchdog(struct ifnet *);
118	int rt2560_ioctl(struct ifnet *, u_long, caddr_t);
119	void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t);
120	uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t);
121	void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t);
122	void rt2560_set_chan(struct rt2560_softc *,
123	struct ieee80211_channel *);
124	void rt2560_disable_rf_tune(struct rt2560_softc *);
125	void rt2560_enable_tsf_sync(struct rt2560_softc *);
126	void rt2560_update_plcp(struct rt2560_softc *);
127	void rt2560_updateslot(struct ieee80211com *);
128	void rt2560_set_slottime(struct rt2560_softc *);
129	void rt2560_set_basicrates(struct rt2560_softc *);
130	void rt2560_update_led(struct rt2560_softc *, int, int);
131	void rt2560_set_bssid(struct rt2560_softc , uint8_t );
132	void rt2560_set_macaddr(struct rt2560_softc , uint8_t );
133	void rt2560_get_macaddr(struct rt2560_softc , uint8_t );
134	void rt2560_update_promisc(struct rt2560_softc *);
135	void rt2560_set_txantenna(struct rt2560_softc *, int);
136	void rt2560_set_rxantenna(struct rt2560_softc *, int);
137	const char *rt2560_get_rf(int);
138	void rt2560_read_eeprom(struct rt2560_softc *);
139	int rt2560_bbp_init(struct rt2560_softc *);
140	int rt2560_init(struct ifnet *);
141	void rt2560_stop(struct ifnet *, int);
142
143	static const struct {
144	uint32_t reg;
145	uint32_t val;
146	} rt2560_def_mac[] = {
147	RT2560_DEF_MAC{ 0x00c8, 0x00020002 }, { 0x00cc, 0x00000002 }, { 0x00d0, 0x00020002 }, { 0x00d4, 0x00000002 }, { 0x00dc, 0x00003f21 }, { 0x0024, 0x00000780 }, { 0x002c, 0x07041483 }, { 0x00b8, 0x00000000 } , { 0x0064, 0x07614562 }, { 0x0098, 0x8c8d8b8a }, { 0x014c, 0x7038140a }, { 0x0150, 0x1d21252d }, { 0x0154, 0x1919191d }, { 0x0080, 0xffffffff }, { 0x0090, 0xb3aab3af }, { 0x008c, 0x000003b8 } , { 0x00c4, 0x3f3b3100 }, { 0x0120, 0x0000ff00 }, { 0x0138, 0x000000f0 }, { 0x00d8, 0x000001ff }, { 0x00e0, 0x00213223 }, { 0x00e4, 0x00235518 }, { 0x0134, 0x00000040 }, { 0x00e8, 0x9a009a11 } , { 0x001c, 0xffffffff }, { 0x015c, 0x82188200 }, { 0x0110, 0x00000020 }, { 0x00fc, 0x0000e78f }
148	};
149
150	static const struct {
151	uint8_t reg;
152	uint8_t val;
153	} rt2560_def_bbp[] = {
154	RT2560_DEF_BBP{ 3, 0x02 }, { 4, 0x19 }, { 14, 0x1c }, { 15, 0x30 }, { 16, 0xac }, { 17, 0x48 }, { 18, 0x18 }, { 19, 0xff }, { 20, 0x1e }, { 21, 0x08 }, { 22, 0x08 }, { 23, 0x08 }, { 24, 0x80 }, { 25, 0x50 }, { 26, 0x08 }, { 27, 0x23 }, { 30, 0x10 }, { 31, 0x2b }, { 32, 0xb9 }, { 34, 0x12 }, { 35, 0x50 }, { 39, 0xc4 }, { 40, 0x02 }, { 41, 0x60 }, { 53, 0x10 }, { 54, 0x18 }, { 56, 0x08 }, { 57, 0x10 }, { 58, 0x08 }, { 61, 0x60 }, { 62, 0x10 }, { 75, 0xff }
155	};
156
157	static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2{ 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814 , 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e };
158	static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2{ 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d , 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 };
159	static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2{ 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d , 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 };
160	static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2{ 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d , 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 };
161	static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2{ 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345 , 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e };
162	static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2{ 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463 , 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b };
163	static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2{ 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229 , 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d };
164	static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2{ 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d , 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 };
165
166	int
167	rt2560_attach(void *xsc, int id)
168	{
169	struct rt2560_softc *sc = xsc;
170	struct ieee80211com *ic = &sc->sc_ic;
171	struct ifnet *ifp = &ic->ic_ific_ac.ac_if;
172	int error, i;
173
174	sc->amrr.amrr_min_success_threshold = 1;
175	sc->amrr.amrr_max_success_threshold = 15;
176	timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc);
177	timeout_set(&sc->scan_to, rt2560_next_scan, sc);
178
179	/* retrieve RT2560 rev. no */
180	sc->asic_rev = RAL_READ(sc, RT2560_CSR0)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x0000))));
181
182	/* retrieve MAC address */
183	rt2560_get_macaddr(sc, ic->ic_myaddr);
184	printf(", address %s\n", ether_sprintf(ic->ic_myaddr));
185
186	/* retrieve RF rev. no and various other things from EEPROM */
187	rt2560_read_eeprom(sc);
188
189	printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname,
190	sc->asic_rev, rt2560_get_rf(sc->rf_rev));
191
192	/*
193	* Allocate Tx and Rx rings.
194	*/
195	error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT48);
196	if (error != 0) {
197	printf("%s: could not allocate Tx ring\n",
198	sc->sc_dev.dv_xname);
199	goto fail1;
200	}
201	error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT4);
202	if (error != 0) {
203	printf("%s: could not allocate ATIM ring\n",
204	sc->sc_dev.dv_xname);
205	goto fail2;
206	}
207	error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT16);
208	if (error != 0) {
209	printf("%s: could not allocate Prio ring\n",
210	sc->sc_dev.dv_xname);
211	goto fail3;
212	}
213	error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT1);
214	if (error != 0) {
215	printf("%s: could not allocate Beacon ring\n",
216	sc->sc_dev.dv_xname);
217	goto fail4;
218	}
219	error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT32);
220	if (error != 0) {
221	printf("%s: could not allocate Rx ring\n",
222	sc->sc_dev.dv_xname);
223	goto fail5;
224	}
225
226	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
227	ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
228	ic->ic_state = IEEE80211_S_INIT;
229
230	/* set device capabilities */
231	ic->ic_caps =
232	IEEE80211_C_MONITOR0x00000200 \| /* monitor mode supported */
233	#ifndef IEEE80211_STA_ONLY
234	IEEE80211_C_IBSS0x00000002 \| /* IBSS mode supported */
235	IEEE80211_C_HOSTAP0x00000008 \| /* HostAp mode supported */
236	#endif
237	IEEE80211_C_TXPMGT0x00000040 \| /* tx power management */
238	IEEE80211_C_SHPREAMBLE0x00000100 \| /* short preamble supported */
239	IEEE80211_C_SHSLOT0x00000080 \| /* short slot time supported */
240	IEEE80211_C_WEP0x00000001 \| /* s/w WEP */
241	IEEE80211_C_RSN0x00001000; /* WPA/RSN */
242
243	/* set supported .11b and .11g rates */
244	ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
245	ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
246
247	/* set supported .11b and .11g channels (1 through 14) */
248	for (i = 1; i <= 14; i++) {
249	ic->ic_channels[i].ic_freq =
250	ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ0x0080);
251	ic->ic_channels[i].ic_flags =
252	IEEE80211_CHAN_CCK0x0020 \| IEEE80211_CHAN_OFDM0x0040 \|
253	IEEE80211_CHAN_DYN0x0400 \| IEEE80211_CHAN_2GHZ0x0080;
254	}
255
256	ifp->if_softc = sc;
257	ifp->if_flags = IFF_BROADCAST0x2 \| IFF_SIMPLEX0x800 \| IFF_MULTICAST0x8000;
258	ifp->if_ioctl = rt2560_ioctl;
259	ifp->if_start = rt2560_start;
260	ifp->if_watchdog = rt2560_watchdog;
261	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ)__builtin_memcpy((ifp->if_xname), (sc->sc_dev.dv_xname) , (16));
262
263	if_attach(ifp);
264	ieee80211_ifattach(ifp);
265	ic->ic_node_alloc = rt2560_node_alloc;
266	ic->ic_newassoc = rt2560_newassoc;
267	ic->ic_updateslot = rt2560_updateslot;
268
269	/* XXX RTS causes throughput problems -- where is the bug? */
270	ic->ic_rtsthreshold = IEEE80211_RTS_MAX(2300 + 4 + (3 + 1 + 4));
271
272	/* override state transition machine */
273	sc->sc_newstate = ic->ic_newstate;
274	ic->ic_newstate = rt2560_newstate;
275	ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status);
276
277	#if NBPFILTER1 > 0
278	bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO127,
279	sizeof (struct ieee80211_frame) + 64);
280
281	sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
282	sc->sc_rxtapsc_rxtapu.th.wr_ihdr.it_len = htole16(sc->sc_rxtap_len)((__uint16_t)(sc->sc_rxtap_len));
283	sc->sc_rxtapsc_rxtapu.th.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT)((__uint32_t)(((1 << IEEE80211_RADIOTAP_TSFT) \| (1 << IEEE80211_RADIOTAP_FLAGS) \| (1 << IEEE80211_RADIOTAP_RATE ) \| (1 << IEEE80211_RADIOTAP_CHANNEL) \| (1 << IEEE80211_RADIOTAP_ANTENNA ) \| (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL))));
284
285	sc->sc_txtap_len = sizeof sc->sc_txtapu;
286	sc->sc_txtapsc_txtapu.th.wt_ihdr.it_len = htole16(sc->sc_txtap_len)((__uint16_t)(sc->sc_txtap_len));
287	sc->sc_txtapsc_txtapu.th.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT)((__uint32_t)(((1 << IEEE80211_RADIOTAP_FLAGS) \| (1 << IEEE80211_RADIOTAP_RATE) \| (1 << IEEE80211_RADIOTAP_CHANNEL ) \| (1 << IEEE80211_RADIOTAP_ANTENNA))));
288	#endif
289	return 0;
290
291	fail5: rt2560_free_tx_ring(sc, &sc->bcnq);
292	fail4: rt2560_free_tx_ring(sc, &sc->prioq);
293	fail3: rt2560_free_tx_ring(sc, &sc->atimq);
294	fail2: rt2560_free_tx_ring(sc, &sc->txq);
295	fail1: return ENXIO6;
296	}
297
298	int
299	rt2560_detach(void *xsc)
300	{
301	struct rt2560_softc *sc = xsc;
302	struct ifnet *ifp = &sc->sc_ic.ic_ific_ac.ac_if;
303
304	timeout_del(&sc->scan_to);
305	timeout_del(&sc->amrr_to);
306
307	ieee80211_ifdetach(ifp); /* free all nodes */
308	if_detach(ifp);
309
310	rt2560_free_tx_ring(sc, &sc->txq);
311	rt2560_free_tx_ring(sc, &sc->atimq);
312	rt2560_free_tx_ring(sc, &sc->prioq);
313	rt2560_free_tx_ring(sc, &sc->bcnq);
314	rt2560_free_rx_ring(sc, &sc->rxq);
315
316	return 0;
317	}
318
319	void
320	rt2560_suspend(void *xsc)
321	{
322	struct rt2560_softc *sc = xsc;
323	struct ifnet *ifp = &sc->sc_ic.ic_ific_ac.ac_if;
324
325	if (ifp->if_flags & IFF_RUNNING0x40)
326	rt2560_stop(ifp, 1);
327	}
328
329	void
330	rt2560_wakeup(void *xsc)
331	{
332	struct rt2560_softc *sc = xsc;
333	struct ifnet *ifp = &sc->sc_ic.ic_ific_ac.ac_if;
334
335	if (ifp->if_flags & IFF_UP0x1)
336	rt2560_init(ifp);
337	}
338
339	int
340	rt2560_alloc_tx_ring(struct rt2560_softc sc, struct rt2560_tx_ring ring,
341	int count)
342	{
343	int i, nsegs, error;
344
345	ring->count = count;
346	ring->queued = 0;
347	ring->cur = ring->next = 0;
348	ring->cur_encrypt = ring->next_encrypt = 0;
349
350	error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1,((sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), (count (sizeof (struct rt2560_tx_desc))), (1), (count * (sizeof ( struct rt2560_tx_desc))), (0), (0x0001), (&ring->map))
351	count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map)((sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), (count (sizeof (struct rt2560_tx_desc))), (1), (count * (sizeof ( struct rt2560_tx_desc))), (0), (0x0001), (&ring->map));
352	if (error != 0) {
353	printf("%s: could not create desc DMA map\n",
354	sc->sc_dev.dv_xname);
355	goto fail;
356	}
357
358	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamem_alloc)((sc->sc_dmat), (count (sizeof (struct rt2560_tx_desc))), ((1 << 12)), (0), (&ring->seg), (1), (&nsegs), (0x0001 \| 0x1000))
359	PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT \| BUS_DMA_ZERO)((sc->sc_dmat)->_dmamem_alloc)((sc->sc_dmat), (count (sizeof (struct rt2560_tx_desc))), ((1 << 12)), (0), (&ring->seg), (1), (&nsegs), (0x0001 \| 0x1000));
360	if (error != 0) {
361	printf("%s: could not allocate DMA memory\n",
362	sc->sc_dev.dv_xname);
363	goto fail;
364	}
365
366	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,((sc->sc_dmat)->_dmamem_map)((sc->sc_dmat), (&ring ->seg), (nsegs), (count (sizeof (struct rt2560_tx_desc)) ), ((caddr_t *)&ring->desc), (0x0001))
367	count * RT2560_TX_DESC_SIZE, (caddr_t )&ring->desc,((sc->sc_dmat)->_dmamem_map)((sc->sc_dmat), (&ring ->seg), (nsegs), (count * (sizeof (struct rt2560_tx_desc)) ), ((caddr_t *)&ring->desc), (0x0001))
368	BUS_DMA_NOWAIT)((sc->sc_dmat)->_dmamem_map)((sc->sc_dmat), (&ring ->seg), (nsegs), (count (sizeof (struct rt2560_tx_desc)) ), ((caddr_t *)&ring->desc), (0x0001));
369	if (error != 0) {
370	printf("%s: can't map desc DMA memory\n",
371	sc->sc_dev.dv_xname);
372	goto fail;
373	}
374
375	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (ring-> map), (ring->desc), (count (sizeof (struct rt2560_tx_desc ))), (((void *)0)), (0x0001))
376	count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT)((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (ring-> map), (ring->desc), (count (sizeof (struct rt2560_tx_desc ))), (((void *)0)), (0x0001));
377	if (error != 0) {
378	printf("%s: could not load desc DMA map\n",
379	sc->sc_dev.dv_xname);
380	goto fail;
381	}
382
383	ring->physaddr = ring->map->dm_segs->ds_addr;
384
385	ring->data = mallocarray(count, sizeof (struct rt2560_tx_data),
386	M_DEVBUF2, M_NOWAIT0x0002 \| M_ZERO0x0008);
387	if (ring->data == NULL((void *)0)) {
388	printf("%s: could not allocate soft data\n",
389	sc->sc_dev.dv_xname);
390	error = ENOMEM12;
391	goto fail;
392	}
393
394	for (i = 0; i < count; i++) {
395	error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), ((1 << 11)), (1), ((1 << 11)), (0), (0x0001), (&ring-> data[i].map))
396	RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT,(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), ((1 << 11)), (1), ((1 << 11)), (0), (0x0001), (&ring-> data[i].map))
397	&ring->data[i].map)(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), ((1 << 11)), (1), ((1 << 11)), (0), (0x0001), (&ring-> data[i].map));
398	if (error != 0) {
399	printf("%s: could not create DMA map\n",
400	sc->sc_dev.dv_xname);
401	goto fail;
402	}
403	}
404
405	return 0;
406
407	fail: rt2560_free_tx_ring(sc, ring);
408	return error;
409	}
410
411	void
412	rt2560_reset_tx_ring(struct rt2560_softc sc, struct rt2560_tx_ring ring)
413	{
414	int i;
415
416	for (i = 0; i < ring->count; i++) {
417	struct rt2560_tx_desc *desc = &ring->desc[i];
418	struct rt2560_tx_data *data = &ring->data[i];
419
420	if (data->m != NULL((void *)0)) {
421	bus_dmamap_sync(sc->sc_dmat, data->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x08))
422	data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x08));
423	bus_dmamap_unload(sc->sc_dmat, data->map)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (data ->map));
424	m_freem(data->m);
425	data->m = NULL((void *)0);
426	}
427
428	/*
429	* The node has already been freed at that point so don't call
430	* ieee80211_release_node() here.
431	*/
432	data->ni = NULL((void *)0);
433
434	desc->flags = 0;
435	}
436
437	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x04))
438	BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x04));
439
440	ring->queued = 0;
441	ring->cur = ring->next = 0;
442	ring->cur_encrypt = ring->next_encrypt = 0;
443	}
444
445	void
446	rt2560_free_tx_ring(struct rt2560_softc sc, struct rt2560_tx_ring ring)
447	{
448	int i;
449
450	if (ring->desc != NULL((void *)0)) {
451	bus_dmamap_sync(sc->sc_dmat, ring->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x08))
452	ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x08));
453	bus_dmamap_unload(sc->sc_dmat, ring->map)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (ring ->map));
454	bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,((sc->sc_dmat)->_dmamem_unmap)((sc->sc_dmat), ((caddr_t )ring->desc), (ring->count (sizeof (struct rt2560_tx_desc ))))
455	ring->count * RT2560_TX_DESC_SIZE)((sc->sc_dmat)->_dmamem_unmap)((sc->sc_dmat), ((caddr_t )ring->desc), (ring->count (sizeof (struct rt2560_tx_desc ))));
456	bus_dmamem_free(sc->sc_dmat, &ring->seg, 1)(*(sc->sc_dmat)->_dmamem_free)((sc->sc_dmat), (& ring->seg), (1));
457	}
458
459	if (ring->data != NULL((void *)0)) {
460	for (i = 0; i < ring->count; i++) {
461	struct rt2560_tx_data *data = &ring->data[i];
462
463	if (data->m != NULL((void *)0)) {
464	bus_dmamap_sync(sc->sc_dmat, data->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x08))
465	data->map->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x08))
466	BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x08));
467	bus_dmamap_unload(sc->sc_dmat, data->map)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (data ->map));
468	m_freem(data->m);
469	}
470
471	/*
472	* The node has already been freed at that point so
473	* don't call ieee80211_release_node() here.
474	*/
475	data->ni = NULL((void *)0);
476
477	if (data->map != NULL((void *)0))
478	bus_dmamap_destroy(sc->sc_dmat, data->map)(*(sc->sc_dmat)->_dmamap_destroy)((sc->sc_dmat), (data ->map));
479	}
480	free(ring->data, M_DEVBUF2, ring->count * sizeof *ring->data);
481	}
482	}
483
484	int
485	rt2560_alloc_rx_ring(struct rt2560_softc sc, struct rt2560_rx_ring ring,
486	int count)
487	{
488	int i, nsegs, error;
489
490	ring->count = count;
491	ring->cur = ring->next = 0;
492	ring->cur_decrypt = 0;
493
494	error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1,((sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), (count (sizeof (struct rt2560_rx_desc))), (1), (count * (sizeof ( struct rt2560_rx_desc))), (0), (0x0001), (&ring->map))
495	count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map)((sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), (count (sizeof (struct rt2560_rx_desc))), (1), (count * (sizeof ( struct rt2560_rx_desc))), (0), (0x0001), (&ring->map));
496	if (error != 0) {
497	printf("%s: could not create desc DMA map\n",
498	sc->sc_dev.dv_xname);
499	goto fail;
500	}
501
502	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE,((sc->sc_dmat)->_dmamem_alloc)((sc->sc_dmat), (count (sizeof (struct rt2560_rx_desc))), ((1 << 12)), (0), (&ring->seg), (1), (&nsegs), (0x0001 \| 0x1000))
503	PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT \| BUS_DMA_ZERO)((sc->sc_dmat)->_dmamem_alloc)((sc->sc_dmat), (count (sizeof (struct rt2560_rx_desc))), ((1 << 12)), (0), (&ring->seg), (1), (&nsegs), (0x0001 \| 0x1000));
504	if (error != 0) {
505	printf("%s: could not allocate DMA memory\n",
506	sc->sc_dev.dv_xname);
507	goto fail;
508	}
509
510	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,((sc->sc_dmat)->_dmamem_map)((sc->sc_dmat), (&ring ->seg), (nsegs), (count (sizeof (struct rt2560_rx_desc)) ), ((caddr_t *)&ring->desc), (0x0001))
511	count * RT2560_RX_DESC_SIZE, (caddr_t )&ring->desc,((sc->sc_dmat)->_dmamem_map)((sc->sc_dmat), (&ring ->seg), (nsegs), (count * (sizeof (struct rt2560_rx_desc)) ), ((caddr_t *)&ring->desc), (0x0001))
512	BUS_DMA_NOWAIT)((sc->sc_dmat)->_dmamem_map)((sc->sc_dmat), (&ring ->seg), (nsegs), (count (sizeof (struct rt2560_rx_desc)) ), ((caddr_t *)&ring->desc), (0x0001));
513	if (error != 0) {
514	printf("%s: can't map desc DMA memory\n",
515	sc->sc_dev.dv_xname);
516	goto fail;
517	}
518
519	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (ring-> map), (ring->desc), (count (sizeof (struct rt2560_rx_desc ))), (((void *)0)), (0x0001))
520	count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT)((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (ring-> map), (ring->desc), (count (sizeof (struct rt2560_rx_desc ))), (((void *)0)), (0x0001));
521	if (error != 0) {
522	printf("%s: could not load desc DMA map\n",
523	sc->sc_dev.dv_xname);
524	goto fail;
525	}
526
527	ring->physaddr = ring->map->dm_segs->ds_addr;
528
529	ring->data = mallocarray(count, sizeof (struct rt2560_rx_data),
530	M_DEVBUF2, M_NOWAIT0x0002 \| M_ZERO0x0008);
531	if (ring->data == NULL((void *)0)) {
532	printf("%s: could not allocate soft data\n",
533	sc->sc_dev.dv_xname);
534	error = ENOMEM12;
535	goto fail;
536	}
537
538	/*
539	* Pre-allocate Rx buffers and populate Rx ring.
540	*/
541	for (i = 0; i < count; i++) {
542	struct rt2560_rx_desc *desc = &sc->rxq.desc[i];
543	struct rt2560_rx_data *data = &sc->rxq.data[i];
544
545	error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), ((1 << 11)), (1), ((1 << 11)), (0), (0x0001), (&data-> map))
546	0, BUS_DMA_NOWAIT, &data->map)(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), ((1 << 11)), (1), ((1 << 11)), (0), (0x0001), (&data-> map));
547	if (error != 0) {
548	printf("%s: could not create DMA map\n",
549	sc->sc_dev.dv_xname);
550	goto fail;
551	}
552
553	MGETHDR(data->m, M_DONTWAIT, MT_DATA)data->m = m_gethdr((0x0002), (1));
554	if (data->m == NULL((void *)0)) {
555	printf("%s: could not allocate rx mbuf\n",
556	sc->sc_dev.dv_xname);
557	error = ENOMEM12;
558	goto fail;
559	}
560	MCLGET(data->m, M_DONTWAIT)(void) m_clget((data->m), (0x0002), (1 << 11));
561	if (!(data->m->m_flagsm_hdr.mh_flags & M_EXT0x0001)) {
562	printf("%s: could not allocate rx mbuf cluster\n",
563	sc->sc_dev.dv_xname);
564	error = ENOMEM12;
565	goto fail;
566	}
567
568	error = bus_dmamap_load(sc->sc_dmat, data->map,((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (data-> map), (((void )((data->m)->m_hdr.mh_data))), ((1 << 11)), (((void *)0)), (0x0001))
569	mtod(data->m, void ), MCLBYTES, NULL, BUS_DMA_NOWAIT)((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (data-> map), (((void )((data->m)->m_hdr.mh_data))), ((1 << 11)), (((void )0)), (0x0001));
570	if (error != 0) {
571	printf("%s: could not load rx buf DMA map",
572	sc->sc_dev.dv_xname);
573	goto fail;
574	}
575
576	desc->flags = htole32(RT2560_RX_BUSY)((__uint32_t)((1 << 0)));
577	desc->physaddr = htole32(data->map->dm_segs->ds_addr)((__uint32_t)(data->map->dm_segs->ds_addr));
578	}
579
580	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x04))
581	BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x04));
582
583	return 0;
584
585	fail: rt2560_free_rx_ring(sc, ring);
586	return error;
587	}
588
589	void
590	rt2560_reset_rx_ring(struct rt2560_softc sc, struct rt2560_rx_ring ring)
591	{
592	int i;
593
594	for (i = 0; i < ring->count; i++) {
595	ring->desc[i].flags = htole32(RT2560_RX_BUSY)((__uint32_t)((1 << 0)));
596	ring->data[i].drop = 0;
597	}
598
599	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x04))
600	BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x04));
601
602	ring->cur = ring->next = 0;
603	ring->cur_decrypt = 0;
604	}
605
606	void
607	rt2560_free_rx_ring(struct rt2560_softc sc, struct rt2560_rx_ring ring)
608	{
609	int i;
610
611	if (ring->desc != NULL((void *)0)) {
612	bus_dmamap_sync(sc->sc_dmat, ring->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x08))
613	ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ring-> map), (0), (ring->map->dm_mapsize), (0x08));
614	bus_dmamap_unload(sc->sc_dmat, ring->map)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (ring ->map));
615	bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,((sc->sc_dmat)->_dmamem_unmap)((sc->sc_dmat), ((caddr_t )ring->desc), (ring->count (sizeof (struct rt2560_rx_desc ))))
616	ring->count * RT2560_RX_DESC_SIZE)((sc->sc_dmat)->_dmamem_unmap)((sc->sc_dmat), ((caddr_t )ring->desc), (ring->count (sizeof (struct rt2560_rx_desc ))));
617	bus_dmamem_free(sc->sc_dmat, &ring->seg, 1)(*(sc->sc_dmat)->_dmamem_free)((sc->sc_dmat), (& ring->seg), (1));
618	}
619
620	if (ring->data != NULL((void *)0)) {
621	for (i = 0; i < ring->count; i++) {
622	struct rt2560_rx_data *data = &ring->data[i];
623
624	if (data->m != NULL((void *)0)) {
625	bus_dmamap_sync(sc->sc_dmat, data->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x02))
626	data->map->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x02))
627	BUS_DMASYNC_POSTREAD)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x02));
628	bus_dmamap_unload(sc->sc_dmat, data->map)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (data ->map));
629	m_freem(data->m);
630	}
631
632	if (data->map != NULL((void *)0))
633	bus_dmamap_destroy(sc->sc_dmat, data->map)(*(sc->sc_dmat)->_dmamap_destroy)((sc->sc_dmat), (data ->map));
634	}
635	free(ring->data, M_DEVBUF2, ring->count * sizeof *ring->data);
636	}
637	}
638
639	struct ieee80211_node *
640	rt2560_node_alloc(struct ieee80211com *ic)
641	{
642	return malloc(sizeof (struct rt2560_node), M_DEVBUF2,
	Result of 'malloc' is converted to a pointer of type 'struct ieee80211_node', which is incompatible with sizeof operand type 'struct rt2560_node'
643	M_NOWAIT0x0002 \| M_ZERO0x0008);
644	}
645
646	int
647	rt2560_media_change(struct ifnet *ifp)
648	{
649	int error;
650
651	error = ieee80211_media_change(ifp);
652	if (error != ENETRESET52)
653	return error;
654
655	if ((ifp->if_flags & (IFF_UP0x1 \| IFF_RUNNING0x40)) == (IFF_UP0x1 \| IFF_RUNNING0x40))
656	rt2560_init(ifp);
657
658	return 0;
659	}
660
661	/*
662	* This function is called periodically (every 200ms) during scanning to
663	* switch from one channel to another.
664	*/
665	void
666	rt2560_next_scan(void *arg)
667	{
668	struct rt2560_softc *sc = arg;
669	struct ieee80211com *ic = &sc->sc_ic;
670	struct ifnet *ifp = &ic->ic_ific_ac.ac_if;
671	int s;
672
673	s = splnet()splraise(0x7);
674	if (ic->ic_state == IEEE80211_S_SCAN)
675	ieee80211_next_scan(ifp);
676	splx(s)spllower(s);
677	}
678
679	/*
680	* This function is called for each neighbor node.
681	*/
682	void
683	rt2560_iter_func(void arg, struct ieee80211_node ni)
684	{
685	struct rt2560_softc *sc = arg;
686	struct rt2560_node rn = (struct rt2560_node )ni;
687
688	ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn);
689	}
690
691	void
692	rt2560_amrr_timeout(void *arg)
693	{
694	struct rt2560_softc *sc = arg;
695	struct ieee80211com *ic = &sc->sc_ic;
696	int s;
697
698	s = splnet()splraise(0x7);
699	if (ic->ic_opmode == IEEE80211_M_STA)
700	rt2560_iter_func(sc, ic->ic_bss);
701	#ifndef IEEE80211_STA_ONLY
702	else
703	ieee80211_iterate_nodes(ic, rt2560_iter_func, sc);
704	#endif
705	splx(s)spllower(s);
706
707	timeout_add_msec(&sc->amrr_to, 500);
708	}
709
710	void
711	rt2560_newassoc(struct ieee80211com ic, struct ieee80211_node ni, int isnew)
712	{
713	struct rt2560_softc *sc = ic->ic_softcic_ac.ac_if.if_softc;
714	int i;
715
716	ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn);
717
718	/* set rate to some reasonable initial value */
719	for (i = ni->ni_rates.rs_nrates - 1;
720	i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL0x7f) > 72;
721	i--);
722	ni->ni_txrate = i;
723	}
724
725	int
726	rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
727	{
728	struct rt2560_softc *sc = ic->ic_ific_ac.ac_if.if_softc;
729	enum ieee80211_state ostate;
730	struct ieee80211_node *ni;
731	int error = 0;
732
733	ostate = ic->ic_state;
734	timeout_del(&sc->scan_to);
735	timeout_del(&sc->amrr_to);
736
737	switch (nstate) {
738	case IEEE80211_S_INIT:
739	if (ostate == IEEE80211_S_RUN) {
740	/* abort TSF synchronization */
741	RAL_WRITE(sc, RT2560_CSR14, 0)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0038)), ( (0))));
742
743	/* turn association led off */
744	rt2560_update_led(sc, 0, 0);
745	}
746	break;
747
748	case IEEE80211_S_SCAN:
749	rt2560_set_chan(sc, ic->ic_bss->ni_chan);
750	timeout_add_msec(&sc->scan_to, 200);
751	break;
752
753	case IEEE80211_S_AUTH:
754	rt2560_set_chan(sc, ic->ic_bss->ni_chan);
755	break;
756
757	case IEEE80211_S_ASSOC:
758	rt2560_set_chan(sc, ic->ic_bss->ni_chan);
759	break;
760
761	case IEEE80211_S_RUN:
762	rt2560_set_chan(sc, ic->ic_bss->ni_chan);
763
764	ni = ic->ic_bss;
765
766	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
767	rt2560_update_plcp(sc);
768	rt2560_set_slottime(sc);
769	rt2560_set_basicrates(sc);
770	rt2560_set_bssid(sc, ni->ni_bssid);
771	}
772
773	#ifndef IEEE80211_STA_ONLY
774	if (ic->ic_opmode == IEEE80211_M_HOSTAP \|\|
775	ic->ic_opmode == IEEE80211_M_IBSS) {
776	struct mbuf *m = ieee80211_beacon_alloc(ic, ni);
777	if (m == NULL((void *)0)) {
778	printf("%s: could not allocate beacon\n",
779	sc->sc_dev.dv_xname);
780	error = ENOBUFS55;
781	break;
782	}
783
784	error = rt2560_tx_bcn(sc, m, ni);
785	if (error != 0)
786	break;
787	}
788	#endif
789
790	/* turn association led on */
791	rt2560_update_led(sc, 1, 0);
792
793	if (ic->ic_opmode == IEEE80211_M_STA) {
794	/* fake a join to init the tx rate */
795	rt2560_newassoc(ic, ni, 1);
796	}
797
798	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
799	/* start automatic rate control timer */
800	if (ic->ic_fixed_rate == -1)
801	timeout_add_msec(&sc->amrr_to, 500);
802
803	rt2560_enable_tsf_sync(sc);
804	}
805	break;
806	}
807
808	return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
809	}
810
811	/*
812	* Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
813	* 93C66).
814	*/
815	uint16_t
816	rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
817	{
818	uint32_t tmp;
819	uint16_t val;
820	int n;
821
822	/* clock C once before the first command */
823	RT2560_EEPROM_CTL(sc, 0)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), (((0))))); (*delay_func)(1); } while ( 0);
824
825	RT2560_EEPROM_CTL(sc, RT2560_S)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2)))))); (*delay_func)(1); } while ( 0);
826	RT2560_EEPROM_CTL(sc, RT2560_S \| RT2560_C)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (1 << 1)))))); (*delay_func)(1) ; } while ( 0);
827	RT2560_EEPROM_CTL(sc, RT2560_S)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2)))))); (*delay_func)(1); } while ( 0);
828
829	/* write start bit (1) */
830	RT2560_EEPROM_CTL(sc, RT2560_S \| RT2560_D)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (1 << 3)))))); (*delay_func)(1) ; } while ( 0);
831	RT2560_EEPROM_CTL(sc, RT2560_S \| RT2560_D \| RT2560_C)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (1 << 3) \| (1 << 1)))))); (*delay_func)(1); } while ( 0);
832
833	/* write READ opcode (10) */
834	RT2560_EEPROM_CTL(sc, RT2560_S \| RT2560_D)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (1 << 3)))))); (*delay_func)(1) ; } while ( 0);
835	RT2560_EEPROM_CTL(sc, RT2560_S \| RT2560_D \| RT2560_C)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (1 << 3) \| (1 << 1)))))); (*delay_func)(1); } while ( 0);
836	RT2560_EEPROM_CTL(sc, RT2560_S)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2)))))); (*delay_func)(1); } while ( 0);
837	RT2560_EEPROM_CTL(sc, RT2560_S \| RT2560_C)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (1 << 1)))))); (*delay_func)(1) ; } while ( 0);
838
839	/* write address (A5-A0 or A7-A0) */
840	n = (RAL_READ(sc, RT2560_CSR21)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x0054)))) & RT2560_93C46(1 << 5)) ? 5 : 7;
841	for (; n >= 0; n--) {
842	RT2560_EEPROM_CTL(sc, RT2560_S \|do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (((addr >> n) & 1) << 3)))))); (*delay_func)(1); } while ( 0)
843	(((addr >> n) & 1) << RT2560_SHIFT_D))do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (((addr >> n) & 1) << 3)))))); (*delay_func)(1); } while ( 0);
844	RT2560_EEPROM_CTL(sc, RT2560_S \|do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (((addr >> n) & 1) << 3) \| (1 << 1)))))); (*delay_func)(1); } while ( 0)
845	(((addr >> n) & 1) << RT2560_SHIFT_D) \| RT2560_C)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (((addr >> n) & 1) << 3) \| (1 << 1)))))); (*delay_func)(1); } while ( 0);
846	}
847
848	RT2560_EEPROM_CTL(sc, RT2560_S)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2)))))); (*delay_func)(1); } while ( 0);
849
850	/* read data Q15-Q0 */
851	val = 0;
852	for (n = 15; n >= 0; n--) {
853	RT2560_EEPROM_CTL(sc, RT2560_S \| RT2560_C)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2) \| (1 << 1)))))); (*delay_func)(1) ; } while ( 0);
854	tmp = RAL_READ(sc, RT2560_CSR21)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x0054))));
855	val \|= ((tmp & RT2560_Q(1 << 4)) >> RT2560_SHIFT_Q4) << n;
856	RT2560_EEPROM_CTL(sc, RT2560_S)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2)))))); (*delay_func)(1); } while ( 0);
857	}
858
859	RT2560_EEPROM_CTL(sc, 0)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), (((0))))); (*delay_func)(1); } while ( 0);
860
861	/* clear Chip Select and clock C */
862	RT2560_EEPROM_CTL(sc, RT2560_S)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 2)))))); (*delay_func)(1); } while ( 0);
863	RT2560_EEPROM_CTL(sc, 0)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), (((0))))); (*delay_func)(1); } while ( 0);
864	RT2560_EEPROM_CTL(sc, RT2560_C)do { ((((sc))->sc_st)->write_4((((sc))->sc_sh), ((0x0054 )), ((((1 << 1)))))); (*delay_func)(1); } while ( 0);
865
866	return val;
867	}
868
869	/*
870	* Some frames were processed by the hardware cipher engine and are ready for
871	* transmission.
872	*/
873	void
874	rt2560_encryption_intr(struct rt2560_softc *sc)
875	{
876	int hw;
877
878	/* retrieve last descriptor index processed by cipher engine */
879	hw = (RAL_READ(sc, RT2560_SECCSR1)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x0158)))) - sc->txq.physaddr) /
880	RT2560_TX_DESC_SIZE(sizeof (struct rt2560_tx_desc));
881
882	for (; sc->txq.next_encrypt != hw;) {
883	struct rt2560_tx_desc *desc =
884	&sc->txq.desc[sc->txq.next_encrypt];
885
886	bus_dmamap_sync(sc->sc_dmat, sc->txq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next_encrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x02))
887	sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next_encrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x02))
888	RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next_encrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x02));
889
890	if (letoh32(desc->flags)((__uint32_t)(desc->flags)) &
891	(RT2560_TX_BUSY(1 << 0) \| RT2560_TX_CIPHER_BUSY(1 << 12)))
892	break;
893
894	/* for TKIP, swap eiv field to fix a bug in ASIC */
895	if ((letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_TX_CIPHER_MASK0xe0000000) ==
896	RT2560_TX_CIPHER_TKIP(3 << 29))
897	desc->eiv = swap32(desc->eiv)(__uint32_t)(__builtin_constant_p(desc->eiv) ? (__uint32_t )(((__uint32_t)(desc->eiv) & 0xff) << 24 \| ((__uint32_t )(desc->eiv) & 0xff00) << 8 \| ((__uint32_t)(desc ->eiv) & 0xff0000) >> 8 \| ((__uint32_t)(desc-> eiv) & 0xff000000) >> 24) : __swap32md(desc->eiv ));
898
899	/* mark the frame ready for transmission */
900	desc->flags \|= htole32(RT2560_TX_BUSY \| RT2560_TX_VALID)((__uint32_t)((1 << 0) \| (1 << 1)));
901
902	bus_dmamap_sync(sc->sc_dmat, sc->txq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next_encrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04))
903	sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next_encrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04))
904	RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next_encrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04));
905
906	DPRINTFN(15, ("encryption done idx=%u\n",
907	sc->txq.next_encrypt));
908
909	sc->txq.next_encrypt =
910	(sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT48;
911	}
912
913	/* kick Tx */
914	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0060)), ( ((1 << 0)))));
915	}
916
917	void
918	rt2560_tx_intr(struct rt2560_softc *sc)
919	{
920	struct ieee80211com *ic = &sc->sc_ic;
921	struct ifnet *ifp = &ic->ic_ific_ac.ac_if;
922
923	for (;;) {
924	struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next];
925	struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next];
926	struct rt2560_node *rn;
927
928	bus_dmamap_sync(sc->sc_dmat, sc->txq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x02))
929	sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x02))
930	BUS_DMASYNC_POSTREAD)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x02));
931
932	if ((letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_TX_BUSY(1 << 0)) \|\|
933	(letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_TX_CIPHER_BUSY(1 << 12)) \|\|
934	!(letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_TX_VALID(1 << 1)))
935	break;
936
937	rn = (struct rt2560_node *)data->ni;
938
939	switch (letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_TX_RESULT_MASK0x0000001c) {
940	case RT2560_TX_SUCCESS(0 << 2):
941	DPRINTFN(10, ("data frame sent successfully\n"));
942	rn->amn.amn_txcnt++;
943	break;
944
945	case RT2560_TX_SUCCESS_RETRY(1 << 2):
946	DPRINTFN(9, ("data frame sent after %u retries\n",
947	(letoh32(desc->flags) >> 5) & 0x7));
948	rn->amn.amn_txcnt++;
949	rn->amn.amn_retrycnt++;
950	break;
951
952	case RT2560_TX_FAIL_RETRY(2 << 2):
953	DPRINTFN(9, ("sending data frame failed (too much "
954	"retries)\n"));
955	rn->amn.amn_txcnt++;
956	rn->amn.amn_retrycnt++;
957	ifp->if_oerrorsif_data.ifi_oerrors++;
958	break;
959
960	case RT2560_TX_FAIL_INVALID(3 << 2):
961	case RT2560_TX_FAIL_OTHER(4 << 2):
962	default:
963	DPRINTF(("%s: sending data frame failed 0x%08x\n",
964	sc->sc_dev.dv_xname, letoh32(desc->flags)));
965	ifp->if_oerrorsif_data.ifi_oerrors++;
966	break;
967	}
968
969	/* descriptor is no longer valid */
970	desc->flags &= ~htole32(RT2560_TX_VALID)((__uint32_t)((1 << 1)));
971
972	bus_dmamap_sync(sc->sc_dmat, sc->txq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x04))
973	sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x04))
974	BUS_DMASYNC_PREWRITE)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> txq.map), (sc->txq.next (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x04));
975
976	bus_dmamap_sync(sc->sc_dmat, data->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x08))
977	data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x08));
978	bus_dmamap_unload(sc->sc_dmat, data->map)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (data ->map));
979	m_freem(data->m);
980	data->m = NULL((void *)0);
981	ieee80211_release_node(ic, data->ni);
982	data->ni = NULL((void *)0);
983
984	DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next));
985
986	sc->txq.queued--;
987	sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT48;
988	}
989
990	if (sc->txq.queued == 0 && sc->prioq.queued == 0)
991	sc->sc_tx_timer = 0;
992	if (sc->txq.queued < RT2560_TX_RING_COUNT48 - 1) {
993	sc->sc_flags &= ~RT2560_DATA_OACTIVE(1 << 4);
994	if (!(sc->sc_flags & (RT2560_DATA_OACTIVE(1 << 4)\|RT2560_PRIO_OACTIVE(1 << 3))))
995	ifq_clr_oactive(&ifp->if_snd);
996	rt2560_start(ifp);
997	}
998	}
999
1000	void
1001	rt2560_prio_intr(struct rt2560_softc *sc)
1002	{
1003	struct ieee80211com *ic = &sc->sc_ic;
1004	struct ifnet *ifp = &ic->ic_ific_ac.ac_if;
1005
1006	for (;;) {
1007	struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next];
1008	struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next];
1009
1010	bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> prioq.map), (sc->prioq.next (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x02))
1011	sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> prioq.map), (sc->prioq.next (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x02))
1012	BUS_DMASYNC_POSTREAD)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> prioq.map), (sc->prioq.next (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x02));
1013
1014	if ((letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_TX_BUSY(1 << 0)) \|\|
1015	!(letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_TX_VALID(1 << 1)))
1016	break;
1017
1018	switch (letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_TX_RESULT_MASK0x0000001c) {
1019	case RT2560_TX_SUCCESS(0 << 2):
1020	DPRINTFN(10, ("mgt frame sent successfully\n"));
1021	break;
1022
1023	case RT2560_TX_SUCCESS_RETRY(1 << 2):
1024	DPRINTFN(9, ("mgt frame sent after %u retries\n",
1025	(letoh32(desc->flags) >> 5) & 0x7));
1026	break;
1027
1028	case RT2560_TX_FAIL_RETRY(2 << 2):
1029	DPRINTFN(9, ("sending mgt frame failed (too much "
1030	"retries)\n"));
1031	break;
1032
1033	case RT2560_TX_FAIL_INVALID(3 << 2):
1034	case RT2560_TX_FAIL_OTHER(4 << 2):
1035	default:
1036	DPRINTF(("%s: sending mgt frame failed 0x%08x\n",
1037	sc->sc_dev.dv_xname, letoh32(desc->flags)));
1038	break;
1039	}
1040
1041	/* descriptor is no longer valid */
1042	desc->flags &= ~htole32(RT2560_TX_VALID)((__uint32_t)((1 << 1)));
1043
1044	bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> prioq.map), (sc->prioq.next (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04))
1045	sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> prioq.map), (sc->prioq.next (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04))
1046	BUS_DMASYNC_PREWRITE)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> prioq.map), (sc->prioq.next (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04));
1047
1048	bus_dmamap_sync(sc->sc_dmat, data->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x08))
1049	data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x08));
1050	bus_dmamap_unload(sc->sc_dmat, data->map)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (data ->map));
1051	m_freem(data->m);
1052	data->m = NULL((void *)0);
1053	ieee80211_release_node(ic, data->ni);
1054	data->ni = NULL((void *)0);
1055
1056	DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next));
1057
1058	sc->prioq.queued--;
1059	sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT16;
1060	}
1061
1062	if (sc->txq.queued == 0 && sc->prioq.queued == 0)
1063	sc->sc_tx_timer = 0;
1064	if (sc->prioq.queued < RT2560_PRIO_RING_COUNT16) {
1065	sc->sc_flags &= ~RT2560_PRIO_OACTIVE(1 << 3);
1066	if (!(sc->sc_flags & (RT2560_DATA_OACTIVE(1 << 4)\|RT2560_PRIO_OACTIVE(1 << 3))))
1067	ifq_clr_oactive(&ifp->if_snd);
1068	rt2560_start(ifp);
1069	}
1070	}
1071
1072	/*
1073	* Some frames were processed by the hardware cipher engine and are ready for
1074	* transmission to the IEEE802.11 layer.
1075	*/
1076	void
1077	rt2560_decryption_intr(struct rt2560_softc *sc)
1078	{
1079	struct mbuf_list ml = MBUF_LIST_INITIALIZER(){ ((void )0), ((void )0), 0 };
1080	struct ieee80211com *ic = &sc->sc_ic;
1081	struct ifnet *ifp = &ic->ic_ific_ac.ac_if;
1082	struct ieee80211_frame *wh;
1083	struct ieee80211_rxinfo rxi;
1084	struct ieee80211_node *ni;
1085	struct mbuf mnew, m;
1086	int hw, error;
1087
1088	/* retrieve last descriptor index processed by cipher engine */
1089	hw = (RAL_READ(sc, RT2560_SECCSR0)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x0028)))) - sc->rxq.physaddr) /
1090	RT2560_RX_DESC_SIZE(sizeof (struct rt2560_rx_desc));
1091
1092	for (; sc->rxq.cur_decrypt != hw;) {
1093	struct rt2560_rx_desc *desc =
1094	&sc->rxq.desc[sc->rxq.cur_decrypt];
1095	struct rt2560_rx_data *data =
1096	&sc->rxq.data[sc->rxq.cur_decrypt];
1097
1098	bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur_decrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x02))
1099	sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur_decrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x02))
1100	RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur_decrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x02));
1101
1102	if (letoh32(desc->flags)((__uint32_t)(desc->flags)) &
1103	(RT2560_RX_BUSY(1 << 0) \| RT2560_RX_CIPHER_BUSY(1 << 8)))
1104	break;
1105
1106	if (data->drop) {
1107	ifp->if_ierrorsif_data.ifi_ierrors++;
1108	goto skip;
1109	}
1110
1111	if ((letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_RX_CIPHER_MASK0xe0000000) != 0 &&
1112	(letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_RX_ICV_ERROR(1 << 9))) {
1113	ifp->if_ierrorsif_data.ifi_ierrors++;
1114	goto skip;
1115	}
1116
1117	/*
1118	* Try to allocate a new mbuf for this ring element and load it
1119	* before processing the current mbuf. If the ring element
1120	* cannot be loaded, drop the received packet and reuse the old
1121	* mbuf. In the unlikely case that the old mbuf can't be
1122	* reloaded either, explicitly panic.
1123	*/
1124	MGETHDR(mnew, M_DONTWAIT, MT_DATA)mnew = m_gethdr((0x0002), (1));
1125	if (mnew == NULL((void *)0)) {
1126	ifp->if_ierrorsif_data.ifi_ierrors++;
1127	goto skip;
1128	}
1129	MCLGET(mnew, M_DONTWAIT)(void) m_clget((mnew), (0x0002), (1 << 11));
1130	if (!(mnew->m_flagsm_hdr.mh_flags & M_EXT0x0001)) {
1131	m_freem(mnew);
1132	ifp->if_ierrorsif_data.ifi_ierrors++;
1133	goto skip;
1134	}
1135
1136	bus_dmamap_sync(sc->sc_dmat, data->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x02))
1137	data->map->dm_mapsize, BUS_DMASYNC_POSTREAD)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x02));
1138	bus_dmamap_unload(sc->sc_dmat, data->map)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (data ->map));
1139
1140	error = bus_dmamap_load(sc->sc_dmat, data->map,((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (data-> map), (((void )((mnew)->m_hdr.mh_data))), ((1 << 11 )), (((void *)0)), (0x0001))
1141	mtod(mnew, void ), MCLBYTES, NULL, BUS_DMA_NOWAIT)((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (data-> map), (((void )((mnew)->m_hdr.mh_data))), ((1 << 11 )), (((void )0)), (0x0001));
1142	if (error != 0) {
1143	m_freem(mnew);
1144
1145	/* try to reload the old mbuf */
1146	error = bus_dmamap_load(sc->sc_dmat, data->map,((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (data-> map), (((void )((data->m)->m_hdr.mh_data))), ((1 << 11)), (((void *)0)), (0x0001))
1147	mtod(data->m, void ), MCLBYTES, NULL,((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (data-> map), (((void )((data->m)->m_hdr.mh_data))), ((1 << 11)), (((void )0)), (0x0001))
1148	BUS_DMA_NOWAIT)((sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (data-> map), (((void )((data->m)->m_hdr.mh_data))), ((1 << 11)), (((void *)0)), (0x0001));
1149	if (error != 0) {
1150	/* very unlikely that it will fail... */
1151	panic("%s: could not load old rx mbuf",
1152	sc->sc_dev.dv_xname);
1153	}
1154	/* physical address may have changed */
1155	desc->physaddr = htole32(data->map->dm_segs->ds_addr)((__uint32_t)(data->map->dm_segs->ds_addr));
1156	ifp->if_ierrorsif_data.ifi_ierrors++;
1157	goto skip;
1158	}
1159
1160	/*
1161	* New mbuf successfully loaded, update Rx ring and continue
1162	* processing.
1163	*/
1164	m = data->m;
1165	data->m = mnew;
1166	desc->physaddr = htole32(data->map->dm_segs->ds_addr)((__uint32_t)(data->map->dm_segs->ds_addr));
1167
1168	/* finalize mbuf */
1169	m->m_pkthdrM_dat.MH.MH_pkthdr.len = m->m_lenm_hdr.mh_len =
1170	(letoh32(desc->flags)((__uint32_t)(desc->flags)) >> 16) & 0xfff;
1171
1172	#if NBPFILTER1 > 0
1173	if (sc->sc_drvbpf != NULL((void *)0)) {
1174	struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtapsc_rxtapu.th;
1175	uint32_t tsf_lo, tsf_hi;
1176
1177	/* get timestamp (low and high 32 bits) */
1178	tsf_hi = RAL_READ(sc, RT2560_CSR17)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x0044))));
1179	tsf_lo = RAL_READ(sc, RT2560_CSR16)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x0040))));
1180
1181	tap->wr_tsf =
1182	htole64(((uint64_t)tsf_hi << 32) \| tsf_lo)((__uint64_t)(((uint64_t)tsf_hi << 32) \| tsf_lo));
1183	tap->wr_flags = 0;
1184	tap->wr_rate = rt2560_rxrate(desc);
1185	tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq)((__uint16_t)(ic->ic_ibss_chan->ic_freq));
1186	tap->wr_chan_flags =
1187	htole16(ic->ic_ibss_chan->ic_flags)((__uint16_t)(ic->ic_ibss_chan->ic_flags));
1188	tap->wr_antenna = sc->rx_ant;
1189	tap->wr_antsignal = desc->rssi;
1190
1191	bpf_mtap_hdr(sc->sc_drvbpf, tap, sc->sc_txtap_len, m,
1192	BPF_DIRECTION_IN(1 << 0));
1193	}
1194	#endif
1195	wh = mtod(m, struct ieee80211_frame )((struct ieee80211_frame )((m)->m_hdr.mh_data));
1196	ni = ieee80211_find_rxnode(ic, wh);
1197
1198	/* send the frame to the 802.11 layer */
1199	rxi.rxi_flags = 0;
1200	rxi.rxi_rssi = desc->rssi;
1201	rxi.rxi_tstamp = 0; /* unused */
1202	ieee80211_inputm(ifp, m, ni, &rxi, &ml);
1203
1204	/* node is no longer needed */
1205	ieee80211_release_node(ic, ni);
1206
1207	skip: desc->flags = htole32(RT2560_RX_BUSY)((__uint32_t)((1 << 0)));
1208
1209	bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur_decrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04))
1210	sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur_decrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04))
1211	RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur_decrypt (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04));
1212
1213	DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt));
1214
1215	sc->rxq.cur_decrypt =
1216	(sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT32;
1217	}
1218	if_input(ifp, &ml);
1219	}
1220
1221	/*
1222	* Some frames were received. Pass them to the hardware cipher engine before
1223	* sending them to the 802.11 layer.
1224	*/
1225	void
1226	rt2560_rx_intr(struct rt2560_softc *sc)
1227	{
1228	for (;;) {
1229	struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur];
1230	struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur];
1231
1232	bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur (sizeof (struct rt2560_rx_desc))) , ((sizeof (struct rt2560_rx_desc))), (0x02))
1233	sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur (sizeof (struct rt2560_rx_desc))) , ((sizeof (struct rt2560_rx_desc))), (0x02))
1234	BUS_DMASYNC_POSTREAD)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur (sizeof (struct rt2560_rx_desc))) , ((sizeof (struct rt2560_rx_desc))), (0x02));
1235
1236	if (letoh32(desc->flags)((__uint32_t)(desc->flags)) &
1237	(RT2560_RX_BUSY(1 << 0) \| RT2560_RX_CIPHER_BUSY(1 << 8)))
1238	break;
1239
1240	data->drop = 0;
1241
1242	if (letoh32(desc->flags)((__uint32_t)(desc->flags)) &
1243	(RT2560_RX_PHY_ERROR(1 << 7) \| RT2560_RX_CRC_ERROR(1 << 5))) {
1244	/*
1245	* This should not happen since we did not request
1246	* to receive those frames when we filled RXCSR0.
1247	*/
1248	DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1249	letoh32(desc->flags)));
1250	data->drop = 1;
1251	}
1252
1253	if (((letoh32(desc->flags)((__uint32_t)(desc->flags)) >> 16) & 0xfff) > MCLBYTES(1 << 11)) {
1254	DPRINTFN(5, ("bad length\n"));
1255	data->drop = 1;
1256	}
1257
1258	/* mark the frame for decryption */
1259	desc->flags \|= htole32(RT2560_RX_CIPHER_BUSY)((__uint32_t)((1 << 8)));
1260
1261	bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur (sizeof (struct rt2560_rx_desc))) , ((sizeof (struct rt2560_rx_desc))), (0x04))
1262	sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur (sizeof (struct rt2560_rx_desc))) , ((sizeof (struct rt2560_rx_desc))), (0x04))
1263	BUS_DMASYNC_PREWRITE)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> rxq.map), (sc->rxq.cur (sizeof (struct rt2560_rx_desc))) , ((sizeof (struct rt2560_rx_desc))), (0x04));
1264
1265	DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur));
1266
1267	sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT32;
1268	}
1269
1270	/* kick decrypt */
1271	RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0028)), ( ((1 << 0)))));
1272	}
1273
1274	#ifndef IEEE80211_STA_ONLY
1275	/*
1276	* This function is called in HostAP or IBSS modes when it's time to send a
1277	* new beacon (every ni_intval milliseconds).
1278	*/
1279	void
1280	rt2560_beacon_expire(struct rt2560_softc *sc)
1281	{
1282	struct ieee80211com *ic = &sc->sc_ic;
1283	struct rt2560_tx_data *data;
1284
1285	if (ic->ic_opmode != IEEE80211_M_IBSS &&
1286	ic->ic_opmode != IEEE80211_M_HOSTAP)
1287	return;
1288
1289	data = &sc->bcnq.data[sc->bcnq.next];
1290
1291	if (sc->sc_flags & RT2560_UPDATE_SLOT(1 << 1)) {
1292	sc->sc_flags &= ~RT2560_UPDATE_SLOT(1 << 1);
1293	sc->sc_flags \|= RT2560_SET_SLOTTIME(1 << 2);
1294	} else if (sc->sc_flags & RT2560_SET_SLOTTIME(1 << 2)) {
1295	sc->sc_flags &= ~RT2560_SET_SLOTTIME(1 << 2);
1296	rt2560_set_slottime(sc);
1297	}
1298
1299	if (ic->ic_curmode == IEEE80211_MODE_11G) {
1300	/* update ERP Information Element */
1301	*sc->erp = ic->ic_bss->ni_erp;
1302	bus_dmamap_sync(sc->sc_dmat, data->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04))
1303	data->map->dm_mapsize, BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04));
1304	}
1305
1306	#if defined(RT2560_DEBUG) && NBPFILTER1 > 0
1307	if (ic->ic_rawbpf != NULL((void *)0))
1308	bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT(1 << 1));
1309	#endif
1310
1311	DPRINTFN(15, ("beacon expired\n"));
1312	}
1313	#endif
1314
1315	void
1316	rt2560_wakeup_expire(struct rt2560_softc *sc)
1317	{
1318	DPRINTFN(15, ("wakeup expired\n"));
1319	}
1320
1321	int
1322	rt2560_intr(void *arg)
1323	{
1324	struct rt2560_softc *sc = arg;
1325	struct ifnet *ifp = &sc->sc_ic.ic_ific_ac.ac_if;
1326	uint32_t r;
1327
1328	r = RAL_READ(sc, RT2560_CSR7)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x001c))));
1329	if (__predict_false(r == 0xffffffff)__builtin_expect(((r == 0xffffffff) != 0), 0))
1330	return 0; /* device likely went away */
1331	if (r == 0)
1332	return 0; /* not for us */
1333
1334	/* disable interrupts */
1335	RAL_WRITE(sc, RT2560_CSR8, 0xffffffff)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0020)), ( (0xffffffff))));
1336
1337	/* acknowledge interrupts */
1338	RAL_WRITE(sc, RT2560_CSR7, r)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x001c)), ( (r))));
1339
1340	/* don't re-enable interrupts if we're shutting down */
1341	if (!(ifp->if_flags & IFF_RUNNING0x40))
1342	return 0;
1343
1344	#ifndef IEEE80211_STA_ONLY
1345	if (r & RT2560_BEACON_EXPIRE0x00000001)
1346	rt2560_beacon_expire(sc);
1347	#endif
1348
1349	if (r & RT2560_WAKEUP_EXPIRE0x00000002)
1350	rt2560_wakeup_expire(sc);
1351
1352	if (r & RT2560_ENCRYPTION_DONE0x00000100)
1353	rt2560_encryption_intr(sc);
1354
1355	if (r & RT2560_TX_DONE0x00000008)
1356	rt2560_tx_intr(sc);
1357
1358	if (r & RT2560_PRIO_DONE0x00000020)
1359	rt2560_prio_intr(sc);
1360
1361	if (r & RT2560_DECRYPTION_DONE0x00000080)
1362	rt2560_decryption_intr(sc);
1363
1364	if (r & RT2560_RX_DONE0x00000040)
1365	rt2560_rx_intr(sc);
1366
1367	/* re-enable interrupts */
1368	RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0020)), ( ((~(0x00000001 \| 0x00000002 \| 0x00000008 \| 0x00000020 \| 0x00000040 \| 0x00000080 \| 0x00000100))))));
1369
1370	return 1;
1371	}
1372
1373	/* quickly determine if a given rate is CCK or OFDM */
1374	#define RAL_RATE_IS_OFDM(rate)((rate) >= 12 && (rate) != 22) ((rate) >= 12 && (rate) != 22)
1375
1376	#define RAL_ACK_SIZE14 14 /* 10 + 4(FCS) */
1377	#define RAL_CTS_SIZE14 14 /* 10 + 4(FCS) */
1378
1379	#define RAL_SIFS10 10 /* us */
1380
1381	#define RT2560_RXTX_TURNAROUND10 10 /* us */
1382
1383	/*
1384	* This function is only used by the Rx radiotap code. It returns the rate at
1385	* which a given frame was received.
1386	*/
1387	#if NBPFILTER1 > 0
1388	uint8_t
1389	rt2560_rxrate(const struct rt2560_rx_desc *desc)
1390	{
1391	if (letoh32(desc->flags)((__uint32_t)(desc->flags)) & RT2560_RX_OFDM(1 << 6)) {
1392	/* reverse function of rt2560_plcp_signal */
1393	switch (desc->rate) {
1394	case 0xb: return 12;
1395	case 0xf: return 18;
1396	case 0xa: return 24;
1397	case 0xe: return 36;
1398	case 0x9: return 48;
1399	case 0xd: return 72;
1400	case 0x8: return 96;
1401	case 0xc: return 108;
1402	}
1403	} else {
1404	if (desc->rate == 10)
1405	return 2;
1406	if (desc->rate == 20)
1407	return 4;
1408	if (desc->rate == 55)
1409	return 11;
1410	if (desc->rate == 110)
1411	return 22;
1412	}
1413	return 2; /* should not get there */
1414	}
1415	#endif
1416
1417	/*
1418	* Return the expected ack rate for a frame transmitted at rate `rate'.
1419	*/
1420	int
1421	rt2560_ack_rate(struct ieee80211com *ic, int rate)
1422	{
1423	switch (rate) {
1424	/* CCK rates */
1425	case 2:
1426	return 2;
1427	case 4:
1428	case 11:
1429	case 22:
1430	return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1431
1432	/* OFDM rates */
1433	case 12:
1434	case 18:
1435	return 12;
1436	case 24:
1437	case 36:
1438	return 24;
1439	case 48:
1440	case 72:
1441	case 96:
1442	case 108:
1443	return 48;
1444	}
1445
1446	/* default to 1Mbps */
1447	return 2;
1448	}
1449
1450	/*
1451	* Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1452	* The function automatically determines the operating mode depending on the
1453	* given rate. `flags' indicates whether short preamble is in use or not.
1454	*/
1455	uint16_t
1456	rt2560_txtime(int len, int rate, uint32_t flags)
1457	{
1458	uint16_t txtime;
1459
1460	if (RAL_RATE_IS_OFDM(rate)((rate) >= 12 && (rate) != 22)) {
1461	/* IEEE Std 802.11g-2003, pp. 44 */
1462	txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1463	txtime = 16 + 4 + 4 * txtime + 6;
1464	} else {
1465	/* IEEE Std 802.11b-1999, pp. 28 */
1466	txtime = (16 * len + rate - 1) / rate;
1467	if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE0x00040000))
1468	txtime += 72 + 24;
1469	else
1470	txtime += 144 + 48;
1471	}
1472	return txtime;
1473	}
1474
1475	uint8_t
1476	rt2560_plcp_signal(int rate)
1477	{
1478	switch (rate) {
1479	/* CCK rates (returned values are device-dependent) */
1480	case 2: return 0x0;
1481	case 4: return 0x1;
1482	case 11: return 0x2;
1483	case 22: return 0x3;
1484
1485	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1486	case 12: return 0xb;
1487	case 18: return 0xf;
1488	case 24: return 0xa;
1489	case 36: return 0xe;
1490	case 48: return 0x9;
1491	case 72: return 0xd;
1492	case 96: return 0x8;
1493	case 108: return 0xc;
1494
1495	/* unsupported rates (should not get there) */
1496	default: return 0xff;
1497	}
1498	}
1499
1500	void
1501	rt2560_setup_tx_desc(struct rt2560_softc sc, struct rt2560_tx_desc desc,
1502	uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1503	{
1504	struct ieee80211com *ic = &sc->sc_ic;
1505	uint16_t plcp_length;
1506	int remainder;
1507
1508	desc->flags = htole32(flags)((__uint32_t)(flags));
1509	desc->flags \|= htole32(len << 16)((__uint32_t)(len << 16));
1510	desc->flags \|= encrypt ? htole32(RT2560_TX_CIPHER_BUSY)((__uint32_t)((1 << 12))) :
1511	htole32(RT2560_TX_BUSY \| RT2560_TX_VALID)((__uint32_t)((1 << 0) \| (1 << 1)));
1512
1513	desc->physaddr = htole32(physaddr)((__uint32_t)(physaddr));
1514	desc->wme = htole16(((__uint16_t)((((2) & 0x3) << 6) \| (((3) & 0xf) << 8) \| (((8) & 0xf) << 12)))
1515	RT2560_AIFSN(2) \|((__uint16_t)((((2) & 0x3) << 6) \| (((3) & 0xf) << 8) \| (((8) & 0xf) << 12)))
1516	RT2560_LOGCWMIN(3) \|((__uint16_t)((((2) & 0x3) << 6) \| (((3) & 0xf) << 8) \| (((8) & 0xf) << 12)))
1517	RT2560_LOGCWMAX(8))((__uint16_t)((((2) & 0x3) << 6) \| (((3) & 0xf) << 8) \| (((8) & 0xf) << 12)));
1518
1519	/* setup PLCP fields */
1520	desc->plcp_signal = rt2560_plcp_signal(rate);
1521	desc->plcp_service = 4;
1522
1523	len += IEEE80211_CRC_LEN4;
1524	if (RAL_RATE_IS_OFDM(rate)((rate) >= 12 && (rate) != 22)) {
1525	desc->flags \|= htole32(RT2560_TX_OFDM)((__uint32_t)((1 << 11)));
1526
1527	plcp_length = len & 0xfff;
1528	desc->plcp_length_hi = plcp_length >> 6;
1529	desc->plcp_length_lo = plcp_length & 0x3f;
1530	} else {
1531	plcp_length = (16 * len + rate - 1) / rate;
1532	if (rate == 22) {
1533	remainder = (16 * len) % 22;
1534	if (remainder != 0 && remainder < 7)
1535	desc->plcp_service \|= RT2560_PLCP_LENGEXT0x80;
1536	}
1537	desc->plcp_length_hi = plcp_length >> 8;
1538	desc->plcp_length_lo = plcp_length & 0xff;
1539
1540	if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE0x00040000))
1541	desc->plcp_signal \|= 0x08;
1542	}
1543	}
1544
1545	#ifndef IEEE80211_STA_ONLY
1546	int
1547	rt2560_tx_bcn(struct rt2560_softc sc, struct mbuf m0,
1548	struct ieee80211_node *ni)
1549	{
1550	struct ieee80211com *ic = &sc->sc_ic;
1551	struct rt2560_tx_desc *desc;
1552	struct rt2560_tx_data *data;
1553	int rate = 2, error;
1554
1555	desc = &sc->bcnq.desc[sc->bcnq.cur];
1556	data = &sc->bcnq.data[sc->bcnq.cur];
1557
1558	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (m0), (0x0001))
1559	BUS_DMA_NOWAIT)(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (m0), (0x0001));
1560	if (error != 0) {
1561	printf("%s: can't map mbuf (error %d)\n",
1562	sc->sc_dev.dv_xname, error);
1563	m_freem(m0);
1564	return error;
1565	}
1566
1567	data->m = m0;
1568	data->ni = ni;
1569
1570	rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF(2 << 13) \|
1571	RT2560_TX_TIMESTAMP(1 << 10), m0->m_pkthdrM_dat.MH.MH_pkthdr.len, rate, 0,
1572	data->map->dm_segs->ds_addr);
1573
1574	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04))
1575	BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04));
1576	bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> bcnq.map), (sc->bcnq.cur (sizeof (struct rt2560_tx_desc) )), ((sizeof (struct rt2560_tx_desc))), (0x04))
1577	sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> bcnq.map), (sc->bcnq.cur (sizeof (struct rt2560_tx_desc) )), ((sizeof (struct rt2560_tx_desc))), (0x04))
1578	BUS_DMASYNC_PREWRITE)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> bcnq.map), (sc->bcnq.cur (sizeof (struct rt2560_tx_desc) )), ((sizeof (struct rt2560_tx_desc))), (0x04));
1579
1580	/*
1581	* Store pointer to ERP Information Element so that we can update it
1582	* dynamically when the slot time changes.
1583	* XXX: this is ugly since it depends on how net80211 builds beacon
1584	* frames but ieee80211_beacon_alloc() don't store offsets for us.
1585	*/
1586	if (ic->ic_curmode == IEEE80211_MODE_11G) {
1587	sc->erp =
1588	mtod(m0, uint8_t )((uint8_t )((m0)->m_hdr.mh_data)) +
1589	sizeof (struct ieee80211_frame) +
1590	8 + 2 + 2 +
1591	((ic->ic_userflags & IEEE80211_F_HIDENWID0x00000001) ?
1592	1 : 2 + ni->ni_esslen) +
1593	2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE8) +
1594	2 + 1 +
1595	((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) +
1596	2;
1597	}
1598
1599	return 0;
1600	}
1601	#endif
1602
1603	int
1604	rt2560_tx_mgt(struct rt2560_softc sc, struct mbuf m0,
1605	struct ieee80211_node *ni)
1606	{
1607	struct ieee80211com *ic = &sc->sc_ic;
1608	struct rt2560_tx_desc *desc;
1609	struct rt2560_tx_data *data;
1610	struct ieee80211_frame *wh;
1611	uint16_t dur;
1612	uint32_t flags = 0;
1613	int rate = 2, error;
1614
1615	desc = &sc->prioq.desc[sc->prioq.cur];
1616	data = &sc->prioq.data[sc->prioq.cur];
1617
1618	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (m0), (0x0001))
1619	BUS_DMA_NOWAIT)(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (m0), (0x0001));
1620	if (error != 0) {
1621	printf("%s: can't map mbuf (error %d)\n",
1622	sc->sc_dev.dv_xname, error);
1623	m_freem(m0);
1624	return error;
1625	}
1626
1627	#if NBPFILTER1 > 0
1628	if (sc->sc_drvbpf != NULL((void *)0)) {
1629	struct rt2560_tx_radiotap_header *tap = &sc->sc_txtapsc_txtapu.th;
1630
1631	tap->wt_flags = 0;
1632	tap->wt_rate = rate;
1633	tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq)((__uint16_t)(ic->ic_ibss_chan->ic_freq));
1634	tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags)((__uint16_t)(ic->ic_ibss_chan->ic_flags));
1635	tap->wt_antenna = sc->tx_ant;
1636
1637	bpf_mtap_hdr(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0,
1638	BPF_DIRECTION_OUT(1 << 1));
1639	}
1640	#endif
1641
1642	data->m = m0;
1643	data->ni = ni;
1644
1645	wh = mtod(m0, struct ieee80211_frame )((struct ieee80211_frame )((m0)->m_hdr.mh_data));
1646
1647	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)(*(wh->i_addr1) & 0x01)) {
1648	flags \|= RT2560_TX_NEED_ACK(1 << 9);
1649
1650	dur = rt2560_txtime(RAL_ACK_SIZE14, rate, ic->ic_flags) +
1651	RAL_SIFS10;
1652	(uint16_t )wh->i_dur = htole16(dur)((__uint16_t)(dur));
1653
1654	#ifndef IEEE80211_STA_ONLY
1655	/* tell hardware to set timestamp for probe responses */
1656	if ((wh->i_fc[0] &
1657	(IEEE80211_FC0_TYPE_MASK0x0c \| IEEE80211_FC0_SUBTYPE_MASK0xf0)) ==
1658	(IEEE80211_FC0_TYPE_MGT0x00 \| IEEE80211_FC0_SUBTYPE_PROBE_RESP0x50))
1659	flags \|= RT2560_TX_TIMESTAMP(1 << 10);
1660	#endif
1661	}
1662
1663	rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdrM_dat.MH.MH_pkthdr.len, rate, 0,
1664	data->map->dm_segs->ds_addr);
1665
1666	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04))
1667	BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04));
1668	bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> prioq.map), (sc->prioq.cur (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04))
1669	sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> prioq.map), (sc->prioq.cur (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04))
1670	BUS_DMASYNC_PREWRITE)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (sc-> prioq.map), (sc->prioq.cur (sizeof (struct rt2560_tx_desc ))), ((sizeof (struct rt2560_tx_desc))), (0x04));
1671
1672	DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1673	m0->m_pkthdr.len, sc->prioq.cur, rate));
1674
1675	/* kick prio */
1676	sc->prioq.queued++;
1677	sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT16;
1678	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0060)), ( ((1 << 2)))));
1679
1680	return 0;
1681	}
1682
1683	int
1684	rt2560_tx_data(struct rt2560_softc sc, struct mbuf m0,
1685	struct ieee80211_node *ni)
1686	{
1687	struct ieee80211com *ic = &sc->sc_ic;
1688	struct rt2560_tx_ring *txq = &sc->txq;
1689	struct rt2560_tx_desc *desc;
1690	struct rt2560_tx_data *data;
1691	struct ieee80211_frame *wh;
1692	struct ieee80211_key *k;
1693	struct mbuf *m1;
1694	uint16_t dur;
1695	uint32_t flags = 0;
1696	int pktlen, rate, needcts = 0, needrts = 0, error;
1697
1698	wh = mtod(m0, struct ieee80211_frame )((struct ieee80211_frame )((m0)->m_hdr.mh_data));
1699
1700	if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED0x40) {
1701	k = ieee80211_get_txkey(ic, wh, ni);
1702
1703	if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL((void *)0))
1704	return ENOBUFS55;
1705
1706	/* packet header may have moved, reset our local pointer */
1707	wh = mtod(m0, struct ieee80211_frame )((struct ieee80211_frame )((m0)->m_hdr.mh_data));
1708	}
1709
1710	/* compute actual packet length (including CRC and crypto overhead) */
1711	pktlen = m0->m_pkthdrM_dat.MH.MH_pkthdr.len + IEEE80211_CRC_LEN4;
1712
1713	/* pickup a rate */
1714	if (IEEE80211_IS_MULTICAST(wh->i_addr1)(*(wh->i_addr1) & 0x01) \|\|
1715	((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK0x0c) ==
1716	IEEE80211_FC0_TYPE_MGT0x00)) {
1717	/* mgmt/multicast frames are sent at the lowest avail. rate */
1718	rate = ni->ni_rates.rs_rates[0];
1719	} else if (ic->ic_fixed_rate != -1) {
1720	rate = ic->ic_sup_rates[ic->ic_curmode].
1721	rs_rates[ic->ic_fixed_rate];
1722	} else
1723	rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1724	if (rate == 0)
1725	rate = 2; /* XXX should not happen */
1726	rate &= IEEE80211_RATE_VAL0x7f;
1727
1728	/*
1729	* Packet Bursting: backoff after ppb=8 frames to give other STAs a
1730	* chance to contend for the wireless medium.
1731	*/
1732	if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7))
1733	flags \|= RT2560_TX_IFS_SIFS(1 << 13);
1734
1735	/* check if RTS/CTS or CTS-to-self protection must be used */
1736	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)(*(wh->i_addr1) & 0x01)) {
1737	/* multicast frames are not sent at OFDM rates in 802.11b/g */
1738	if (pktlen > ic->ic_rtsthreshold) {
1739	needrts = 1; /* RTS/CTS based on frame length */
1740	} else if ((ic->ic_flags & IEEE80211_F_USEPROT0x00100000) &&
1741	RAL_RATE_IS_OFDM(rate)((rate) >= 12 && (rate) != 22)) {
1742	if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
1743	needcts = 1; /* CTS-to-self */
1744	else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
1745	needrts = 1; /* RTS/CTS */
1746	}
1747	}
1748	if (needrts \|\| needcts) {
1749	struct mbuf *mprot;
1750	int protrate, ackrate;
1751
1752	protrate = 2; /* XXX */
1753	ackrate = rt2560_ack_rate(ic, rate);
1754
1755	dur = rt2560_txtime(pktlen, rate, ic->ic_flags) +
1756	rt2560_txtime(RAL_ACK_SIZE14, ackrate, ic->ic_flags) +
1757	2 * RAL_SIFS10;
1758	if (needrts) {
1759	dur += rt2560_txtime(RAL_CTS_SIZE14, rt2560_ack_rate(ic,
1760	protrate), ic->ic_flags) + RAL_SIFS10;
1761	mprot = ieee80211_get_rts(ic, wh, dur);
1762	} else {
1763	mprot = ieee80211_get_cts_to_self(ic, dur);
1764	}
1765	if (mprot == NULL((void *)0)) {
1766	printf("%s: could not allocate protection frame\n",
1767	sc->sc_dev.dv_xname);
1768	m_freem(m0);
1769	return ENOBUFS55;
1770	}
1771
1772	desc = &txq->desc[txq->cur_encrypt];
1773	data = &txq->data[txq->cur_encrypt];
1774
1775	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot,(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (mprot), (0x0001))
1776	BUS_DMA_NOWAIT)(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (mprot), (0x0001));
1777	if (error != 0) {
1778	printf("%s: can't map mbuf (error %d)\n",
1779	sc->sc_dev.dv_xname, error);
1780	m_freem(mprot);
1781	m_freem(m0);
1782	return error;
1783	}
1784
1785	data->m = mprot;
1786	/* avoid multiple free() of the same node for each fragment */
1787	data->ni = ieee80211_ref_node(ni);
1788
1789	/* XXX may want to pass the protection frame to BPF */
1790
1791	rt2560_setup_tx_desc(sc, desc,
1792	(needrts ? RT2560_TX_NEED_ACK(1 << 9) : 0) \| RT2560_TX_MORE_FRAG(1 << 8),
1793	mprot->m_pkthdrM_dat.MH.MH_pkthdr.len, protrate, 1,
1794	data->map->dm_segs->ds_addr);
1795
1796	bus_dmamap_sync(sc->sc_dmat, data->map, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04))
1797	data->map->dm_mapsize, BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04));
1798	bus_dmamap_sync(sc->sc_dmat, txq->map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (txq-> map), (txq->cur_encrypt (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x04))
1799	txq->cur_encrypt * RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (txq-> map), (txq->cur_encrypt (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x04))
1800	RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (txq-> map), (txq->cur_encrypt (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x04));
1801
1802	txq->queued++;
1803	if (++txq->cur_encrypt >= txq->count)
1804	txq->cur_encrypt = 0;
1805
1806	flags \|= RT2560_TX_LONG_RETRY(1 << 15) \| RT2560_TX_IFS_SIFS(1 << 13);
1807	}
1808
1809	data = &txq->data[txq->cur_encrypt];
1810	desc = &txq->desc[txq->cur_encrypt];
1811
1812	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (m0), (0x0001))
1813	BUS_DMA_NOWAIT)(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (m0), (0x0001));
1814	if (error != 0 && error != EFBIG27) {
1815	printf("%s: can't map mbuf (error %d)\n",
1816	sc->sc_dev.dv_xname, error);
1817	m_freem(m0);
1818	return error;
1819	}
1820	if (error != 0) {
1821	/* too many fragments, linearize */
1822	MGETHDR(m1, M_DONTWAIT, MT_DATA)m1 = m_gethdr((0x0002), (1));
1823	if (m1 == NULL((void *)0)) {
1824	m_freem(m0);
1825	return ENOBUFS55;
1826	}
1827	if (m0->m_pkthdrM_dat.MH.MH_pkthdr.len > MHLEN((256 - sizeof(struct m_hdr)) - sizeof(struct pkthdr))) {
1828	MCLGET(m1, M_DONTWAIT)(void) m_clget((m1), (0x0002), (1 << 11));
1829	if (!(m1->m_flagsm_hdr.mh_flags & M_EXT0x0001)) {
1830	m_freem(m0);
1831	m_freem(m1);
1832	return ENOBUFS55;
1833	}
1834	}
1835	m_copydata(m0, 0, m0->m_pkthdrM_dat.MH.MH_pkthdr.len, mtod(m1, caddr_t)((caddr_t)((m1)->m_hdr.mh_data)));
1836	m1->m_pkthdrM_dat.MH.MH_pkthdr.len = m1->m_lenm_hdr.mh_len = m0->m_pkthdrM_dat.MH.MH_pkthdr.len;
1837	m_freem(m0);
1838	m0 = m1;
1839
1840	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (m0), (0x0001))
1841	BUS_DMA_NOWAIT)(*(sc->sc_dmat)->_dmamap_load_mbuf)((sc->sc_dmat), ( data->map), (m0), (0x0001));
1842	if (error != 0) {
1843	printf("%s: can't map mbuf (error %d)\n",
1844	sc->sc_dev.dv_xname, error);
1845	m_freem(m0);
1846	return error;
1847	}
1848
1849	/* packet header have moved, reset our local pointer */
1850	wh = mtod(m0, struct ieee80211_frame )((struct ieee80211_frame )((m0)->m_hdr.mh_data));
1851	}
1852
1853	#if NBPFILTER1 > 0
1854	if (sc->sc_drvbpf != NULL((void *)0)) {
1855	struct rt2560_tx_radiotap_header *tap = &sc->sc_txtapsc_txtapu.th;
1856
1857	tap->wt_flags = 0;
1858	tap->wt_rate = rate;
1859	tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq)((__uint16_t)(ic->ic_ibss_chan->ic_freq));
1860	tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags)((__uint16_t)(ic->ic_ibss_chan->ic_flags));
1861	tap->wt_antenna = sc->tx_ant;
1862
1863	bpf_mtap_hdr(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0,
1864	BPF_DIRECTION_OUT(1 << 1));
1865	}
1866	#endif
1867
1868	data->m = m0;
1869	data->ni = ni;
1870
1871	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)(*(wh->i_addr1) & 0x01)) {
1872	flags \|= RT2560_TX_NEED_ACK(1 << 9);
1873
1874	dur = rt2560_txtime(RAL_ACK_SIZE14, rt2560_ack_rate(ic, rate),
1875	ic->ic_flags) + RAL_SIFS10;
1876	(uint16_t )wh->i_dur = htole16(dur)((__uint16_t)(dur));
1877	}
1878
1879	rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdrM_dat.MH.MH_pkthdr.len, rate, 1,
1880	data->map->dm_segs->ds_addr);
1881
1882	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04))
1883	BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (data-> map), (0), (data->map->dm_mapsize), (0x04));
1884	bus_dmamap_sync(sc->sc_dmat, txq->map,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (txq-> map), (txq->cur_encrypt (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x04))
1885	txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (txq-> map), (txq->cur_encrypt (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x04))
1886	BUS_DMASYNC_PREWRITE)((sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (txq-> map), (txq->cur_encrypt (sizeof (struct rt2560_tx_desc)) ), ((sizeof (struct rt2560_tx_desc))), (0x04));
1887
1888	DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n",
1889	m0->m_pkthdr.len, txq->cur_encrypt, rate));
1890
1891	/* kick encrypt */
1892	txq->queued++;
1893	if (++txq->cur_encrypt >= txq->count)
1894	txq->cur_encrypt = 0;
1895	RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0158)), ( ((1 << 0)))));
1896
1897	return 0;
1898	}
1899
1900	void
1901	rt2560_start(struct ifnet *ifp)
1902	{
1903	struct rt2560_softc *sc = ifp->if_softc;
1904	struct ieee80211com *ic = &sc->sc_ic;
1905	struct mbuf *m0;
1906	struct ieee80211_node *ni;
1907
1908	/*
1909	* net80211 may still try to send management frames even if the
1910	* IFF_RUNNING flag is not set...
1911	*/
1912	if (!(ifp->if_flags & IFF_RUNNING0x40) \|\| ifq_is_oactive(&ifp->if_snd))
1913	return;
1914
1915	for (;;) {
1916	if (mq_len(&ic->ic_mgtq)((&(&ic->ic_mgtq)->mq_list)->ml_len) > 0) {
1917	if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT16) {
1918	ifq_set_oactive(&ifp->if_snd);
1919	sc->sc_flags \|= RT2560_PRIO_OACTIVE(1 << 3);
1920	break;
1921	}
1922
1923	m0 = mq_dequeue(&ic->ic_mgtq);
1924	if (m0 == NULL((void *)0))
1925	continue;
1926	ni = m0->m_pkthdrM_dat.MH.MH_pkthdr.ph_cookie;
1927	#if NBPFILTER1 > 0
1928	if (ic->ic_rawbpf != NULL((void *)0))
1929	bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT(1 << 1));
1930	#endif
1931	if (rt2560_tx_mgt(sc, m0, ni) != 0)
1932	break;
1933
1934	} else {
1935	/* Because RTS/CTS requires an extra frame we need
1936	* space for 2 frames on the regular Tx queue. */
1937	if (sc->txq.queued >= RT2560_TX_RING_COUNT48 - 1) {
1938	ifq_set_oactive(&ifp->if_snd);
1939	sc->sc_flags \|= RT2560_DATA_OACTIVE(1 << 4);
1940	break;
1941	}
1942
1943	if (ic->ic_state != IEEE80211_S_RUN)
1944	break;
1945
1946	m0 = ifq_dequeue(&ifp->if_snd);
1947	if (m0 == NULL((void *)0))
1948	break;
1949	#if NBPFILTER1 > 0
1950	if (ifp->if_bpf != NULL((void *)0))
1951	bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT(1 << 1));
1952	#endif
1953	m0 = ieee80211_encap(ifp, m0, &ni);
1954	if (m0 == NULL((void *)0))
1955	continue;
1956	#if NBPFILTER1 > 0
1957	if (ic->ic_rawbpf != NULL((void *)0))
1958	bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT(1 << 1));
1959	#endif
1960	if (rt2560_tx_data(sc, m0, ni) != 0) {
1961	if (ni != NULL((void *)0))
1962	ieee80211_release_node(ic, ni);
1963	ifp->if_oerrorsif_data.ifi_oerrors++;
1964	break;
1965	}
1966	}
1967
1968	sc->sc_tx_timer = 5;
1969	ifp->if_timer = 1;
1970	}
1971	}
1972
1973	void
1974	rt2560_watchdog(struct ifnet *ifp)
1975	{
1976	struct rt2560_softc *sc = ifp->if_softc;
1977
1978	ifp->if_timer = 0;
1979
1980	if (sc->sc_tx_timer > 0) {
1981	if (--sc->sc_tx_timer == 0) {
1982	printf("%s: device timeout\n", sc->sc_dev.dv_xname);
1983	rt2560_init(ifp);
1984	ifp->if_oerrorsif_data.ifi_oerrors++;
1985	return;
1986	}
1987	ifp->if_timer = 1;
1988	}
1989
1990	ieee80211_watchdog(ifp);
1991	}
1992
1993	int
1994	rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1995	{
1996	struct rt2560_softc *sc = ifp->if_softc;
1997	struct ieee80211com *ic = &sc->sc_ic;
1998	int s, error = 0;
1999
2000	s = splnet()splraise(0x7);
2001
2002	switch (cmd) {
2003	case SIOCSIFADDR((unsigned long)0x80000000 \| ((sizeof(struct ifreq) & 0x1fff ) << 16) \| ((('i')) << 8) \| ((12))):
2004	ifp->if_flags \|= IFF_UP0x1;
2005	/* FALLTHROUGH */
2006	case SIOCSIFFLAGS((unsigned long)0x80000000 \| ((sizeof(struct ifreq) & 0x1fff ) << 16) \| ((('i')) << 8) \| ((16))):
2007	if (ifp->if_flags & IFF_UP0x1) {
2008	if (ifp->if_flags & IFF_RUNNING0x40)
2009	rt2560_update_promisc(sc);
2010	else
2011	rt2560_init(ifp);
2012	} else {
2013	if (ifp->if_flags & IFF_RUNNING0x40)
2014	rt2560_stop(ifp, 1);
2015	}
2016	break;
2017
2018	case SIOCS80211CHANNEL((unsigned long)0x80000000 \| ((sizeof(struct ieee80211chanreq ) & 0x1fff) << 16) \| ((('i')) << 8) \| ((238)) ):
2019	/*
2020	* This allows for fast channel switching in monitor mode
2021	* (used by kismet). In IBSS mode, we must explicitly reset
2022	* the interface to generate a new beacon frame.
2023	*/
2024	error = ieee80211_ioctl(ifp, cmd, data);
2025	if (error == ENETRESET52 &&
2026	ic->ic_opmode == IEEE80211_M_MONITOR) {
2027	if ((ifp->if_flags & (IFF_UP0x1 \| IFF_RUNNING0x40)) ==
2028	(IFF_UP0x1 \| IFF_RUNNING0x40))
2029	rt2560_set_chan(sc, ic->ic_ibss_chan);
2030	error = 0;
2031	}
2032	break;
2033
2034	default:
2035	error = ieee80211_ioctl(ifp, cmd, data);
2036	}
2037
2038	if (error == ENETRESET52) {
2039	if ((ifp->if_flags & (IFF_UP0x1 \| IFF_RUNNING0x40)) ==
2040	(IFF_UP0x1 \| IFF_RUNNING0x40))
2041	rt2560_init(ifp);
2042	error = 0;
2043	}
2044
2045	splx(s)spllower(s);
2046
2047	return error;
2048	}
2049
2050	void
2051	rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
2052	{
2053	uint32_t tmp;
2054	int ntries;
2055
2056	for (ntries = 0; ntries < 100; ntries++) {
2057	if (!(RAL_READ(sc, RT2560_BBPCSR)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x00f0)))) & RT2560_BBP_BUSY(1U << 15)))
2058	break;
2059	DELAY(1)(*delay_func)(1);
2060	}
2061	if (ntries == 100) {
2062	printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
2063	return;
2064	}
2065
2066	tmp = RT2560_BBP_WRITE(1U << 16) \| RT2560_BBP_BUSY(1U << 15) \| reg << 8 \| val;
2067	RAL_WRITE(sc, RT2560_BBPCSR, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x00f0)), ( (tmp))));
2068
2069	DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2070	}
2071
2072	uint8_t
2073	rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
2074	{
2075	uint32_t val;
2076	int ntries;
2077
2078	for (ntries = 0; ntries < 100; ntries++) {
2079	if (!(RAL_READ(sc, RT2560_BBPCSR)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x00f0)))) & RT2560_BBP_BUSY(1U << 15)))
2080	break;
2081	DELAY(1)(*delay_func)(1);
2082	}
2083	if (ntries == 100) {
2084	printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname);
2085	return 0;
2086	}
2087
2088	val = RT2560_BBP_BUSY(1U << 15) \| reg << 8;
2089	RAL_WRITE(sc, RT2560_BBPCSR, val)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x00f0)), ( (val))));
2090
2091	for (ntries = 0; ntries < 100; ntries++) {
2092	val = RAL_READ(sc, RT2560_BBPCSR)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x00f0))));
2093	if (!(val & RT2560_BBP_BUSY(1U << 15)))
2094	return val & 0xff;
2095	DELAY(1)(*delay_func)(1);
2096	}
2097
2098	printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname);
2099	return 0;
2100	}
2101
2102	void
2103	rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2104	{
2105	uint32_t tmp;
2106	int ntries;
2107
2108	for (ntries = 0; ntries < 100; ntries++) {
2109	if (!(RAL_READ(sc, RT2560_RFCSR)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x00f4)))) & RT2560_RF_BUSY(1U << 31)))
2110	break;
2111	DELAY(1)(*delay_func)(1);
2112	}
2113	if (ntries == 100) {
2114	printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
2115	return;
2116	}
2117
2118	tmp = RT2560_RF_BUSY(1U << 31) \| RT2560_RF_20BIT(20U << 24) \| (val & 0xfffff) << 2 \|
2119	(reg & 0x3);
2120	RAL_WRITE(sc, RT2560_RFCSR, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x00f4)), ( (tmp))));
2121
2122	/* remember last written value in sc */
2123	sc->rf_regs[reg] = val;
2124
2125	DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
2126	}
2127
2128	void
2129	rt2560_set_chan(struct rt2560_softc sc, struct ieee80211_channel c)
2130	{
2131	struct ieee80211com *ic = &sc->sc_ic;
2132	uint8_t power, tmp;
2133	u_int chan;
2134
2135	chan = ieee80211_chan2ieee(ic, c);
2136	if (chan == 0 \|\| chan == IEEE80211_CHAN_ANY0xffff)
2137	return;
2138
2139	power = min(sc->txpow[chan - 1], 31);
2140
2141	DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
2142
2143	switch (sc->rf_rev) {
2144	case RT2560_RF_25220x00:
2145	rt2560_rf_write(sc, RT2560_RF10, 0x00814);
2146	rt2560_rf_write(sc, RT2560_RF22, rt2560_rf2522_r2[chan - 1]);
2147	rt2560_rf_write(sc, RT2560_RF31, power << 7 \| 0x00040);
2148	break;
2149
2150	case RT2560_RF_25230x01:
2151	rt2560_rf_write(sc, RT2560_RF10, 0x08804);
2152	rt2560_rf_write(sc, RT2560_RF22, rt2560_rf2523_r2[chan - 1]);
2153	rt2560_rf_write(sc, RT2560_RF31, power << 7 \| 0x38044);
2154	rt2560_rf_write(sc, RT2560_RF43,
2155	(chan == 14) ? 0x00280 : 0x00286);
2156	break;
2157
2158	case RT2560_RF_25240x02:
2159	rt2560_rf_write(sc, RT2560_RF10, 0x0c808);
2160	rt2560_rf_write(sc, RT2560_RF22, rt2560_rf2524_r2[chan - 1]);
2161	rt2560_rf_write(sc, RT2560_RF31, power << 7 \| 0x00040);
2162	rt2560_rf_write(sc, RT2560_RF43,
2163	(chan == 14) ? 0x00280 : 0x00286);
2164	break;
2165
2166	case RT2560_RF_25250x03:
2167	rt2560_rf_write(sc, RT2560_RF10, 0x08808);
2168	rt2560_rf_write(sc, RT2560_RF22, rt2560_rf2525_hi_r2[chan - 1]);
2169	rt2560_rf_write(sc, RT2560_RF31, power << 7 \| 0x18044);
2170	rt2560_rf_write(sc, RT2560_RF43,
2171	(chan == 14) ? 0x00280 : 0x00286);
2172
2173	rt2560_rf_write(sc, RT2560_RF10, 0x08808);
2174	rt2560_rf_write(sc, RT2560_RF22, rt2560_rf2525_r2[chan - 1]);
2175	rt2560_rf_write(sc, RT2560_RF31, power << 7 \| 0x18044);
2176	rt2560_rf_write(sc, RT2560_RF43,
2177	(chan == 14) ? 0x00280 : 0x00286);
2178	break;
2179
2180	case RT2560_RF_2525E0x04:
2181	rt2560_rf_write(sc, RT2560_RF10, 0x08808);
2182	rt2560_rf_write(sc, RT2560_RF22, rt2560_rf2525e_r2[chan - 1]);
2183	rt2560_rf_write(sc, RT2560_RF31, power << 7 \| 0x18044);
2184	rt2560_rf_write(sc, RT2560_RF43,
2185	(chan == 14) ? 0x00286 : 0x00282);
2186	break;
2187
2188	case RT2560_RF_25260x05:
2189	rt2560_rf_write(sc, RT2560_RF22, rt2560_rf2526_hi_r2[chan - 1]);
2190	rt2560_rf_write(sc, RT2560_RF43,
2191	(chan & 1) ? 0x00386 : 0x00381);
2192	rt2560_rf_write(sc, RT2560_RF10, 0x08804);
2193
2194	rt2560_rf_write(sc, RT2560_RF22, rt2560_rf2526_r2[chan - 1]);
2195	rt2560_rf_write(sc, RT2560_RF31, power << 7 \| 0x18044);
2196	rt2560_rf_write(sc, RT2560_RF43,
2197	(chan & 1) ? 0x00386 : 0x00381);
2198	break;
2199	}
2200
2201	if (ic->ic_opmode != IEEE80211_M_MONITOR &&
2202	ic->ic_state != IEEE80211_S_SCAN) {
2203	/* set Japan filter bit for channel 14 */
2204	tmp = rt2560_bbp_read(sc, 70);
2205
2206	tmp &= ~RT2560_JAPAN_FILTER0x8;
2207	if (chan == 14)
2208	tmp \|= RT2560_JAPAN_FILTER0x8;
2209
2210	rt2560_bbp_write(sc, 70, tmp);
2211
2212	DELAY(1000)(delay_func)(1000); / RF needs a 1ms delay here */
2213	rt2560_disable_rf_tune(sc);
2214
2215	/* clear CRC errors */
2216	RAL_READ(sc, RT2560_CNT0)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x00a0))));
2217	}
2218	}
2219
2220	/*
2221	* Disable RF auto-tuning.
2222	*/
2223	void
2224	rt2560_disable_rf_tune(struct rt2560_softc *sc)
2225	{
2226	uint32_t tmp;
2227
2228	if (sc->rf_rev != RT2560_RF_25230x01) {
2229	tmp = sc->rf_regs[RT2560_RF10] & ~RT2560_RF1_AUTOTUNE0x08000;
2230	rt2560_rf_write(sc, RT2560_RF10, tmp);
2231	}
2232
2233	tmp = sc->rf_regs[RT2560_RF31] & ~RT2560_RF3_AUTOTUNE0x00040;
2234	rt2560_rf_write(sc, RT2560_RF31, tmp);
2235
2236	DPRINTFN(2, ("disabling RF autotune\n"));
2237	}
2238
2239	/*
2240	* Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2241	* synchronization.
2242	*/
2243	void
2244	rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2245	{
2246	struct ieee80211com *ic = &sc->sc_ic;
2247	uint16_t logcwmin, preload;
2248	uint32_t tmp;
2249
2250	/* first, disable TSF synchronization */
2251	RAL_WRITE(sc, RT2560_CSR14, 0)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0038)), ( (0))));
2252
2253	tmp = 16 * ic->ic_bss->ni_intval;
2254	RAL_WRITE(sc, RT2560_CSR12, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0030)), ( (tmp))));
2255
2256	RAL_WRITE(sc, RT2560_CSR13, 0)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0034)), ( (0))));
2257
2258	logcwmin = 5;
2259	preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024;
2260	tmp = logcwmin << 16 \| preload;
2261	RAL_WRITE(sc, RT2560_BCNOCSR, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0130)), ( (tmp))));
2262
2263	/* finally, enable TSF synchronization */
2264	tmp = RT2560_ENABLE_TSF(1 << 0) \| RT2560_ENABLE_TBCN(1 << 3);
2265	if (ic->ic_opmode == IEEE80211_M_STA)
2266	tmp \|= RT2560_ENABLE_TSF_SYNC(1)(((1) & 0x3) << 1);
2267	#ifndef IEEE80211_STA_ONLY
2268	else
2269	tmp \|= RT2560_ENABLE_TSF_SYNC(2)(((2) & 0x3) << 1) \|
2270	RT2560_ENABLE_BEACON_GENERATOR(1 << 6);
2271	#endif
2272	RAL_WRITE(sc, RT2560_CSR14, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0038)), ( (tmp))));
2273
2274	DPRINTF(("enabling TSF synchronization\n"));
2275	}
2276
2277	void
2278	rt2560_update_plcp(struct rt2560_softc *sc)
2279	{
2280	struct ieee80211com *ic = &sc->sc_ic;
2281
2282	/* no short preamble for 1Mbps */
2283	RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x013c)), ( (0x00700400))));
2284
2285	if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE0x00040000)) {
2286	/* values taken from the reference driver */
2287	RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0140)), ( (0x00380401))));
2288	RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0144)), ( (0x00150402))));
2289	RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0148)), ( (0x000b8403))));
2290	} else {
2291	/* same values as above or'ed 0x8 */
2292	RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0140)), ( (0x00380409))));
2293	RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0144)), ( (0x0015040a))));
2294	RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0148)), ( (0x000b840b))));
2295	}
2296
2297	DPRINTF(("updating PLCP for %s preamble\n",
2298	(ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"));
2299	}
2300
2301	void
2302	rt2560_updateslot(struct ieee80211com *ic)
2303	{
2304	struct rt2560_softc *sc = ic->ic_ific_ac.ac_if.if_softc;
2305
2306	#ifndef IEEE80211_STA_ONLY
2307	if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
2308	/*
2309	* In HostAP mode, we defer setting of new slot time until
2310	* updated ERP Information Element has propagated to all
2311	* associated STAs.
2312	*/
2313	sc->sc_flags \|= RT2560_UPDATE_SLOT(1 << 1);
2314	} else
2315	#endif
2316	rt2560_set_slottime(sc);
2317	}
2318
2319	/*
2320	* IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to
2321	* IEEE Std 802.11-1999 pp. 85 to know how these values are computed.
2322	*/
2323	void
2324	rt2560_set_slottime(struct rt2560_softc *sc)
2325	{
2326	struct ieee80211com *ic = &sc->sc_ic;
2327	uint8_t slottime;
2328	uint16_t sifs, pifs, difs, eifs;
2329	uint32_t tmp;
2330
2331	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT0x00020000) ?
2332	IEEE80211_DUR_DS_SHSLOT9 : IEEE80211_DUR_DS_SLOT20;
2333
2334	/* define the MAC slot boundaries */
2335	sifs = RAL_SIFS10 - RT2560_RXTX_TURNAROUND10;
2336	pifs = sifs + slottime;
2337	difs = sifs + 2 * slottime;
2338	eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2339
2340	tmp = RAL_READ(sc, RT2560_CSR11)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x002c))));
2341	tmp = (tmp & ~0x1f00) \| slottime << 8;
2342	RAL_WRITE(sc, RT2560_CSR11, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x002c)), ( (tmp))));
2343
2344	tmp = pifs << 16 \| sifs;
2345	RAL_WRITE(sc, RT2560_CSR18, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0048)), ( (tmp))));
2346
2347	tmp = eifs << 16 \| difs;
2348	RAL_WRITE(sc, RT2560_CSR19, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x004c)), ( (tmp))));
2349
2350	DPRINTF(("setting slottime to %uus\n", slottime));
2351	}
2352
2353	void
2354	rt2560_set_basicrates(struct rt2560_softc *sc)
2355	{
2356	struct ieee80211com *ic = &sc->sc_ic;
2357
2358	/* update basic rate set */
2359	if (ic->ic_curmode == IEEE80211_MODE_11B) {
2360	/* 11b basic rates: 1, 2Mbps */
2361	RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x009c)), ( (0x3))));
2362	} else {
2363	/* 11b/g basic rates: 1, 2, 5.5, 11Mbps */
2364	RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x009c)), ( (0xf))));
2365	}
2366	}
2367
2368	void
2369	rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2370	{
2371	uint32_t tmp;
2372
2373	/* set ON period to 70ms and OFF period to 30ms */
2374	tmp = led1 << 16 \| led2 << 17 \| 70 << 8 \| 30;
2375	RAL_WRITE(sc, RT2560_LEDCSR, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x00f8)), ( (tmp))));
2376	}
2377
2378	void
2379	rt2560_set_bssid(struct rt2560_softc sc, uint8_t bssid)
2380	{
2381	uint32_t tmp;
2382
2383	tmp = bssid[0] \| bssid[1] << 8 \| bssid[2] << 16 \| bssid[3] << 24;
2384	RAL_WRITE(sc, RT2560_CSR5, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0014)), ( (tmp))));
2385
2386	tmp = bssid[4] \| bssid[5] << 8;
2387	RAL_WRITE(sc, RT2560_CSR6, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0018)), ( (tmp))));
2388
2389	DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
2390	}
2391
2392	void
2393	rt2560_set_macaddr(struct rt2560_softc sc, uint8_t addr)
2394	{
2395	uint32_t tmp;
2396
2397	tmp = addr[0] \| addr[1] << 8 \| addr[2] << 16 \| addr[3] << 24;
2398	RAL_WRITE(sc, RT2560_CSR3, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x000c)), ( (tmp))));
2399
2400	tmp = addr[4] \| addr[5] << 8;
2401	RAL_WRITE(sc, RT2560_CSR4, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0010)), ( (tmp))));
2402
2403	DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
2404	}
2405
2406	void
2407	rt2560_get_macaddr(struct rt2560_softc sc, uint8_t addr)
2408	{
2409	uint32_t tmp;
2410
2411	tmp = RAL_READ(sc, RT2560_CSR3)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x000c))));
2412	addr[0] = tmp & 0xff;
2413	addr[1] = (tmp >> 8) & 0xff;
2414	addr[2] = (tmp >> 16) & 0xff;
2415	addr[3] = (tmp >> 24);
2416
2417	tmp = RAL_READ(sc, RT2560_CSR4)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x0010))));
2418	addr[4] = tmp & 0xff;
2419	addr[5] = (tmp >> 8) & 0xff;
2420	}
2421
2422	void
2423	rt2560_update_promisc(struct rt2560_softc *sc)
2424	{
2425	struct ifnet *ifp = &sc->sc_ic.ic_ific_ac.ac_if;
2426	uint32_t tmp;
2427
2428	tmp = RAL_READ(sc, RT2560_RXCSR0)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x0080))));
2429
2430	tmp &= ~RT2560_DROP_NOT_TO_ME(1 << 4);
2431	if (!(ifp->if_flags & IFF_PROMISC0x100))
2432	tmp \|= RT2560_DROP_NOT_TO_ME(1 << 4);
2433
2434	RAL_WRITE(sc, RT2560_RXCSR0, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0080)), ( (tmp))));
2435
2436	DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2437	"entering" : "leaving"));
2438	}
2439
2440	void
2441	rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2442	{
2443	uint32_t tmp;
2444	uint8_t tx;
2445
2446	tx = rt2560_bbp_read(sc, RT2560_BBP_TX2) & ~RT2560_BBP_ANTMASK0x03;
2447	if (antenna == 1)
2448	tx \|= RT2560_BBP_ANTA0x00;
2449	else if (antenna == 2)
2450	tx \|= RT2560_BBP_ANTB0x02;
2451	else
2452	tx \|= RT2560_BBP_DIVERSITY0x01;
2453
2454	/* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2455	if (sc->rf_rev == RT2560_RF_2525E0x04 \|\| sc->rf_rev == RT2560_RF_25260x05 \|\|
2456	sc->rf_rev == RT2560_RF_52220x10)
2457	tx \|= RT2560_BBP_FLIPIQ0x04;
2458
2459	rt2560_bbp_write(sc, RT2560_BBP_TX2, tx);
2460
2461	/* update values for CCK and OFDM in BBPCSR1 */
2462	tmp = RAL_READ(sc, RT2560_BBPCSR1)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x015c)))) & ~0x00070007;
2463	tmp \|= (tx & 0x7) << 16 \| (tx & 0x7);
2464	RAL_WRITE(sc, RT2560_BBPCSR1, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x015c)), ( (tmp))));
2465	}
2466
2467	void
2468	rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2469	{
2470	uint8_t rx;
2471
2472	rx = rt2560_bbp_read(sc, RT2560_BBP_RX14) & ~RT2560_BBP_ANTMASK0x03;
2473	if (antenna == 1)
2474	rx \|= RT2560_BBP_ANTA0x00;
2475	else if (antenna == 2)
2476	rx \|= RT2560_BBP_ANTB0x02;
2477	else
2478	rx \|= RT2560_BBP_DIVERSITY0x01;
2479
2480	/* need to force no I/Q flip for RF 2525e and 2526 */
2481	if (sc->rf_rev == RT2560_RF_2525E0x04 \|\| sc->rf_rev == RT2560_RF_25260x05)
2482	rx &= ~RT2560_BBP_FLIPIQ0x04;
2483
2484	rt2560_bbp_write(sc, RT2560_BBP_RX14, rx);
2485	}
2486
2487	const char *
2488	rt2560_get_rf(int rev)
2489	{
2490	switch (rev) {
2491	case RT2560_RF_25220x00: return "RT2522";
2492	case RT2560_RF_25230x01: return "RT2523";
2493	case RT2560_RF_25240x02: return "RT2524";
2494	case RT2560_RF_25250x03: return "RT2525";
2495	case RT2560_RF_2525E0x04: return "RT2525e";
2496	case RT2560_RF_25260x05: return "RT2526";
2497	case RT2560_RF_52220x10: return "RT5222";
2498	default: return "unknown";
2499	}
2500	}
2501
2502	void
2503	rt2560_read_eeprom(struct rt2560_softc *sc)
2504	{
2505	uint16_t val;
2506	int i;
2507
2508	val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG016);
2509	sc->rf_rev = (val >> 11) & 0x1f;
2510	sc->hw_radio = (val >> 10) & 0x1;
2511	sc->led_mode = (val >> 6) & 0x7;
2512	sc->rx_ant = (val >> 4) & 0x3;
2513	sc->tx_ant = (val >> 2) & 0x3;
2514	sc->nb_ant = val & 0x3;
2515
2516	/* read default values for BBP registers */
2517	for (i = 0; i < 16; i++) {
2518	val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE19 + i);
2519	sc->bbp_prom[i].reg = val >> 8;
2520	sc->bbp_prom[i].val = val & 0xff;
2521	}
2522
2523	/* read Tx power for all b/g channels */
2524	for (i = 0; i < 14 / 2; i++) {
2525	val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER35 + i);
2526	sc->txpow[i * 2] = val >> 8;
2527	sc->txpow[i * 2 + 1] = val & 0xff;
2528	}
2529	}
2530
2531	int
2532	rt2560_bbp_init(struct rt2560_softc *sc)
2533	{
2534	int i, ntries;
2535
2536	/* wait for BBP to be ready */
2537	for (ntries = 0; ntries < 100; ntries++) {
2538	if (rt2560_bbp_read(sc, RT2560_BBP_VERSION0) != 0)
2539	break;
2540	DELAY(1)(*delay_func)(1);
2541	}
2542	if (ntries == 100) {
2543	printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname);
2544	return EIO5;
2545	}
2546
2547	/* initialize BBP registers to default values */
2548	for (i = 0; i < nitems(rt2560_def_bbp)(sizeof((rt2560_def_bbp)) / sizeof((rt2560_def_bbp)[0])); i++) {
2549	rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2550	rt2560_def_bbp[i].val);
2551	}
2552	#if 0
2553	/* initialize BBP registers to values stored in EEPROM */
2554	for (i = 0; i < 16; i++) {
2555	if (sc->bbp_prom[i].reg == 0xff)
2556	continue;
2557	rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2558	}
2559	#endif
2560
2561	return 0;
2562	}
2563
2564	int
2565	rt2560_init(struct ifnet *ifp)
2566	{
2567	struct rt2560_softc *sc = ifp->if_softc;
2568	struct ieee80211com *ic = &sc->sc_ic;
2569	uint32_t tmp;
2570	int i;
2571
2572	/* for CardBus, power on the socket */
2573	if (!(sc->sc_flags & RT2560_ENABLED(1 << 0))) {
2574	if (sc->sc_enable != NULL((void )0) && (sc->sc_enable)(sc) != 0) {
2575	printf("%s: could not enable device\n",
2576	sc->sc_dev.dv_xname);
2577	return EIO5;
2578	}
2579	sc->sc_flags \|= RT2560_ENABLED(1 << 0);
2580	}
2581
2582	rt2560_stop(ifp, 0);
2583
2584	/* setup tx rings */
2585	tmp = RT2560_PRIO_RING_COUNT16 << 24 \|
2586	RT2560_ATIM_RING_COUNT4 << 16 \|
2587	RT2560_TX_RING_COUNT48 << 8 \|
2588	RT2560_TX_DESC_SIZE(sizeof (struct rt2560_tx_desc));
2589
2590	/* rings _must_ be initialized in this _exact_ order! */
2591	RAL_WRITE(sc, RT2560_TXCSR2, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0068)), ( (tmp))));
2592	RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x006c)), ( (sc->txq.physaddr))));
2593	RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0074)), ( (sc->prioq.physaddr))));
2594	RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0070)), ( (sc->atimq.physaddr))));
2595	RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0078)), ( (sc->bcnq.physaddr))));
2596
2597	/* setup rx ring */
2598	tmp = RT2560_RX_RING_COUNT32 << 8 \| RT2560_RX_DESC_SIZE(sizeof (struct rt2560_rx_desc));
2599
2600	RAL_WRITE(sc, RT2560_RXCSR1, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0084)), ( (tmp))));
2601	RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0088)), ( (sc->rxq.physaddr))));
2602
2603	/* initialize MAC registers to default values */
2604	for (i = 0; i < nitems(rt2560_def_mac)(sizeof((rt2560_def_mac)) / sizeof((rt2560_def_mac)[0])); i++)
2605	RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((rt2560_def_mac [i].reg)), ((rt2560_def_mac[i].val))));
2606
2607	IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl))__builtin_memcpy((ic->ic_myaddr), (((caddr_t)((ifp->if_sadl )->sdl_data + (ifp->if_sadl)->sdl_nlen))), (6));
2608	rt2560_set_macaddr(sc, ic->ic_myaddr);
2609
2610	/* set basic rate set (will be updated later) */
2611	RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x009c)), ( (0x153))));
2612
2613	rt2560_set_slottime(sc);
2614	rt2560_update_plcp(sc);
2615	rt2560_update_led(sc, 0, 0);
2616
2617	RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0004)), ( ((1 << 0)))));
2618	RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0004)), ( ((1 << 2)))));
2619
2620	if (rt2560_bbp_init(sc) != 0) {
2621	rt2560_stop(ifp, 1);
2622	return EIO5;
2623	}
2624
2625	rt2560_set_txantenna(sc, 1);
2626	rt2560_set_rxantenna(sc, 1);
2627
2628	/* set default BSS channel */
2629	ic->ic_bss->ni_chan = ic->ic_ibss_chan;
2630	rt2560_set_chan(sc, ic->ic_bss->ni_chan);
2631
2632	/* kick Rx */
2633	tmp = RT2560_DROP_PHY_ERROR(1 << 2) \| RT2560_DROP_CRC_ERROR(1 << 1);
2634	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2635	tmp \|= RT2560_DROP_CTL(1 << 3) \| RT2560_DROP_VERSION_ERROR(1 << 6);
2636	#ifndef IEEE80211_STA_ONLY
2637	if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2638	#endif
2639	tmp \|= RT2560_DROP_TODS(1 << 5);
2640	if (!(ifp->if_flags & IFF_PROMISC0x100))
2641	tmp \|= RT2560_DROP_NOT_TO_ME(1 << 4);
2642	}
2643	RAL_WRITE(sc, RT2560_RXCSR0, tmp)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0080)), ( (tmp))));
2644
2645	/* clear old FCS and Rx FIFO errors */
2646	RAL_READ(sc, RT2560_CNT0)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x00a0))));
2647	RAL_READ(sc, RT2560_CNT4)(((sc)->sc_st)->read_4(((sc)->sc_sh), ((0x00bc))));
2648
2649	/* clear any pending interrupts */
2650	RAL_WRITE(sc, RT2560_CSR7, 0xffffffff)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x001c)), ( (0xffffffff))));
2651
2652	/* enable interrupts */
2653	RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0020)), ( ((~(0x00000001 \| 0x00000002 \| 0x00000008 \| 0x00000020 \| 0x00000040 \| 0x00000080 \| 0x00000100))))));
2654
2655	ifp->if_flags \|= IFF_RUNNING0x40;
2656	ifq_clr_oactive(&ifp->if_snd);
2657
2658	if (ic->ic_opmode == IEEE80211_M_MONITOR)
2659	ieee80211_new_state(ic, IEEE80211_S_RUN, -1)(((ic)->ic_newstate)((ic), (IEEE80211_S_RUN), (-1)));
2660	else
2661	ieee80211_new_state(ic, IEEE80211_S_SCAN, -1)(((ic)->ic_newstate)((ic), (IEEE80211_S_SCAN), (-1)));
2662
2663	return 0;
2664	}
2665
2666	void
2667	rt2560_stop(struct ifnet *ifp, int disable)
2668	{
2669	struct rt2560_softc *sc = ifp->if_softc;
2670	struct ieee80211com *ic = &sc->sc_ic;
2671
2672	sc->sc_tx_timer = 0;
2673	sc->sc_flags &= ~(RT2560_PRIO_OACTIVE(1 << 3)\|RT2560_DATA_OACTIVE(1 << 4));
2674	ifp->if_timer = 0;
2675	ifp->if_flags &= ~IFF_RUNNING0x40;
2676	ifq_clr_oactive(&ifp->if_snd);
2677
2678	ieee80211_new_state(ic, IEEE80211_S_INIT, -1)(((ic)->ic_newstate)((ic), (IEEE80211_S_INIT), (-1))); /* free all nodes */
2679
2680	/* abort Tx */
2681	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0060)), ( ((1 << 3)))));
2682
2683	/* disable Rx */
2684	RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0080)), ( ((1 << 0)))));
2685
2686	/* reset ASIC (and thus, BBP) */
2687	RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0004)), ( ((1 << 0)))));
2688	RAL_WRITE(sc, RT2560_CSR1, 0)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0004)), ( (0))));
2689
2690	/* disable interrupts */
2691	RAL_WRITE(sc, RT2560_CSR8, 0xffffffff)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x0020)), ( (0xffffffff))));
2692
2693	/* clear any pending interrupt */
2694	RAL_WRITE(sc, RT2560_CSR7, 0xffffffff)(((sc)->sc_st)->write_4(((sc)->sc_sh), ((0x001c)), ( (0xffffffff))));
2695
2696	/* reset Tx and Rx rings */
2697	rt2560_reset_tx_ring(sc, &sc->txq);
2698	rt2560_reset_tx_ring(sc, &sc->atimq);
2699	rt2560_reset_tx_ring(sc, &sc->prioq);
2700	rt2560_reset_tx_ring(sc, &sc->bcnq);
2701	rt2560_reset_rx_ring(sc, &sc->rxq);
2702
2703	/* for CardBus, power down the socket */
2704	if (disable && sc->sc_disable != NULL((void *)0)) {
2705	if (sc->sc_flags & RT2560_ENABLED(1 << 0)) {
2706	(*sc->sc_disable)(sc);
2707	sc->sc_flags &= ~RT2560_ENABLED(1 << 0);
2708	}
2709	}
2710	}
2711
2712	struct cfdriver ral_cd = {
2713	NULL((void *)0), "ral", DV_IFNET
2714	};