/usr/src/sys/dev/pci/drm/amd/display/include/fixed31

Bug Summary

File:	dev/pci/drm/amd/display/include/fixed31_32.h
Warning:	line 534, column 22 The result of the left shift is undefined because the left operand is negative

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.0 -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name dc_resource.c -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/lib/clang/13.0.0 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -D CONFIG_DRM_AMD_DC_DCN3_0 -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /usr/obj/sys/arch/amd64/compile/GENERIC.MP/scan-build/2022-01-12-131800-47421-1 -x c /usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

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1/*
* Copyright 2012-15 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/

26#include <linux/slab.h>

28#include "dm_services.h"

30#include "resource.h"
31#include "include/irq_service_interface.h"
32#include "link_encoder.h"
33#include "stream_encoder.h"
34#include "opp.h"
35#include "timing_generator.h"
36#include "transform.h"
37#include "dccg.h"
38#include "dchubbub.h"
39#include "dpp.h"
40#include "core_types.h"
41#include "set_mode_types.h"
42#include "virtual/virtual_stream_encoder.h"
43#include "dpcd_defs.h"

45#if defined(CONFIG_DRM_AMD_DC_SI)
46#include "dce60/dce60_resource.h"
47#endif
48#include "dce80/dce80_resource.h"
49#include "dce100/dce100_resource.h"
50#include "dce110/dce110_resource.h"
51#include "dce112/dce112_resource.h"
52#include "dce120/dce120_resource.h"
53#if defined(CONFIG_DRM_AMD_DC_DCN1)
54#include "dcn10/dcn10_resource.h"
55#include "dcn20/dcn20_resource.h"
56#include "dcn21/dcn21_resource.h"
57#endif
58#if defined(CONFIG_DRM_AMD_DC_DCN3_01)
59#include "../dcn30/dcn30_resource.h"
60#endif

62#define DC_LOGGER_INIT(logger)

64enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
65{
enum dce_version dc_version = DCE_VERSION_UNKNOWN;
switch (asic_id.chip_family) {

69#if defined(CONFIG_DRM_AMD_DC_SI)
case FAMILY_SI110:
if (ASIC_REV_IS_TAHITI_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x01) && (asic_id.hw_internal_rev
 < 0x14)) ||
    ASIC_REV_IS_PITCAIRN_PM(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x14) && (asic_id.hw_internal_rev
 < 0x28)) ||
    ASIC_REV_IS_CAPEVERDE_M(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x28) && (asic_id.hw_internal_rev
 < 0x3C)))
	dc_version = DCE_VERSION_6_0;
else if (ASIC_REV_IS_OLAND_M(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x3C) && (asic_id.hw_internal_rev
 < 0x46)))
	dc_version = DCE_VERSION_6_4;
else
	dc_version = DCE_VERSION_6_1;
break;
80#endif
case FAMILY_CI120:
dc_version = DCE_VERSION_8_0;
break;
case FAMILY_KV125:
if (ASIC_REV_IS_KALINDI(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x81) && (asic_id.hw_internal_rev
 < 0xFF)) ||
    ASIC_REV_IS_BHAVANI(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x85) && (asic_id.hw_internal_rev
 < 0xA1)) ||
    ASIC_REV_IS_GODAVARI(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0xA1) && (asic_id.hw_internal_rev
 < 0xFF)))
	dc_version = DCE_VERSION_8_3;
else
	dc_version = DCE_VERSION_8_1;
break;
case FAMILY_CZ135:
dc_version = DCE_VERSION_11_0;
break;

case FAMILY_VI130:
if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 20) && (asic_id.hw_internal_rev
 < 40)) ||
		ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 60) && (asic_id.hw_internal_rev
 < 80))) {
	dc_version = DCE_VERSION_10_0;
	break;
}
if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 80) && (asic_id.hw_internal_rev
 < 90)) ||
		ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 90) && (asic_id.hw_internal_rev
 < 100)) ||
		ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 100) && (asic_id.hw_internal_rev
 < 110))) {
	dc_version = DCE_VERSION_11_2;
}
if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)(asic_id.hw_internal_rev >= 110))
	dc_version = DCE_VERSION_11_22;
break;
case FAMILY_AI141:
if (ASICREV_IS_VEGA20_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 40) && (asic_id.hw_internal_rev
 < 0xFF)))
	dc_version = DCE_VERSION_12_1;
else
	dc_version = DCE_VERSION_12_0;
break;
116#if defined(CONFIG_DRM_AMD_DC_DCN1)
case FAMILY_RV142:
dc_version = DCN_VERSION_1_0;
if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x81) && (asic_id.hw_internal_rev
 < 0x91)))
	dc_version = DCN_VERSION_1_01;
if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x91) && (asic_id.hw_internal_rev
 < 0xF0)))
	dc_version = DCN_VERSION_2_1;
if (ASICREV_IS_GREEN_SARDINE(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0xA1) && (asic_id.hw_internal_rev
 < 0xFF)))
	dc_version = DCN_VERSION_2_1;
break;
126#endif

case FAMILY_NV143:
dc_version = DCN_VERSION_2_0;
130#if defined(CONFIG_DRM_AMD_DC_DCN3_01)
if (ASICREV_IS_SIENNA_CICHLID_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= NV_SIENNA_CICHLID_P_A0)))
	dc_version = DCN_VERSION_3_0;
133#endif
break;
default:
dc_version = DCE_VERSION_UNKNOWN;
break;
}
return dc_version;
140}

142struct resource_pool *dc_create_resource_pool(struct dc  *dc,
			      const struct dc_init_data *init_data,
			      enum dce_version dc_version)
145{
struct resource_pool *res_pool = NULL((void *)0);

switch (dc_version) {
149#if defined(CONFIG_DRM_AMD_DC_SI)
case DCE_VERSION_6_0:
res_pool = dce60_create_resource_pool(
	init_data->num_virtual_links, dc);
break;
case DCE_VERSION_6_1:
res_pool = dce61_create_resource_pool(
	init_data->num_virtual_links, dc);
break;
case DCE_VERSION_6_4:
res_pool = dce64_create_resource_pool(
	init_data->num_virtual_links, dc);
break;
162#endif
case DCE_VERSION_8_0:
res_pool = dce80_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_8_1:
res_pool = dce81_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_8_3:
res_pool = dce83_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_10_0:
res_pool = dce100_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_11_0:
res_pool = dce110_create_resource_pool(
		init_data->num_virtual_links, dc,
		init_data->asic_id);
break;
case DCE_VERSION_11_2:
case DCE_VERSION_11_22:
res_pool = dce112_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_12_0:
case DCE_VERSION_12_1:
res_pool = dce120_create_resource_pool(
		init_data->num_virtual_links, dc);
break;

195#if defined(CONFIG_DRM_AMD_DC_DCN1)
case DCN_VERSION_1_0:
case DCN_VERSION_1_01:
res_pool = dcn10_create_resource_pool(init_data, dc);
break;


case DCN_VERSION_2_0:
res_pool = dcn20_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_2_1:
res_pool = dcn21_create_resource_pool(init_data, dc);
break;
208#endif
209#if defined(CONFIG_DRM_AMD_DC_DCN3_01)
case DCN_VERSION_3_0:
res_pool = dcn30_create_resource_pool(init_data, dc);
break;
213#endif

default:
break;
}

if (res_pool != NULL((void *)0)) {
if (dc->ctx->dc_bios->fw_info_valid) {
	res_pool->ref_clocks.xtalin_clock_inKhz =
		dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency;
	/* initialize with firmware data first, no all
	 * ASIC have DCCG SW component. FPGA or
	 * simulation need initialization of
	 * dccg_ref_clock_inKhz, dchub_ref_clock_inKhz
	 * with xtalin_clock_inKhz
	 */
	res_pool->ref_clocks.dccg_ref_clock_inKhz =
		res_pool->ref_clocks.xtalin_clock_inKhz;
	res_pool->ref_clocks.dchub_ref_clock_inKhz =
		res_pool->ref_clocks.xtalin_clock_inKhz;
} else
	ASSERT_CRITICAL(false)do { if (({ int __ret = !!(!(0)); if (__ret) printf("WARNING %s failed at %s:%d\n"
, "!(0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 234); __builtin_expect(!!(__ret), 0); })) do {} while (0); }
 while (0);
}

return res_pool;
238}

240void dc_destroy_resource_pool(struct dc  *dc)
241{
if (dc) {
if (dc->res_pool)
	dc->res_pool->funcs->destroy(&dc->res_pool);

kfree(dc->hwseq);
}
248}

250static void update_num_audio(
const struct resource_straps *straps,
unsigned int *num_audio,
struct audio_support *aud_support)
254{
aud_support->dp_audio = true1;
aud_support->hdmi_audio_native = false0;
aud_support->hdmi_audio_on_dongle = false0;

if (straps->hdmi_disable == 0) {
if (straps->dc_pinstraps_audio & 0x2) {
	aud_support->hdmi_audio_on_dongle = true1;
	aud_support->hdmi_audio_native = true1;
}
}

switch (straps->audio_stream_number) {
case 0: /* multi streams supported */
break;
case 1: /* multi streams not supported */
*num_audio = 1;
break;
default:
DC_ERR("DC: unexpected audio fuse!\n")do { __drm_err("DC: unexpected audio fuse!\n"); do { __drm_dbg
(DRM_UT_DRIVER, "%s():%d\n", __func__, 273); do {} while (0);
 } while (0); } while (0);
}
275}

277bool_Bool resource_construct(
unsigned int num_virtual_links,
struct dc  *dc,
struct resource_pool *pool,
const struct resource_create_funcs *create_funcs)
282{
struct dc_context *ctx = dc->ctx;
const struct resource_caps *caps = pool->res_cap;
int i;
unsigned int num_audio = caps->num_audio;
struct resource_straps straps = {0};

if (create_funcs->read_dce_straps)
create_funcs->read_dce_straps(dc->ctx, &straps);

pool->audio_count = 0;
if (create_funcs->create_audio) {
/* find the total number of streams available via the
 * AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT
 * registers (one for each pin) starting from pin 1
 * up to the max number of audio pins.
 * We stop on the first pin where
 * PORT_CONNECTIVITY == 1 (as instructed by HW team).
 */
update_num_audio(&straps, &num_audio, &pool->audio_support);
for (i = 0; i < caps->num_audio; i++) {
	struct audio *aud = create_funcs->create_audio(ctx, i);

	if (aud == NULL((void *)0)) {
		DC_ERR("DC: failed to create audio!\n")do { __drm_err("DC: failed to create audio!\n"); do { __drm_dbg
(DRM_UT_DRIVER, "%s():%d\n", __func__, 306); do {} while (0);
 } while (0); } while (0);
		return false0;
	}
	if (!aud->funcs->endpoint_valid(aud)) {
		aud->funcs->destroy(&aud);
		break;
	}
	pool->audios[i] = aud;
	pool->audio_count++;
}
}

pool->stream_enc_count = 0;
if (create_funcs->create_stream_encoder) {
for (i = 0; i < caps->num_stream_encoder; i++) {
	pool->stream_enc[i] = create_funcs->create_stream_encoder(i, ctx);
	if (pool->stream_enc[i] == NULL((void *)0))
		DC_ERR("DC: failed to create stream_encoder!\n")do { __drm_err("DC: failed to create stream_encoder!\n"); do {
 __drm_dbg(DRM_UT_DRIVER, "%s():%d\n", __func__, 323); do {} while
 (0); } while (0); } while (0);
	pool->stream_enc_count++;
}
}

328#if defined(CONFIG_DRM_AMD_DC_DCN3_01)
for (i = 0; i < caps->num_mpc_3dlut; i++) {
pool->mpc_lut[i] = dc_create_3dlut_func();
if (pool->mpc_lut[i] == NULL((void *)0))
	DC_ERR("DC: failed to create MPC 3dlut!\n")do { __drm_err("DC: failed to create MPC 3dlut!\n"); do { __drm_dbg
(DRM_UT_DRIVER, "%s():%d\n", __func__, 332); do {} while (0);
 } while (0); } while (0);
pool->mpc_shaper[i] = dc_create_transfer_func();
if (pool->mpc_shaper[i] == NULL((void *)0))
	DC_ERR("DC: failed to create MPC shaper!\n")do { __drm_err("DC: failed to create MPC shaper!\n"); do { __drm_dbg
(DRM_UT_DRIVER, "%s():%d\n", __func__, 335); do {} while (0);
 } while (0); } while (0);
}
337#endif
dc->caps.dynamic_audio = false0;
if (pool->audio_count < pool->stream_enc_count) {
dc->caps.dynamic_audio = true1;
}
for (i = 0; i < num_virtual_links; i++) {
pool->stream_enc[pool->stream_enc_count] =
	virtual_stream_encoder_create(
			ctx, ctx->dc_bios);
if (pool->stream_enc[pool->stream_enc_count] == NULL((void *)0)) {
	DC_ERR("DC: failed to create stream_encoder!\n")do { __drm_err("DC: failed to create stream_encoder!\n"); do {
 __drm_dbg(DRM_UT_DRIVER, "%s():%d\n", __func__, 347); do {} while
 (0); } while (0); } while (0);
	return false0;
}
pool->stream_enc_count++;
}

dc->hwseq = create_funcs->create_hwseq(ctx);

return true1;
356}
357static int find_matching_clock_source(
const struct resource_pool *pool,
struct clock_source *clock_source)
360{

int i;

for (i = 0; i < pool->clk_src_count; i++) {
if (pool->clock_sources[i] == clock_source)
	return i;
}
return -1;
369}

371void resource_unreference_clock_source(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct clock_source *clock_source)
375{
int i = find_matching_clock_source(pool, clock_source);

if (i > -1)
res_ctx->clock_source_ref_count[i]--;

if (pool->dp_clock_source == clock_source)
res_ctx->dp_clock_source_ref_count--;
383}

385void resource_reference_clock_source(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct clock_source *clock_source)
389{
int i = find_matching_clock_source(pool, clock_source);

if (i > -1)
res_ctx->clock_source_ref_count[i]++;

if (pool->dp_clock_source == clock_source)
res_ctx->dp_clock_source_ref_count++;
397}

399int resource_get_clock_source_reference(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct clock_source *clock_source)
403{
int i = find_matching_clock_source(pool, clock_source);

if (i > -1)
return res_ctx->clock_source_ref_count[i];

if (pool->dp_clock_source == clock_source)
return res_ctx->dp_clock_source_ref_count;

return -1;
413}

415bool_Bool resource_are_streams_timing_synchronizable(
struct dc_stream_state *stream1,
struct dc_stream_state *stream2)
418{
if (stream1->timing.h_total != stream2->timing.h_total)
return false0;

if (stream1->timing.v_total != stream2->timing.v_total)
return false0;

if (stream1->timing.h_addressable
		!= stream2->timing.h_addressable)
return false0;

if (stream1->timing.v_addressable
		!= stream2->timing.v_addressable)
return false0;

if (stream1->timing.v_front_porch
		!= stream2->timing.v_front_porch)
return false0;

if (stream1->timing.pix_clk_100hz
		!= stream2->timing.pix_clk_100hz)
return false0;

if (stream1->clamping.c_depth != stream2->clamping.c_depth)
return false0;

if (stream1->phy_pix_clk != stream2->phy_pix_clk
	&& (!dc_is_dp_signal(stream1->signal)
	|| !dc_is_dp_signal(stream2->signal)))
return false0;

if (stream1->view_format != stream2->view_format)
return false0;

if (stream1->ignore_msa_timing_param || stream2->ignore_msa_timing_param)
return false0;

return true1;
456}
457static bool_Bool is_dp_and_hdmi_sharable(
struct dc_stream_state *stream1,
struct dc_stream_state *stream2)
460{
if (stream1->ctx->dc->caps.disable_dp_clk_share)
return false0;

if (stream1->clamping.c_depth != COLOR_DEPTH_888 ||
stream2->clamping.c_depth != COLOR_DEPTH_888)
return false0;

return true1;

470}

472static bool_Bool is_sharable_clk_src(
const struct pipe_ctx *pipe_with_clk_src,
const struct pipe_ctx *pipe)
475{
if (pipe_with_clk_src->clock_source == NULL((void *)0))
return false0;

if (pipe_with_clk_src->stream->signal == SIGNAL_TYPE_VIRTUAL)
return false0;

if (dc_is_dp_signal(pipe_with_clk_src->stream->signal) ||
(dc_is_dp_signal(pipe->stream->signal) &&
!is_dp_and_hdmi_sharable(pipe_with_clk_src->stream,
		     pipe->stream)))
return false0;

if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal)
	&& dc_is_dual_link_signal(pipe->stream->signal))
return false0;

if (dc_is_hdmi_signal(pipe->stream->signal)
	&& dc_is_dual_link_signal(pipe_with_clk_src->stream->signal))
return false0;

if (!resource_are_streams_timing_synchronizable(
	pipe_with_clk_src->stream, pipe->stream))
return false0;

return true1;
501}

503struct clock_source *resource_find_used_clk_src_for_sharing(
			struct resource_context *res_ctx,
			struct pipe_ctx *pipe_ctx)
506{
int i;

for (i = 0; i < MAX_PIPES6; i++) {
if (is_sharable_clk_src(&res_ctx->pipe_ctx[i], pipe_ctx))
	return res_ctx->pipe_ctx[i].clock_source;
}

return NULL((void *)0);
515}

517static enum pixel_format convert_pixel_format_to_dalsurface(
enum surface_pixel_format surface_pixel_format)
519{
enum pixel_format dal_pixel_format = PIXEL_FORMAT_UNKNOWN;

switch (surface_pixel_format) {
case SURFACE_PIXEL_FORMAT_GRPH_PALETA_256_COLORS:
dal_pixel_format = PIXEL_FORMAT_INDEX8;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555:
dal_pixel_format = PIXEL_FORMAT_RGB565;
break;
case SURFACE_PIXEL_FORMAT_GRPH_RGB565:
dal_pixel_format = PIXEL_FORMAT_RGB565;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888:
dal_pixel_format = PIXEL_FORMAT_ARGB8888;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888:
dal_pixel_format = PIXEL_FORMAT_ARGB8888;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010:
dal_pixel_format = PIXEL_FORMAT_ARGB2101010;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010:
dal_pixel_format = PIXEL_FORMAT_ARGB2101010;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010_XR_BIAS:
dal_pixel_format = PIXEL_FORMAT_ARGB2101010_XRBIAS;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F:
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F:
dal_pixel_format = PIXEL_FORMAT_FP16;
break;
case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr:
case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb:
dal_pixel_format = PIXEL_FORMAT_420BPP8;
break;
case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr:
case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb:
dal_pixel_format = PIXEL_FORMAT_420BPP10;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
default:
dal_pixel_format = PIXEL_FORMAT_UNKNOWN;
break;
}
return dal_pixel_format;
565}

567static inline void get_vp_scan_direction(
enum dc_rotation_angle rotation,
bool_Bool horizontal_mirror,
bool_Bool *orthogonal_rotation,
bool_Bool *flip_vert_scan_dir,
bool_Bool *flip_horz_scan_dir)
573{
*orthogonal_rotation = false0;
*flip_vert_scan_dir = false0;
*flip_horz_scan_dir = false0;
if (rotation == ROTATION_ANGLE_180) {
*flip_vert_scan_dir = true1;
*flip_horz_scan_dir = true1;
} else if (rotation == ROTATION_ANGLE_90) {
*orthogonal_rotation = true1;
*flip_horz_scan_dir = true1;
} else if (rotation == ROTATION_ANGLE_270) {
*orthogonal_rotation = true1;
*flip_vert_scan_dir = true1;
}

if (horizontal_mirror)
*flip_horz_scan_dir = !*flip_horz_scan_dir;
590}

592int get_num_mpc_splits(struct pipe_ctx *pipe)
593{
int mpc_split_count = 0;
struct pipe_ctx *other_pipe = pipe->bottom_pipe;

while (other_pipe && other_pipe->plane_state == pipe->plane_state) {
mpc_split_count++;
other_pipe = other_pipe->bottom_pipe;
}
other_pipe = pipe->top_pipe;
while (other_pipe && other_pipe->plane_state == pipe->plane_state) {
mpc_split_count++;
other_pipe = other_pipe->top_pipe;
}

return mpc_split_count;
608}

610int get_num_odm_splits(struct pipe_ctx *pipe)
611{
int odm_split_count = 0;
struct pipe_ctx *next_pipe = pipe->next_odm_pipe;
while (next_pipe) {
odm_split_count++;
next_pipe = next_pipe->next_odm_pipe;
}
pipe = pipe->prev_odm_pipe;
while (pipe) {
odm_split_count++;
pipe = pipe->prev_odm_pipe;
}
return odm_split_count;
624}

626static void calculate_split_count_and_index(struct pipe_ctx *pipe_ctx, int *split_count, int *split_idx)
627{
*split_count = get_num_odm_splits(pipe_ctx);
*split_idx = 0;
if (*split_count == 0) {
/*Check for mpc split*/
struct pipe_ctx *split_pipe = pipe_ctx->top_pipe;

*split_count = get_num_mpc_splits(pipe_ctx);
while (split_pipe && split_pipe->plane_state == pipe_ctx->plane_state) {
	(*split_idx)++;
	split_pipe = split_pipe->top_pipe;
}
} else {
/*Get odm split index*/
struct pipe_ctx *split_pipe = pipe_ctx->prev_odm_pipe;

while (split_pipe) {
	(*split_idx)++;
	split_pipe = split_pipe->prev_odm_pipe;
}
}
648}

650static void calculate_viewport(struct pipe_ctx *pipe_ctx)
651{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
const struct dc_stream_state *stream = pipe_ctx->stream;
struct scaler_data *data = &pipe_ctx->plane_res.scl_data;
struct rect surf_src = plane_state->src_rect;
struct rect clip, dest;
int vpc_div = (data->format == PIXEL_FORMAT_420BPP8
	|| data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1;
int split_count = 0;
int split_idx = 0;
bool_Bool orthogonal_rotation, flip_y_start, flip_x_start;

calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx);

if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE ||
stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) {
split_count = 0;
split_idx = 0;
}

/* The actual clip is an intersection between stream
* source and surface clip
*/
dest = plane_state->dst_rect;
clip.x = stream->src.x > plane_state->clip_rect.x ?
	stream->src.x : plane_state->clip_rect.x;

clip.width = stream->src.x + stream->src.width <
	plane_state->clip_rect.x + plane_state->clip_rect.width ?
	stream->src.x + stream->src.width - clip.x :
	plane_state->clip_rect.x + plane_state->clip_rect.width - clip.x ;

clip.y = stream->src.y > plane_state->clip_rect.y ?
	stream->src.y : plane_state->clip_rect.y;

clip.height = stream->src.y + stream->src.height <
	plane_state->clip_rect.y + plane_state->clip_rect.height ?
	stream->src.y + stream->src.height - clip.y :
	plane_state->clip_rect.y + plane_state->clip_rect.height - clip.y ;

/*
* Need to calculate how scan origin is shifted in vp space
* to correctly rotate clip and dst
*/
get_vp_scan_direction(
	plane_state->rotation,
	plane_state->horizontal_mirror,
	&orthogonal_rotation,
	&flip_y_start,
	&flip_x_start);

if (orthogonal_rotation) {
swap(clip.x, clip.y)do { __typeof(clip.x) __tmp = (clip.x); (clip.x) = (clip.y); (
clip.y) = __tmp; } while(0);
swap(clip.width, clip.height)do { __typeof(clip.width) __tmp = (clip.width); (clip.width) =
 (clip.height); (clip.height) = __tmp; } while(0);
swap(dest.x, dest.y)do { __typeof(dest.x) __tmp = (dest.x); (dest.x) = (dest.y); (
dest.y) = __tmp; } while(0);
swap(dest.width, dest.height)do { __typeof(dest.width) __tmp = (dest.width); (dest.width) =
 (dest.height); (dest.height) = __tmp; } while(0);
}
if (flip_x_start) {
clip.x = dest.x + dest.width - clip.x - clip.width;
dest.x = 0;
}
if (flip_y_start) {
clip.y = dest.y + dest.height - clip.y - clip.height;
dest.y = 0;
}

/* offset = surf_src.ofs + (clip.ofs - surface->dst_rect.ofs) * scl_ratio
* num_pixels = clip.num_pix * scl_ratio
*/
data->viewport.x = surf_src.x + (clip.x - dest.x) * surf_src.width / dest.width;
data->viewport.width = clip.width * surf_src.width / dest.width;

data->viewport.y = surf_src.y + (clip.y - dest.y) * surf_src.height / dest.height;
data->viewport.height = clip.height * surf_src.height / dest.height;

/* Handle split */
if (split_count) {
/* extra pixels in the division remainder need to go to pipes after
 * the extra pixel index minus one(epimo) defined here as:
 */
int epimo = 0;

if (orthogonal_rotation) {
	if (flip_y_start)
		split_idx = split_count - split_idx;

	epimo = split_count - data->viewport.height % (split_count + 1);

	data->viewport.y += (data->viewport.height / (split_count + 1)) * split_idx;
	if (split_idx > epimo)
		data->viewport.y += split_idx - epimo - 1;
	data->viewport.height = data->viewport.height / (split_count + 1) + (split_idx > epimo ? 1 : 0);
} else {
	if (flip_x_start)
		split_idx = split_count - split_idx;

	epimo = split_count - data->viewport.width % (split_count + 1);

	data->viewport.x += (data->viewport.width / (split_count + 1)) * split_idx;
	if (split_idx > epimo)
		data->viewport.x += split_idx - epimo - 1;
	data->viewport.width = data->viewport.width / (split_count + 1) + (split_idx > epimo ? 1 : 0);
}
}

/* Round down, compensate in init */
data->viewport_c.x = data->viewport.x / vpc_div;
data->viewport_c.y = data->viewport.y / vpc_div;
data->inits.h_c = (data->viewport.x % vpc_div) != 0 ? dc_fixpt_half : dc_fixpt_zero;
data->inits.v_c = (data->viewport.y % vpc_div) != 0 ? dc_fixpt_half : dc_fixpt_zero;

/* Round up, assume original video size always even dimensions */
data->viewport_c.width = (data->viewport.width + vpc_div - 1) / vpc_div;
data->viewport_c.height = (data->viewport.height + vpc_div - 1) / vpc_div;

data->viewport_unadjusted = data->viewport;
data->viewport_c_unadjusted = data->viewport_c;
768}

770static void calculate_recout(struct pipe_ctx *pipe_ctx)
771{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
const struct dc_stream_state *stream = pipe_ctx->stream;
struct scaler_data *data = &pipe_ctx->plane_res.scl_data;
struct rect surf_clip = plane_state->clip_rect;
bool_Bool pri_split_tb = pipe_ctx->bottom_pipe &&
	pipe_ctx->bottom_pipe->plane_state == pipe_ctx->plane_state &&
	stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM;
bool_Bool sec_split_tb = pipe_ctx->top_pipe &&
	pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state &&
	stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM;
int split_count = 0;
int split_idx = 0;

calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx);

/*
* Only the leftmost ODM pipe should be offset by a nonzero distance
*/
if (!pipe_ctx->prev_odm_pipe) {
data->recout.x = stream->dst.x;
if (stream->src.x < surf_clip.x)
	data->recout.x += (surf_clip.x - stream->src.x) * stream->dst.width
				/ stream->src.width;

} else
data->recout.x = 0;

data->recout.width = surf_clip.width * stream->dst.width / stream->src.width;
if (data->recout.width + data->recout.x > stream->dst.x + stream->dst.width)
data->recout.width = stream->dst.x + stream->dst.width - data->recout.x;

data->recout.y = stream->dst.y;
if (stream->src.y < surf_clip.y)
data->recout.y += (surf_clip.y - stream->src.y) * stream->dst.height
				/ stream->src.height;

data->recout.height = surf_clip.height * stream->dst.height / stream->src.height;
if (data->recout.height + data->recout.y > stream->dst.y + stream->dst.height)
data->recout.height = stream->dst.y + stream->dst.height - data->recout.y;

/* Handle h & v split, handle rotation using viewport */
if (sec_split_tb) {
data->recout.y += data->recout.height / 2;
/* Floor primary pipe, ceil 2ndary pipe */
data->recout.height = (data->recout.height + 1) / 2;
} else if (pri_split_tb)
data->recout.height /= 2;
else if (split_count) {
/* extra pixels in the division remainder need to go to pipes after
 * the extra pixel index minus one(epimo) defined here as:
 */
int epimo = split_count - data->recout.width % (split_count + 1);

/*no recout offset due to odm */
if (!pipe_ctx->next_odm_pipe && !pipe_ctx->prev_odm_pipe) {
	data->recout.x += (data->recout.width / (split_count + 1)) * split_idx;
	if (split_idx > epimo)
		data->recout.x += split_idx - epimo - 1;
}
data->recout.width = data->recout.width / (split_count + 1) + (split_idx > epimo ? 1 : 0);
}
833}

835static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx)
836{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
const struct dc_stream_state *stream = pipe_ctx->stream;
struct rect surf_src = plane_state->src_rect;
const int in_w = stream->src.width;
const int in_h = stream->src.height;
const int out_w = stream->dst.width;
const int out_h = stream->dst.height;

/*Swap surf_src height and width since scaling ratios are in recout rotation*/
if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
14
←
Assuming field 'rotation' is not equal to ROTATION_ANGLE_90→
16
←
Taking false branch→
	pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270)
15
←
Assuming field 'rotation' is not equal to ROTATION_ANGLE_270→
swap(surf_src.height, surf_src.width)do { __typeof(surf_src.height) __tmp = (surf_src.height); (surf_src
.height) = (surf_src.width); (surf_src.width) = __tmp; } while
(0);

pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_from_fraction(
			surf_src.width,
			plane_state->dst_rect.width);
pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_from_fraction(
			surf_src.height,
			plane_state->dst_rect.height);

if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)
17
←
Assuming field 'view_format' is not equal to VIEW_3D_FORMAT_SIDE_BY_SIDE→
18
←
Taking false branch→
pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2;
else if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM)
19
←
Assuming field 'view_format' is not equal to VIEW_3D_FORMAT_TOP_AND_BOTTOM→
20
←
Taking false branch→
pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2;

pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64(
pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h);
pipe_ctx->plane_res.scl_data.ratios.horz.value = div64_s64(
pipe_ctx->plane_res.scl_data.ratios.horz.value * in_w, out_w);

pipe_ctx->plane_res.scl_data.ratios.horz_c = pipe_ctx->plane_res.scl_data.ratios.horz;
pipe_ctx->plane_res.scl_data.ratios.vert_c = pipe_ctx->plane_res.scl_data.ratios.vert;

if (pipe_ctx->plane_res.scl_data.format20.1
Field 'format' is not equal to PIXEL_FORMAT_420BPP8
1
Field 'format' is not equal to PIXEL_FORMAT_420BPP8
 == PIXEL_FORMAT_420BPP8
21
←
Taking false branch→
	|| pipe_ctx->plane_res.scl_data.format20.2
Field 'format' is not equal to PIXEL_FORMAT_420BPP10
2
Field 'format' is not equal to PIXEL_FORMAT_420BPP10
 == PIXEL_FORMAT_420BPP10) {
pipe_ctx->plane_res.scl_data.ratios.horz_c.value /= 2;
pipe_ctx->plane_res.scl_data.ratios.vert_c.value /= 2;
}
pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_truncate(
22
←
Calling 'dc_fixpt_truncate'→
	pipe_ctx->plane_res.scl_data.ratios.horz, 19);
pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_truncate(
	pipe_ctx->plane_res.scl_data.ratios.vert, 19);
pipe_ctx->plane_res.scl_data.ratios.horz_c = dc_fixpt_truncate(
	pipe_ctx->plane_res.scl_data.ratios.horz_c, 19);
pipe_ctx->plane_res.scl_data.ratios.vert_c = dc_fixpt_truncate(
	pipe_ctx->plane_res.scl_data.ratios.vert_c, 19);
883}

885static inline void adjust_vp_and_init_for_seamless_clip(
bool_Bool flip_scan_dir,
int recout_skip,
int src_size,
int taps,
struct fixed31_32 ratio,
struct fixed31_32 *init,
int *vp_offset,
int *vp_size)
894{
if (!flip_scan_dir) {
/* Adjust for viewport end clip-off */
if ((*vp_offset + *vp_size) < src_size) {
	int vp_clip = src_size - *vp_size - *vp_offset;
	int int_part = dc_fixpt_floor(dc_fixpt_sub(*init, ratio));

	int_part = int_part > 0 ? int_part : 0;
	*vp_size += int_part < vp_clip ? int_part : vp_clip;
}

/* Adjust for non-0 viewport offset */
if (*vp_offset) {
	int int_part;

	*init = dc_fixpt_add(*init, dc_fixpt_mul_int(ratio, recout_skip));
	int_part = dc_fixpt_floor(*init) - *vp_offset;
	if (int_part < taps) {
		int int_adj = *vp_offset >= (taps - int_part) ?
					(taps - int_part) : *vp_offset;
		*vp_offset -= int_adj;
		*vp_size += int_adj;
		int_part += int_adj;
	} else if (int_part > taps) {
		*vp_offset += int_part - taps;
		*vp_size -= int_part - taps;
		int_part = taps;
	}
	init->value &= 0xffffffff;
	*init = dc_fixpt_add_int(*init, int_part);
}
} else {
/* Adjust for non-0 viewport offset */
if (*vp_offset) {
	int int_part = dc_fixpt_floor(dc_fixpt_sub(*init, ratio));

	int_part = int_part > 0 ? int_part : 0;
	*vp_size += int_part < *vp_offset ? int_part : *vp_offset;
	*vp_offset -= int_part < *vp_offset ? int_part : *vp_offset;
}

/* Adjust for viewport end clip-off */
if ((*vp_offset + *vp_size) < src_size) {
	int int_part;
	int end_offset = src_size - *vp_offset - *vp_size;

	/*
	 * this is init if vp had no offset, keep in mind this is from the
	 * right side of vp due to scan direction
	 */
	*init = dc_fixpt_add(*init, dc_fixpt_mul_int(ratio, recout_skip));
	/*
	 * this is the difference between first pixel of viewport available to read
	 * and init position, takning into account scan direction
	 */
	int_part = dc_fixpt_floor(*init) - end_offset;
	if (int_part < taps) {
		int int_adj = end_offset >= (taps - int_part) ?
					(taps - int_part) : end_offset;
		*vp_size += int_adj;
		int_part += int_adj;
	} else if (int_part > taps) {
		*vp_size += int_part - taps;
		int_part = taps;
	}
	init->value &= 0xffffffff;
	*init = dc_fixpt_add_int(*init, int_part);
}
}
963}

965static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx)
966{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
const struct dc_stream_state *stream = pipe_ctx->stream;
struct pipe_ctx *odm_pipe = pipe_ctx;
struct scaler_data *data = &pipe_ctx->plane_res.scl_data;
struct rect src = pipe_ctx->plane_state->src_rect;
int recout_skip_h, recout_skip_v, surf_size_h, surf_size_v;
int vpc_div = (data->format == PIXEL_FORMAT_420BPP8
	|| data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1;
bool_Bool orthogonal_rotation, flip_vert_scan_dir, flip_horz_scan_dir;
int odm_idx = 0;

/*
* Need to calculate the scan direction for viewport to make adjustments
*/
get_vp_scan_direction(
	plane_state->rotation,
	plane_state->horizontal_mirror,
	&orthogonal_rotation,
	&flip_vert_scan_dir,
	&flip_horz_scan_dir);

/* Calculate src rect rotation adjusted to recout space */
surf_size_h = src.x + src.width;
surf_size_v = src.y + src.height;
if (flip_horz_scan_dir)
src.x = 0;
if (flip_vert_scan_dir)
src.y = 0;
if (orthogonal_rotation) {
swap(src.x, src.y)do { __typeof(src.x) __tmp = (src.x); (src.x) = (src.y); (src
.y) = __tmp; } while(0);
swap(src.width, src.height)do { __typeof(src.width) __tmp = (src.width); (src.width) = (
src.height); (src.height) = __tmp; } while(0);
}

/*modified recout_skip_h calculation due to odm having no recout offset*/
while (odm_pipe->prev_odm_pipe) {
odm_idx++;
odm_pipe = odm_pipe->prev_odm_pipe;
}
/*odm_pipe is the leftmost pipe in the ODM group*/
recout_skip_h = odm_idx * data->recout.width;

/* Recout matching initial vp offset = recout_offset - (stream dst offset +
*			((surf dst offset - stream src offset) * 1/ stream scaling ratio)
*			- (surf surf_src offset * 1/ full scl ratio))
*/
recout_skip_h += odm_pipe->plane_res.scl_data.recout.x
		- (stream->dst.x + (plane_state->dst_rect.x - stream->src.x)
			* stream->dst.width / stream->src.width -
			src.x * plane_state->dst_rect.width / src.width
			* stream->dst.width / stream->src.width);


recout_skip_v = data->recout.y - (stream->dst.y + (plane_state->dst_rect.y - stream->src.y)
			* stream->dst.height / stream->src.height -
			src.y * plane_state->dst_rect.height / src.height
			* stream->dst.height / stream->src.height);
if (orthogonal_rotation)
swap(recout_skip_h, recout_skip_v)do { __typeof(recout_skip_h) __tmp = (recout_skip_h); (recout_skip_h
) = (recout_skip_v); (recout_skip_v) = __tmp; } while(0);
/*
* Init calculated according to formula:
* 	init = (scaling_ratio + number_of_taps + 1) / 2
* 	init_bot = init + scaling_ratio
* 	init_c = init + truncated_vp_c_offset(from calculate viewport)
*/
data->inits.h = dc_fixpt_truncate(dc_fixpt_div_int(
	dc_fixpt_add_int(data->ratios.horz, data->taps.h_taps + 1), 2), 19);

data->inits.h_c = dc_fixpt_truncate(dc_fixpt_add(data->inits.h_c, dc_fixpt_div_int(
	dc_fixpt_add_int(data->ratios.horz_c, data->taps.h_taps_c + 1), 2)), 19);

data->inits.v = dc_fixpt_truncate(dc_fixpt_div_int(
	dc_fixpt_add_int(data->ratios.vert, data->taps.v_taps + 1), 2), 19);

data->inits.v_c = dc_fixpt_truncate(dc_fixpt_add(data->inits.v_c, dc_fixpt_div_int(
	dc_fixpt_add_int(data->ratios.vert_c, data->taps.v_taps_c + 1), 2)), 19);

/*
* Taps, inits and scaling ratios are in recout space need to rotate
* to viewport rotation before adjustment
*/
adjust_vp_and_init_for_seamless_clip(
	flip_horz_scan_dir,
	recout_skip_h,
	surf_size_h,
	orthogonal_rotation ? data->taps.v_taps : data->taps.h_taps,
	orthogonal_rotation ? data->ratios.vert : data->ratios.horz,
	orthogonal_rotation ? &data->inits.v : &data->inits.h,
	&data->viewport.x,
	&data->viewport.width);
adjust_vp_and_init_for_seamless_clip(
	flip_horz_scan_dir,
	recout_skip_h,
	surf_size_h / vpc_div,
	orthogonal_rotation ? data->taps.v_taps_c : data->taps.h_taps_c,
	orthogonal_rotation ? data->ratios.vert_c : data->ratios.horz_c,
	orthogonal_rotation ? &data->inits.v_c : &data->inits.h_c,
	&data->viewport_c.x,
	&data->viewport_c.width);
adjust_vp_and_init_for_seamless_clip(
	flip_vert_scan_dir,
	recout_skip_v,
	surf_size_v,
	orthogonal_rotation ? data->taps.h_taps : data->taps.v_taps,
	orthogonal_rotation ? data->ratios.horz : data->ratios.vert,
	orthogonal_rotation ? &data->inits.h : &data->inits.v,
	&data->viewport.y,
	&data->viewport.height);
adjust_vp_and_init_for_seamless_clip(
	flip_vert_scan_dir,
	recout_skip_v,
	surf_size_v / vpc_div,
	orthogonal_rotation ? data->taps.h_taps_c : data->taps.v_taps_c,
	orthogonal_rotation ? data->ratios.horz_c : data->ratios.vert_c,
	orthogonal_rotation ? &data->inits.h_c : &data->inits.v_c,
	&data->viewport_c.y,
	&data->viewport_c.height);

/* Interlaced inits based on final vert inits */
data->inits.v_bot = dc_fixpt_add(data->inits.v, data->ratios.vert);
data->inits.v_c_bot = dc_fixpt_add(data->inits.v_c, data->ratios.vert_c);

1088}

1090/*
* When handling 270 rotation in mixed SLS mode, we have
* stream->timing.h_border_left that is non zero.  If we are doing
* pipe-splitting, this h_border_left value gets added to recout.x and when it
* calls calculate_inits_and_adj_vp() and
* adjust_vp_and_init_for_seamless_clip(), it can cause viewport.height for a
* pipe to be incorrect.
*
* To fix this, instead of using stream->timing.h_border_left, we can use
* stream->dst.x to represent the border instead.  So we will set h_border_left
* to 0 and shift the appropriate amount in stream->dst.x.  We will then
* perform all calculations in resource_build_scaling_params() based on this
* and then restore the h_border_left and stream->dst.x to their original
* values.
*
* shift_border_left_to_dst() will shift the amount of h_border_left to
* stream->dst.x and set h_border_left to 0.  restore_border_left_from_dst()
* will restore h_border_left and stream->dst.x back to their original values
* We also need to make sure pipe_ctx->plane_res.scl_data.h_active uses the
* original h_border_left value in its calculation.
*/
1111int shift_border_left_to_dst(struct pipe_ctx *pipe_ctx)
1112{
int store_h_border_left = pipe_ctx->stream->timing.h_border_left;

if (store_h_border_left) {
pipe_ctx->stream->timing.h_border_left = 0;
pipe_ctx->stream->dst.x += store_h_border_left;
}
return store_h_border_left;
1120}

1122void restore_border_left_from_dst(struct pipe_ctx *pipe_ctx,
                                int store_h_border_left)
1124{
pipe_ctx->stream->dst.x -= store_h_border_left;
pipe_ctx->stream->timing.h_border_left = store_h_border_left;
1127}

1129bool_Bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
1130{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;
bool_Bool res = false0;
int store_h_border_left = shift_border_left_to_dst(pipe_ctx);
DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
/* Important: scaling ratio calculation requires pixel format,
* lb depth calculation requires recout and taps require scaling ratios.
* Inits require viewport, taps, ratios and recout of split pipe
*/
pipe_ctx->plane_res.scl_data.format = convert_pixel_format_to_dalsurface(
	pipe_ctx->plane_state->format);

calculate_scaling_ratios(pipe_ctx);
13
←
Calling 'calculate_scaling_ratios'→

calculate_viewport(pipe_ctx);

if (pipe_ctx->plane_res.scl_data.viewport.height < 12 ||
pipe_ctx->plane_res.scl_data.viewport.width < 12) {
if (store_h_border_left) {
	restore_border_left_from_dst(pipe_ctx,
		store_h_border_left);
}
return false0;
}

calculate_recout(pipe_ctx);

/**
* Setting line buffer pixel depth to 24bpp yields banding
* on certain displays, such as the Sharp 4k
*/
pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;
pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha;

pipe_ctx->plane_res.scl_data.recout.x += timing->h_border_left;
pipe_ctx->plane_res.scl_data.recout.y += timing->v_border_top;

pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable +
store_h_border_left + timing->h_border_right;
pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable +
timing->v_border_top + timing->v_border_bottom;
if (pipe_ctx->next_odm_pipe || pipe_ctx->prev_odm_pipe)
pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx) + 1;

/* Taps calculations */
if (pipe_ctx->plane_res.xfm != NULL((void *)0))
res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(
		pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);

if (pipe_ctx->plane_res.dpp != NULL((void *)0))
res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(
		pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);


if (!res) {
/* Try 24 bpp linebuffer */
pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP;

if (pipe_ctx->plane_res.xfm != NULL((void *)0))
	res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(
			pipe_ctx->plane_res.xfm,
			&pipe_ctx->plane_res.scl_data,
			&plane_state->scaling_quality);

if (pipe_ctx->plane_res.dpp != NULL((void *)0))
	res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(
			pipe_ctx->plane_res.dpp,
			&pipe_ctx->plane_res.scl_data,
			&plane_state->scaling_quality);
}

if (res)
/* May need to re-check lb size after this in some obscure scenario */
calculate_inits_and_adj_vp(pipe_ctx);

DC_LOG_SCALER("%s pipe %d:\nViewport: height:%d width:%d x:%d y:%d  Recout: height:%d width:%d x:%d y:%d  HACTIVE:%d VACTIVE:%d\n"do { } while(0)
	"src_rect: height:%d width:%d x:%d y:%d  dst_rect: height:%d width:%d x:%d y:%d  clip_rect: height:%d width:%d x:%d y:%d\n",do { } while(0)
	__func__,do { } while(0)
	pipe_ctx->pipe_idx,do { } while(0)
	pipe_ctx->plane_res.scl_data.viewport.height,do { } while(0)
	pipe_ctx->plane_res.scl_data.viewport.width,do { } while(0)
	pipe_ctx->plane_res.scl_data.viewport.x,do { } while(0)
	pipe_ctx->plane_res.scl_data.viewport.y,do { } while(0)
	pipe_ctx->plane_res.scl_data.recout.height,do { } while(0)
	pipe_ctx->plane_res.scl_data.recout.width,do { } while(0)
	pipe_ctx->plane_res.scl_data.recout.x,do { } while(0)
	pipe_ctx->plane_res.scl_data.recout.y,do { } while(0)
	pipe_ctx->plane_res.scl_data.h_active,do { } while(0)
	pipe_ctx->plane_res.scl_data.v_active,do { } while(0)
	plane_state->src_rect.height,do { } while(0)
	plane_state->src_rect.width,do { } while(0)
	plane_state->src_rect.x,do { } while(0)
	plane_state->src_rect.y,do { } while(0)
	plane_state->dst_rect.height,do { } while(0)
	plane_state->dst_rect.width,do { } while(0)
	plane_state->dst_rect.x,do { } while(0)
	plane_state->dst_rect.y,do { } while(0)
	plane_state->clip_rect.height,do { } while(0)
	plane_state->clip_rect.width,do { } while(0)
	plane_state->clip_rect.x,do { } while(0)
	plane_state->clip_rect.y)do { } while(0);

if (store_h_border_left)
restore_border_left_from_dst(pipe_ctx, store_h_border_left);

return res;
1237}


1240enum dc_status resource_build_scaling_params_for_context(
const struct dc  *dc,
struct dc_state *context)
1243{
int i;

for (i = 0; i < MAX_PIPES6; i++) {
8
←
Loop condition is true.  Entering loop body→
if (context->res_ctx.pipe_ctx[i].plane_state != NULL((void *)0) &&
9
←
Assuming field 'plane_state' is not equal to NULL→
11
←
Taking true branch→
		context->res_ctx.pipe_ctx[i].stream != NULL((void *)0))
10
←
Assuming field 'stream' is not equal to NULL→
	if (!resource_build_scaling_params(&context->res_ctx.pipe_ctx[i]))
12
←
Calling 'resource_build_scaling_params'→
		return DC_FAIL_SCALING;
}

return DC_OK;
1254}

1256struct pipe_ctx *find_idle_secondary_pipe(
struct resource_context *res_ctx,
const struct resource_pool *pool,
const struct pipe_ctx *primary_pipe)
1260{
int i;
struct pipe_ctx *secondary_pipe = NULL((void *)0);

/*
* We add a preferred pipe mapping to avoid the chance that
* MPCCs already in use will need to be reassigned to other trees.
* For example, if we went with the strict, assign backwards logic:
*
* (State 1)
* Display A on, no surface, top pipe = 0
* Display B on, no surface, top pipe = 1
*
* (State 2)
* Display A on, no surface, top pipe = 0
* Display B on, surface enable, top pipe = 1, bottom pipe = 5
*
* (State 3)
* Display A on, surface enable, top pipe = 0, bottom pipe = 5
* Display B on, surface enable, top pipe = 1, bottom pipe = 4
*
* The state 2->3 transition requires remapping MPCC 5 from display B
* to display A.
*
* However, with the preferred pipe logic, state 2 would look like:
*
* (State 2)
* Display A on, no surface, top pipe = 0
* Display B on, surface enable, top pipe = 1, bottom pipe = 4
*
* This would then cause 2->3 to not require remapping any MPCCs.
*/
if (primary_pipe) {
int preferred_pipe_idx = (pool->pipe_count - 1) - primary_pipe->pipe_idx;
if (res_ctx->pipe_ctx[preferred_pipe_idx].stream == NULL((void *)0)) {
	secondary_pipe = &res_ctx->pipe_ctx[preferred_pipe_idx];
	secondary_pipe->pipe_idx = preferred_pipe_idx;
}
}

/*
* search backwards for the second pipe to keep pipe
* assignment more consistent
*/
if (!secondary_pipe)
for (i = pool->pipe_count - 1; i >= 0; i--) {
	if (res_ctx->pipe_ctx[i].stream == NULL((void *)0)) {
		secondary_pipe = &res_ctx->pipe_ctx[i];
		secondary_pipe->pipe_idx = i;
		break;
	}
}

return secondary_pipe;
1314}

1316struct pipe_ctx *resource_get_head_pipe_for_stream(
struct resource_context *res_ctx,
struct dc_stream_state *stream)
1319{
int i;

for (i = 0; i < MAX_PIPES6; i++) {
if (res_ctx->pipe_ctx[i].stream == stream
		&& !res_ctx->pipe_ctx[i].top_pipe
		&& !res_ctx->pipe_ctx[i].prev_odm_pipe)
	return &res_ctx->pipe_ctx[i];
}
return NULL((void *)0);
1329}

1331static struct pipe_ctx *resource_get_tail_pipe(
struct resource_context *res_ctx,
struct pipe_ctx *head_pipe)
1334{
struct pipe_ctx *tail_pipe;

tail_pipe = head_pipe->bottom_pipe;

while (tail_pipe) {
head_pipe = tail_pipe;
tail_pipe = tail_pipe->bottom_pipe;
}

return head_pipe;
1345}

1347/*
* A free_pipe for a stream is defined here as a pipe
* that has no surface attached yet
*/
1351static struct pipe_ctx *acquire_free_pipe_for_head(
struct dc_state *context,
const struct resource_pool *pool,
struct pipe_ctx *head_pipe)
1355{
int i;
struct resource_context *res_ctx = &context->res_ctx;

if (!head_pipe->plane_state)
return head_pipe;

/* Re-use pipe already acquired for this stream if available*/
for (i = pool->pipe_count - 1; i >= 0; i--) {
if (res_ctx->pipe_ctx[i].stream == head_pipe->stream &&
		!res_ctx->pipe_ctx[i].plane_state) {
	return &res_ctx->pipe_ctx[i];
}
}

/*
* At this point we have no re-useable pipe for this stream and we need
* to acquire an idle one to satisfy the request
*/

if (!pool->funcs->acquire_idle_pipe_for_layer)
return NULL((void *)0);

return pool->funcs->acquire_idle_pipe_for_layer(context, pool, head_pipe->stream);
1379}

1381#if defined(CONFIG_DRM_AMD_DC_DCN1)
1382static int acquire_first_split_pipe(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct dc_stream_state *stream)
1386{
int i;

for (i = 0; i < pool->pipe_count; i++) {
struct pipe_ctx *split_pipe = &res_ctx->pipe_ctx[i];

if (split_pipe->top_pipe &&
		split_pipe->top_pipe->plane_state == split_pipe->plane_state) {
	split_pipe->top_pipe->bottom_pipe = split_pipe->bottom_pipe;
	if (split_pipe->bottom_pipe)
		split_pipe->bottom_pipe->top_pipe = split_pipe->top_pipe;

	if (split_pipe->top_pipe->plane_state)
		resource_build_scaling_params(split_pipe->top_pipe);

	memset(split_pipe, 0, sizeof(*split_pipe))__builtin_memset((split_pipe), (0), (sizeof(*split_pipe)));
	split_pipe->stream_res.tg = pool->timing_generators[i];
	split_pipe->plane_res.hubp = pool->hubps[i];
	split_pipe->plane_res.ipp = pool->ipps[i];
	split_pipe->plane_res.dpp = pool->dpps[i];
	split_pipe->stream_res.opp = pool->opps[i];
	split_pipe->plane_res.mpcc_inst = pool->dpps[i]->inst;
	split_pipe->pipe_idx = i;

	split_pipe->stream = stream;
	return i;
}
}
return -1;
1415}
1416#endif

1418bool_Bool dc_add_plane_to_context(
const struct dc *dc,
struct dc_stream_state *stream,
struct dc_plane_state *plane_state,
struct dc_state *context)
1423{
int i;
struct resource_pool *pool = dc->res_pool;
struct pipe_ctx *head_pipe, *tail_pipe, *free_pipe;
struct dc_stream_status *stream_status = NULL((void *)0);

for (i = 0; i < context->stream_count; i++)
if (context->streams[i] == stream) {
	stream_status = &context->stream_status[i];
	break;
}
if (stream_status == NULL((void *)0)) {
dm_error("Existing stream not found; failed to attach surface!\n")__drm_err("Existing stream not found; failed to attach surface!\n"
);
return false0;
}


if (stream_status->plane_count == MAX_SURFACE_NUM4) {
dm_error("Surface: can not attach plane_state %p! Maximum is: %d\n",__drm_err("Surface: can not attach plane_state %p! Maximum is: %d\n"
, plane_state, 4)
		plane_state, MAX_SURFACE_NUM)__drm_err("Surface: can not attach plane_state %p! Maximum is: %d\n"
, plane_state, 4);
return false0;
}

head_pipe = resource_get_head_pipe_for_stream(&context->res_ctx, stream);

if (!head_pipe) {
dm_error("Head pipe not found for stream_state %p !\n", stream)__drm_err("Head pipe not found for stream_state %p !\n", stream
);
return false0;
}

/* retain new surface, but only once per stream */
dc_plane_state_retain(plane_state);

while (head_pipe) {
free_pipe = acquire_free_pipe_for_head(context, pool, head_pipe);

#if defined(CONFIG_DRM_AMD_DC_DCN1)
if (!free_pipe) {
	int pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);
	if (pipe_idx >= 0)
		free_pipe = &context->res_ctx.pipe_ctx[pipe_idx];
}
#endif
if (!free_pipe) {
	dc_plane_state_release(plane_state);
	return false0;
}

free_pipe->plane_state = plane_state;

if (head_pipe != free_pipe) {
	tail_pipe = resource_get_tail_pipe(&context->res_ctx, head_pipe);
	ASSERT(tail_pipe)do { if (({ static int __warned; int __ret = !!(!(tail_pipe))
; if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(tail_pipe)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1475); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
	free_pipe->stream_res.tg = tail_pipe->stream_res.tg;
	free_pipe->stream_res.abm = tail_pipe->stream_res.abm;
	free_pipe->stream_res.opp = tail_pipe->stream_res.opp;
	free_pipe->stream_res.stream_enc = tail_pipe->stream_res.stream_enc;
	free_pipe->stream_res.audio = tail_pipe->stream_res.audio;
	free_pipe->clock_source = tail_pipe->clock_source;
	free_pipe->top_pipe = tail_pipe;
	tail_pipe->bottom_pipe = free_pipe;
}
head_pipe = head_pipe->next_odm_pipe;
}
/* assign new surfaces*/
stream_status->plane_states[stream_status->plane_count] = plane_state;

stream_status->plane_count++;

return true1;
1493}

1495bool_Bool dc_remove_plane_from_context(
const struct dc *dc,
struct dc_stream_state *stream,
struct dc_plane_state *plane_state,
struct dc_state *context)
1500{
int i;
struct dc_stream_status *stream_status = NULL((void *)0);
struct resource_pool *pool = dc->res_pool;

for (i = 0; i < context->stream_count; i++)
if (context->streams[i] == stream) {
	stream_status = &context->stream_status[i];
	break;
}

if (stream_status == NULL((void *)0)) {
dm_error("Existing stream not found; failed to remove plane.\n")__drm_err("Existing stream not found; failed to remove plane.\n"
);
return false0;
}

/* release pipe for plane*/
for (i = pool->pipe_count - 1; i >= 0; i--) {
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];

if (pipe_ctx->plane_state == plane_state) {
	if (pipe_ctx->top_pipe)
		pipe_ctx->top_pipe->bottom_pipe = pipe_ctx->bottom_pipe;

	/* Second condition is to avoid setting NULL to top pipe
	 * of tail pipe making it look like head pipe in subsequent
	 * deletes
	 */
	if (pipe_ctx->bottom_pipe && pipe_ctx->top_pipe)
		pipe_ctx->bottom_pipe->top_pipe = pipe_ctx->top_pipe;

	/*
	 * For head pipe detach surfaces from pipe for tail
	 * pipe just zero it out
	 */
	if (!pipe_ctx->top_pipe)
		pipe_ctx->plane_state = NULL((void *)0);
	else
		memset(pipe_ctx, 0, sizeof(*pipe_ctx))__builtin_memset((pipe_ctx), (0), (sizeof(*pipe_ctx)));
}
}


for (i = 0; i < stream_status->plane_count; i++) {
if (stream_status->plane_states[i] == plane_state) {

	dc_plane_state_release(stream_status->plane_states[i]);
	break;
}
}

if (i == stream_status->plane_count) {
dm_error("Existing plane_state not found; failed to detach it!\n")__drm_err("Existing plane_state not found; failed to detach it!\n"
);
return false0;
}

stream_status->plane_count--;

/* Start at the plane we've just released, and move all the planes one index forward to "trim" the array */
for (; i < stream_status->plane_count; i++)
stream_status->plane_states[i] = stream_status->plane_states[i + 1];

stream_status->plane_states[stream_status->plane_count] = NULL((void *)0);

return true1;
1565}

1567bool_Bool dc_rem_all_planes_for_stream(
const struct dc *dc,
struct dc_stream_state *stream,
struct dc_state *context)
1571{
int i, old_plane_count;
struct dc_stream_status *stream_status = NULL((void *)0);
struct dc_plane_state *del_planes[MAX_SURFACE_NUM4] = { 0 };

for (i = 0; i < context->stream_count; i++)
	if (context->streams[i] == stream) {
		stream_status = &context->stream_status[i];
		break;
	}

if (stream_status == NULL((void *)0)) {
dm_error("Existing stream %p not found!\n", stream)__drm_err("Existing stream %p not found!\n", stream);
return false0;
}

old_plane_count = stream_status->plane_count;

for (i = 0; i < old_plane_count; i++)
del_planes[i] = stream_status->plane_states[i];

for (i = 0; i < old_plane_count; i++)
if (!dc_remove_plane_from_context(dc, stream, del_planes[i], context))
	return false0;

return true1;
1597}

1599static bool_Bool add_all_planes_for_stream(
const struct dc *dc,
struct dc_stream_state *stream,
const struct dc_validation_set set[],
int set_count,
struct dc_state *context)
1605{
int i, j;

for (i = 0; i < set_count; i++)
if (set[i].stream == stream)
	break;

if (i == set_count) {
dm_error("Stream %p not found in set!\n", stream)__drm_err("Stream %p not found in set!\n", stream);
return false0;
}

for (j = 0; j < set[i].plane_count; j++)
if (!dc_add_plane_to_context(dc, stream, set[i].plane_states[j], context))
	return false0;

return true1;
1622}

1624bool_Bool dc_add_all_planes_for_stream(
const struct dc *dc,
struct dc_stream_state *stream,
struct dc_plane_state * const *plane_states,
int plane_count,
struct dc_state *context)
1630{
struct dc_validation_set set;
int i;

set.stream = stream;
set.plane_count = plane_count;

for (i = 0; i < plane_count; i++)
set.plane_states[i] = plane_states[i];

return add_all_planes_for_stream(dc, stream, &set, 1, context);
1641}

1643static bool_Bool is_timing_changed(struct dc_stream_state *cur_stream,
struct dc_stream_state *new_stream)
1645{
if (cur_stream == NULL((void *)0))
return true1;

/* If sink pointer changed, it means this is a hotplug, we should do
* full hw setting.
*/
if (cur_stream->sink != new_stream->sink)
return true1;

/* If output color space is changed, need to reprogram info frames */
if (cur_stream->output_color_space != new_stream->output_color_space)
return true1;

return memcmp(__builtin_memcmp((&cur_stream->timing), (&new_stream
->timing), (sizeof(struct dc_crtc_timing)))
&cur_stream->timing,__builtin_memcmp((&cur_stream->timing), (&new_stream
->timing), (sizeof(struct dc_crtc_timing)))
&new_stream->timing,__builtin_memcmp((&cur_stream->timing), (&new_stream
->timing), (sizeof(struct dc_crtc_timing)))
sizeof(struct dc_crtc_timing))__builtin_memcmp((&cur_stream->timing), (&new_stream
->timing), (sizeof(struct dc_crtc_timing))) != 0;
1663}

1665static bool_Bool are_stream_backends_same(
struct dc_stream_state *stream_a, struct dc_stream_state *stream_b)
1667{
if (stream_a == stream_b)
return true1;

if (stream_a == NULL((void *)0) || stream_b == NULL((void *)0))
return false0;

if (is_timing_changed(stream_a, stream_b))
return false0;

if (stream_a->dpms_off != stream_b->dpms_off)
return false0;

return true1;
1681}

1683/**
* dc_is_stream_unchanged() - Compare two stream states for equivalence.
*
* Checks if there a difference between the two states
* that would require a mode change.
*
* Does not compare cursor position or attributes.
*/
1691bool_Bool dc_is_stream_unchanged(
struct dc_stream_state *old_stream, struct dc_stream_state *stream)
1693{

if (!are_stream_backends_same(old_stream, stream))
return false0;

if (old_stream->ignore_msa_timing_param != stream->ignore_msa_timing_param)
return false0;

// Only Have Audio left to check whether it is same or not. This is a corner case for Tiled sinks
if (old_stream->audio_info.mode_count != stream->audio_info.mode_count)
return false0;

return true1;
1706}

1708/**
* dc_is_stream_scaling_unchanged() - Compare scaling rectangles of two streams.
*/
1711bool_Bool dc_is_stream_scaling_unchanged(
struct dc_stream_state *old_stream, struct dc_stream_state *stream)
1713{
if (old_stream == stream)
return true1;

if (old_stream == NULL((void *)0) || stream == NULL((void *)0))
return false0;

if (memcmp(&old_stream->src,__builtin_memcmp((&old_stream->src), (&stream->
src), (sizeof(struct rect)))
	&stream->src,__builtin_memcmp((&old_stream->src), (&stream->
src), (sizeof(struct rect)))
	sizeof(struct rect))__builtin_memcmp((&old_stream->src), (&stream->
src), (sizeof(struct rect))) != 0)
return false0;

if (memcmp(&old_stream->dst,__builtin_memcmp((&old_stream->dst), (&stream->
dst), (sizeof(struct rect)))
	&stream->dst,__builtin_memcmp((&old_stream->dst), (&stream->
dst), (sizeof(struct rect)))
	sizeof(struct rect))__builtin_memcmp((&old_stream->dst), (&stream->
dst), (sizeof(struct rect))) != 0)
return false0;

return true1;
1731}

1733static void update_stream_engine_usage(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct stream_encoder *stream_enc,
bool_Bool acquired)
1738{
int i;

for (i = 0; i < pool->stream_enc_count; i++) {
if (pool->stream_enc[i] == stream_enc)
	res_ctx->is_stream_enc_acquired[i] = acquired;
}
1745}

1747/* TODO: release audio object */
1748void update_audio_usage(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct audio *audio,
bool_Bool acquired)
1753{
int i;
for (i = 0; i < pool->audio_count; i++) {
if (pool->audios[i] == audio)
	res_ctx->is_audio_acquired[i] = acquired;
}
1759}

1761static int acquire_first_free_pipe(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct dc_stream_state *stream)
1765{
int i;

for (i = 0; i < pool->pipe_count; i++) {
if (!res_ctx->pipe_ctx[i].stream) {
	struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];

	pipe_ctx->stream_res.tg = pool->timing_generators[i];
	pipe_ctx->plane_res.mi = pool->mis[i];
	pipe_ctx->plane_res.hubp = pool->hubps[i];
	pipe_ctx->plane_res.ipp = pool->ipps[i];
	pipe_ctx->plane_res.xfm = pool->transforms[i];
	pipe_ctx->plane_res.dpp = pool->dpps[i];
	pipe_ctx->stream_res.opp = pool->opps[i];
	if (pool->dpps[i])
		pipe_ctx->plane_res.mpcc_inst = pool->dpps[i]->inst;
	pipe_ctx->pipe_idx = i;


	pipe_ctx->stream = stream;
	return i;
}
}
return -1;
1789}

1791static struct audio *find_first_free_audio(
struct resource_context *res_ctx,
const struct resource_pool *pool,
enum engine_id id,
enum dce_version dc_version)
1796{
int i, available_audio_count;

available_audio_count = pool->audio_count;

for (i = 0; i < available_audio_count; i++) {
if ((res_ctx->is_audio_acquired[i] == false0) && (res_ctx->is_stream_enc_acquired[i] == true1)) {
	/*we have enough audio endpoint, find the matching inst*/
	if (id != i)
		continue;
	return pool->audios[i];
}
}

/* use engine id to find free audio */
if ((id < available_audio_count) && (res_ctx->is_audio_acquired[id] == false0)) {
return pool->audios[id];
}
/*not found the matching one, first come first serve*/
for (i = 0; i < available_audio_count; i++) {
if (res_ctx->is_audio_acquired[i] == false0) {
	return pool->audios[i];
}
}
return 0;
1821}

1823/**
* dc_add_stream_to_ctx() - Add a new dc_stream_state to a dc_state.
*/
1826enum dc_status dc_add_stream_to_ctx(
struct dc *dc,
struct dc_state *new_ctx,
struct dc_stream_state *stream)
1830{
enum dc_status res;
DC_LOGGER_INIT(dc->ctx->logger);

if (new_ctx->stream_count >= dc->res_pool->timing_generator_count) {
DC_LOG_WARNING("Max streams reached, can't add stream %p !\n", stream)printk("\0014" "[" "drm" "] " "Max streams reached, can't add stream %p !\n"
, stream);
return DC_ERROR_UNEXPECTED;
}

new_ctx->streams[new_ctx->stream_count] = stream;
dc_stream_retain(stream);
new_ctx->stream_count++;

res = dc->res_pool->funcs->add_stream_to_ctx(dc, new_ctx, stream);
if (res != DC_OK)
DC_LOG_WARNING("Adding stream %p to context failed with err %d!\n", stream, res)printk("\0014" "[" "drm" "] " "Adding stream %p to context failed with err %d!\n"
, stream, res);

return res;
1848}

1850/**
* dc_remove_stream_from_ctx() - Remove a stream from a dc_state.
*/
1853enum dc_status dc_remove_stream_from_ctx(
	struct dc *dc,
	struct dc_state *new_ctx,
	struct dc_stream_state *stream)
1857{
int i;
struct dc_context *dc_ctx = dc->ctx;
struct pipe_ctx *del_pipe = resource_get_head_pipe_for_stream(&new_ctx->res_ctx, stream);
struct pipe_ctx *odm_pipe;

if (!del_pipe) {
DC_ERROR("Pipe not found for stream %p !\n", stream)do { (void)(dc_ctx); __drm_err("Pipe not found for stream %p !\n"
, stream); } while (0);
return DC_ERROR_UNEXPECTED;
}

odm_pipe = del_pipe->next_odm_pipe;

/* Release primary pipe */
ASSERT(del_pipe->stream_res.stream_enc)do { if (({ static int __warned; int __ret = !!(!(del_pipe->
stream_res.stream_enc)); if (__ret && !__warned) { printf
("WARNING %s failed at %s:%d\n", "!(del_pipe->stream_res.stream_enc)"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1871); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
update_stream_engine_usage(
	&new_ctx->res_ctx,
		dc->res_pool,
	del_pipe->stream_res.stream_enc,
	false0);

if (del_pipe->stream_res.audio)
update_audio_usage(
	&new_ctx->res_ctx,
	dc->res_pool,
	del_pipe->stream_res.audio,
	false0);

resource_unreference_clock_source(&new_ctx->res_ctx,
			  dc->res_pool,
			  del_pipe->clock_source);

if (dc->res_pool->funcs->remove_stream_from_ctx)
dc->res_pool->funcs->remove_stream_from_ctx(dc, new_ctx, stream);

while (odm_pipe) {
struct pipe_ctx *next_odm_pipe = odm_pipe->next_odm_pipe;

memset(odm_pipe, 0, sizeof(*odm_pipe))__builtin_memset((odm_pipe), (0), (sizeof(*odm_pipe)));
odm_pipe = next_odm_pipe;
}
memset(del_pipe, 0, sizeof(*del_pipe))__builtin_memset((del_pipe), (0), (sizeof(*del_pipe)));

for (i = 0; i < new_ctx->stream_count; i++)
if (new_ctx->streams[i] == stream)
	break;

if (new_ctx->streams[i] != stream) {
DC_ERROR("Context doesn't have stream %p !\n", stream)do { (void)(dc_ctx); __drm_err("Context doesn't have stream %p !\n"
, stream); } while (0);
return DC_ERROR_UNEXPECTED;
}

dc_stream_release(new_ctx->streams[i]);
new_ctx->stream_count--;

/* Trim back arrays */
for (; i < new_ctx->stream_count; i++) {
new_ctx->streams[i] = new_ctx->streams[i + 1];
new_ctx->stream_status[i] = new_ctx->stream_status[i + 1];
}

new_ctx->streams[new_ctx->stream_count] = NULL((void *)0);
memset(__builtin_memset((&new_ctx->stream_status[new_ctx->
stream_count]), (0), (sizeof(new_ctx->stream_status[0])))
	&new_ctx->stream_status[new_ctx->stream_count],__builtin_memset((&new_ctx->stream_status[new_ctx->
stream_count]), (0), (sizeof(new_ctx->stream_status[0])))
	0,__builtin_memset((&new_ctx->stream_status[new_ctx->
stream_count]), (0), (sizeof(new_ctx->stream_status[0])))
	sizeof(new_ctx->stream_status[0]))__builtin_memset((&new_ctx->stream_status[new_ctx->
stream_count]), (0), (sizeof(new_ctx->stream_status[0])));

return DC_OK;
1925}

1927static struct dc_stream_state *find_pll_sharable_stream(
struct dc_stream_state *stream_needs_pll,
struct dc_state *context)
1930{
int i;

for (i = 0; i < context->stream_count; i++) {
struct dc_stream_state *stream_has_pll = context->streams[i];

/* We are looking for non dp, non virtual stream */
if (resource_are_streams_timing_synchronizable(
	stream_needs_pll, stream_has_pll)
	&& !dc_is_dp_signal(stream_has_pll->signal)
	&& stream_has_pll->link->connector_signal
	!= SIGNAL_TYPE_VIRTUAL)
	return stream_has_pll;

}

return NULL((void *)0);
1947}

1949static int get_norm_pix_clk(const struct dc_crtc_timing *timing)
1950{
uint32_t pix_clk = timing->pix_clk_100hz;
uint32_t normalized_pix_clk = pix_clk;

if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
pix_clk /= 2;
if (timing->pixel_encoding != PIXEL_ENCODING_YCBCR422) {
switch (timing->display_color_depth) {
case COLOR_DEPTH_666:
case COLOR_DEPTH_888:
	normalized_pix_clk = pix_clk;
	break;
case COLOR_DEPTH_101010:
	normalized_pix_clk = (pix_clk * 30) / 24;
	break;
case COLOR_DEPTH_121212:
	normalized_pix_clk = (pix_clk * 36) / 24;
break;
case COLOR_DEPTH_161616:
	normalized_pix_clk = (pix_clk * 48) / 24;
break;
default:
	ASSERT(0)do { if (({ static int __warned; int __ret = !!(!(0)); if (__ret
 && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1972); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
break;
}
}
return normalized_pix_clk;
1977}

1979static void calculate_phy_pix_clks(struct dc_stream_state *stream)
1980{
/* update actual pixel clock on all streams */
if (dc_is_hdmi_signal(stream->signal))
stream->phy_pix_clk = get_norm_pix_clk(
	&stream->timing) / 10;
else
stream->phy_pix_clk =
	stream->timing.pix_clk_100hz / 10;

if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)
stream->phy_pix_clk *= 2;
1991}

1993static int acquire_resource_from_hw_enabled_state(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct dc_stream_state *stream)
1997{
struct dc_link *link = stream->link;
unsigned int i, inst, tg_inst = 0;

/* Check for enabled DIG to identify enabled display */
if (!link->link_enc->funcs->is_dig_enabled(link->link_enc))
return -1;

inst = link->link_enc->funcs->get_dig_frontend(link->link_enc);

if (inst == ENGINE_ID_UNKNOWN)
return -1;

for (i = 0; i < pool->stream_enc_count; i++) {
if (pool->stream_enc[i]->id == inst) {
	tg_inst = pool->stream_enc[i]->funcs->dig_source_otg(
		pool->stream_enc[i]);
	break;
}
}

// tg_inst not found
if (i == pool->stream_enc_count)
return -1;

if (tg_inst >= pool->timing_generator_count)
return -1;

if (!res_ctx->pipe_ctx[tg_inst].stream) {
struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[tg_inst];

pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst];
pipe_ctx->plane_res.mi = pool->mis[tg_inst];
pipe_ctx->plane_res.hubp = pool->hubps[tg_inst];
pipe_ctx->plane_res.ipp = pool->ipps[tg_inst];
pipe_ctx->plane_res.xfm = pool->transforms[tg_inst];
pipe_ctx->plane_res.dpp = pool->dpps[tg_inst];
pipe_ctx->stream_res.opp = pool->opps[tg_inst];

if (pool->dpps[tg_inst]) {
	pipe_ctx->plane_res.mpcc_inst = pool->dpps[tg_inst]->inst;

	// Read DPP->MPCC->OPP Pipe from HW State
	if (pool->mpc->funcs->read_mpcc_state) {
		struct mpcc_state s = {0};

		pool->mpc->funcs->read_mpcc_state(pool->mpc, pipe_ctx->plane_res.mpcc_inst, &s);

		if (s.dpp_id < MAX_MPCC6)
			pool->mpc->mpcc_array[pipe_ctx->plane_res.mpcc_inst].dpp_id = s.dpp_id;

		if (s.bot_mpcc_id < MAX_MPCC6)
			pool->mpc->mpcc_array[pipe_ctx->plane_res.mpcc_inst].mpcc_bot =
					&pool->mpc->mpcc_array[s.bot_mpcc_id];

		if (s.opp_id < MAX_OPP6)
			pipe_ctx->stream_res.opp->mpc_tree_params.opp_id = s.opp_id;
	}
}
pipe_ctx->pipe_idx = tg_inst;

pipe_ctx->stream = stream;
return tg_inst;
}

return -1;
2063}

2065enum dc_status resource_map_pool_resources(
const struct dc  *dc,
struct dc_state *context,
struct dc_stream_state *stream)
2069{
const struct resource_pool *pool = dc->res_pool;
int i;
struct dc_context *dc_ctx = dc->ctx;
struct pipe_ctx *pipe_ctx = NULL((void *)0);
int pipe_idx = -1;
struct dc_bios *dcb = dc->ctx->dc_bios;

calculate_phy_pix_clks(stream);

/* TODO: Check Linux */
if (dc->config.allow_seamless_boot_optimization &&
	!dcb->funcs->is_accelerated_mode(dcb)) {
if (dc_validate_seamless_boot_timing(dc, stream->sink, &stream->timing))
	stream->apply_seamless_boot_optimization = true1;
}

if (stream->apply_seamless_boot_optimization)
pipe_idx = acquire_resource_from_hw_enabled_state(
		&context->res_ctx,
		pool,
		stream);

if (pipe_idx < 0)
/* acquire new resources */
pipe_idx = acquire_first_free_pipe(&context->res_ctx, pool, stream);

2096#ifdef CONFIG_DRM_AMD_DC_DCN1
if (pipe_idx < 0)
pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);
2099#endif

if (pipe_idx < 0 || context->res_ctx.pipe_ctx[pipe_idx].stream_res.tg == NULL((void *)0))
return DC_NO_CONTROLLER_RESOURCE;

pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx];

pipe_ctx->stream_res.stream_enc =
dc->res_pool->funcs->find_first_free_match_stream_enc_for_link(
	&context->res_ctx, pool, stream);

if (!pipe_ctx->stream_res.stream_enc)
return DC_NO_STREAM_ENC_RESOURCE;

update_stream_engine_usage(
&context->res_ctx, pool,
pipe_ctx->stream_res.stream_enc,
true1);

/* TODO: Add check if ASIC support and EDID audio */
if (!stream->converter_disable_audio &&
   dc_is_audio_capable_signal(pipe_ctx->stream->signal) &&
   stream->audio_info.mode_count && stream->audio_info.flags.all) {
pipe_ctx->stream_res.audio = find_first_free_audio(
&context->res_ctx, pool, pipe_ctx->stream_res.stream_enc->id, dc_ctx->dce_version);

/*
 * Audio assigned in order first come first get.
 * There are asics which has number of audio
 * resources less then number of pipes
 */
if (pipe_ctx->stream_res.audio)
	update_audio_usage(&context->res_ctx, pool,
			   pipe_ctx->stream_res.audio, true1);
}

/* Add ABM to the resource if on EDP */
if (pipe_ctx->stream && dc_is_embedded_signal(pipe_ctx->stream->signal)) {
2137#if defined(CONFIG_DRM_AMD_DC_DCN3_01)
if (pool->abm)
	pipe_ctx->stream_res.abm = pool->abm;
else
	pipe_ctx->stream_res.abm = pool->multiple_abms[pipe_ctx->stream_res.tg->inst];
2142#else
pipe_ctx->stream_res.abm = pool->abm;
2144#endif
}

for (i = 0; i < context->stream_count; i++)
if (context->streams[i] == stream) {
	context->stream_status[i].primary_otg_inst = pipe_ctx->stream_res.tg->inst;
	context->stream_status[i].stream_enc_inst = pipe_ctx->stream_res.stream_enc->stream_enc_inst;
	context->stream_status[i].audio_inst =
		pipe_ctx->stream_res.audio ? pipe_ctx->stream_res.audio->inst : -1;

	return DC_OK;
}

DC_ERROR("Stream %p not found in new ctx!\n", stream)do { (void)(dc_ctx); __drm_err("Stream %p not found in new ctx!\n"
, stream); } while (0);
return DC_ERROR_UNEXPECTED;
2159}

2161/**
* dc_resource_state_copy_construct_current() - Creates a new dc_state from existing state
* Is a shallow copy.  Increments refcounts on existing streams and planes.
* @dc: copy out of dc->current_state
* @dst_ctx: copy into this
*/
2167void dc_resource_state_copy_construct_current(
const struct dc *dc,
struct dc_state *dst_ctx)
2170{
dc_resource_state_copy_construct(dc->current_state, dst_ctx);
2172}


2175void dc_resource_state_construct(
const struct dc *dc,
struct dc_state *dst_ctx)
2178{
dst_ctx->clk_mgr = dc->clk_mgr;
2180}


2183bool_Bool dc_resource_is_dsc_encoding_supported(const struct dc *dc)
2184{
return dc->res_pool->res_cap->num_dsc > 0;
2186}


2189/**
* dc_validate_global_state() - Determine if HW can support a given state
* Checks HW resource availability and bandwidth requirement.
* @dc: dc struct for this driver
* @new_ctx: state to be validated
* @fast_validate: set to true if only yes/no to support matters
*
* Return: DC_OK if the result can be programmed.  Otherwise, an error code.
*/
2198enum dc_status dc_validate_global_state(
struct dc *dc,
struct dc_state *new_ctx,
bool_Bool fast_validate)
2202{
enum dc_status result = DC_ERROR_UNEXPECTED;
int i, j;

if (!new_ctx)
1
Assuming 'new_ctx' is non-null→
2
←
Taking false branch→
return DC_ERROR_UNEXPECTED;

if (dc->res_pool->funcs->validate_global) {
3
←
Assuming field 'validate_global' is null→
4
←
Taking false branch→
result = dc->res_pool->funcs->validate_global(dc, new_ctx);
if (result != DC_OK)
	return result;
}

for (i = 0; i < new_ctx->stream_count; i++) {
5
←
Assuming 'i' is >= field 'stream_count'→
6
←
Loop condition is false. Execution continues on line 2253→
struct dc_stream_state *stream = new_ctx->streams[i];

for (j = 0; j < dc->res_pool->pipe_count; j++) {
	struct pipe_ctx *pipe_ctx = &new_ctx->res_ctx.pipe_ctx[j];

	if (pipe_ctx->stream != stream)
		continue;

	if (dc->res_pool->funcs->patch_unknown_plane_state &&
			pipe_ctx->plane_state &&
			pipe_ctx->plane_state->tiling_info.gfx9.swizzle == DC_SW_UNKNOWN) {
		result = dc->res_pool->funcs->patch_unknown_plane_state(pipe_ctx->plane_state);
		if (result != DC_OK)
			return result;
	}

	/* Switch to dp clock source only if there is
	 * no non dp stream that shares the same timing
	 * with the dp stream.
	 */
	if (dc_is_dp_signal(pipe_ctx->stream->signal) &&
		!find_pll_sharable_stream(stream, new_ctx)) {

		resource_unreference_clock_source(
				&new_ctx->res_ctx,
				dc->res_pool,
				pipe_ctx->clock_source);

		pipe_ctx->clock_source = dc->res_pool->dp_clock_source;
		resource_reference_clock_source(
				&new_ctx->res_ctx,
				dc->res_pool,
				 pipe_ctx->clock_source);
	}
}
}

result = resource_build_scaling_params_for_context(dc, new_ctx);
7
←
Calling 'resource_build_scaling_params_for_context'→

if (result == DC_OK)
if (!dc->res_pool->funcs->validate_bandwidth(dc, new_ctx, fast_validate))
	result = DC_FAIL_BANDWIDTH_VALIDATE;

return result;
2260}

2262static void patch_gamut_packet_checksum(
struct dc_info_packet *gamut_packet)
2264{
/* For gamut we recalc checksum */
if (gamut_packet->valid) {
uint8_t chk_sum = 0;
uint8_t *ptr;
uint8_t i;

/*start of the Gamut data. */
ptr = &gamut_packet->sb[3];

for (i = 0; i <= gamut_packet->sb[1]; i++)
	chk_sum += ptr[i];

gamut_packet->sb[2] = (uint8_t) (0x100 - chk_sum);
}
2279}

2281static void set_avi_info_frame(
struct dc_info_packet *info_packet,
struct pipe_ctx *pipe_ctx)
2284{
struct dc_stream_state *stream = pipe_ctx->stream;
enum dc_color_space color_space = COLOR_SPACE_UNKNOWN;
uint32_t pixel_encoding = 0;
enum scanning_type scan_type = SCANNING_TYPE_NODATA;
enum dc_aspect_ratio aspect = ASPECT_RATIO_NO_DATA;
bool_Bool itc = false0;
uint8_t itc_value = 0;
uint8_t cn0_cn1 = 0;
unsigned int cn0_cn1_value = 0;
uint8_t *check_sum = NULL((void *)0);
uint8_t byte_index = 0;
union hdmi_info_packet hdmi_info;
union display_content_support support = {0};
unsigned int vic = pipe_ctx->stream->timing.vic;
enum dc_timing_3d_format format;

memset(&hdmi_info, 0, sizeof(union hdmi_info_packet))__builtin_memset((&hdmi_info), (0), (sizeof(union hdmi_info_packet
)));

color_space = pipe_ctx->stream->output_color_space;
if (color_space == COLOR_SPACE_UNKNOWN)
color_space = (stream->timing.pixel_encoding == PIXEL_ENCODING_RGB) ?
	COLOR_SPACE_SRGB:COLOR_SPACE_YCBCR709;

/* Initialize header */
hdmi_info.bits.header.info_frame_type = HDMI_INFOFRAME_TYPE_AVI;
/* InfoFrameVersion_3 is defined by CEA861F (Section 6.4), but shall
* not be used in HDMI 2.0 (Section 10.1) */
hdmi_info.bits.header.version = 2;
hdmi_info.bits.header.length = HDMI_AVI_INFOFRAME_SIZE13;

/*
* IDO-defined (Y2,Y1,Y0 = 1,1,1) shall not be used by devices built
* according to HDMI 2.0 spec (Section 10.1)
*/

switch (stream->timing.pixel_encoding) {
case PIXEL_ENCODING_YCBCR422:
pixel_encoding = 1;
break;

case PIXEL_ENCODING_YCBCR444:
pixel_encoding = 2;
break;
case PIXEL_ENCODING_YCBCR420:
pixel_encoding = 3;
break;

case PIXEL_ENCODING_RGB:
default:
pixel_encoding = 0;
}

/* Y0_Y1_Y2 : The pixel encoding */
/* H14b AVI InfoFrame has extension on Y-field from 2 bits to 3 bits */
hdmi_info.bits.Y0_Y1_Y2 = pixel_encoding;

/* A0 = 1 Active Format Information valid */
hdmi_info.bits.A0 = ACTIVE_FORMAT_VALID;

/* B0, B1 = 3; Bar info data is valid */
hdmi_info.bits.B0_B1 = BAR_INFO_BOTH_VALID;

hdmi_info.bits.SC0_SC1 = PICTURE_SCALING_UNIFORM;

/* S0, S1 : Underscan / Overscan */
/* TODO: un-hardcode scan type */
scan_type = SCANNING_TYPE_UNDERSCAN;
hdmi_info.bits.S0_S1 = scan_type;

/* C0, C1 : Colorimetry */
if (color_space == COLOR_SPACE_YCBCR709 ||
	color_space == COLOR_SPACE_YCBCR709_LIMITED)
hdmi_info.bits.C0_C1 = COLORIMETRY_ITU709;
else if (color_space == COLOR_SPACE_YCBCR601 ||
	color_space == COLOR_SPACE_YCBCR601_LIMITED)
hdmi_info.bits.C0_C1 = COLORIMETRY_ITU601;
else {
hdmi_info.bits.C0_C1 = COLORIMETRY_NO_DATA;
}
if (color_space == COLOR_SPACE_2020_RGB_FULLRANGE ||
	color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE ||
	color_space == COLOR_SPACE_2020_YCBCR) {
hdmi_info.bits.EC0_EC2 = COLORIMETRYEX_BT2020RGBYCBCR;
hdmi_info.bits.C0_C1   = COLORIMETRY_EXTENDED;
} else if (color_space == COLOR_SPACE_ADOBERGB) {
hdmi_info.bits.EC0_EC2 = COLORIMETRYEX_ADOBERGB;
hdmi_info.bits.C0_C1   = COLORIMETRY_EXTENDED;
}

/* TODO: un-hardcode aspect ratio */
aspect = stream->timing.aspect_ratio;

switch (aspect) {
case ASPECT_RATIO_4_3:
case ASPECT_RATIO_16_9:
hdmi_info.bits.M0_M1 = aspect;
break;

case ASPECT_RATIO_NO_DATA:
case ASPECT_RATIO_64_27:
case ASPECT_RATIO_256_135:
default:
hdmi_info.bits.M0_M1 = 0;
}

/* Active Format Aspect ratio - same as Picture Aspect Ratio. */
hdmi_info.bits.R0_R3 = ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE;

/* TODO: un-hardcode cn0_cn1 and itc */

cn0_cn1 = 0;
cn0_cn1_value = 0;

itc = true1;
itc_value = 1;

support = stream->content_support;

if (itc) {
if (!support.bits.valid_content_type) {
	cn0_cn1_value = 0;
} else {
	if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GRAPHICS) {
		if (support.bits.graphics_content == 1) {
			cn0_cn1_value = 0;
		}
	} else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_PHOTO) {
		if (support.bits.photo_content == 1) {
			cn0_cn1_value = 1;
		} else {
			cn0_cn1_value = 0;
			itc_value = 0;
		}
	} else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_CINEMA) {
		if (support.bits.cinema_content == 1) {
			cn0_cn1_value = 2;
		} else {
			cn0_cn1_value = 0;
			itc_value = 0;
		}
	} else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GAME) {
		if (support.bits.game_content == 1) {
			cn0_cn1_value = 3;
		} else {
			cn0_cn1_value = 0;
			itc_value = 0;
		}
	}
}
hdmi_info.bits.CN0_CN1 = cn0_cn1_value;
hdmi_info.bits.ITC = itc_value;
}

/* TODO : We should handle YCC quantization */
/* but we do not have matrix calculation */
if (stream->qs_bit == 1 &&
	stream->qy_bit == 1) {
if (color_space == COLOR_SPACE_SRGB ||
	color_space == COLOR_SPACE_2020_RGB_FULLRANGE) {
	hdmi_info.bits.Q0_Q1   = RGB_QUANTIZATION_FULL_RANGE;
	hdmi_info.bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE;
} else if (color_space == COLOR_SPACE_SRGB_LIMITED ||
			color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE) {
	hdmi_info.bits.Q0_Q1   = RGB_QUANTIZATION_LIMITED_RANGE;
	hdmi_info.bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE;
} else {
	hdmi_info.bits.Q0_Q1   = RGB_QUANTIZATION_DEFAULT_RANGE;
	hdmi_info.bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE;
}
} else {
hdmi_info.bits.Q0_Q1   = RGB_QUANTIZATION_DEFAULT_RANGE;
hdmi_info.bits.YQ0_YQ1   = YYC_QUANTIZATION_LIMITED_RANGE;
}

///VIC
format = stream->timing.timing_3d_format;
/*todo, add 3DStereo support*/
if (format != TIMING_3D_FORMAT_NONE) {
// Based on HDMI specs hdmi vic needs to be converted to cea vic when 3D is enabled
switch (pipe_ctx->stream->timing.hdmi_vic) {
case 1:
	vic = 95;
	break;
case 2:
	vic = 94;
	break;
case 3:
	vic = 93;
	break;
case 4:
	vic = 98;
	break;
default:
	break;
}
}
/* If VIC >= 128, the Source shall use AVI InfoFrame Version 3*/
hdmi_info.bits.VIC0_VIC7 = vic;
if (vic >= 128)
hdmi_info.bits.header.version = 3;
/* If (C1, C0)=(1, 1) and (EC2, EC1, EC0)=(1, 1, 1),
* the Source shall use 20 AVI InfoFrame Version 4
*/
if (hdmi_info.bits.C0_C1 == COLORIMETRY_EXTENDED &&
	hdmi_info.bits.EC0_EC2 == COLORIMETRYEX_RESERVED) {
hdmi_info.bits.header.version = 4;
hdmi_info.bits.header.length = 14;
}

/* pixel repetition
* PR0 - PR3 start from 0 whereas pHwPathMode->mode.timing.flags.pixel
* repetition start from 1 */
hdmi_info.bits.PR0_PR3 = 0;

/* Bar Info
* barTop:    Line Number of End of Top Bar.
* barBottom: Line Number of Start of Bottom Bar.
* barLeft:   Pixel Number of End of Left Bar.
* barRight:  Pixel Number of Start of Right Bar. */
hdmi_info.bits.bar_top = stream->timing.v_border_top;
hdmi_info.bits.bar_bottom = (stream->timing.v_total
	- stream->timing.v_border_bottom + 1);
hdmi_info.bits.bar_left  = stream->timing.h_border_left;
hdmi_info.bits.bar_right = (stream->timing.h_total
	- stream->timing.h_border_right + 1);

  /* Additional Colorimetry Extension
   * Used in conduction with C0-C1 and EC0-EC2
   * 0 = DCI-P3 RGB (D65)
   * 1 = DCI-P3 RGB (theater)
   */
hdmi_info.bits.ACE0_ACE3 = 0;

/* check_sum - Calculate AFMT_AVI_INFO0 ~ AFMT_AVI_INFO3 */
check_sum = &hdmi_info.packet_raw_data.sb[0];

*check_sum = HDMI_INFOFRAME_TYPE_AVI + hdmi_info.bits.header.length + hdmi_info.bits.header.version;

for (byte_index = 1; byte_index <= hdmi_info.bits.header.length; byte_index++)
*check_sum += hdmi_info.packet_raw_data.sb[byte_index];

/* one byte complement */
*check_sum = (uint8_t) (0x100 - *check_sum);

/* Store in hw_path_mode */
info_packet->hb0 = hdmi_info.packet_raw_data.hb0;
info_packet->hb1 = hdmi_info.packet_raw_data.hb1;
info_packet->hb2 = hdmi_info.packet_raw_data.hb2;

for (byte_index = 0; byte_index < sizeof(hdmi_info.packet_raw_data.sb); byte_index++)
info_packet->sb[byte_index] = hdmi_info.packet_raw_data.sb[byte_index];

info_packet->valid = true1;
2538}

2540static void set_vendor_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
2543{
/* SPD info packet for FreeSync */

/* Check if Freesync is supported. Return if false. If true,
* set the corresponding bit in the info packet
*/
if (!stream->vsp_infopacket.valid)
return;

*info_packet = stream->vsp_infopacket;
2553}

2555static void set_spd_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
2558{
/* SPD info packet for FreeSync */

/* Check if Freesync is supported. Return if false. If true,
* set the corresponding bit in the info packet
*/
if (!stream->vrr_infopacket.valid)
return;

*info_packet = stream->vrr_infopacket;
2568}

2570static void set_hdr_static_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
2573{
/* HDR Static Metadata info packet for HDR10 */

if (!stream->hdr_static_metadata.valid ||
	stream->use_dynamic_meta)
return;

*info_packet = stream->hdr_static_metadata;
2581}

2583static void set_vsc_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
2586{
if (!stream->vsc_infopacket.valid)
return;

*info_packet = stream->vsc_infopacket;
2591}

2593void dc_resource_state_destruct(struct dc_state *context)
2594{
int i, j;

for (i = 0; i < context->stream_count; i++) {
for (j = 0; j < context->stream_status[i].plane_count; j++)
	dc_plane_state_release(
		context->stream_status[i].plane_states[j]);

context->stream_status[i].plane_count = 0;
dc_stream_release(context->streams[i]);
context->streams[i] = NULL((void *)0);
}
2606}

2608void dc_resource_state_copy_construct(
const struct dc_state *src_ctx,
struct dc_state *dst_ctx)
2611{
int i, j;
struct kref refcount = dst_ctx->refcount;

*dst_ctx = *src_ctx;

for (i = 0; i < MAX_PIPES6; i++) {
struct pipe_ctx *cur_pipe = &dst_ctx->res_ctx.pipe_ctx[i];

if (cur_pipe->top_pipe)
	cur_pipe->top_pipe =  &dst_ctx->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx];

if (cur_pipe->bottom_pipe)
	cur_pipe->bottom_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx];

if (cur_pipe->next_odm_pipe)
	cur_pipe->next_odm_pipe =  &dst_ctx->res_ctx.pipe_ctx[cur_pipe->next_odm_pipe->pipe_idx];

if (cur_pipe->prev_odm_pipe)
	cur_pipe->prev_odm_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->prev_odm_pipe->pipe_idx];
}

for (i = 0; i < dst_ctx->stream_count; i++) {
dc_stream_retain(dst_ctx->streams[i]);
for (j = 0; j < dst_ctx->stream_status[i].plane_count; j++)
	dc_plane_state_retain(
		dst_ctx->stream_status[i].plane_states[j]);
}

/* context refcount should not be overridden */
dst_ctx->refcount = refcount;

2643}

2645struct clock_source *dc_resource_find_first_free_pll(
struct resource_context *res_ctx,
const struct resource_pool *pool)
2648{
int i;

for (i = 0; i < pool->clk_src_count; ++i) {
if (res_ctx->clock_source_ref_count[i] == 0)
	return pool->clock_sources[i];
}

return NULL((void *)0);
2657}

2659void resource_build_info_frame(struct pipe_ctx *pipe_ctx)
2660{
enum amd_signal_type signal = SIGNAL_TYPE_NONE;
struct encoder_info_frame *info = &pipe_ctx->stream_res.encoder_info_frame;

/* default all packets to invalid */
info->avi.valid = false0;
info->gamut.valid = false0;
info->vendor.valid = false0;
info->spd.valid = false0;
info->hdrsmd.valid = false0;
info->vsc.valid = false0;

signal = pipe_ctx->stream->signal;

/* HDMi and DP have different info packets*/
if (dc_is_hdmi_signal(signal)) {
set_avi_info_frame(&info->avi, pipe_ctx);

set_vendor_info_packet(&info->vendor, pipe_ctx->stream);

set_spd_info_packet(&info->spd, pipe_ctx->stream);

set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream);

} else if (dc_is_dp_signal(signal)) {
set_vsc_info_packet(&info->vsc, pipe_ctx->stream);

set_spd_info_packet(&info->spd, pipe_ctx->stream);

set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream);
}

patch_gamut_packet_checksum(&info->gamut);
2693}

2695enum dc_status resource_map_clock_resources(
const struct dc  *dc,
struct dc_state *context,
struct dc_stream_state *stream)
2699{
/* acquire new resources */
const struct resource_pool *pool = dc->res_pool;
struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(
		&context->res_ctx, stream);

if (!pipe_ctx)
return DC_ERROR_UNEXPECTED;

if (dc_is_dp_signal(pipe_ctx->stream->signal)
|| pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL)
pipe_ctx->clock_source = pool->dp_clock_source;
else {
pipe_ctx->clock_source = NULL((void *)0);

if (!dc->config.disable_disp_pll_sharing)
	pipe_ctx->clock_source = resource_find_used_clk_src_for_sharing(
		&context->res_ctx,
		pipe_ctx);

if (pipe_ctx->clock_source == NULL((void *)0))
	pipe_ctx->clock_source =
		dc_resource_find_first_free_pll(
			&context->res_ctx,
			pool);
}

if (pipe_ctx->clock_source == NULL((void *)0))
return DC_NO_CLOCK_SOURCE_RESOURCE;

resource_reference_clock_source(
&context->res_ctx, pool,
pipe_ctx->clock_source);

return DC_OK;
2734}

2736/*
* Note: We need to disable output if clock sources change,
* since bios does optimization and doesn't apply if changing
* PHY when not already disabled.
*/
2741bool_Bool pipe_need_reprogram(
struct pipe_ctx *pipe_ctx_old,
struct pipe_ctx *pipe_ctx)
2744{
if (!pipe_ctx_old->stream)
return false0;

if (pipe_ctx_old->stream->sink != pipe_ctx->stream->sink)
return true1;

if (pipe_ctx_old->stream->signal != pipe_ctx->stream->signal)
return true1;

if (pipe_ctx_old->stream_res.audio != pipe_ctx->stream_res.audio)
return true1;

if (pipe_ctx_old->clock_source != pipe_ctx->clock_source
	&& pipe_ctx_old->stream != pipe_ctx->stream)
return true1;

if (pipe_ctx_old->stream_res.stream_enc != pipe_ctx->stream_res.stream_enc)
return true1;

if (is_timing_changed(pipe_ctx_old->stream, pipe_ctx->stream))
return true1;

if (pipe_ctx_old->stream->dpms_off != pipe_ctx->stream->dpms_off)
return true1;

if (false0 == pipe_ctx_old->stream->link->link_state_valid &&
false0 == pipe_ctx_old->stream->dpms_off)
return true1;

if (pipe_ctx_old->stream_res.dsc != pipe_ctx->stream_res.dsc)
return true1;

return false0;
2778}

2780void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
struct bit_depth_reduction_params *fmt_bit_depth)
2782{
enum dc_dither_option option = stream->dither_option;
enum dc_pixel_encoding pixel_encoding =
	stream->timing.pixel_encoding;

memset(fmt_bit_depth, 0, sizeof(*fmt_bit_depth))__builtin_memset((fmt_bit_depth), (0), (sizeof(*fmt_bit_depth
)));

if (option == DITHER_OPTION_DEFAULT) {
switch (stream->timing.display_color_depth) {
case COLOR_DEPTH_666:
	option = DITHER_OPTION_SPATIAL6;
	break;
case COLOR_DEPTH_888:
	option = DITHER_OPTION_SPATIAL8;
	break;
case COLOR_DEPTH_101010:
	option = DITHER_OPTION_SPATIAL10;
	break;
default:
	option = DITHER_OPTION_DISABLE;
}
}

if (option == DITHER_OPTION_DISABLE)
return;

if (option == DITHER_OPTION_TRUN6) {
fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
fmt_bit_depth->flags.TRUNCATE_DEPTH = 0;
} else if (option == DITHER_OPTION_TRUN8 ||
	option == DITHER_OPTION_TRUN8_SPATIAL6 ||
	option == DITHER_OPTION_TRUN8_FM6) {
fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
fmt_bit_depth->flags.TRUNCATE_DEPTH = 1;
} else if (option == DITHER_OPTION_TRUN10        ||
	option == DITHER_OPTION_TRUN10_SPATIAL6   ||
	option == DITHER_OPTION_TRUN10_SPATIAL8   ||
	option == DITHER_OPTION_TRUN10_FM8     ||
	option == DITHER_OPTION_TRUN10_FM6     ||
	option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
fmt_bit_depth->flags.TRUNCATE_DEPTH = 2;
}

/* special case - Formatter can only reduce by 4 bits at most.
* When reducing from 12 to 6 bits,
* HW recommends we use trunc with round mode
* (if we did nothing, trunc to 10 bits would be used)
* note that any 12->10 bit reduction is ignored prior to DCE8,
* as the input was 10 bits.
*/
if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM ||
	option == DITHER_OPTION_SPATIAL6 ||
	option == DITHER_OPTION_FM6) {
fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
fmt_bit_depth->flags.TRUNCATE_DEPTH = 2;
fmt_bit_depth->flags.TRUNCATE_MODE = 1;
}

/* spatial dither
* note that spatial modes 1-3 are never used
*/
if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM            ||
	option == DITHER_OPTION_SPATIAL6 ||
	option == DITHER_OPTION_TRUN10_SPATIAL6      ||
	option == DITHER_OPTION_TRUN8_SPATIAL6) {
fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 0;
fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
fmt_bit_depth->flags.RGB_RANDOM =
		(pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
} else if (option == DITHER_OPTION_SPATIAL8_FRAME_RANDOM            ||
	option == DITHER_OPTION_SPATIAL8 ||
	option == DITHER_OPTION_SPATIAL8_FM6        ||
	option == DITHER_OPTION_TRUN10_SPATIAL8      ||
	option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 1;
fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
fmt_bit_depth->flags.RGB_RANDOM =
		(pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
} else if (option == DITHER_OPTION_SPATIAL10_FRAME_RANDOM ||
	option == DITHER_OPTION_SPATIAL10 ||
	option == DITHER_OPTION_SPATIAL10_FM8 ||
	option == DITHER_OPTION_SPATIAL10_FM6) {
fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 2;
fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
fmt_bit_depth->flags.RGB_RANDOM =
		(pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
}

if (option == DITHER_OPTION_SPATIAL6 ||
	option == DITHER_OPTION_SPATIAL8 ||
	option == DITHER_OPTION_SPATIAL10) {
fmt_bit_depth->flags.FRAME_RANDOM = 0;
} else {
fmt_bit_depth->flags.FRAME_RANDOM = 1;
}

//////////////////////
//// temporal dither
//////////////////////
if (option == DITHER_OPTION_FM6           ||
	option == DITHER_OPTION_SPATIAL8_FM6     ||
	option == DITHER_OPTION_SPATIAL10_FM6     ||
	option == DITHER_OPTION_TRUN10_FM6     ||
	option == DITHER_OPTION_TRUN8_FM6      ||
	option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 0;
} else if (option == DITHER_OPTION_FM8        ||
	option == DITHER_OPTION_SPATIAL10_FM8  ||
	option == DITHER_OPTION_TRUN10_FM8) {
fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 1;
} else if (option == DITHER_OPTION_FM10) {
fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 2;
}

fmt_bit_depth->pixel_encoding = pixel_encoding;
2904}

2906enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream)
2907{
struct dc_link *link = stream->link;
struct timing_generator *tg = dc->res_pool->timing_generators[0];
enum dc_status res = DC_OK;

calculate_phy_pix_clks(stream);

if (!tg->funcs->validate_timing(tg, &stream->timing))
res = DC_FAIL_CONTROLLER_VALIDATE;

if (res == DC_OK) {
if (!link->link_enc->funcs->validate_output_with_stream(
				link->link_enc, stream))
	res = DC_FAIL_ENC_VALIDATE;
}

/* TODO: validate audio ASIC caps, encoder */

if (res == DC_OK)
res = dc_link_validate_mode_timing(stream,
      link,
      &stream->timing);

return res;
2931}

2933enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state)
2934{
enum dc_status res = DC_OK;

/* TODO For now validates pixel format only */
if (dc->res_pool->funcs->validate_plane)
return dc->res_pool->funcs->validate_plane(plane_state, &dc->caps);

return res;
2942}

2944unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format)
2945{
switch (format) {
case SURFACE_PIXEL_FORMAT_GRPH_PALETA_256_COLORS:
return 8;
case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr:
case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb:
return 12;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555:
case SURFACE_PIXEL_FORMAT_GRPH_RGB565:
case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr:
case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb:
return 16;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888:
case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010_XR_BIAS:
2962#if defined(CONFIG_DRM_AMD_DC_DCN3_01)
case SURFACE_PIXEL_FORMAT_GRPH_RGBE:
case SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA:
2965#endif
return 32;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F:
return 64;
default:
ASSERT_CRITICAL(false)do { if (({ int __ret = !!(!(0)); if (__ret) printf("WARNING %s failed at %s:%d\n"
, "!(0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 2972); __builtin_expect(!!(__ret), 0); })) do {} while (0);
 } while (0);
return -1;
}
2975}
2976static unsigned int get_max_audio_sample_rate(struct audio_mode *modes)
2977{
if (modes) {
if (modes->sample_rates.rate.RATE_192)
	return 192000;
if (modes->sample_rates.rate.RATE_176_4)
	return 176400;
if (modes->sample_rates.rate.RATE_96)
	return 96000;
if (modes->sample_rates.rate.RATE_88_2)
	return 88200;
if (modes->sample_rates.rate.RATE_48)
	return 48000;
if (modes->sample_rates.rate.RATE_44_1)
	return 44100;
if (modes->sample_rates.rate.RATE_32)
	return 32000;
}
/*original logic when no audio info*/
return 441000;
2996}

2998void get_audio_check(struct audio_info *aud_modes,
struct audio_check *audio_chk)
3000{
unsigned int i;
unsigned int max_sample_rate = 0;

if (aud_modes) {
audio_chk->audio_packet_type = 0x2;/*audio sample packet AP = .25 for layout0, 1 for layout1*/

audio_chk->max_audiosample_rate = 0;
for (i = 0; i < aud_modes->mode_count; i++) {
	max_sample_rate = get_max_audio_sample_rate(&aud_modes->modes[i]);
	if (audio_chk->max_audiosample_rate < max_sample_rate)
		audio_chk->max_audiosample_rate = max_sample_rate;
	/*dts takes the same as type 2: AP = 0.25*/
}
/*check which one take more bandwidth*/
if (audio_chk->max_audiosample_rate > 192000)
	audio_chk->audio_packet_type = 0x9;/*AP =1*/
audio_chk->acat = 0;/*not support*/
}
3019}


←

/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h

1/*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25 
26#ifndef __DAL_FIXED31_32_H__
27#define __DAL_FIXED31_32_H__
28 
29#ifndef LLONG_MAX0x7fffffffffffffffLL
30#define LLONG_MAX0x7fffffffffffffffLL 9223372036854775807ll
31#endif
32#ifndef LLONG_MIN(-0x7fffffffffffffffLL-1)
33#define LLONG_MIN(-0x7fffffffffffffffLL-1) (-LLONG_MAX0x7fffffffffffffffLL - 1ll)
34#endif
35 
36#define FIXED31_32_BITS_PER_FRACTIONAL_PART32 32
37#ifndef LLONG_MIN(-0x7fffffffffffffffLL-1)
38#define LLONG_MIN(-0x7fffffffffffffffLL-1) (1LL<<63)
39#endif
40#ifndef LLONG_MAX0x7fffffffffffffffLL
41#define LLONG_MAX0x7fffffffffffffffLL (-1LL>>1)
42#endif
43 
44/*
45 * @brief
46 * Arithmetic operations on real numbers
47 * represented as fixed-point numbers.
48 * There are: 1 bit for sign,
49 * 31 bit for integer part,
50 * 32 bits for fractional part.
51 *
52 * @note
53 * Currently, overflows and underflows are asserted;
54 * no special result returned.
55 */
56 
57struct fixed31_32 {
58	long long value;
59};
60 
61 
62/*
63 * @brief
64 * Useful constants
65 */
66 
67static const struct fixed31_32 dc_fixpt_zero = { 0 };
68static const struct fixed31_32 dc_fixpt_epsilon = { 1LL };
69static const struct fixed31_32 dc_fixpt_half = { 0x80000000LL };
70static const struct fixed31_32 dc_fixpt_one = { 0x100000000LL };
71 
72static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
73static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
74static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
75static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
76static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
77 
78/*
79 * @brief
80 * Initialization routines
81 */
82 
83/*
84 * @brief
85 * result = numerator / denominator
86 */
87struct fixed31_32 dc_fixpt_from_fraction(long long numerator, long long denominator);
88 
89/*
90 * @brief
91 * result = arg
92 */
93static inline struct fixed31_32 dc_fixpt_from_int(int arg)
94{
95	struct fixed31_32 res;
96 
97	res.value = (long long) arg << FIXED31_32_BITS_PER_FRACTIONAL_PART32;
98 
99	return res;
100}
101 
102/*
103 * @brief
104 * Unary operators
105 */
106 
107/*
108 * @brief
109 * result = -arg
110 */
111static inline struct fixed31_32 dc_fixpt_neg(struct fixed31_32 arg)
112{
113	struct fixed31_32 res;
114 
115	res.value = -arg.value;
116 
117	return res;
118}
119 
120/*
121 * @brief
122 * result = abs(arg) := (arg >= 0) ? arg : -arg
123 */
124static inline struct fixed31_32 dc_fixpt_abs(struct fixed31_32 arg)
125{
126	if (arg.value < 0)
127		return dc_fixpt_neg(arg);
128	else
129		return arg;
130}
131 
132/*
133 * @brief
134 * Binary relational operators
135 */
136 
137/*
138 * @brief
139 * result = arg1 < arg2
140 */
141static inline bool_Bool dc_fixpt_lt(struct fixed31_32 arg1, struct fixed31_32 arg2)
142{
143	return arg1.value < arg2.value;
144}
145 
146/*
147 * @brief
148 * result = arg1 <= arg2
149 */
150static inline bool_Bool dc_fixpt_le(struct fixed31_32 arg1, struct fixed31_32 arg2)
151{
152	return arg1.value <= arg2.value;
153}
154 
155/*
156 * @brief
157 * result = arg1 == arg2
158 */
159static inline bool_Bool dc_fixpt_eq(struct fixed31_32 arg1, struct fixed31_32 arg2)
160{
161	return arg1.value == arg2.value;
162}
163 
164/*
165 * @brief
166 * result = min(arg1, arg2) := (arg1 <= arg2) ? arg1 : arg2
167 */
168static inline struct fixed31_32 dc_fixpt_min(struct fixed31_32 arg1, struct fixed31_32 arg2)
169{
170	if (arg1.value <= arg2.value)
171		return arg1;
172	else
173		return arg2;
174}
175 
176/*
177 * @brief
178 * result = max(arg1, arg2) := (arg1 <= arg2) ? arg2 : arg1
179 */
180static inline struct fixed31_32 dc_fixpt_max(struct fixed31_32 arg1, struct fixed31_32 arg2)
181{
182	if (arg1.value <= arg2.value)
183		return arg2;
184	else
185		return arg1;
186}
187 
188/*
189 * @brief
190 *          | min_value, when arg <= min_value
191 * result = | arg, when min_value < arg < max_value
192 *          | max_value, when arg >= max_value
193 */
194static inline struct fixed31_32 dc_fixpt_clamp(
195	struct fixed31_32 arg,
196	struct fixed31_32 min_value,
197	struct fixed31_32 max_value)
198{
199	if (dc_fixpt_le(arg, min_value))
200		return min_value;
201	else if (dc_fixpt_le(max_value, arg))
202		return max_value;
203	else
204		return arg;
205}
206 
207/*
208 * @brief
209 * Binary shift operators
210 */
211 
212/*
213 * @brief
214 * result = arg << shift
215 */
216static inline struct fixed31_32 dc_fixpt_shl(struct fixed31_32 arg, unsigned char shift)
217{
218	ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) ||do { if (({ static int __warned; int __ret = !!(!(((arg.value
 >= 0) && (arg.value <= 0x7fffffffffffffffLL >>
 shift)) || ((arg.value < 0) && (arg.value >= ~
(0x7fffffffffffffffLL >> shift))))); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(((arg.value >= 0) && (arg.value <= 0x7fffffffffffffffLL >> shift)) || ((arg.value < 0) && (arg.value >= ~(0x7fffffffffffffffLL >> shift))))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 219); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0)
219		((arg.value < 0) && (arg.value >= ~(LLONG_MAX >> shift))))do { if (({ static int __warned; int __ret = !!(!(((arg.value
 >= 0) && (arg.value <= 0x7fffffffffffffffLL >>
 shift)) || ((arg.value < 0) && (arg.value >= ~
(0x7fffffffffffffffLL >> shift))))); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(((arg.value >= 0) && (arg.value <= 0x7fffffffffffffffLL >> shift)) || ((arg.value < 0) && (arg.value >= ~(0x7fffffffffffffffLL >> shift))))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 219); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
220 
221	arg.value = arg.value << shift;
222 
223	return arg;
224}
225 
226/*
227 * @brief
228 * result = arg >> shift
229 */
230static inline struct fixed31_32 dc_fixpt_shr(struct fixed31_32 arg, unsigned char shift)
231{
232	bool_Bool negative = arg.value < 0;
233 
234	if (negative)
235		arg.value = -arg.value;
236	arg.value = arg.value >> shift;
237	if (negative)
238		arg.value = -arg.value;
239	return arg;
240}
241 
242/*
243 * @brief
244 * Binary additive operators
245 */
246 
247/*
248 * @brief
249 * result = arg1 + arg2
250 */
251static inline struct fixed31_32 dc_fixpt_add(struct fixed31_32 arg1, struct fixed31_32 arg2)
252{
253	struct fixed31_32 res;
254 
255	ASSERT(((arg1.value >= 0) && (LLONG_MAX - arg1.value >= arg2.value)) ||do { if (({ static int __warned; int __ret = !!(!(((arg1.value
 >= 0) && (0x7fffffffffffffffLL - arg1.value >=
 arg2.value)) || ((arg1.value < 0) && ((-0x7fffffffffffffffLL
-1) - arg1.value <= arg2.value)))); if (__ret && !
__warned) { printf("WARNING %s failed at %s:%d\n", "!(((arg1.value >= 0) && (0x7fffffffffffffffLL - arg1.value >= arg2.value)) || ((arg1.value < 0) && ((-0x7fffffffffffffffLL-1) - arg1.value <= arg2.value)))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 256); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0)
256		((arg1.value < 0) && (LLONG_MIN - arg1.value <= arg2.value)))do { if (({ static int __warned; int __ret = !!(!(((arg1.value
 >= 0) && (0x7fffffffffffffffLL - arg1.value >=
 arg2.value)) || ((arg1.value < 0) && ((-0x7fffffffffffffffLL
-1) - arg1.value <= arg2.value)))); if (__ret && !
__warned) { printf("WARNING %s failed at %s:%d\n", "!(((arg1.value >= 0) && (0x7fffffffffffffffLL - arg1.value >= arg2.value)) || ((arg1.value < 0) && ((-0x7fffffffffffffffLL-1) - arg1.value <= arg2.value)))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 256); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
257 
258	res.value = arg1.value + arg2.value;
259 
260	return res;
261}
262 
263/*
264 * @brief
265 * result = arg1 + arg2
266 */
267static inline struct fixed31_32 dc_fixpt_add_int(struct fixed31_32 arg1, int arg2)
268{
269	return dc_fixpt_add(arg1, dc_fixpt_from_int(arg2));
270}
271 
272/*
273 * @brief
274 * result = arg1 - arg2
275 */
276static inline struct fixed31_32 dc_fixpt_sub(struct fixed31_32 arg1, struct fixed31_32 arg2)
277{
278	struct fixed31_32 res;
279 
280	ASSERT(((arg2.value >= 0) && (LLONG_MIN + arg2.value <= arg1.value)) ||do { if (({ static int __warned; int __ret = !!(!(((arg2.value
 >= 0) && ((-0x7fffffffffffffffLL-1) + arg2.value <=
 arg1.value)) || ((arg2.value < 0) && (0x7fffffffffffffffLL
 + arg2.value >= arg1.value)))); if (__ret && !__warned
) { printf("WARNING %s failed at %s:%d\n", "!(((arg2.value >= 0) && ((-0x7fffffffffffffffLL-1) + arg2.value <= arg1.value)) || ((arg2.value < 0) && (0x7fffffffffffffffLL + arg2.value >= arg1.value)))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 281); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0)
281		((arg2.value < 0) && (LLONG_MAX + arg2.value >= arg1.value)))do { if (({ static int __warned; int __ret = !!(!(((arg2.value
 >= 0) && ((-0x7fffffffffffffffLL-1) + arg2.value <=
 arg1.value)) || ((arg2.value < 0) && (0x7fffffffffffffffLL
 + arg2.value >= arg1.value)))); if (__ret && !__warned
) { printf("WARNING %s failed at %s:%d\n", "!(((arg2.value >= 0) && ((-0x7fffffffffffffffLL-1) + arg2.value <= arg1.value)) || ((arg2.value < 0) && (0x7fffffffffffffffLL + arg2.value >= arg1.value)))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 281); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
282 
283	res.value = arg1.value - arg2.value;
284 
285	return res;
286}
287 
288/*
289 * @brief
290 * result = arg1 - arg2
291 */
292static inline struct fixed31_32 dc_fixpt_sub_int(struct fixed31_32 arg1, int arg2)
293{
294	return dc_fixpt_sub(arg1, dc_fixpt_from_int(arg2));
295}
296 
297 
298/*
299 * @brief
300 * Binary multiplicative operators
301 */
302 
303/*
304 * @brief
305 * result = arg1 * arg2
306 */
307struct fixed31_32 dc_fixpt_mul(struct fixed31_32 arg1, struct fixed31_32 arg2);
308 
309 
310/*
311 * @brief
312 * result = arg1 * arg2
313 */
314static inline struct fixed31_32 dc_fixpt_mul_int(struct fixed31_32 arg1, int arg2)
315{
316	return dc_fixpt_mul(arg1, dc_fixpt_from_int(arg2));
317}
318 
319/*
320 * @brief
321 * result = square(arg) := arg * arg
322 */
323struct fixed31_32 dc_fixpt_sqr(struct fixed31_32 arg);
324 
325/*
326 * @brief
327 * result = arg1 / arg2
328 */
329static inline struct fixed31_32 dc_fixpt_div_int(struct fixed31_32 arg1, long long arg2)
330{
331	return dc_fixpt_from_fraction(arg1.value, dc_fixpt_from_int(arg2).value);
332}
333 
334/*
335 * @brief
336 * result = arg1 / arg2
337 */
338static inline struct fixed31_32 dc_fixpt_div(struct fixed31_32 arg1, struct fixed31_32 arg2)
339{
340	return dc_fixpt_from_fraction(arg1.value, arg2.value);
341}
342 
343/*
344 * @brief
345 * Reciprocal function
346 */
347 
348/*
349 * @brief
350 * result = reciprocal(arg) := 1 / arg
351 *
352 * @note
353 * No special actions taken in case argument is zero.
354 */
355struct fixed31_32 dc_fixpt_recip(struct fixed31_32 arg);
356 
357/*
358 * @brief
359 * Trigonometric functions
360 */
361 
362/*
363 * @brief
364 * result = sinc(arg) := sin(arg) / arg
365 *
366 * @note
367 * Argument specified in radians,
368 * internally it's normalized to [-2pi...2pi] range.
369 */
370struct fixed31_32 dc_fixpt_sinc(struct fixed31_32 arg);
371 
372/*
373 * @brief
374 * result = sin(arg)
375 *
376 * @note
377 * Argument specified in radians,
378 * internally it's normalized to [-2pi...2pi] range.
379 */
380struct fixed31_32 dc_fixpt_sin(struct fixed31_32 arg);
381 
382/*
383 * @brief
384 * result = cos(arg)
385 *
386 * @note
387 * Argument specified in radians
388 * and should be in [-2pi...2pi] range -
389 * passing arguments outside that range
390 * will cause incorrect result!
391 */
392struct fixed31_32 dc_fixpt_cos(struct fixed31_32 arg);
393 
394/*
395 * @brief
396 * Transcendent functions
397 */
398 
399/*
400 * @brief
401 * result = exp(arg)
402 *
403 * @note
404 * Currently, function is verified for abs(arg) <= 1.
405 */
406struct fixed31_32 dc_fixpt_exp(struct fixed31_32 arg);
407 
408/*
409 * @brief
410 * result = log(arg)
411 *
412 * @note
413 * Currently, abs(arg) should be less than 1.
414 * No normalization is done.
415 * Currently, no special actions taken
416 * in case of invalid argument(s). Take care!
417 */
418struct fixed31_32 dc_fixpt_log(struct fixed31_32 arg);
419 
420/*
421 * @brief
422 * Power function
423 */
424 
425/*
426 * @brief
427 * result = pow(arg1, arg2)
428 *
429 * @note
430 * Currently, abs(arg1) should be less than 1. Take care!
431 */
432static inline struct fixed31_32 dc_fixpt_pow(struct fixed31_32 arg1, struct fixed31_32 arg2)
433{
434	if (arg1.value == 0)
435		return arg2.value == 0 ? dc_fixpt_one : dc_fixpt_zero;
436 
437	return dc_fixpt_exp(
438		dc_fixpt_mul(
439			dc_fixpt_log(arg1),
440			arg2));
441}
442 
443/*
444 * @brief
445 * Rounding functions
446 */
447 
448/*
449 * @brief
450 * result = floor(arg) := greatest integer lower than or equal to arg
451 */
452static inline int dc_fixpt_floor(struct fixed31_32 arg)
453{
454	unsigned long long arg_value = arg.value > 0 ? arg.value : -arg.value;
455 
456	if (arg.value >= 0)
457		return (int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
458	else
459		return -(int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
460}
461 
462/*
463 * @brief
464 * result = round(arg) := integer nearest to arg
465 */
466static inline int dc_fixpt_round(struct fixed31_32 arg)
467{
468	unsigned long long arg_value = arg.value > 0 ? arg.value : -arg.value;
469 
470	const long long summand = dc_fixpt_half.value;
471 
472	ASSERT(LLONG_MAX - (long long)arg_value >= summand)do { if (({ static int __warned; int __ret = !!(!(0x7fffffffffffffffLL
 - (long long)arg_value >= summand)); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(0x7fffffffffffffffLL - (long long)arg_value >= summand)"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 472); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
473 
474	arg_value += summand;
475 
476	if (arg.value >= 0)
477		return (int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
478	else
479		return -(int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
480}
481 
482/*
483 * @brief
484 * result = ceil(arg) := lowest integer greater than or equal to arg
485 */
486static inline int dc_fixpt_ceil(struct fixed31_32 arg)
487{
488	unsigned long long arg_value = arg.value > 0 ? arg.value : -arg.value;
489 
490	const long long summand = dc_fixpt_one.value -
491		dc_fixpt_epsilon.value;
492 
493	ASSERT(LLONG_MAX - (long long)arg_value >= summand)do { if (({ static int __warned; int __ret = !!(!(0x7fffffffffffffffLL
 - (long long)arg_value >= summand)); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(0x7fffffffffffffffLL - (long long)arg_value >= summand)"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 493); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
494 
495	arg_value += summand;
496 
497	if (arg.value >= 0)
498		return (int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
499	else
500		return -(int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
501}
502 
503/* the following two function are used in scaler hw programming to convert fixed
504 * point value to format 2 bits from integer part and 19 bits from fractional
505 * part. The same applies for u0d19, 0 bits from integer part and 19 bits from
506 * fractional
507 */
508 
509unsigned int dc_fixpt_u4d19(struct fixed31_32 arg);
510 
511unsigned int dc_fixpt_u3d19(struct fixed31_32 arg);
512 
513unsigned int dc_fixpt_u2d19(struct fixed31_32 arg);
514 
515unsigned int dc_fixpt_u0d19(struct fixed31_32 arg);
516 
517unsigned int dc_fixpt_clamp_u0d14(struct fixed31_32 arg);
518 
519unsigned int dc_fixpt_clamp_u0d10(struct fixed31_32 arg);
520 
521int dc_fixpt_s4d19(struct fixed31_32 arg);
522 
523static inline struct fixed31_32 dc_fixpt_truncate(struct fixed31_32 arg, unsigned int frac_bits)
524{
525	bool_Bool negative = arg.value < 0;
23
←
Assuming field 'value' is >= 0→
526 
527	if (frac_bits23.1
'frac_bits' is < FIXED31_32_BITS_PER_FRACTIONAL_PART
23.1
'frac_bits' is < FIXED31_32_BITS_PER_FRACTIONAL_PART
 >= FIXED31_32_BITS_PER_FRACTIONAL_PART32) {
24
←
Taking false branch→
528		ASSERT(frac_bits == FIXED31_32_BITS_PER_FRACTIONAL_PART)do { if (({ static int __warned; int __ret = !!(!(frac_bits ==
 32)); if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(frac_bits == 32)", "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 528); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
529		return arg;
530	}
531 
532	if (negative24.1
'negative' is false
24.1
'negative' is false
)
25
←
Taking false branch→
533		arg.value = -arg.value;
534	arg.value &= (~0LL) << (FIXED31_32_BITS_PER_FRACTIONAL_PART32 - frac_bits);
26
←
The result of the left shift is undefined because the left operand is negative
535	if (negative)
536		arg.value = -arg.value;
537	return arg;
538}
539 
540#endif