| File: | dev/pci/drm/i915/gt/intel_engine_heartbeat.c |
| Warning: | line 62, column 15 The result of the left shift is undefined because the left operand is negative |
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| 1 | /* |
| 2 | * SPDX-License-Identifier: MIT |
| 3 | * |
| 4 | * Copyright © 2019 Intel Corporation |
| 5 | */ |
| 6 | |
| 7 | #include "i915_drv.h" |
| 8 | #include "i915_request.h" |
| 9 | |
| 10 | #include "intel_context.h" |
| 11 | #include "intel_engine_heartbeat.h" |
| 12 | #include "intel_engine_pm.h" |
| 13 | #include "intel_engine.h" |
| 14 | #include "intel_gt.h" |
| 15 | #include "intel_reset.h" |
| 16 | |
| 17 | /* |
| 18 | * While the engine is active, we send a periodic pulse along the engine |
| 19 | * to check on its health and to flush any idle-barriers. If that request |
| 20 | * is stuck, and we fail to preempt it, we declare the engine hung and |
| 21 | * issue a reset -- in the hope that restores progress. |
| 22 | */ |
| 23 | |
| 24 | static bool_Bool next_heartbeat(struct intel_engine_cs *engine) |
| 25 | { |
| 26 | long delay; |
| 27 | |
| 28 | delay = READ_ONCE(engine->props.heartbeat_interval_ms)({ typeof(engine->props.heartbeat_interval_ms) __tmp = *(volatile typeof(engine->props.heartbeat_interval_ms) *)&(engine ->props.heartbeat_interval_ms); membar_datadep_consumer(); __tmp; }); |
| 29 | if (!delay) |
| 30 | return false0; |
| 31 | |
| 32 | delay = msecs_to_jiffies_timeout(delay); |
| 33 | if (delay >= HZhz) |
| 34 | delay = round_jiffies_up_relative(delay); |
| 35 | mod_delayed_work(system_highpri_wq, &engine->heartbeat.work, delay); |
| 36 | |
| 37 | return true1; |
| 38 | } |
| 39 | |
| 40 | static void idle_pulse(struct intel_engine_cs *engine, struct i915_request *rq) |
| 41 | { |
| 42 | engine->wakeref_serial = READ_ONCE(engine->serial)({ typeof(engine->serial) __tmp = *(volatile typeof(engine ->serial) *)&(engine->serial); membar_datadep_consumer (); __tmp; }) + 1; |
| 43 | i915_request_add_active_barriers(rq); |
| 44 | } |
| 45 | |
| 46 | static void show_heartbeat(const struct i915_request *rq, |
| 47 | struct intel_engine_cs *engine) |
| 48 | { |
| 49 | struct drm_printer p = drm_debug_printer("heartbeat"); |
| 50 | |
| 51 | intel_engine_dump(engine, &p, |
| 52 | "%s heartbeat {seqno:%llx:%lld, prio:%d} not ticking\n", |
| 53 | engine->name, |
| 54 | rq->fence.context, |
| 55 | rq->fence.seqno, |
| 56 | rq->sched.attr.priority); |
| 57 | } |
| 58 | |
| 59 | static void heartbeat(struct work_struct *wrk) |
| 60 | { |
| 61 | struct i915_sched_attr attr = { |
| 62 | .priority = I915_USER_PRIORITY(I915_PRIORITY_MIN)((I915_PRIORITY_MIN) << 0), |
The result of the left shift is undefined because the left operand is negative | |
| 63 | }; |
| 64 | struct intel_engine_cs *engine = |
| 65 | container_of(wrk, typeof(*engine), heartbeat.work.work)({ const __typeof( ((typeof(*engine) *)0)->heartbeat.work. work ) *__mptr = (wrk); (typeof(*engine) *)( (char *)__mptr - __builtin_offsetof(typeof(*engine), heartbeat.work.work) );} ); |
| 66 | struct intel_context *ce = engine->kernel_context; |
| 67 | struct i915_request *rq; |
| 68 | unsigned long serial; |
| 69 | |
| 70 | /* Just in case everything has gone horribly wrong, give it a kick */ |
| 71 | intel_engine_flush_submission(engine); |
| 72 | |
| 73 | rq = engine->heartbeat.systole; |
| 74 | if (rq && i915_request_completed(rq)) { |
| 75 | i915_request_put(rq); |
| 76 | engine->heartbeat.systole = NULL((void *)0); |
| 77 | } |
| 78 | |
| 79 | if (!intel_engine_pm_get_if_awake(engine)) |
| 80 | return; |
| 81 | |
| 82 | if (intel_gt_is_wedged(engine->gt)) |
| 83 | goto out; |
| 84 | |
| 85 | if (engine->heartbeat.systole) { |
| 86 | if (!i915_sw_fence_signaled(&rq->submit)) { |
| 87 | /* |
| 88 | * Not yet submitted, system is stalled. |
| 89 | * |
| 90 | * This more often happens for ring submission, |
| 91 | * where all contexts are funnelled into a common |
| 92 | * ringbuffer. If one context is blocked on an |
| 93 | * external fence, not only is it not submitted, |
| 94 | * but all other contexts, including the kernel |
| 95 | * context are stuck waiting for the signal. |
| 96 | */ |
| 97 | } else if (engine->schedule && |
| 98 | rq->sched.attr.priority < I915_PRIORITY_BARRIER(0x7fffffff - 1)) { |
| 99 | /* |
| 100 | * Gradually raise the priority of the heartbeat to |
| 101 | * give high priority work [which presumably desires |
| 102 | * low latency and no jitter] the chance to naturally |
| 103 | * complete before being preempted. |
| 104 | */ |
| 105 | attr.priority = I915_PRIORITY_MASK((1UL << (0)) - 1); |
| 106 | if (rq->sched.attr.priority >= attr.priority) |
| 107 | attr.priority |= I915_USER_PRIORITY(I915_PRIORITY_HEARTBEAT)((I915_PRIORITY_HEARTBEAT) << 0); |
| 108 | if (rq->sched.attr.priority >= attr.priority) |
| 109 | attr.priority = I915_PRIORITY_BARRIER(0x7fffffff - 1); |
| 110 | |
| 111 | local_bh_disable(); |
| 112 | engine->schedule(rq, &attr); |
| 113 | local_bh_enable(); |
| 114 | } else { |
| 115 | if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)0) |
| 116 | show_heartbeat(rq, engine); |
| 117 | |
| 118 | intel_gt_handle_error(engine->gt, engine->mask, |
| 119 | I915_ERROR_CAPTURE(1UL << (0)), |
| 120 | "stopped heartbeat on %s", |
| 121 | engine->name); |
| 122 | } |
| 123 | goto out; |
| 124 | } |
| 125 | |
| 126 | serial = READ_ONCE(engine->serial)({ typeof(engine->serial) __tmp = *(volatile typeof(engine ->serial) *)&(engine->serial); membar_datadep_consumer (); __tmp; }); |
| 127 | if (engine->wakeref_serial == serial) |
| 128 | goto out; |
| 129 | |
| 130 | if (!mutex_trylock(&ce->timeline->mutex)(rw_enter(&ce->timeline->mutex, 0x0001UL | 0x0040UL ) == 0)) { |
| 131 | /* Unable to lock the kernel timeline, is the engine stuck? */ |
| 132 | if (xchg(&engine->heartbeat.blocked, serial)__sync_lock_test_and_set(&engine->heartbeat.blocked, serial ) == serial) |
| 133 | intel_gt_handle_error(engine->gt, engine->mask, |
| 134 | I915_ERROR_CAPTURE(1UL << (0)), |
| 135 | "no heartbeat on %s", |
| 136 | engine->name); |
| 137 | goto out; |
| 138 | } |
| 139 | |
| 140 | intel_context_enter(ce); |
| 141 | rq = __i915_request_create(ce, GFP_NOWAIT0x0002 | __GFP_NOWARN0); |
| 142 | intel_context_exit(ce); |
| 143 | if (IS_ERR(rq)) |
| 144 | goto unlock; |
| 145 | |
| 146 | idle_pulse(engine, rq); |
| 147 | if (engine->i915->params.enable_hangcheck) |
| 148 | engine->heartbeat.systole = i915_request_get(rq); |
| 149 | |
| 150 | __i915_request_commit(rq); |
| 151 | __i915_request_queue(rq, &attr); |
| 152 | |
| 153 | unlock: |
| 154 | mutex_unlock(&ce->timeline->mutex)rw_exit_write(&ce->timeline->mutex); |
| 155 | out: |
| 156 | if (!next_heartbeat(engine)) |
| 157 | i915_request_put(fetch_and_zero(&engine->heartbeat.systole)({ typeof(*&engine->heartbeat.systole) __T = *(&engine ->heartbeat.systole); *(&engine->heartbeat.systole) = (typeof(*&engine->heartbeat.systole))0; __T; })); |
| 158 | intel_engine_pm_put(engine); |
| 159 | } |
| 160 | |
| 161 | void intel_engine_unpark_heartbeat(struct intel_engine_cs *engine) |
| 162 | { |
| 163 | if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL)((2500) != 0)) |
| 164 | return; |
| 165 | |
| 166 | next_heartbeat(engine); |
| 167 | } |
| 168 | |
| 169 | void intel_engine_park_heartbeat(struct intel_engine_cs *engine) |
| 170 | { |
| 171 | if (cancel_delayed_work(&engine->heartbeat.work)) |
| 172 | i915_request_put(fetch_and_zero(&engine->heartbeat.systole)({ typeof(*&engine->heartbeat.systole) __T = *(&engine ->heartbeat.systole); *(&engine->heartbeat.systole) = (typeof(*&engine->heartbeat.systole))0; __T; })); |
| 173 | } |
| 174 | |
| 175 | void intel_engine_init_heartbeat(struct intel_engine_cs *engine) |
| 176 | { |
| 177 | INIT_DELAYED_WORK(&engine->heartbeat.work, heartbeat); |
| 178 | } |
| 179 | |
| 180 | static int __intel_engine_pulse(struct intel_engine_cs *engine) |
| 181 | { |
| 182 | struct i915_sched_attr attr = { .priority = I915_PRIORITY_BARRIER(0x7fffffff - 1) }; |
| 183 | struct intel_context *ce = engine->kernel_context; |
| 184 | struct i915_request *rq; |
| 185 | |
| 186 | lockdep_assert_held(&ce->timeline->mutex)do { (void)(&ce->timeline->mutex); } while(0); |
| 187 | GEM_BUG_ON(!intel_engine_has_preemption(engine))((void)0); |
| 188 | GEM_BUG_ON(!intel_engine_pm_is_awake(engine))((void)0); |
| 189 | |
| 190 | intel_context_enter(ce); |
| 191 | rq = __i915_request_create(ce, GFP_NOWAIT0x0002 | __GFP_NOWARN0); |
| 192 | intel_context_exit(ce); |
| 193 | if (IS_ERR(rq)) |
| 194 | return PTR_ERR(rq); |
| 195 | |
| 196 | __set_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags); |
| 197 | idle_pulse(engine, rq); |
| 198 | |
| 199 | __i915_request_commit(rq); |
| 200 | __i915_request_queue(rq, &attr); |
| 201 | GEM_BUG_ON(rq->sched.attr.priority < I915_PRIORITY_BARRIER)((void)0); |
| 202 | |
| 203 | return 0; |
| 204 | } |
| 205 | |
| 206 | static unsigned long set_heartbeat(struct intel_engine_cs *engine, |
| 207 | unsigned long delay) |
| 208 | { |
| 209 | unsigned long old; |
| 210 | |
| 211 | old = xchg(&engine->props.heartbeat_interval_ms, delay)__sync_lock_test_and_set(&engine->props.heartbeat_interval_ms , delay); |
| 212 | if (delay) |
| 213 | intel_engine_unpark_heartbeat(engine); |
| 214 | else |
| 215 | intel_engine_park_heartbeat(engine); |
| 216 | |
| 217 | return old; |
| 218 | } |
| 219 | |
| 220 | int intel_engine_set_heartbeat(struct intel_engine_cs *engine, |
| 221 | unsigned long delay) |
| 222 | { |
| 223 | struct intel_context *ce = engine->kernel_context; |
| 224 | int err = 0; |
| 225 | |
| 226 | if (!delay && !intel_engine_has_preempt_reset(engine)) |
| 227 | return -ENODEV19; |
| 228 | |
| 229 | intel_engine_pm_get(engine); |
| 230 | |
| 231 | err = mutex_lock_interruptible(&ce->timeline->mutex); |
| 232 | if (err) |
| 233 | goto out_rpm; |
| 234 | |
| 235 | if (delay != engine->props.heartbeat_interval_ms) { |
| 236 | unsigned long saved = set_heartbeat(engine, delay); |
| 237 | |
| 238 | /* recheck current execution */ |
| 239 | if (intel_engine_has_preemption(engine)) { |
| 240 | err = __intel_engine_pulse(engine); |
| 241 | if (err) |
| 242 | set_heartbeat(engine, saved); |
| 243 | } |
| 244 | } |
| 245 | |
| 246 | mutex_unlock(&ce->timeline->mutex)rw_exit_write(&ce->timeline->mutex); |
| 247 | |
| 248 | out_rpm: |
| 249 | intel_engine_pm_put(engine); |
| 250 | return err; |
| 251 | } |
| 252 | |
| 253 | int intel_engine_pulse(struct intel_engine_cs *engine) |
| 254 | { |
| 255 | struct intel_context *ce = engine->kernel_context; |
| 256 | int err; |
| 257 | |
| 258 | if (!intel_engine_has_preemption(engine)) |
| 259 | return -ENODEV19; |
| 260 | |
| 261 | if (!intel_engine_pm_get_if_awake(engine)) |
| 262 | return 0; |
| 263 | |
| 264 | err = -EINTR4; |
| 265 | if (!mutex_lock_interruptible(&ce->timeline->mutex)) { |
| 266 | err = __intel_engine_pulse(engine); |
| 267 | mutex_unlock(&ce->timeline->mutex)rw_exit_write(&ce->timeline->mutex); |
| 268 | } |
| 269 | |
| 270 | intel_engine_pm_put(engine); |
| 271 | return err; |
| 272 | } |
| 273 | |
| 274 | int intel_engine_flush_barriers(struct intel_engine_cs *engine) |
| 275 | { |
| 276 | struct i915_request *rq; |
| 277 | int err = 0; |
| 278 | |
| 279 | if (llist_empty(&engine->barrier_tasks)) |
| 280 | return 0; |
| 281 | |
| 282 | if (!intel_engine_pm_get_if_awake(engine)) |
| 283 | return 0; |
| 284 | |
| 285 | rq = i915_request_create(engine->kernel_context); |
| 286 | if (IS_ERR(rq)) { |
| 287 | err = PTR_ERR(rq); |
| 288 | goto out_rpm; |
| 289 | } |
| 290 | |
| 291 | idle_pulse(engine, rq); |
| 292 | i915_request_add(rq); |
| 293 | |
| 294 | out_rpm: |
| 295 | intel_engine_pm_put(engine); |
| 296 | return err; |
| 297 | } |
| 298 | |
| 299 | #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)0 |
| 300 | #include "selftest_engine_heartbeat.c" |
| 301 | #endif |