Bug Summary

File:dev/pci/drm/i915/display/dvo_tfp410.c
Warning:line 271, column 2
3rd function call argument is an uninitialized value

Annotated Source Code

Press '?' to see keyboard shortcuts

clang -cc1 -cc1 -triple amd64-unknown-openbsd7.0 -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name dvo_tfp410.c -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/lib/clang/13.0.0 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -D CONFIG_DRM_AMD_DC_DCN3_0 -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /usr/obj/sys/arch/amd64/compile/GENERIC.MP/scan-build/2022-01-12-131800-47421-1 -x c /usr/src/sys/dev/pci/drm/i915/display/dvo_tfp410.c
1/*
2 * Copyright © 2007 Dave Mueller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Dave Mueller <dave.mueller@gmx.ch>
25 *
26 */
27
28#include "intel_display_types.h"
29#include "intel_dvo_dev.h"
30
31/* register definitions according to the TFP410 data sheet */
32#define TFP410_VID0x014C 0x014C
33#define TFP410_DID0x0410 0x0410
34
35#define TFP410_VID_LO0x00 0x00
36#define TFP410_VID_HI0x01 0x01
37#define TFP410_DID_LO0x02 0x02
38#define TFP410_DID_HI0x03 0x03
39#define TFP410_REV0x04 0x04
40
41#define TFP410_CTL_10x08 0x08
42#define TFP410_CTL_1_TDIS(1<<6) (1<<6)
43#define TFP410_CTL_1_VEN(1<<5) (1<<5)
44#define TFP410_CTL_1_HEN(1<<4) (1<<4)
45#define TFP410_CTL_1_DSEL(1<<3) (1<<3)
46#define TFP410_CTL_1_BSEL(1<<2) (1<<2)
47#define TFP410_CTL_1_EDGE(1<<1) (1<<1)
48#define TFP410_CTL_1_PD(1<<0) (1<<0)
49
50#define TFP410_CTL_20x09 0x09
51#define TFP410_CTL_2_VLOW(1<<7) (1<<7)
52#define TFP410_CTL_2_MSEL_MASK(0x7<<4) (0x7<<4)
53#define TFP410_CTL_2_MSEL(1<<4) (1<<4)
54#define TFP410_CTL_2_TSEL(1<<3) (1<<3)
55#define TFP410_CTL_2_RSEN(1<<2) (1<<2)
56#define TFP410_CTL_2_HTPLG(1<<1) (1<<1)
57#define TFP410_CTL_2_MDI(1<<0) (1<<0)
58
59#define TFP410_CTL_30x0A 0x0A
60#define TFP410_CTL_3_DK_MASK(0x7<<5) (0x7<<5)
61#define TFP410_CTL_3_DK(1<<5) (1<<5)
62#define TFP410_CTL_3_DKEN(1<<4) (1<<4)
63#define TFP410_CTL_3_CTL_MASK(0x7<<1) (0x7<<1)
64#define TFP410_CTL_3_CTL(1<<1) (1<<1)
65
66#define TFP410_USERCFG0x0B 0x0B
67
68#define TFP410_DE_DLY0x32 0x32
69
70#define TFP410_DE_CTL0x33 0x33
71#define TFP410_DE_CTL_DEGEN(1<<6) (1<<6)
72#define TFP410_DE_CTL_VSPOL(1<<5) (1<<5)
73#define TFP410_DE_CTL_HSPOL(1<<4) (1<<4)
74#define TFP410_DE_CTL_DEDLY8(1<<0) (1<<0)
75
76#define TFP410_DE_TOP0x34 0x34
77
78#define TFP410_DE_CNT_LO0x36 0x36
79#define TFP410_DE_CNT_HI0x37 0x37
80
81#define TFP410_DE_LIN_LO0x38 0x38
82#define TFP410_DE_LIN_HI0x39 0x39
83
84#define TFP410_H_RES_LO0x3A 0x3A
85#define TFP410_H_RES_HI0x3B 0x3B
86
87#define TFP410_V_RES_LO0x3C 0x3C
88#define TFP410_V_RES_HI0x3D 0x3D
89
90struct tfp410_priv {
91 bool_Bool quiet;
92};
93
94static bool_Bool tfp410_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
95{
96 struct tfp410_priv *tfp = dvo->dev_priv;
97 struct i2c_adapter *adapter = dvo->i2c_bus;
98 u8 out_buf[2];
99 u8 in_buf[2];
100
101 struct i2c_msg msgs[] = {
102 {
103 .addr = dvo->slave_addr,
104 .flags = 0,
105 .len = 1,
106 .buf = out_buf,
107 },
108 {
109 .addr = dvo->slave_addr,
110 .flags = I2C_M_RD0x0001,
111 .len = 1,
112 .buf = in_buf,
113 }
114 };
115
116 out_buf[0] = addr;
117 out_buf[1] = 0;
118
119 if (i2c_transfer(adapter, msgs, 2) == 2) {
3
←
Assuming the condition is false
→
4
←
Taking false branch
→
120 *ch = in_buf[0];
121 return true1;
122 }
123
124 if (!tfp->quiet) {
5
←
Assuming field 'quiet' is true
→
6
←
Taking false branch
→
125 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",__drm_dbg(DRM_UT_KMS, "Unable to read register 0x%02x from %s:%02x.\n"
, addr, adapter->name, dvo->slave_addr)
126 addr, adapter->name, dvo->slave_addr)__drm_dbg(DRM_UT_KMS, "Unable to read register 0x%02x from %s:%02x.\n"
, addr, adapter->name, dvo->slave_addr);
127 }
128 return false0;
7
←
Returning without writing to '*ch'
→
129}
130
131static bool_Bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
132{
133 struct tfp410_priv *tfp = dvo->dev_priv;
134 struct i2c_adapter *adapter = dvo->i2c_bus;
135 u8 out_buf[2];
136 struct i2c_msg msg = {
137 .addr = dvo->slave_addr,
138 .flags = 0,
139 .len = 2,
140 .buf = out_buf,
141 };
142
143 out_buf[0] = addr;
144 out_buf[1] = ch;
145
146 if (i2c_transfer(adapter, &msg, 1) == 1)
147 return true1;
148
149 if (!tfp->quiet) {
150 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",__drm_dbg(DRM_UT_KMS, "Unable to write register 0x%02x to %s:%d.\n"
, addr, adapter->name, dvo->slave_addr)
151 addr, adapter->name, dvo->slave_addr)__drm_dbg(DRM_UT_KMS, "Unable to write register 0x%02x to %s:%d.\n"
, addr, adapter->name, dvo->slave_addr);
152 }
153
154 return false0;
155}
156
157static int tfp410_getid(struct intel_dvo_device *dvo, int addr)
158{
159 u8 ch1, ch2;
160
161 if (tfp410_readb(dvo, addr+0, &ch1) &&
162 tfp410_readb(dvo, addr+1, &ch2))
163 return ((ch2 << 8) & 0xFF00) | (ch1 & 0x00FF);
164
165 return -1;
166}
167
168/* Ti TFP410 driver for chip on i2c bus */
169static bool_Bool tfp410_init(struct intel_dvo_device *dvo,
170 struct i2c_adapter *adapter)
171{
172 /* this will detect the tfp410 chip on the specified i2c bus */
173 struct tfp410_priv *tfp;
174 int id;
175
176 tfp = kzalloc(sizeof(struct tfp410_priv), GFP_KERNEL(0x0001 | 0x0004));
177 if (tfp == NULL((void *)0))
178 return false0;
179
180 dvo->i2c_bus = adapter;
181 dvo->dev_priv = tfp;
182 tfp->quiet = true1;
183
184 if ((id = tfp410_getid(dvo, TFP410_VID_LO0x00)) != TFP410_VID0x014C) {
185 DRM_DEBUG_KMS("tfp410 not detected got VID %X: from %s "__drm_dbg(DRM_UT_KMS, "tfp410 not detected got VID %X: from %s "
"Slave %d.\n", id, adapter->name, dvo->slave_addr)
186 "Slave %d.\n",__drm_dbg(DRM_UT_KMS, "tfp410 not detected got VID %X: from %s "
"Slave %d.\n", id, adapter->name, dvo->slave_addr)
187 id, adapter->name, dvo->slave_addr)__drm_dbg(DRM_UT_KMS, "tfp410 not detected got VID %X: from %s "
"Slave %d.\n", id, adapter->name, dvo->slave_addr);
188 goto out;
189 }
190
191 if ((id = tfp410_getid(dvo, TFP410_DID_LO0x02)) != TFP410_DID0x0410) {
192 DRM_DEBUG_KMS("tfp410 not detected got DID %X: from %s "__drm_dbg(DRM_UT_KMS, "tfp410 not detected got DID %X: from %s "
"Slave %d.\n", id, adapter->name, dvo->slave_addr)
193 "Slave %d.\n",__drm_dbg(DRM_UT_KMS, "tfp410 not detected got DID %X: from %s "
"Slave %d.\n", id, adapter->name, dvo->slave_addr)
194 id, adapter->name, dvo->slave_addr)__drm_dbg(DRM_UT_KMS, "tfp410 not detected got DID %X: from %s "
"Slave %d.\n", id, adapter->name, dvo->slave_addr);
195 goto out;
196 }
197 tfp->quiet = false0;
198 return true1;
199out:
200 kfree(tfp);
201 return false0;
202}
203
204static enum drm_connector_status tfp410_detect(struct intel_dvo_device *dvo)
205{
206 enum drm_connector_status ret = connector_status_disconnected;
207 u8 ctl2;
208
209 if (tfp410_readb(dvo, TFP410_CTL_20x09, &ctl2)) {
210 if (ctl2 & TFP410_CTL_2_RSEN(1<<2))
211 ret = connector_status_connected;
212 else
213 ret = connector_status_disconnected;
214 }
215
216 return ret;
217}
218
219static enum drm_mode_status tfp410_mode_valid(struct intel_dvo_device *dvo,
220 struct drm_display_mode *mode)
221{
222 return MODE_OK;
223}
224
225static void tfp410_mode_set(struct intel_dvo_device *dvo,
226 const struct drm_display_mode *mode,
227 const struct drm_display_mode *adjusted_mode)
228{
229 /* As long as the basics are set up, since we don't have clock dependencies
230 * in the mode setup, we can just leave the registers alone and everything
231 * will work fine.
232 */
233 /* don't do much */
234 return;
235}
236
237/* set the tfp410 power state */
238static void tfp410_dpms(struct intel_dvo_device *dvo, bool_Bool enable)
239{
240 u8 ctl1;
241
242 if (!tfp410_readb(dvo, TFP410_CTL_10x08, &ctl1))
243 return;
244
245 if (enable)
246 ctl1 |= TFP410_CTL_1_PD(1<<0);
247 else
248 ctl1 &= ~TFP410_CTL_1_PD(1<<0);
249
250 tfp410_writeb(dvo, TFP410_CTL_10x08, ctl1);
251}
252
253static bool_Bool tfp410_get_hw_state(struct intel_dvo_device *dvo)
254{
255 u8 ctl1;
256
257 if (!tfp410_readb(dvo, TFP410_CTL_10x08, &ctl1))
258 return false0;
259
260 if (ctl1 & TFP410_CTL_1_PD(1<<0))
261 return true1;
262 else
263 return false0;
264}
265
266static void tfp410_dump_regs(struct intel_dvo_device *dvo)
267{
268 u8 val, val2;
1
'val' declared without an initial value
→
269
270 tfp410_readb(dvo, TFP410_REV0x04, &val);
2
←
Calling 'tfp410_readb'
→
8
←
Returning from 'tfp410_readb'
→
271 DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val)__drm_dbg(DRM_UT_KMS, "TFP410_REV: 0x%02X\n", val);
9
←
3rd function call argument is an uninitialized value
272 tfp410_readb(dvo, TFP410_CTL_10x08, &val);
273 DRM_DEBUG_KMS("TFP410_CTL1: 0x%02X\n", val)__drm_dbg(DRM_UT_KMS, "TFP410_CTL1: 0x%02X\n", val);
274 tfp410_readb(dvo, TFP410_CTL_20x09, &val);
275 DRM_DEBUG_KMS("TFP410_CTL2: 0x%02X\n", val)__drm_dbg(DRM_UT_KMS, "TFP410_CTL2: 0x%02X\n", val);
276 tfp410_readb(dvo, TFP410_CTL_30x0A, &val);
277 DRM_DEBUG_KMS("TFP410_CTL3: 0x%02X\n", val)__drm_dbg(DRM_UT_KMS, "TFP410_CTL3: 0x%02X\n", val);
278 tfp410_readb(dvo, TFP410_USERCFG0x0B, &val);
279 DRM_DEBUG_KMS("TFP410_USERCFG: 0x%02X\n", val)__drm_dbg(DRM_UT_KMS, "TFP410_USERCFG: 0x%02X\n", val);
280 tfp410_readb(dvo, TFP410_DE_DLY0x32, &val);
281 DRM_DEBUG_KMS("TFP410_DE_DLY: 0x%02X\n", val)__drm_dbg(DRM_UT_KMS, "TFP410_DE_DLY: 0x%02X\n", val);
282 tfp410_readb(dvo, TFP410_DE_CTL0x33, &val);
283 DRM_DEBUG_KMS("TFP410_DE_CTL: 0x%02X\n", val)__drm_dbg(DRM_UT_KMS, "TFP410_DE_CTL: 0x%02X\n", val);
284 tfp410_readb(dvo, TFP410_DE_TOP0x34, &val);
285 DRM_DEBUG_KMS("TFP410_DE_TOP: 0x%02X\n", val)__drm_dbg(DRM_UT_KMS, "TFP410_DE_TOP: 0x%02X\n", val);
286 tfp410_readb(dvo, TFP410_DE_CNT_LO0x36, &val);
287 tfp410_readb(dvo, TFP410_DE_CNT_HI0x37, &val2);
288 DRM_DEBUG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val)__drm_dbg(DRM_UT_KMS, "TFP410_DE_CNT: 0x%02X%02X\n", val2, val
);
289 tfp410_readb(dvo, TFP410_DE_LIN_LO0x38, &val);
290 tfp410_readb(dvo, TFP410_DE_LIN_HI0x39, &val2);
291 DRM_DEBUG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val)__drm_dbg(DRM_UT_KMS, "TFP410_DE_LIN: 0x%02X%02X\n", val2, val
);
292 tfp410_readb(dvo, TFP410_H_RES_LO0x3A, &val);
293 tfp410_readb(dvo, TFP410_H_RES_HI0x3B, &val2);
294 DRM_DEBUG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val)__drm_dbg(DRM_UT_KMS, "TFP410_H_RES: 0x%02X%02X\n", val2, val
);
295 tfp410_readb(dvo, TFP410_V_RES_LO0x3C, &val);
296 tfp410_readb(dvo, TFP410_V_RES_HI0x3D, &val2);
297 DRM_DEBUG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val)__drm_dbg(DRM_UT_KMS, "TFP410_V_RES: 0x%02X%02X\n", val2, val
);
298}
299
300static void tfp410_destroy(struct intel_dvo_device *dvo)
301{
302 struct tfp410_priv *tfp = dvo->dev_priv;
303
304 if (tfp) {
305 kfree(tfp);
306 dvo->dev_priv = NULL((void *)0);
307 }
308}
309
310const struct intel_dvo_dev_ops tfp410_ops = {
311 .init = tfp410_init,
312 .detect = tfp410_detect,
313 .mode_valid = tfp410_mode_valid,
314 .mode_set = tfp410_mode_set,
315 .dpms = tfp410_dpms,
316 .get_hw_state = tfp410_get_hw_state,
317 .dump_regs = tfp410_dump_regs,
318 .destroy = tfp410_destroy,
319};