Bug Summary

File:dev/pci/drm/amd/display/modules/freesync/freesync.c
Warning:line 377, column 30
Division by zero

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.0 -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name freesync.c -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/lib/clang/13.0.0 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -D CONFIG_DRM_AMD_DC_DCN3_0 -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /usr/obj/sys/arch/amd64/compile/GENERIC.MP/scan-build/2022-01-12-131800-47421-1 -x c /usr/src/sys/dev/pci/drm/amd/display/modules/freesync/freesync.c
1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include <linux/slab.h>
27
28#include "dm_services.h"
29#include "dc.h"
30#include "mod_freesync.h"
31#include "core_types.h"
32
33#define MOD_FREESYNC_MAX_CONCURRENT_STREAMS32 32
34
35#define MIN_REFRESH_RANGE10 10
36/* Refresh rate ramp at a fixed rate of 65 Hz/second */
37#define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME((1000 / 60) * 65) ((1000 / 60) * 65)
38/* Number of elements in the render times cache array */
39#define RENDER_TIMES_MAX_COUNT10 10
40/* Threshold to exit/exit BTR (to avoid frequent enter-exits at the lower limit) */
41#define BTR_MAX_MARGIN2500 2500
42/* Threshold to change BTR multiplier (to avoid frequent changes) */
43#define BTR_DRIFT_MARGIN2000 2000
44/*Threshold to exit fixed refresh rate*/
45#define FIXED_REFRESH_EXIT_MARGIN_IN_HZ4 4
46/* Number of consecutive frames to check before entering/exiting fixed refresh*/
47#define FIXED_REFRESH_ENTER_FRAME_COUNT5 5
48#define FIXED_REFRESH_EXIT_FRAME_COUNT5 5
49
50struct core_freesync {
51 struct mod_freesync public;
52 struct dc *dc;
53};
54
55#define MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );})\
56 container_of(mod_freesync, struct core_freesync, public)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );})
57
58struct mod_freesync *mod_freesync_create(struct dc *dc)
59{
60 struct core_freesync *core_freesync =
61 kzalloc(sizeof(struct core_freesync), GFP_KERNEL(0x0001 | 0x0004));
62
63 if (core_freesync == NULL((void *)0))
64 goto fail_alloc_context;
65
66 if (dc == NULL((void *)0))
67 goto fail_construct;
68
69 core_freesync->dc = dc;
70 return &core_freesync->public;
71
72fail_construct:
73 kfree(core_freesync);
74
75fail_alloc_context:
76 return NULL((void *)0);
77}
78
79void mod_freesync_destroy(struct mod_freesync *mod_freesync)
80{
81 struct core_freesync *core_freesync = NULL((void *)0);
82 if (mod_freesync == NULL((void *)0))
83 return;
84 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
85 kfree(core_freesync);
86}
87
88#if 0 /* unused currently */
89static unsigned int calc_refresh_in_uhz_from_duration(
90 unsigned int duration_in_ns)
91{
92 unsigned int refresh_in_uhz =
93 ((unsigned int)(div64_u64((1000000000ULL * 1000000),
94 duration_in_ns)));
95 return refresh_in_uhz;
96}
97#endif
98
99static unsigned int calc_duration_in_us_from_refresh_in_uhz(
100 unsigned int refresh_in_uhz)
101{
102 unsigned int duration_in_us =
103 ((unsigned int)(div64_u64((1000000000ULL * 1000),
104 refresh_in_uhz)));
105 return duration_in_us;
106}
107
108static unsigned int calc_duration_in_us_from_v_total(
109 const struct dc_stream_state *stream,
110 const struct mod_vrr_params *in_vrr,
111 unsigned int v_total)
112{
113 unsigned int duration_in_us =
114 (unsigned int)(div64_u64(((unsigned long long)(v_total)
115 * 10000) * stream->timing.h_total,
116 stream->timing.pix_clk_100hz));
117
118 return duration_in_us;
119}
120
121static unsigned int calc_v_total_from_refresh(
122 const struct dc_stream_state *stream,
123 unsigned int refresh_in_uhz)
124{
125 unsigned int v_total;
126 unsigned int frame_duration_in_ns;
127
128 frame_duration_in_ns =
129 ((unsigned int)(div64_u64((1000000000ULL * 1000000),
130 refresh_in_uhz)));
131
132 v_total = div64_u64(div64_u64(((unsigned long long)(
133 frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),
134 stream->timing.h_total), 1000000);
135
136 /* v_total cannot be less than nominal */
137 if (v_total < stream->timing.v_total) {
138 ASSERT(v_total < stream->timing.v_total)do { if (({ static int __warned; int __ret = !!(!(v_total <
stream->timing.v_total)); if (__ret && !__warned)
{ printf("WARNING %s failed at %s:%d\n", "!(v_total < stream->timing.v_total)"
, "/usr/src/sys/dev/pci/drm/amd/display/modules/freesync/freesync.c"
, 138); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
{} while (0); } while (0);
139 v_total = stream->timing.v_total;
140 }
141
142 return v_total;
143}
144
145static unsigned int calc_v_total_from_duration(
146 const struct dc_stream_state *stream,
147 const struct mod_vrr_params *vrr,
148 unsigned int duration_in_us)
149{
150 unsigned int v_total = 0;
151
152 if (duration_in_us < vrr->min_duration_in_us)
153 duration_in_us = vrr->min_duration_in_us;
154
155 if (duration_in_us > vrr->max_duration_in_us)
156 duration_in_us = vrr->max_duration_in_us;
157
158 v_total = div64_u64(div64_u64(((unsigned long long)(
159 duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
160 stream->timing.h_total), 1000);
161
162 /* v_total cannot be less than nominal */
163 if (v_total < stream->timing.v_total) {
164 ASSERT(v_total < stream->timing.v_total)do { if (({ static int __warned; int __ret = !!(!(v_total <
stream->timing.v_total)); if (__ret && !__warned)
{ printf("WARNING %s failed at %s:%d\n", "!(v_total < stream->timing.v_total)"
, "/usr/src/sys/dev/pci/drm/amd/display/modules/freesync/freesync.c"
, 164); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
{} while (0); } while (0);
165 v_total = stream->timing.v_total;
166 }
167
168 return v_total;
169}
170
171static void update_v_total_for_static_ramp(
172 struct core_freesync *core_freesync,
173 const struct dc_stream_state *stream,
174 struct mod_vrr_params *in_out_vrr)
175{
176 unsigned int v_total = 0;
177 unsigned int current_duration_in_us =
178 calc_duration_in_us_from_v_total(
179 stream, in_out_vrr,
180 in_out_vrr->adjust.v_total_max);
181 unsigned int target_duration_in_us =
182 calc_duration_in_us_from_refresh_in_uhz(
183 in_out_vrr->fixed.target_refresh_in_uhz);
184 bool_Bool ramp_direction_is_up = (current_duration_in_us >
185 target_duration_in_us) ? true1 : false0;
186
187 /* Calc ratio between new and current frame duration with 3 digit */
188 unsigned int frame_duration_ratio = div64_u64(1000000,
189 (1000 + div64_u64(((unsigned long long)(
190 STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME((1000 / 60) * 65)) *
191 current_duration_in_us),
192 1000000)));
193
194 /* Calculate delta between new and current frame duration in us */
195 unsigned int frame_duration_delta = div64_u64(((unsigned long long)(
196 current_duration_in_us) *
197 (1000 - frame_duration_ratio)), 1000);
198
199 /* Adjust frame duration delta based on ratio between current and
200 * standard frame duration (frame duration at 60 Hz refresh rate).
201 */
202 unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)(
203 frame_duration_delta) * current_duration_in_us), 16666);
204
205 /* Going to a higher refresh rate (lower frame duration) */
206 if (ramp_direction_is_up) {
207 /* reduce frame duration */
208 current_duration_in_us -= ramp_rate_interpolated;
209
210 /* adjust for frame duration below min */
211 if (current_duration_in_us <= target_duration_in_us) {
212 in_out_vrr->fixed.ramping_active = false0;
213 in_out_vrr->fixed.ramping_done = true1;
214 current_duration_in_us =
215 calc_duration_in_us_from_refresh_in_uhz(
216 in_out_vrr->fixed.target_refresh_in_uhz);
217 }
218 /* Going to a lower refresh rate (larger frame duration) */
219 } else {
220 /* increase frame duration */
221 current_duration_in_us += ramp_rate_interpolated;
222
223 /* adjust for frame duration above max */
224 if (current_duration_in_us >= target_duration_in_us) {
225 in_out_vrr->fixed.ramping_active = false0;
226 in_out_vrr->fixed.ramping_done = true1;
227 current_duration_in_us =
228 calc_duration_in_us_from_refresh_in_uhz(
229 in_out_vrr->fixed.target_refresh_in_uhz);
230 }
231 }
232
233 v_total = div64_u64(div64_u64(((unsigned long long)(
234 current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
235 stream->timing.h_total), 1000);
236
237 /* v_total cannot be less than nominal */
238 if (v_total < stream->timing.v_total)
239 v_total = stream->timing.v_total;
240
241 in_out_vrr->adjust.v_total_min = v_total;
242 in_out_vrr->adjust.v_total_max = v_total;
243}
244
245static void apply_below_the_range(struct core_freesync *core_freesync,
246 const struct dc_stream_state *stream,
247 unsigned int last_render_time_in_us,
248 struct mod_vrr_params *in_out_vrr)
249{
250 unsigned int inserted_frame_duration_in_us = 0;
251 unsigned int mid_point_frames_ceil = 0;
252 unsigned int mid_point_frames_floor = 0;
253 unsigned int frame_time_in_us = 0;
254 unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF;
255 unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF;
256 unsigned int frames_to_insert = 0;
257 unsigned int delta_from_mid_point_delta_in_us;
258 unsigned int max_render_time_in_us =
259 in_out_vrr->max_duration_in_us - in_out_vrr->btr.margin_in_us;
260
261 /* Program BTR */
262 if ((last_render_time_in_us + in_out_vrr->btr.margin_in_us / 2) < max_render_time_in_us) {
1
Assuming the condition is false
→
2
←
Taking false branch
→
263 /* Exit Below the Range */
264 if (in_out_vrr->btr.btr_active) {
265 in_out_vrr->btr.frame_counter = 0;
266 in_out_vrr->btr.btr_active = false0;
267 }
268 } else if (last_render_time_in_us > (max_render_time_in_us + in_out_vrr->btr.margin_in_us / 2)) {
3
←
Assuming the condition is false
→
4
←
Taking false branch
→
269 /* Enter Below the Range */
270 if (!in_out_vrr->btr.btr_active) {
271 in_out_vrr->btr.btr_active = true1;
272 }
273 }
274
275 /* BTR set to "not active" so disengage */
276 if (!in_out_vrr->btr.btr_active) {
5
←
Assuming field 'btr_active' is true
→
6
←
Taking false branch
→
277 in_out_vrr->btr.inserted_duration_in_us = 0;
278 in_out_vrr->btr.frames_to_insert = 0;
279 in_out_vrr->btr.frame_counter = 0;
280
281 /* Restore FreeSync */
282 in_out_vrr->adjust.v_total_min =
283 calc_v_total_from_refresh(stream,
284 in_out_vrr->max_refresh_in_uhz);
285 in_out_vrr->adjust.v_total_max =
286 calc_v_total_from_refresh(stream,
287 in_out_vrr->min_refresh_in_uhz);
288 /* BTR set to "active" so engage */
289 } else {
290
291 /* Calculate number of midPoint frames that could fit within
292 * the render time interval- take ceil of this value
293 */
294 mid_point_frames_ceil = (last_render_time_in_us +
295 in_out_vrr->btr.mid_point_in_us - 1) /
296 in_out_vrr->btr.mid_point_in_us;
297
298 if (mid_point_frames_ceil > 0) {
7
←
Assuming 'mid_point_frames_ceil' is > 0
→
8
←
Taking true branch
→
299 frame_time_in_us = last_render_time_in_us /
300 mid_point_frames_ceil;
301 delta_from_mid_point_in_us_1 =
302 (in_out_vrr->btr.mid_point_in_us >
9
←
Assuming 'frame_time_in_us' is >= field 'mid_point_in_us'
→
10
←
'?' condition is false
→
303 frame_time_in_us) ?
304 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
305 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
306 }
307
308 /* Calculate number of midPoint frames that could fit within
309 * the render time interval- take floor of this value
310 */
311 mid_point_frames_floor = last_render_time_in_us /
11
←
Value assigned to 'mid_point_frames_floor'
→
312 in_out_vrr->btr.mid_point_in_us;
313
314 if (mid_point_frames_floor > 0) {
12
←
Assuming 'mid_point_frames_floor' is <= 0
→
13
←
Taking false branch
→
315
316 frame_time_in_us = last_render_time_in_us /
317 mid_point_frames_floor;
318 delta_from_mid_point_in_us_2 =
319 (in_out_vrr->btr.mid_point_in_us >
320 frame_time_in_us) ?
321 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
322 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
323 }
324
325 /* Choose number of frames to insert based on how close it
326 * can get to the mid point of the variable range.
327 * - Delta for CEIL: delta_from_mid_point_in_us_1
328 * - Delta for FLOOR: delta_from_mid_point_in_us_2
329 */
330 if ((last_render_time_in_us / mid_point_frames_ceil) < in_out_vrr->min_duration_in_us) {
14
←
Assuming the condition is true
→
15
←
Taking true branch
→
331 /* Check for out of range.
332 * If using CEIL produces a value that is out of range,
333 * then we are forced to use FLOOR.
334 */
335 frames_to_insert = mid_point_frames_floor;
16
←
The value 0 is assigned to 'frames_to_insert'
→
336 } else if (mid_point_frames_floor < 2) {
337 /* Check if FLOOR would result in non-LFC. In this case
338 * choose to use CEIL
339 */
340 frames_to_insert = mid_point_frames_ceil;
341 } else if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) {
342 /* If choosing CEIL results in a frame duration that is
343 * closer to the mid point of the range.
344 * Choose CEIL
345 */
346 frames_to_insert = mid_point_frames_ceil;
347 } else {
348 /* If choosing FLOOR results in a frame duration that is
349 * closer to the mid point of the range.
350 * Choose FLOOR
351 */
352 frames_to_insert = mid_point_frames_floor;
353 }
354
355 /* Prefer current frame multiplier when BTR is enabled unless it drifts
356 * too far from the midpoint
357 */
358 if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) {
17
←
Assuming 'delta_from_mid_point_in_us_1' is >= 'delta_from_mid_point_in_us_2'
→
18
←
Taking false branch
→
359 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_2 -
360 delta_from_mid_point_in_us_1;
361 } else {
362 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_1 -
363 delta_from_mid_point_in_us_2;
364 }
365 if (in_out_vrr->btr.frames_to_insert != 0 &&
19
←
Assuming field 'frames_to_insert' is equal to 0
→
366 delta_from_mid_point_delta_in_us < BTR_DRIFT_MARGIN2000) {
367 if (((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) <
368 max_render_time_in_us) &&
369 ((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) >
370 in_out_vrr->min_duration_in_us))
371 frames_to_insert = in_out_vrr->btr.frames_to_insert;
372 }
373
374 /* Either we've calculated the number of frames to insert,
375 * or we need to insert min duration frames
376 */
377 if (last_render_time_in_us / frames_to_insert <
20
←
Division by zero
378 in_out_vrr->min_duration_in_us){
379 frames_to_insert -= (frames_to_insert > 1) ?
380 1 : 0;
381 }
382
383 if (frames_to_insert > 0)
384 inserted_frame_duration_in_us = last_render_time_in_us /
385 frames_to_insert;
386
387 if (inserted_frame_duration_in_us < in_out_vrr->min_duration_in_us)
388 inserted_frame_duration_in_us = in_out_vrr->min_duration_in_us;
389
390 /* Cache the calculated variables */
391 in_out_vrr->btr.inserted_duration_in_us =
392 inserted_frame_duration_in_us;
393 in_out_vrr->btr.frames_to_insert = frames_to_insert;
394 in_out_vrr->btr.frame_counter = frames_to_insert;
395 }
396}
397
398static void apply_fixed_refresh(struct core_freesync *core_freesync,
399 const struct dc_stream_state *stream,
400 unsigned int last_render_time_in_us,
401 struct mod_vrr_params *in_out_vrr)
402{
403 bool_Bool update = false0;
404 unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us;
405
406 /* Compute the exit refresh rate and exit frame duration */
407 unsigned int exit_refresh_rate_in_milli_hz = ((1000000000/max_render_time_in_us)
408 + (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ4));
409 unsigned int exit_frame_duration_in_us = 1000000000/exit_refresh_rate_in_milli_hz;
410
411 if (last_render_time_in_us < exit_frame_duration_in_us) {
412 /* Exit Fixed Refresh mode */
413 if (in_out_vrr->fixed.fixed_active) {
414 in_out_vrr->fixed.frame_counter++;
415
416 if (in_out_vrr->fixed.frame_counter >
417 FIXED_REFRESH_EXIT_FRAME_COUNT5) {
418 in_out_vrr->fixed.frame_counter = 0;
419 in_out_vrr->fixed.fixed_active = false0;
420 in_out_vrr->fixed.target_refresh_in_uhz = 0;
421 update = true1;
422 }
423 }
424 } else if (last_render_time_in_us > max_render_time_in_us) {
425 /* Enter Fixed Refresh mode */
426 if (!in_out_vrr->fixed.fixed_active) {
427 in_out_vrr->fixed.frame_counter++;
428
429 if (in_out_vrr->fixed.frame_counter >
430 FIXED_REFRESH_ENTER_FRAME_COUNT5) {
431 in_out_vrr->fixed.frame_counter = 0;
432 in_out_vrr->fixed.fixed_active = true1;
433 in_out_vrr->fixed.target_refresh_in_uhz =
434 in_out_vrr->max_refresh_in_uhz;
435 update = true1;
436 }
437 }
438 }
439
440 if (update) {
441 if (in_out_vrr->fixed.fixed_active) {
442 in_out_vrr->adjust.v_total_min =
443 calc_v_total_from_refresh(
444 stream, in_out_vrr->max_refresh_in_uhz);
445 in_out_vrr->adjust.v_total_max =
446 in_out_vrr->adjust.v_total_min;
447 } else {
448 in_out_vrr->adjust.v_total_min =
449 calc_v_total_from_refresh(stream,
450 in_out_vrr->max_refresh_in_uhz);
451 in_out_vrr->adjust.v_total_max =
452 calc_v_total_from_refresh(stream,
453 in_out_vrr->min_refresh_in_uhz);
454 }
455 }
456}
457
458static bool_Bool vrr_settings_require_update(struct core_freesync *core_freesync,
459 struct mod_freesync_config *in_config,
460 unsigned int min_refresh_in_uhz,
461 unsigned int max_refresh_in_uhz,
462 struct mod_vrr_params *in_vrr)
463{
464 if (in_vrr->state != in_config->state) {
465 return true1;
466 } else if (in_vrr->state == VRR_STATE_ACTIVE_FIXED &&
467 in_vrr->fixed.target_refresh_in_uhz !=
468 in_config->fixed_refresh_in_uhz) {
469 return true1;
470 } else if (in_vrr->min_refresh_in_uhz != min_refresh_in_uhz) {
471 return true1;
472 } else if (in_vrr->max_refresh_in_uhz != max_refresh_in_uhz) {
473 return true1;
474 }
475
476 return false0;
477}
478
479bool_Bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync,
480 const struct dc_stream_state *stream,
481 unsigned int *vmin,
482 unsigned int *vmax)
483{
484 *vmin = stream->adjust.v_total_min;
485 *vmax = stream->adjust.v_total_max;
486
487 return true1;
488}
489
490bool_Bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync,
491 struct dc_stream_state *stream,
492 unsigned int *nom_v_pos,
493 unsigned int *v_pos)
494{
495 struct core_freesync *core_freesync = NULL((void *)0);
496 struct crtc_position position;
497
498 if (mod_freesync == NULL((void *)0))
499 return false0;
500
501 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
502
503 if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1,
504 &position.vertical_count,
505 &position.nominal_vcount)) {
506
507 *nom_v_pos = position.nominal_vcount;
508 *v_pos = position.vertical_count;
509
510 return true1;
511 }
512
513 return false0;
514}
515
516static void build_vrr_infopacket_data_v1(const struct mod_vrr_params *vrr,
517 struct dc_info_packet *infopacket)
518{
519 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
520 infopacket->sb[1] = 0x1A;
521
522 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
523 infopacket->sb[2] = 0x00;
524
525 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
526 infopacket->sb[3] = 0x00;
527
528 /* PB4 = Reserved */
529
530 /* PB5 = Reserved */
531
532 /* PB6 = [Bits 7:3 = Reserved] */
533
534 /* PB6 = [Bit 0 = FreeSync Supported] */
535 if (vrr->state != VRR_STATE_UNSUPPORTED)
536 infopacket->sb[6] |= 0x01;
537
538 /* PB6 = [Bit 1 = FreeSync Enabled] */
539 if (vrr->state != VRR_STATE_DISABLED &&
540 vrr->state != VRR_STATE_UNSUPPORTED)
541 infopacket->sb[6] |= 0x02;
542
543 /* PB6 = [Bit 2 = FreeSync Active] */
544 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
545 vrr->state == VRR_STATE_ACTIVE_FIXED)
546 infopacket->sb[6] |= 0x04;
547
548 // For v1 & 2 infoframes program nominal if non-fs mode, otherwise full range
549 /* PB7 = FreeSync Minimum refresh rate (Hz) */
550 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
551 vrr->state == VRR_STATE_ACTIVE_FIXED) {
552 infopacket->sb[7] = (unsigned char)((vrr->min_refresh_in_uhz + 500000) / 1000000);
553 } else {
554 infopacket->sb[7] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
555 }
556
557 /* PB8 = FreeSync Maximum refresh rate (Hz)
558 * Note: We should never go above the field rate of the mode timing set.
559 */
560 infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
561
562 //FreeSync HDR
563 infopacket->sb[9] = 0;
564 infopacket->sb[10] = 0;
565}
566
567static void build_vrr_infopacket_data_v3(const struct mod_vrr_params *vrr,
568 struct dc_info_packet *infopacket)
569{
570 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
571 infopacket->sb[1] = 0x1A;
572
573 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
574 infopacket->sb[2] = 0x00;
575
576 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
577 infopacket->sb[3] = 0x00;
578
579 /* PB4 = Reserved */
580
581 /* PB5 = Reserved */
582
583 /* PB6 = [Bits 7:3 = Reserved] */
584
585 /* PB6 = [Bit 0 = FreeSync Supported] */
586 if (vrr->state != VRR_STATE_UNSUPPORTED)
587 infopacket->sb[6] |= 0x01;
588
589 /* PB6 = [Bit 1 = FreeSync Enabled] */
590 if (vrr->state != VRR_STATE_DISABLED &&
591 vrr->state != VRR_STATE_UNSUPPORTED)
592 infopacket->sb[6] |= 0x02;
593
594 /* PB6 = [Bit 2 = FreeSync Active] */
595 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
596 vrr->state == VRR_STATE_ACTIVE_FIXED)
597 infopacket->sb[6] |= 0x04;
598
599 if (vrr->state == VRR_STATE_ACTIVE_FIXED) {
600 /* PB7 = FreeSync Minimum refresh rate (Hz) */
601 infopacket->sb[7] = (unsigned char)((vrr->fixed_refresh_in_uhz + 500000) / 1000000);
602 /* PB8 = FreeSync Maximum refresh rate (Hz) */
603 infopacket->sb[8] = (unsigned char)((vrr->fixed_refresh_in_uhz + 500000) / 1000000);
604 } else if (vrr->state == VRR_STATE_ACTIVE_VARIABLE) {
605 /* PB7 = FreeSync Minimum refresh rate (Hz) */
606 infopacket->sb[7] = (unsigned char)((vrr->min_refresh_in_uhz + 500000) / 1000000);
607 /* PB8 = FreeSync Maximum refresh rate (Hz) */
608 infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
609 } else {
610 // Non-fs case, program nominal range
611 /* PB7 = FreeSync Minimum refresh rate (Hz) */
612 infopacket->sb[7] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
613 /* PB8 = FreeSync Maximum refresh rate (Hz) */
614 infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
615 }
616
617 //FreeSync HDR
618 infopacket->sb[9] = 0;
619 infopacket->sb[10] = 0;
620}
621
622static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf,
623 struct dc_info_packet *infopacket)
624{
625 if (app_tf != TRANSFER_FUNC_UNKNOWN) {
626 infopacket->valid = true1;
627
628 infopacket->sb[6] |= 0x08; // PB6 = [Bit 3 = Native Color Active]
629
630 if (app_tf == TRANSFER_FUNC_GAMMA_22) {
631 infopacket->sb[9] |= 0x04; // PB6 = [Bit 2 = Gamma 2.2 EOTF Active]
632 }
633 }
634}
635
636static void build_vrr_infopacket_header_v1(enum amd_signal_type signal,
637 struct dc_info_packet *infopacket,
638 unsigned int *payload_size)
639{
640 if (dc_is_hdmi_signal(signal)) {
641
642 /* HEADER */
643
644 /* HB0 = Packet Type = 0x83 (Source Product
645 * Descriptor InfoFrame)
646 */
647 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
648
649 /* HB1 = Version = 0x01 */
650 infopacket->hb1 = 0x01;
651
652 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */
653 infopacket->hb2 = 0x08;
654
655 *payload_size = 0x08;
656
657 } else if (dc_is_dp_signal(signal)) {
658
659 /* HEADER */
660
661 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
662 * when used to associate audio related info packets
663 */
664 infopacket->hb0 = 0x00;
665
666 /* HB1 = Packet Type = 0x83 (Source Product
667 * Descriptor InfoFrame)
668 */
669 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
670
671 /* HB2 = [Bits 7:0 = Least significant eight bits -
672 * For INFOFRAME, the value must be 1Bh]
673 */
674 infopacket->hb2 = 0x1B;
675
676 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1]
677 * [Bits 1:0 = Most significant two bits = 0x00]
678 */
679 infopacket->hb3 = 0x04;
680
681 *payload_size = 0x1B;
682 }
683}
684
685static void build_vrr_infopacket_header_v2(enum amd_signal_type signal,
686 struct dc_info_packet *infopacket,
687 unsigned int *payload_size)
688{
689 if (dc_is_hdmi_signal(signal)) {
690
691 /* HEADER */
692
693 /* HB0 = Packet Type = 0x83 (Source Product
694 * Descriptor InfoFrame)
695 */
696 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
697
698 /* HB1 = Version = 0x02 */
699 infopacket->hb1 = 0x02;
700
701 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x09] */
702 infopacket->hb2 = 0x09;
703
704 *payload_size = 0x0A;
705
706 } else if (dc_is_dp_signal(signal)) {
707
708 /* HEADER */
709
710 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
711 * when used to associate audio related info packets
712 */
713 infopacket->hb0 = 0x00;
714
715 /* HB1 = Packet Type = 0x83 (Source Product
716 * Descriptor InfoFrame)
717 */
718 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
719
720 /* HB2 = [Bits 7:0 = Least significant eight bits -
721 * For INFOFRAME, the value must be 1Bh]
722 */
723 infopacket->hb2 = 0x1B;
724
725 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2]
726 * [Bits 1:0 = Most significant two bits = 0x00]
727 */
728 infopacket->hb3 = 0x08;
729
730 *payload_size = 0x1B;
731 }
732}
733
734static void build_vrr_infopacket_checksum(unsigned int *payload_size,
735 struct dc_info_packet *infopacket)
736{
737 /* Calculate checksum */
738 unsigned int idx = 0;
739 unsigned char checksum = 0;
740
741 checksum += infopacket->hb0;
742 checksum += infopacket->hb1;
743 checksum += infopacket->hb2;
744 checksum += infopacket->hb3;
745
746 for (idx = 1; idx <= *payload_size; idx++)
747 checksum += infopacket->sb[idx];
748
749 /* PB0 = Checksum (one byte complement) */
750 infopacket->sb[0] = (unsigned char)(0x100 - checksum);
751
752 infopacket->valid = true1;
753}
754
755static void build_vrr_infopacket_v1(enum amd_signal_type signal,
756 const struct mod_vrr_params *vrr,
757 struct dc_info_packet *infopacket)
758{
759 /* SPD info packet for FreeSync */
760 unsigned int payload_size = 0;
761
762 build_vrr_infopacket_header_v1(signal, infopacket, &payload_size);
763 build_vrr_infopacket_data_v1(vrr, infopacket);
764 build_vrr_infopacket_checksum(&payload_size, infopacket);
765
766 infopacket->valid = true1;
767}
768
769static void build_vrr_infopacket_v2(enum amd_signal_type signal,
770 const struct mod_vrr_params *vrr,
771 enum color_transfer_func app_tf,
772 struct dc_info_packet *infopacket)
773{
774 unsigned int payload_size = 0;
775
776 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size);
777 build_vrr_infopacket_data_v1(vrr, infopacket);
778
779 build_vrr_infopacket_fs2_data(app_tf, infopacket);
780
781 build_vrr_infopacket_checksum(&payload_size, infopacket);
782
783 infopacket->valid = true1;
784}
785#ifndef TRIM_FSFT
786static void build_vrr_infopacket_fast_transport_data(
787 bool_Bool ftActive,
788 unsigned int ftOutputRate,
789 struct dc_info_packet *infopacket)
790{
791 /* PB9 : bit7 - fast transport Active*/
792 unsigned char activeBit = (ftActive) ? 1 << 7 : 0;
793
794 infopacket->sb[1] &= ~activeBit; //clear bit
795 infopacket->sb[1] |= activeBit; //set bit
796
797 /* PB13 : Target Output Pixel Rate [kHz] - bits 7:0 */
798 infopacket->sb[13] = ftOutputRate & 0xFF;
799
800 /* PB14 : Target Output Pixel Rate [kHz] - bits 15:8 */
801 infopacket->sb[14] = (ftOutputRate >> 8) & 0xFF;
802
803 /* PB15 : Target Output Pixel Rate [kHz] - bits 23:16 */
804 infopacket->sb[15] = (ftOutputRate >> 16) & 0xFF;
805
806}
807#endif
808
809static void build_vrr_infopacket_v3(enum amd_signal_type signal,
810 const struct mod_vrr_params *vrr,
811#ifndef TRIM_FSFT
812 bool_Bool ftActive, unsigned int ftOutputRate,
813#endif
814 enum color_transfer_func app_tf,
815 struct dc_info_packet *infopacket)
816{
817 unsigned int payload_size = 0;
818
819 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size);
820 build_vrr_infopacket_data_v3(vrr, infopacket);
821
822 build_vrr_infopacket_fs2_data(app_tf, infopacket);
823
824#ifndef TRIM_FSFT
825 build_vrr_infopacket_fast_transport_data(
826 ftActive,
827 ftOutputRate,
828 infopacket);
829#endif
830
831 build_vrr_infopacket_checksum(&payload_size, infopacket);
832
833 infopacket->valid = true1;
834}
835
836void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
837 const struct dc_stream_state *stream,
838 const struct mod_vrr_params *vrr,
839 enum vrr_packet_type packet_type,
840 enum color_transfer_func app_tf,
841 struct dc_info_packet *infopacket)
842{
843 /* SPD info packet for FreeSync
844 * VTEM info packet for HdmiVRR
845 * Check if Freesync is supported. Return if false. If true,
846 * set the corresponding bit in the info packet
847 */
848 if (!vrr->send_info_frame)
849 return;
850
851 switch (packet_type) {
852 case PACKET_TYPE_FS_V3:
853#ifndef TRIM_FSFT
854 // always populate with pixel rate.
855 build_vrr_infopacket_v3(
856 stream->signal, vrr,
857 stream->timing.flags.FAST_TRANSPORT,
858 (stream->timing.flags.FAST_TRANSPORT) ?
859 stream->timing.fast_transport_output_rate_100hz :
860 stream->timing.pix_clk_100hz,
861 app_tf, infopacket);
862#else
863 build_vrr_infopacket_v3(stream->signal, vrr, app_tf, infopacket);
864#endif
865 break;
866 case PACKET_TYPE_FS_V2:
867 build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket);
868 break;
869 case PACKET_TYPE_VRR:
870 case PACKET_TYPE_FS_V1:
871 default:
872 build_vrr_infopacket_v1(stream->signal, vrr, infopacket);
873 }
874}
875
876void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
877 const struct dc_stream_state *stream,
878 struct mod_freesync_config *in_config,
879 struct mod_vrr_params *in_out_vrr)
880{
881 struct core_freesync *core_freesync = NULL((void *)0);
882 unsigned long long nominal_field_rate_in_uhz = 0;
883 unsigned long long rounded_nominal_in_uhz = 0;
884 unsigned int refresh_range = 0;
885 unsigned long long min_refresh_in_uhz = 0;
886 unsigned long long max_refresh_in_uhz = 0;
887
888 if (mod_freesync == NULL((void *)0))
889 return;
890
891 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
892
893 /* Calculate nominal field rate for stream */
894 nominal_field_rate_in_uhz =
895 mod_freesync_calc_nominal_field_rate(stream);
896
897 min_refresh_in_uhz = in_config->min_refresh_in_uhz;
898 max_refresh_in_uhz = in_config->max_refresh_in_uhz;
899
900 // Full range may be larger than current video timing, so cap at nominal
901 if (max_refresh_in_uhz > nominal_field_rate_in_uhz)
902 max_refresh_in_uhz = nominal_field_rate_in_uhz;
903
904 // Full range may be larger than current video timing, so cap at nominal
905 if (min_refresh_in_uhz > max_refresh_in_uhz)
906 min_refresh_in_uhz = max_refresh_in_uhz;
907
908 // If a monitor reports exactly max refresh of 2x of min, enforce it on nominal
909 rounded_nominal_in_uhz =
910 div_u64(nominal_field_rate_in_uhz + 50000, 100000) * 100000;
911 if (in_config->max_refresh_in_uhz == (2 * in_config->min_refresh_in_uhz) &&
912 in_config->max_refresh_in_uhz == rounded_nominal_in_uhz)
913 min_refresh_in_uhz = div_u64(nominal_field_rate_in_uhz, 2);
914
915 if (!vrr_settings_require_update(core_freesync,
916 in_config, (unsigned int)min_refresh_in_uhz, (unsigned int)max_refresh_in_uhz,
917 in_out_vrr))
918 return;
919
920 in_out_vrr->state = in_config->state;
921 in_out_vrr->send_info_frame = in_config->vsif_supported;
922
923 if (in_config->state == VRR_STATE_UNSUPPORTED) {
924 in_out_vrr->state = VRR_STATE_UNSUPPORTED;
925 in_out_vrr->supported = false0;
926 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
927 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
928
929 return;
930
931 } else {
932 in_out_vrr->min_refresh_in_uhz = (unsigned int)min_refresh_in_uhz;
933 in_out_vrr->max_duration_in_us =
934 calc_duration_in_us_from_refresh_in_uhz(
935 (unsigned int)min_refresh_in_uhz);
936
937 in_out_vrr->max_refresh_in_uhz = (unsigned int)max_refresh_in_uhz;
938 in_out_vrr->min_duration_in_us =
939 calc_duration_in_us_from_refresh_in_uhz(
940 (unsigned int)max_refresh_in_uhz);
941
942 if (in_config->state == VRR_STATE_ACTIVE_FIXED)
943 in_out_vrr->fixed_refresh_in_uhz = in_config->fixed_refresh_in_uhz;
944 else
945 in_out_vrr->fixed_refresh_in_uhz = 0;
946
947 refresh_range = div_u64(in_out_vrr->max_refresh_in_uhz + 500000, 1000000) -
948+ div_u64(in_out_vrr->min_refresh_in_uhz + 500000, 1000000);
949
950 in_out_vrr->supported = true1;
951 }
952
953 in_out_vrr->fixed.ramping_active = in_config->ramping;
954
955 in_out_vrr->btr.btr_enabled = in_config->btr;
956
957 if (in_out_vrr->max_refresh_in_uhz < (2 * in_out_vrr->min_refresh_in_uhz))
958 in_out_vrr->btr.btr_enabled = false0;
959 else {
960 in_out_vrr->btr.margin_in_us = in_out_vrr->max_duration_in_us -
961 2 * in_out_vrr->min_duration_in_us;
962 if (in_out_vrr->btr.margin_in_us > BTR_MAX_MARGIN2500)
963 in_out_vrr->btr.margin_in_us = BTR_MAX_MARGIN2500;
964 }
965
966 in_out_vrr->btr.btr_active = false0;
967 in_out_vrr->btr.inserted_duration_in_us = 0;
968 in_out_vrr->btr.frames_to_insert = 0;
969 in_out_vrr->btr.frame_counter = 0;
970 in_out_vrr->fixed.fixed_active = false0;
971 in_out_vrr->fixed.target_refresh_in_uhz = 0;
972
973 in_out_vrr->btr.mid_point_in_us =
974 (in_out_vrr->min_duration_in_us +
975 in_out_vrr->max_duration_in_us) / 2;
976
977 if (in_out_vrr->state == VRR_STATE_UNSUPPORTED) {
978 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
979 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
980 } else if (in_out_vrr->state == VRR_STATE_DISABLED) {
981 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
982 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
983 } else if (in_out_vrr->state == VRR_STATE_INACTIVE) {
984 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
985 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
986 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
987 refresh_range >= MIN_REFRESH_RANGE10) {
988
989 in_out_vrr->adjust.v_total_min =
990 calc_v_total_from_refresh(stream,
991 in_out_vrr->max_refresh_in_uhz);
992 in_out_vrr->adjust.v_total_max =
993 calc_v_total_from_refresh(stream,
994 in_out_vrr->min_refresh_in_uhz);
995 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) {
996 in_out_vrr->fixed.target_refresh_in_uhz =
997 in_out_vrr->fixed_refresh_in_uhz;
998 if (in_out_vrr->fixed.ramping_active &&
999 in_out_vrr->fixed.fixed_active) {
1000 /* Do not update vtotals if ramping is already active
1001 * in order to continue ramp from current refresh.
1002 */
1003 in_out_vrr->fixed.fixed_active = true1;
1004 } else {
1005 in_out_vrr->fixed.fixed_active = true1;
1006 in_out_vrr->adjust.v_total_min =
1007 calc_v_total_from_refresh(stream,
1008 in_out_vrr->fixed.target_refresh_in_uhz);
1009 in_out_vrr->adjust.v_total_max =
1010 in_out_vrr->adjust.v_total_min;
1011 }
1012 } else {
1013 in_out_vrr->state = VRR_STATE_INACTIVE;
1014 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1015 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1016 }
1017}
1018
1019void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync,
1020 const struct dc_plane_state *plane,
1021 const struct dc_stream_state *stream,
1022 unsigned int curr_time_stamp_in_us,
1023 struct mod_vrr_params *in_out_vrr)
1024{
1025 struct core_freesync *core_freesync = NULL((void *)0);
1026 unsigned int last_render_time_in_us = 0;
1027 unsigned int average_render_time_in_us = 0;
1028
1029 if (mod_freesync == NULL((void *)0))
1030 return;
1031
1032 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
1033
1034 if (in_out_vrr->supported &&
1035 in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) {
1036 unsigned int i = 0;
1037 unsigned int oldest_index = plane->time.index + 1;
1038
1039 if (oldest_index >= DC_PLANE_UPDATE_TIMES_MAX10)
1040 oldest_index = 0;
1041
1042 last_render_time_in_us = curr_time_stamp_in_us -
1043 plane->time.prev_update_time_in_us;
1044
1045 // Sum off all entries except oldest one
1046 for (i = 0; i < DC_PLANE_UPDATE_TIMES_MAX10; i++) {
1047 average_render_time_in_us +=
1048 plane->time.time_elapsed_in_us[i];
1049 }
1050 average_render_time_in_us -=
1051 plane->time.time_elapsed_in_us[oldest_index];
1052
1053 // Add render time for current flip
1054 average_render_time_in_us += last_render_time_in_us;
1055 average_render_time_in_us /= DC_PLANE_UPDATE_TIMES_MAX10;
1056
1057 if (in_out_vrr->btr.btr_enabled) {
1058 apply_below_the_range(core_freesync,
1059 stream,
1060 last_render_time_in_us,
1061 in_out_vrr);
1062 } else {
1063 apply_fixed_refresh(core_freesync,
1064 stream,
1065 last_render_time_in_us,
1066 in_out_vrr);
1067 }
1068
1069 }
1070}
1071
1072void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
1073 const struct dc_stream_state *stream,
1074 struct mod_vrr_params *in_out_vrr)
1075{
1076 struct core_freesync *core_freesync = NULL((void *)0);
1077
1078 if ((mod_freesync == NULL((void *)0)) || (stream == NULL((void *)0)) || (in_out_vrr == NULL((void *)0)))
1079 return;
1080
1081 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
1082
1083 if (in_out_vrr->supported == false0)
1084 return;
1085
1086 /* Below the Range Logic */
1087
1088 /* Only execute if in fullscreen mode */
1089 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1090 in_out_vrr->btr.btr_active) {
1091 /* TODO: pass in flag for Pre-DCE12 ASIC
1092 * in order for frame variable duration to take affect,
1093 * it needs to be done one VSYNC early, which is at
1094 * frameCounter == 1.
1095 * For DCE12 and newer updates to V_TOTAL_MIN/MAX
1096 * will take affect on current frame
1097 */
1098 if (in_out_vrr->btr.frames_to_insert ==
1099 in_out_vrr->btr.frame_counter) {
1100 in_out_vrr->adjust.v_total_min =
1101 calc_v_total_from_duration(stream,
1102 in_out_vrr,
1103 in_out_vrr->btr.inserted_duration_in_us);
1104 in_out_vrr->adjust.v_total_max =
1105 in_out_vrr->adjust.v_total_min;
1106 }
1107
1108 if (in_out_vrr->btr.frame_counter > 0)
1109 in_out_vrr->btr.frame_counter--;
1110
1111 /* Restore FreeSync */
1112 if (in_out_vrr->btr.frame_counter == 0) {
1113 in_out_vrr->adjust.v_total_min =
1114 calc_v_total_from_refresh(stream,
1115 in_out_vrr->max_refresh_in_uhz);
1116 in_out_vrr->adjust.v_total_max =
1117 calc_v_total_from_refresh(stream,
1118 in_out_vrr->min_refresh_in_uhz);
1119 }
1120 }
1121
1122 /* If in fullscreen freesync mode or in video, do not program
1123 * static screen ramp values
1124 */
1125 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE)
1126 in_out_vrr->fixed.ramping_active = false0;
1127
1128 /* Gradual Static Screen Ramping Logic */
1129 /* Execute if ramp is active and user enabled freesync static screen*/
1130 if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED &&
1131 in_out_vrr->fixed.ramping_active) {
1132 update_v_total_for_static_ramp(
1133 core_freesync, stream, in_out_vrr);
1134 }
1135}
1136
1137void mod_freesync_get_settings(struct mod_freesync *mod_freesync,
1138 const struct mod_vrr_params *vrr,
1139 unsigned int *v_total_min, unsigned int *v_total_max,
1140 unsigned int *event_triggers,
1141 unsigned int *window_min, unsigned int *window_max,
1142 unsigned int *lfc_mid_point_in_us,
1143 unsigned int *inserted_frames,
1144 unsigned int *inserted_duration_in_us)
1145{
1146 if (mod_freesync == NULL((void *)0))
1147 return;
1148
1149 if (vrr->supported) {
1150 *v_total_min = vrr->adjust.v_total_min;
1151 *v_total_max = vrr->adjust.v_total_max;
1152 *event_triggers = 0;
1153 *lfc_mid_point_in_us = vrr->btr.mid_point_in_us;
1154 *inserted_frames = vrr->btr.frames_to_insert;
1155 *inserted_duration_in_us = vrr->btr.inserted_duration_in_us;
1156 }
1157}
1158
1159unsigned long long mod_freesync_calc_nominal_field_rate(
1160 const struct dc_stream_state *stream)
1161{
1162 unsigned long long nominal_field_rate_in_uhz = 0;
1163 unsigned int total = stream->timing.h_total * stream->timing.v_total;
1164
1165 /* Calculate nominal field rate for stream, rounded up to nearest integer */
1166 nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz;
1167 nominal_field_rate_in_uhz *= 100000000ULL;
1168
1169 nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz, total);
1170
1171 return nominal_field_rate_in_uhz;
1172}
1173
1174bool_Bool mod_freesync_is_valid_range(uint32_t min_refresh_cap_in_uhz,
1175 uint32_t max_refresh_cap_in_uhz,
1176 uint32_t nominal_field_rate_in_uhz)
1177{
1178
1179 /* Typically nominal refresh calculated can have some fractional part.
1180 * Allow for some rounding error of actual video timing by taking floor
1181 * of caps and request. Round the nominal refresh rate.
1182 *
1183 * Dividing will convert everything to units in Hz although input
1184 * variable name is in uHz!
1185 *
1186 * Also note, this takes care of rounding error on the nominal refresh
1187 * so by rounding error we only expect it to be off by a small amount,
1188 * such as < 0.1 Hz. i.e. 143.9xxx or 144.1xxx.
1189 *
1190 * Example 1. Caps Min = 40 Hz, Max = 144 Hz
1191 * Request Min = 40 Hz, Max = 144 Hz
1192 * Nominal = 143.5x Hz rounded to 144 Hz
1193 * This function should allow this as valid request
1194 *
1195 * Example 2. Caps Min = 40 Hz, Max = 144 Hz
1196 * Request Min = 40 Hz, Max = 144 Hz
1197 * Nominal = 144.4x Hz rounded to 144 Hz
1198 * This function should allow this as valid request
1199 *
1200 * Example 3. Caps Min = 40 Hz, Max = 144 Hz
1201 * Request Min = 40 Hz, Max = 144 Hz
1202 * Nominal = 120.xx Hz rounded to 120 Hz
1203 * This function should return NOT valid since the requested
1204 * max is greater than current timing's nominal
1205 *
1206 * Example 4. Caps Min = 40 Hz, Max = 120 Hz
1207 * Request Min = 40 Hz, Max = 120 Hz
1208 * Nominal = 144.xx Hz rounded to 144 Hz
1209 * This function should return NOT valid since the nominal
1210 * is greater than the capability's max refresh
1211 */
1212 nominal_field_rate_in_uhz =
1213 div_u64(nominal_field_rate_in_uhz + 500000, 1000000);
1214 min_refresh_cap_in_uhz /= 1000000;
1215 max_refresh_cap_in_uhz /= 1000000;
1216
1217 // Check nominal is within range
1218 if (nominal_field_rate_in_uhz > max_refresh_cap_in_uhz ||
1219 nominal_field_rate_in_uhz < min_refresh_cap_in_uhz)
1220 return false0;
1221
1222 // If nominal is less than max, limit the max allowed refresh rate
1223 if (nominal_field_rate_in_uhz < max_refresh_cap_in_uhz)
1224 max_refresh_cap_in_uhz = nominal_field_rate_in_uhz;
1225
1226 // Check min is within range
1227 if (min_refresh_cap_in_uhz > max_refresh_cap_in_uhz)
1228 return false0;
1229
1230 // For variable range, check for at least 10 Hz range
1231 if (nominal_field_rate_in_uhz - min_refresh_cap_in_uhz < 10)
1232 return false0;
1233
1234 return true1;
1235}
1236