| File: | dev/pci/drm/radeon/radeon_connectors.c |
| Warning: | line 2581, column 3 Value stored to 'ret' is never read |
Press '?' to see keyboard shortcuts
Keyboard shortcuts:
| 1 | /* |
| 2 | * Copyright 2007-8 Advanced Micro Devices, Inc. |
| 3 | * Copyright 2008 Red Hat Inc. |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be included in |
| 13 | * all copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 21 | * OTHER DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: Dave Airlie |
| 24 | * Alex Deucher |
| 25 | */ |
| 26 | |
| 27 | #include <drm/drm_edid.h> |
| 28 | #include <drm/drm_crtc_helper.h> |
| 29 | #include <drm/drm_fb_helper.h> |
| 30 | #include <drm/drm_dp_mst_helper.h> |
| 31 | #include <drm/drm_probe_helper.h> |
| 32 | #include <drm/radeon_drm.h> |
| 33 | #include "radeon.h" |
| 34 | #include "radeon_audio.h" |
| 35 | #include "atom.h" |
| 36 | |
| 37 | #include <linux/pm_runtime.h> |
| 38 | #include <linux/vga_switcheroo.h> |
| 39 | |
| 40 | static int radeon_dp_handle_hpd(struct drm_connector *connector) |
| 41 | { |
| 42 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 43 | int ret; |
| 44 | |
| 45 | ret = radeon_dp_mst_check_status(radeon_connector); |
| 46 | if (ret == -EINVAL22) |
| 47 | return 1; |
| 48 | return 0; |
| 49 | } |
| 50 | void radeon_connector_hotplug(struct drm_connector *connector) |
| 51 | { |
| 52 | struct drm_device *dev = connector->dev; |
| 53 | struct radeon_device *rdev = dev->dev_private; |
| 54 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 55 | |
| 56 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort10) { |
| 57 | struct radeon_connector_atom_dig *dig_connector = |
| 58 | radeon_connector->con_priv; |
| 59 | |
| 60 | if (radeon_connector->is_mst_connector) |
| 61 | return; |
| 62 | if (dig_connector->is_mst) { |
| 63 | radeon_dp_handle_hpd(connector); |
| 64 | return; |
| 65 | } |
| 66 | } |
| 67 | /* bail if the connector does not have hpd pin, e.g., |
| 68 | * VGA, TV, etc. |
| 69 | */ |
| 70 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) |
| 71 | return; |
| 72 | |
| 73 | radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd)(rdev)->asic->hpd.set_polarity((rdev), (radeon_connector ->hpd.hpd)); |
| 74 | |
| 75 | /* if the connector is already off, don't turn it back on */ |
| 76 | /* FIXME: This access isn't protected by any locks. */ |
| 77 | if (connector->dpms != DRM_MODE_DPMS_ON0) |
| 78 | return; |
| 79 | |
| 80 | /* just deal with DP (not eDP) here. */ |
| 81 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort10) { |
| 82 | struct radeon_connector_atom_dig *dig_connector = |
| 83 | radeon_connector->con_priv; |
| 84 | |
| 85 | /* if existing sink type was not DP no need to retrain */ |
| 86 | if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT0x13) |
| 87 | return; |
| 88 | |
| 89 | /* first get sink type as it may be reset after (un)plug */ |
| 90 | dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
| 91 | /* don't do anything if sink is not display port, i.e., |
| 92 | * passive dp->(dvi|hdmi) adaptor |
| 93 | */ |
| 94 | if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13 && |
| 95 | radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)(rdev)->asic->hpd.sense((rdev), (radeon_connector->hpd .hpd)) && |
| 96 | radeon_dp_needs_link_train(radeon_connector)) { |
| 97 | /* Don't start link training before we have the DPCD */ |
| 98 | if (!radeon_dp_getdpcd(radeon_connector)) |
| 99 | return; |
| 100 | |
| 101 | /* Turn the connector off and back on immediately, which |
| 102 | * will trigger link training |
| 103 | */ |
| 104 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF3); |
| 105 | drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON0); |
| 106 | } |
| 107 | } |
| 108 | } |
| 109 | |
| 110 | static void radeon_property_change_mode(struct drm_encoder *encoder) |
| 111 | { |
| 112 | struct drm_crtc *crtc = encoder->crtc; |
| 113 | |
| 114 | if (crtc && crtc->enabled) { |
| 115 | drm_crtc_helper_set_mode(crtc, &crtc->mode, |
| 116 | crtc->x, crtc->y, crtc->primary->fb); |
| 117 | } |
| 118 | } |
| 119 | |
| 120 | int radeon_get_monitor_bpc(struct drm_connector *connector) |
| 121 | { |
| 122 | struct drm_device *dev = connector->dev; |
| 123 | struct radeon_device *rdev = dev->dev_private; |
| 124 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 125 | struct radeon_connector_atom_dig *dig_connector; |
| 126 | int bpc = 8; |
| 127 | int mode_clock, max_tmds_clock; |
| 128 | |
| 129 | switch (connector->connector_type) { |
| 130 | case DRM_MODE_CONNECTOR_DVII2: |
| 131 | case DRM_MODE_CONNECTOR_HDMIB12: |
| 132 | if (radeon_connector->use_digital) { |
| 133 | if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { |
| 134 | if (connector->display_info.bpc) |
| 135 | bpc = connector->display_info.bpc; |
| 136 | } |
| 137 | } |
| 138 | break; |
| 139 | case DRM_MODE_CONNECTOR_DVID3: |
| 140 | case DRM_MODE_CONNECTOR_HDMIA11: |
| 141 | if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { |
| 142 | if (connector->display_info.bpc) |
| 143 | bpc = connector->display_info.bpc; |
| 144 | } |
| 145 | break; |
| 146 | case DRM_MODE_CONNECTOR_DisplayPort10: |
| 147 | dig_connector = radeon_connector->con_priv; |
| 148 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13) || |
| 149 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP0x14) || |
| 150 | drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { |
| 151 | if (connector->display_info.bpc) |
| 152 | bpc = connector->display_info.bpc; |
| 153 | } |
| 154 | break; |
| 155 | case DRM_MODE_CONNECTOR_eDP14: |
| 156 | case DRM_MODE_CONNECTOR_LVDS7: |
| 157 | if (connector->display_info.bpc) |
| 158 | bpc = connector->display_info.bpc; |
| 159 | else if (ASIC_IS_DCE41(rdev)((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP)) || ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS))) { |
| 160 | const struct drm_connector_helper_funcs *connector_funcs = |
| 161 | connector->helper_private; |
| 162 | struct drm_encoder *encoder = connector_funcs->best_encoder(connector); |
| 163 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 164 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 165 | |
| 166 | if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR0x10) |
| 167 | bpc = 6; |
| 168 | else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR0x20) |
| 169 | bpc = 8; |
| 170 | } |
| 171 | break; |
| 172 | } |
| 173 | |
| 174 | if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { |
| 175 | /* hdmi deep color only implemented on DCE4+ */ |
| 176 | if ((bpc > 8) && !ASIC_IS_DCE4(rdev)((rdev->family >= CHIP_CEDAR))) { |
| 177 | DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",__drm_dbg(DRM_UT_CORE, "%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n" , connector->name, bpc) |
| 178 | connector->name, bpc)__drm_dbg(DRM_UT_CORE, "%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n" , connector->name, bpc); |
| 179 | bpc = 8; |
| 180 | } |
| 181 | |
| 182 | /* |
| 183 | * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make |
| 184 | * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at |
| 185 | * 12 bpc is always supported on hdmi deep color sinks, as this is |
| 186 | * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum. |
| 187 | */ |
| 188 | if (bpc > 12) { |
| 189 | DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",__drm_dbg(DRM_UT_CORE, "%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n" , connector->name, bpc) |
| 190 | connector->name, bpc)__drm_dbg(DRM_UT_CORE, "%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n" , connector->name, bpc); |
| 191 | bpc = 12; |
| 192 | } |
| 193 | |
| 194 | /* Any defined maximum tmds clock limit we must not exceed? */ |
| 195 | if (connector->display_info.max_tmds_clock > 0) { |
| 196 | /* mode_clock is clock in kHz for mode to be modeset on this connector */ |
| 197 | mode_clock = radeon_connector->pixelclock_for_modeset; |
| 198 | |
| 199 | /* Maximum allowable input clock in kHz */ |
| 200 | max_tmds_clock = connector->display_info.max_tmds_clock; |
| 201 | |
| 202 | DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",__drm_dbg(DRM_UT_CORE, "%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n" , connector->name, mode_clock, max_tmds_clock) |
| 203 | connector->name, mode_clock, max_tmds_clock)__drm_dbg(DRM_UT_CORE, "%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n" , connector->name, mode_clock, max_tmds_clock); |
| 204 | |
| 205 | /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */ |
| 206 | if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) { |
| 207 | if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30(1 << 4)) && |
| 208 | (mode_clock * 5/4 <= max_tmds_clock)) |
| 209 | bpc = 10; |
| 210 | else |
| 211 | bpc = 8; |
| 212 | |
| 213 | DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",__drm_dbg(DRM_UT_CORE, "%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n" , connector->name, bpc) |
| 214 | connector->name, bpc)__drm_dbg(DRM_UT_CORE, "%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n" , connector->name, bpc); |
| 215 | } |
| 216 | |
| 217 | if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) { |
| 218 | bpc = 8; |
| 219 | DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",__drm_dbg(DRM_UT_CORE, "%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n" , connector->name, bpc) |
| 220 | connector->name, bpc)__drm_dbg(DRM_UT_CORE, "%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n" , connector->name, bpc); |
| 221 | } |
| 222 | } |
| 223 | else if (bpc > 8) { |
| 224 | /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */ |
| 225 | DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",__drm_dbg(DRM_UT_CORE, "%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n" , connector->name) |
| 226 | connector->name)__drm_dbg(DRM_UT_CORE, "%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n" , connector->name); |
| 227 | bpc = 8; |
| 228 | } |
| 229 | } |
| 230 | |
| 231 | if ((radeon_deep_color == 0) && (bpc > 8)) { |
| 232 | DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n",__drm_dbg(DRM_UT_CORE, "%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n" , connector->name) |
| 233 | connector->name)__drm_dbg(DRM_UT_CORE, "%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n" , connector->name); |
| 234 | bpc = 8; |
| 235 | } |
| 236 | |
| 237 | DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",__drm_dbg(DRM_UT_CORE, "%s: Display bpc=%d, returned bpc=%d\n" , connector->name, connector->display_info.bpc, bpc) |
| 238 | connector->name, connector->display_info.bpc, bpc)__drm_dbg(DRM_UT_CORE, "%s: Display bpc=%d, returned bpc=%d\n" , connector->name, connector->display_info.bpc, bpc); |
| 239 | |
| 240 | return bpc; |
| 241 | } |
| 242 | |
| 243 | static void |
| 244 | radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) |
| 245 | { |
| 246 | struct drm_device *dev = connector->dev; |
| 247 | struct radeon_device *rdev = dev->dev_private; |
| 248 | struct drm_encoder *best_encoder; |
| 249 | struct drm_encoder *encoder; |
| 250 | const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; |
| 251 | bool_Bool connected; |
| 252 | |
| 253 | best_encoder = connector_funcs->best_encoder(connector); |
| 254 | |
| 255 | drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *) 0)->head ) *__mptr = ((&((connector)->dev)->mode_config .encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof(*(encoder)), head) );}); & (encoder)->head != (&((connector)->dev)->mode_config .encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder )) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof (*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof (*(encoder)), head) );})) if (!(((connector)->possible_encoders ) & drm_encoder_mask(encoder))) {} else { |
| 256 | if ((encoder == best_encoder) && (status == connector_status_connected)) |
| 257 | connected = true1; |
| 258 | else |
| 259 | connected = false0; |
| 260 | |
| 261 | if (rdev->is_atom_bios) |
| 262 | radeon_atombios_connected_scratch_regs(connector, encoder, connected); |
| 263 | else |
| 264 | radeon_combios_connected_scratch_regs(connector, encoder, connected); |
| 265 | } |
| 266 | } |
| 267 | |
| 268 | static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) |
| 269 | { |
| 270 | struct drm_encoder *encoder; |
| 271 | |
| 272 | drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *) 0)->head ) *__mptr = ((&((connector)->dev)->mode_config .encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof(*(encoder)), head) );}); & (encoder)->head != (&((connector)->dev)->mode_config .encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder )) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof (*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof (*(encoder)), head) );})) if (!(((connector)->possible_encoders ) & drm_encoder_mask(encoder))) {} else { |
| 273 | if (encoder->encoder_type == encoder_type) |
| 274 | return encoder; |
| 275 | } |
| 276 | |
| 277 | return NULL((void *)0); |
| 278 | } |
| 279 | |
| 280 | struct edid *radeon_connector_edid(struct drm_connector *connector) |
| 281 | { |
| 282 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 283 | struct drm_property_blob *edid_blob = connector->edid_blob_ptr; |
| 284 | |
| 285 | if (radeon_connector->edid) { |
| 286 | return radeon_connector->edid; |
| 287 | } else if (edid_blob) { |
| 288 | struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL(0x0001 | 0x0004)); |
| 289 | if (edid) |
| 290 | radeon_connector->edid = edid; |
| 291 | } |
| 292 | return radeon_connector->edid; |
| 293 | } |
| 294 | |
| 295 | static void radeon_connector_get_edid(struct drm_connector *connector) |
| 296 | { |
| 297 | struct drm_device *dev = connector->dev; |
| 298 | struct radeon_device *rdev = dev->dev_private; |
| 299 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 300 | |
| 301 | if (radeon_connector->edid) |
| 302 | return; |
| 303 | |
| 304 | /* on hw with routers, select right port */ |
| 305 | if (radeon_connector->router.ddc_valid) |
| 306 | radeon_router_select_ddc_port(radeon_connector); |
| 307 | |
| 308 | if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
| 309 | ENCODER_OBJECT_ID_NONE0x00) && |
| 310 | radeon_connector->ddc_bus->has_aux) { |
| 311 | radeon_connector->edid = drm_get_edid(connector, |
| 312 | &radeon_connector->ddc_bus->aux.ddc); |
| 313 | } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort10) || |
| 314 | (connector->connector_type == DRM_MODE_CONNECTOR_eDP14)) { |
| 315 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; |
| 316 | |
| 317 | if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13 || |
| 318 | dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP0x14) && |
| 319 | radeon_connector->ddc_bus->has_aux) |
| 320 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
| 321 | &radeon_connector->ddc_bus->aux.ddc); |
| 322 | else if (radeon_connector->ddc_bus) |
| 323 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
| 324 | &radeon_connector->ddc_bus->adapter); |
| 325 | } else if (vga_switcheroo_handler_flags()0 & VGA_SWITCHEROO_CAN_SWITCH_DDC1 && |
| 326 | connector->connector_type == DRM_MODE_CONNECTOR_LVDS7 && |
| 327 | radeon_connector->ddc_bus) { |
| 328 | radeon_connector->edid = drm_get_edid_switcheroo(&radeon_connector->base, |
| 329 | &radeon_connector->ddc_bus->adapter); |
| 330 | } else if (radeon_connector->ddc_bus) { |
| 331 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
| 332 | &radeon_connector->ddc_bus->adapter); |
| 333 | } |
| 334 | |
| 335 | if (!radeon_connector->edid) { |
| 336 | /* don't fetch the edid from the vbios if ddc fails and runpm is |
| 337 | * enabled so we report disconnected. |
| 338 | */ |
| 339 | if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0)) |
| 340 | return; |
| 341 | |
| 342 | if (rdev->is_atom_bios) { |
| 343 | /* some laptops provide a hardcoded edid in rom for LCDs */ |
| 344 | if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS7) || |
| 345 | (connector->connector_type == DRM_MODE_CONNECTOR_eDP14))) |
| 346 | radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev); |
| 347 | } else { |
| 348 | /* some servers provide a hardcoded edid in rom for KVMs */ |
| 349 | radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev); |
| 350 | } |
| 351 | } |
| 352 | } |
| 353 | |
| 354 | static void radeon_connector_free_edid(struct drm_connector *connector) |
| 355 | { |
| 356 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 357 | |
| 358 | if (radeon_connector->edid) { |
| 359 | kfree(radeon_connector->edid); |
| 360 | radeon_connector->edid = NULL((void *)0); |
| 361 | } |
| 362 | } |
| 363 | |
| 364 | static int radeon_ddc_get_modes(struct drm_connector *connector) |
| 365 | { |
| 366 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 367 | int ret; |
| 368 | |
| 369 | if (radeon_connector->edid) { |
| 370 | drm_connector_update_edid_property(connector, radeon_connector->edid); |
| 371 | ret = drm_add_edid_modes(connector, radeon_connector->edid); |
| 372 | return ret; |
| 373 | } |
| 374 | drm_connector_update_edid_property(connector, NULL((void *)0)); |
| 375 | return 0; |
| 376 | } |
| 377 | |
| 378 | static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) |
| 379 | { |
| 380 | struct drm_encoder *encoder; |
| 381 | |
| 382 | /* pick the first one */ |
| 383 | drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *) 0)->head ) *__mptr = ((&((connector)->dev)->mode_config .encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof(*(encoder)), head) );}); & (encoder)->head != (&((connector)->dev)->mode_config .encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder )) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof (*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof (*(encoder)), head) );})) if (!(((connector)->possible_encoders ) & drm_encoder_mask(encoder))) {} else |
| 384 | return encoder; |
| 385 | |
| 386 | return NULL((void *)0); |
| 387 | } |
| 388 | |
| 389 | static void radeon_get_native_mode(struct drm_connector *connector) |
| 390 | { |
| 391 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
| 392 | struct radeon_encoder *radeon_encoder; |
| 393 | |
| 394 | if (encoder == NULL((void *)0)) |
| 395 | return; |
| 396 | |
| 397 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 398 | |
| 399 | if (!list_empty(&connector->probed_modes)) { |
| 400 | struct drm_display_mode *preferred_mode = |
| 401 | list_first_entry(&connector->probed_modes,({ const __typeof( ((struct drm_display_mode *)0)->head ) * __mptr = ((&connector->probed_modes)->next); (struct drm_display_mode *)( (char *)__mptr - __builtin_offsetof(struct drm_display_mode, head) );}) |
| 402 | struct drm_display_mode, head)({ const __typeof( ((struct drm_display_mode *)0)->head ) * __mptr = ((&connector->probed_modes)->next); (struct drm_display_mode *)( (char *)__mptr - __builtin_offsetof(struct drm_display_mode, head) );}); |
| 403 | |
| 404 | radeon_encoder->native_mode = *preferred_mode; |
| 405 | } else { |
| 406 | radeon_encoder->native_mode.clock = 0; |
| 407 | } |
| 408 | } |
| 409 | |
| 410 | /* |
| 411 | * radeon_connector_analog_encoder_conflict_solve |
| 412 | * - search for other connectors sharing this encoder |
| 413 | * if priority is true, then set them disconnected if this is connected |
| 414 | * if priority is false, set us disconnected if they are connected |
| 415 | */ |
| 416 | static enum drm_connector_status |
| 417 | radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, |
| 418 | struct drm_encoder *encoder, |
| 419 | enum drm_connector_status current_status, |
| 420 | bool_Bool priority) |
| 421 | { |
| 422 | struct drm_device *dev = connector->dev; |
| 423 | struct drm_connector *conflict; |
| 424 | struct radeon_connector *radeon_conflict; |
| 425 | |
| 426 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head)for (conflict = ({ const __typeof( ((__typeof(*conflict) *)0) ->head ) *__mptr = ((&dev->mode_config.connector_list )->next); (__typeof(*conflict) *)( (char *)__mptr - __builtin_offsetof (__typeof(*conflict), head) );}); &conflict->head != ( &dev->mode_config.connector_list); conflict = ({ const __typeof( ((__typeof(*conflict) *)0)->head ) *__mptr = (conflict ->head.next); (__typeof(*conflict) *)( (char *)__mptr - __builtin_offsetof (__typeof(*conflict), head) );})) { |
| 427 | struct drm_encoder *enc; |
| 428 | |
| 429 | if (conflict == connector) |
| 430 | continue; |
| 431 | |
| 432 | radeon_conflict = to_radeon_connector(conflict)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (conflict); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 433 | |
| 434 | drm_connector_for_each_possible_encoder(conflict, enc)for ((enc) = ({ const __typeof( ((__typeof(*(enc)) *)0)->head ) *__mptr = ((&((conflict)->dev)->mode_config.encoder_list )->next); (__typeof(*(enc)) *)( (char *)__mptr - __builtin_offsetof (__typeof(*(enc)), head) );}); &(enc)->head != (&( (conflict)->dev)->mode_config.encoder_list); (enc) = ({ const __typeof( ((__typeof(*(enc)) *)0)->head ) *__mptr = ((enc)->head.next); (__typeof(*(enc)) *)( (char *)__mptr - __builtin_offsetof(__typeof(*(enc)), head) );})) if (!(((conflict )->possible_encoders) & drm_encoder_mask(enc))) {} else { |
| 435 | /* if the IDs match */ |
| 436 | if (enc == encoder) { |
| 437 | if (conflict->status != connector_status_connected) |
| 438 | continue; |
| 439 | |
| 440 | if (radeon_conflict->use_digital) |
| 441 | continue; |
| 442 | |
| 443 | if (priority) { |
| 444 | DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",__drm_dbg(DRM_UT_KMS, "1: conflicting encoders switching off %s\n" , conflict->name) |
| 445 | conflict->name)__drm_dbg(DRM_UT_KMS, "1: conflicting encoders switching off %s\n" , conflict->name); |
| 446 | DRM_DEBUG_KMS("in favor of %s\n",__drm_dbg(DRM_UT_KMS, "in favor of %s\n", connector->name) |
| 447 | connector->name)__drm_dbg(DRM_UT_KMS, "in favor of %s\n", connector->name); |
| 448 | conflict->status = connector_status_disconnected; |
| 449 | radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); |
| 450 | } else { |
| 451 | DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",__drm_dbg(DRM_UT_KMS, "2: conflicting encoders switching off %s\n" , connector->name) |
| 452 | connector->name)__drm_dbg(DRM_UT_KMS, "2: conflicting encoders switching off %s\n" , connector->name); |
| 453 | DRM_DEBUG_KMS("in favor of %s\n",__drm_dbg(DRM_UT_KMS, "in favor of %s\n", conflict->name) |
| 454 | conflict->name)__drm_dbg(DRM_UT_KMS, "in favor of %s\n", conflict->name); |
| 455 | current_status = connector_status_disconnected; |
| 456 | } |
| 457 | break; |
| 458 | } |
| 459 | } |
| 460 | } |
| 461 | return current_status; |
| 462 | |
| 463 | } |
| 464 | |
| 465 | static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) |
| 466 | { |
| 467 | struct drm_device *dev = encoder->dev; |
| 468 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 469 | struct drm_display_mode *mode = NULL((void *)0); |
| 470 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
| 471 | |
| 472 | if (native_mode->hdisplay != 0 && |
| 473 | native_mode->vdisplay != 0 && |
| 474 | native_mode->clock != 0) { |
| 475 | mode = drm_mode_duplicate(dev, native_mode); |
| 476 | mode->type = DRM_MODE_TYPE_PREFERRED(1<<3) | DRM_MODE_TYPE_DRIVER(1<<6); |
| 477 | drm_mode_set_name(mode); |
| 478 | |
| 479 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name)__drm_dbg(DRM_UT_KMS, "Adding native panel mode %s\n", mode-> name); |
| 480 | } else if (native_mode->hdisplay != 0 && |
| 481 | native_mode->vdisplay != 0) { |
| 482 | /* mac laptops without an edid */ |
| 483 | /* Note that this is not necessarily the exact panel mode, |
| 484 | * but an approximation based on the cvt formula. For these |
| 485 | * systems we should ideally read the mode info out of the |
| 486 | * registers or add a mode table, but this works and is much |
| 487 | * simpler. |
| 488 | */ |
| 489 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true1, false0, false0); |
| 490 | mode->type = DRM_MODE_TYPE_PREFERRED(1<<3) | DRM_MODE_TYPE_DRIVER(1<<6); |
| 491 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name)__drm_dbg(DRM_UT_KMS, "Adding cvt approximation of native panel mode %s\n" , mode->name); |
| 492 | } |
| 493 | return mode; |
| 494 | } |
| 495 | |
| 496 | static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) |
| 497 | { |
| 498 | struct drm_device *dev = encoder->dev; |
| 499 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 500 | struct drm_display_mode *mode = NULL((void *)0); |
| 501 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
| 502 | int i; |
| 503 | struct mode_size { |
| 504 | int w; |
| 505 | int h; |
| 506 | } common_modes[17] = { |
| 507 | { 640, 480}, |
| 508 | { 720, 480}, |
| 509 | { 800, 600}, |
| 510 | { 848, 480}, |
| 511 | {1024, 768}, |
| 512 | {1152, 768}, |
| 513 | {1280, 720}, |
| 514 | {1280, 800}, |
| 515 | {1280, 854}, |
| 516 | {1280, 960}, |
| 517 | {1280, 1024}, |
| 518 | {1440, 900}, |
| 519 | {1400, 1050}, |
| 520 | {1680, 1050}, |
| 521 | {1600, 1200}, |
| 522 | {1920, 1080}, |
| 523 | {1920, 1200} |
| 524 | }; |
| 525 | |
| 526 | for (i = 0; i < 17; i++) { |
| 527 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT((0x1L << 0x00000002 )))) { |
| 528 | if (common_modes[i].w > 1024 || |
| 529 | common_modes[i].h > 768) |
| 530 | continue; |
| 531 | } |
| 532 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT((0x1L << 0x00000001 ) | (0x1L << 0x00000005 )))) { |
| 533 | if (common_modes[i].w > native_mode->hdisplay || |
| 534 | common_modes[i].h > native_mode->vdisplay || |
| 535 | (common_modes[i].w == native_mode->hdisplay && |
| 536 | common_modes[i].h == native_mode->vdisplay)) |
| 537 | continue; |
| 538 | } |
| 539 | if (common_modes[i].w < 320 || common_modes[i].h < 200) |
| 540 | continue; |
| 541 | |
| 542 | mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false0, false0, false0); |
| 543 | drm_mode_probed_add(connector, mode); |
| 544 | } |
| 545 | } |
| 546 | |
| 547 | static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, |
| 548 | uint64_t val) |
| 549 | { |
| 550 | struct drm_device *dev = connector->dev; |
| 551 | struct radeon_device *rdev = dev->dev_private; |
| 552 | struct drm_encoder *encoder; |
| 553 | struct radeon_encoder *radeon_encoder; |
| 554 | |
| 555 | if (property == rdev->mode_info.coherent_mode_property) { |
| 556 | struct radeon_encoder_atom_dig *dig; |
| 557 | bool_Bool new_coherent_mode; |
| 558 | |
| 559 | /* need to find digital encoder on connector */ |
| 560 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS2); |
| 561 | if (!encoder) |
| 562 | return 0; |
| 563 | |
| 564 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 565 | |
| 566 | if (!radeon_encoder->enc_priv) |
| 567 | return 0; |
| 568 | |
| 569 | dig = radeon_encoder->enc_priv; |
| 570 | new_coherent_mode = val ? true1 : false0; |
| 571 | if (dig->coherent_mode != new_coherent_mode) { |
| 572 | dig->coherent_mode = new_coherent_mode; |
| 573 | radeon_property_change_mode(&radeon_encoder->base); |
| 574 | } |
| 575 | } |
| 576 | |
| 577 | if (property == rdev->mode_info.audio_property) { |
| 578 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 579 | /* need to find digital encoder on connector */ |
| 580 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS2); |
| 581 | if (!encoder) |
| 582 | return 0; |
| 583 | |
| 584 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 585 | |
| 586 | if (radeon_connector->audio != val) { |
| 587 | radeon_connector->audio = val; |
| 588 | radeon_property_change_mode(&radeon_encoder->base); |
| 589 | } |
| 590 | } |
| 591 | |
| 592 | if (property == rdev->mode_info.dither_property) { |
| 593 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 594 | /* need to find digital encoder on connector */ |
| 595 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS2); |
| 596 | if (!encoder) |
| 597 | return 0; |
| 598 | |
| 599 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 600 | |
| 601 | if (radeon_connector->dither != val) { |
| 602 | radeon_connector->dither = val; |
| 603 | radeon_property_change_mode(&radeon_encoder->base); |
| 604 | } |
| 605 | } |
| 606 | |
| 607 | if (property == rdev->mode_info.underscan_property) { |
| 608 | /* need to find digital encoder on connector */ |
| 609 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS2); |
| 610 | if (!encoder) |
| 611 | return 0; |
| 612 | |
| 613 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 614 | |
| 615 | if (radeon_encoder->underscan_type != val) { |
| 616 | radeon_encoder->underscan_type = val; |
| 617 | radeon_property_change_mode(&radeon_encoder->base); |
| 618 | } |
| 619 | } |
| 620 | |
| 621 | if (property == rdev->mode_info.underscan_hborder_property) { |
| 622 | /* need to find digital encoder on connector */ |
| 623 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS2); |
| 624 | if (!encoder) |
| 625 | return 0; |
| 626 | |
| 627 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 628 | |
| 629 | if (radeon_encoder->underscan_hborder != val) { |
| 630 | radeon_encoder->underscan_hborder = val; |
| 631 | radeon_property_change_mode(&radeon_encoder->base); |
| 632 | } |
| 633 | } |
| 634 | |
| 635 | if (property == rdev->mode_info.underscan_vborder_property) { |
| 636 | /* need to find digital encoder on connector */ |
| 637 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS2); |
| 638 | if (!encoder) |
| 639 | return 0; |
| 640 | |
| 641 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 642 | |
| 643 | if (radeon_encoder->underscan_vborder != val) { |
| 644 | radeon_encoder->underscan_vborder = val; |
| 645 | radeon_property_change_mode(&radeon_encoder->base); |
| 646 | } |
| 647 | } |
| 648 | |
| 649 | if (property == rdev->mode_info.tv_std_property) { |
| 650 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC4); |
| 651 | if (!encoder) { |
| 652 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC1); |
| 653 | } |
| 654 | |
| 655 | if (!encoder) |
| 656 | return 0; |
| 657 | |
| 658 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 659 | if (!radeon_encoder->enc_priv) |
| 660 | return 0; |
| 661 | if (ASIC_IS_AVIVO(rdev)((rdev->family >= CHIP_RS600)) || radeon_r4xx_atom) { |
| 662 | struct radeon_encoder_atom_dac *dac_int; |
| 663 | dac_int = radeon_encoder->enc_priv; |
| 664 | dac_int->tv_std = val; |
| 665 | } else { |
| 666 | struct radeon_encoder_tv_dac *dac_int; |
| 667 | dac_int = radeon_encoder->enc_priv; |
| 668 | dac_int->tv_std = val; |
| 669 | } |
| 670 | radeon_property_change_mode(&radeon_encoder->base); |
| 671 | } |
| 672 | |
| 673 | if (property == rdev->mode_info.load_detect_property) { |
| 674 | struct radeon_connector *radeon_connector = |
| 675 | to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 676 | |
| 677 | if (val == 0) |
| 678 | radeon_connector->dac_load_detect = false0; |
| 679 | else |
| 680 | radeon_connector->dac_load_detect = true1; |
| 681 | } |
| 682 | |
| 683 | if (property == rdev->mode_info.tmds_pll_property) { |
| 684 | struct radeon_encoder_int_tmds *tmds = NULL((void *)0); |
| 685 | bool_Bool ret = false0; |
| 686 | /* need to find digital encoder on connector */ |
| 687 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS2); |
| 688 | if (!encoder) |
| 689 | return 0; |
| 690 | |
| 691 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 692 | |
| 693 | tmds = radeon_encoder->enc_priv; |
| 694 | if (!tmds) |
| 695 | return 0; |
| 696 | |
| 697 | if (val == 0) { |
| 698 | if (rdev->is_atom_bios) |
| 699 | ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); |
| 700 | else |
| 701 | ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); |
| 702 | } |
| 703 | if (val == 1 || !ret) |
| 704 | radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); |
| 705 | |
| 706 | radeon_property_change_mode(&radeon_encoder->base); |
| 707 | } |
| 708 | |
| 709 | if (property == dev->mode_config.scaling_mode_property) { |
| 710 | enum radeon_rmx_type rmx_type; |
| 711 | |
| 712 | if (connector->encoder) |
| 713 | radeon_encoder = to_radeon_encoder(connector->encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (connector->encoder); (struct radeon_encoder *)( (char * )__mptr - __builtin_offsetof(struct radeon_encoder, base) );} ); |
| 714 | else { |
| 715 | const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; |
| 716 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector))({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (connector_funcs->best_encoder(connector)); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof(struct radeon_encoder , base) );}); |
| 717 | } |
| 718 | |
| 719 | switch (val) { |
| 720 | default: |
| 721 | case DRM_MODE_SCALE_NONE0: rmx_type = RMX_OFF; break; |
| 722 | case DRM_MODE_SCALE_CENTER2: rmx_type = RMX_CENTER; break; |
| 723 | case DRM_MODE_SCALE_ASPECT3: rmx_type = RMX_ASPECT; break; |
| 724 | case DRM_MODE_SCALE_FULLSCREEN1: rmx_type = RMX_FULL; break; |
| 725 | } |
| 726 | if (radeon_encoder->rmx_type == rmx_type) |
| 727 | return 0; |
| 728 | |
| 729 | if ((rmx_type != DRM_MODE_SCALE_NONE0) && |
| 730 | (radeon_encoder->native_mode.clock == 0)) |
| 731 | return 0; |
| 732 | |
| 733 | radeon_encoder->rmx_type = rmx_type; |
| 734 | |
| 735 | radeon_property_change_mode(&radeon_encoder->base); |
| 736 | } |
| 737 | |
| 738 | if (property == rdev->mode_info.output_csc_property) { |
| 739 | if (connector->encoder) |
| 740 | radeon_encoder = to_radeon_encoder(connector->encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (connector->encoder); (struct radeon_encoder *)( (char * )__mptr - __builtin_offsetof(struct radeon_encoder, base) );} ); |
| 741 | else { |
| 742 | const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; |
| 743 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector))({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (connector_funcs->best_encoder(connector)); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof(struct radeon_encoder , base) );}); |
| 744 | } |
| 745 | |
| 746 | if (radeon_encoder->output_csc == val) |
| 747 | return 0; |
| 748 | |
| 749 | radeon_encoder->output_csc = val; |
| 750 | |
| 751 | if (connector->encoder && connector->encoder->crtc) { |
| 752 | struct drm_crtc *crtc = connector->encoder->crtc; |
| 753 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc)({ const __typeof( ((struct radeon_crtc *)0)->base ) *__mptr = (crtc); (struct radeon_crtc *)( (char *)__mptr - __builtin_offsetof (struct radeon_crtc, base) );}); |
| 754 | |
| 755 | radeon_crtc->output_csc = radeon_encoder->output_csc; |
| 756 | |
| 757 | /* |
| 758 | * Our .gamma_set assumes the .gamma_store has been |
| 759 | * prefilled and don't care about its arguments. |
| 760 | */ |
| 761 | crtc->funcs->gamma_set(crtc, NULL((void *)0), NULL((void *)0), NULL((void *)0), 0, NULL((void *)0)); |
| 762 | } |
| 763 | } |
| 764 | |
| 765 | return 0; |
| 766 | } |
| 767 | |
| 768 | static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, |
| 769 | struct drm_connector *connector) |
| 770 | { |
| 771 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 772 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
| 773 | struct drm_display_mode *t, *mode; |
| 774 | |
| 775 | /* If the EDID preferred mode doesn't match the native mode, use it */ |
| 776 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head)for (mode = ({ const __typeof( ((__typeof(*mode) *)0)->head ) *__mptr = ((&connector->probed_modes)->next); (__typeof (*mode) *)( (char *)__mptr - __builtin_offsetof(__typeof(*mode ), head) );}), t = ({ const __typeof( ((__typeof(*mode) *)0)-> head ) *__mptr = (mode->head.next); (__typeof(*mode) *)( ( char *)__mptr - __builtin_offsetof(__typeof(*mode), head) );} ); &mode->head != (&connector->probed_modes); mode = t, t = ({ const __typeof( ((__typeof(*t) *)0)->head ) * __mptr = (t->head.next); (__typeof(*t) *)( (char *)__mptr - __builtin_offsetof(__typeof(*t), head) );})) { |
| 777 | if (mode->type & DRM_MODE_TYPE_PREFERRED(1<<3)) { |
| 778 | if (mode->hdisplay != native_mode->hdisplay || |
| 779 | mode->vdisplay != native_mode->vdisplay) |
| 780 | memcpy(native_mode, mode, sizeof(*mode))__builtin_memcpy((native_mode), (mode), (sizeof(*mode))); |
| 781 | } |
| 782 | } |
| 783 | |
| 784 | /* Try to get native mode details from EDID if necessary */ |
| 785 | if (!native_mode->clock) { |
| 786 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head)for (mode = ({ const __typeof( ((__typeof(*mode) *)0)->head ) *__mptr = ((&connector->probed_modes)->next); (__typeof (*mode) *)( (char *)__mptr - __builtin_offsetof(__typeof(*mode ), head) );}), t = ({ const __typeof( ((__typeof(*mode) *)0)-> head ) *__mptr = (mode->head.next); (__typeof(*mode) *)( ( char *)__mptr - __builtin_offsetof(__typeof(*mode), head) );} ); &mode->head != (&connector->probed_modes); mode = t, t = ({ const __typeof( ((__typeof(*t) *)0)->head ) * __mptr = (t->head.next); (__typeof(*t) *)( (char *)__mptr - __builtin_offsetof(__typeof(*t), head) );})) { |
| 787 | if (mode->hdisplay == native_mode->hdisplay && |
| 788 | mode->vdisplay == native_mode->vdisplay) { |
| 789 | *native_mode = *mode; |
| 790 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V(1 << 0)); |
| 791 | DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n")__drm_dbg(DRM_UT_KMS, "Determined LVDS native mode details from EDID\n" ); |
| 792 | break; |
| 793 | } |
| 794 | } |
| 795 | } |
| 796 | |
| 797 | if (!native_mode->clock) { |
| 798 | DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n")__drm_dbg(DRM_UT_KMS, "No LVDS native mode details, disabling RMX\n" ); |
| 799 | radeon_encoder->rmx_type = RMX_OFF; |
| 800 | } |
| 801 | } |
| 802 | |
| 803 | static int radeon_lvds_get_modes(struct drm_connector *connector) |
| 804 | { |
| 805 | struct drm_encoder *encoder; |
| 806 | int ret = 0; |
| 807 | struct drm_display_mode *mode; |
| 808 | |
| 809 | radeon_connector_get_edid(connector); |
| 810 | ret = radeon_ddc_get_modes(connector); |
| 811 | if (ret > 0) { |
| 812 | encoder = radeon_best_single_encoder(connector); |
| 813 | if (encoder) { |
| 814 | radeon_fixup_lvds_native_mode(encoder, connector); |
| 815 | /* add scaled modes */ |
| 816 | radeon_add_common_modes(encoder, connector); |
| 817 | } |
| 818 | return ret; |
| 819 | } |
| 820 | |
| 821 | encoder = radeon_best_single_encoder(connector); |
| 822 | if (!encoder) |
| 823 | return 0; |
| 824 | |
| 825 | /* we have no EDID modes */ |
| 826 | mode = radeon_fp_native_mode(encoder); |
| 827 | if (mode) { |
| 828 | ret = 1; |
| 829 | drm_mode_probed_add(connector, mode); |
| 830 | /* add the width/height from vbios tables if available */ |
| 831 | connector->display_info.width_mm = mode->width_mm; |
| 832 | connector->display_info.height_mm = mode->height_mm; |
| 833 | /* add scaled modes */ |
| 834 | radeon_add_common_modes(encoder, connector); |
| 835 | } |
| 836 | |
| 837 | return ret; |
| 838 | } |
| 839 | |
| 840 | static enum drm_mode_status radeon_lvds_mode_valid(struct drm_connector *connector, |
| 841 | struct drm_display_mode *mode) |
| 842 | { |
| 843 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
| 844 | |
| 845 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) |
| 846 | return MODE_PANEL; |
| 847 | |
| 848 | if (encoder) { |
| 849 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 850 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
| 851 | |
| 852 | /* AVIVO hardware supports downscaling modes larger than the panel |
| 853 | * to the panel size, but I'm not sure this is desirable. |
| 854 | */ |
| 855 | if ((mode->hdisplay > native_mode->hdisplay) || |
| 856 | (mode->vdisplay > native_mode->vdisplay)) |
| 857 | return MODE_PANEL; |
| 858 | |
| 859 | /* if scaling is disabled, block non-native modes */ |
| 860 | if (radeon_encoder->rmx_type == RMX_OFF) { |
| 861 | if ((mode->hdisplay != native_mode->hdisplay) || |
| 862 | (mode->vdisplay != native_mode->vdisplay)) |
| 863 | return MODE_PANEL; |
| 864 | } |
| 865 | } |
| 866 | |
| 867 | return MODE_OK; |
| 868 | } |
| 869 | |
| 870 | static enum drm_connector_status |
| 871 | radeon_lvds_detect(struct drm_connector *connector, bool_Bool force) |
| 872 | { |
| 873 | struct drm_device *dev = connector->dev; |
| 874 | struct radeon_device *rdev = dev->dev_private; |
| 875 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 876 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
| 877 | enum drm_connector_status ret = connector_status_disconnected; |
| 878 | int r; |
| 879 | |
| 880 | if (!drm_kms_helper_is_poll_worker()) { |
| 881 | r = pm_runtime_get_sync(connector->dev->dev); |
| 882 | if (r < 0) { |
| 883 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 884 | return connector_status_disconnected; |
| 885 | } |
| 886 | } |
| 887 | |
| 888 | if (encoder) { |
| 889 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 890 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
| 891 | |
| 892 | /* check if panel is valid */ |
| 893 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
| 894 | ret = connector_status_connected; |
| 895 | /* don't fetch the edid from the vbios if ddc fails and runpm is |
| 896 | * enabled so we report disconnected. |
| 897 | */ |
| 898 | if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0)) |
| 899 | ret = connector_status_disconnected; |
| 900 | } |
| 901 | |
| 902 | /* check for edid as well */ |
| 903 | radeon_connector_get_edid(connector); |
| 904 | if (radeon_connector->edid) |
| 905 | ret = connector_status_connected; |
| 906 | /* check acpi lid status ??? */ |
| 907 | |
| 908 | radeon_connector_update_scratch_regs(connector, ret); |
| 909 | |
| 910 | if (!drm_kms_helper_is_poll_worker()) { |
| 911 | pm_runtime_mark_last_busy(connector->dev->dev); |
| 912 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 913 | } |
| 914 | |
| 915 | return ret; |
| 916 | } |
| 917 | |
| 918 | static void radeon_connector_unregister(struct drm_connector *connector) |
| 919 | { |
| 920 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 921 | |
| 922 | if (radeon_connector->ddc_bus && radeon_connector->ddc_bus->has_aux) { |
| 923 | drm_dp_aux_unregister(&radeon_connector->ddc_bus->aux); |
| 924 | radeon_connector->ddc_bus->has_aux = false0; |
| 925 | } |
| 926 | } |
| 927 | |
| 928 | static void radeon_connector_destroy(struct drm_connector *connector) |
| 929 | { |
| 930 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 931 | |
| 932 | radeon_connector_free_edid(connector); |
| 933 | kfree(radeon_connector->con_priv); |
| 934 | drm_connector_unregister(connector); |
| 935 | drm_connector_cleanup(connector); |
| 936 | kfree(connector); |
| 937 | } |
| 938 | |
| 939 | static int radeon_lvds_set_property(struct drm_connector *connector, |
| 940 | struct drm_property *property, |
| 941 | uint64_t value) |
| 942 | { |
| 943 | struct drm_device *dev = connector->dev; |
| 944 | struct radeon_encoder *radeon_encoder; |
| 945 | enum radeon_rmx_type rmx_type; |
| 946 | |
| 947 | DRM_DEBUG_KMS("\n")__drm_dbg(DRM_UT_KMS, "\n"); |
| 948 | if (property != dev->mode_config.scaling_mode_property) |
| 949 | return 0; |
| 950 | |
| 951 | if (connector->encoder) |
| 952 | radeon_encoder = to_radeon_encoder(connector->encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (connector->encoder); (struct radeon_encoder *)( (char * )__mptr - __builtin_offsetof(struct radeon_encoder, base) );} ); |
| 953 | else { |
| 954 | const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; |
| 955 | radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector))({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (connector_funcs->best_encoder(connector)); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof(struct radeon_encoder , base) );}); |
| 956 | } |
| 957 | |
| 958 | switch (value) { |
| 959 | case DRM_MODE_SCALE_NONE0: rmx_type = RMX_OFF; break; |
| 960 | case DRM_MODE_SCALE_CENTER2: rmx_type = RMX_CENTER; break; |
| 961 | case DRM_MODE_SCALE_ASPECT3: rmx_type = RMX_ASPECT; break; |
| 962 | default: |
| 963 | case DRM_MODE_SCALE_FULLSCREEN1: rmx_type = RMX_FULL; break; |
| 964 | } |
| 965 | if (radeon_encoder->rmx_type == rmx_type) |
| 966 | return 0; |
| 967 | |
| 968 | radeon_encoder->rmx_type = rmx_type; |
| 969 | |
| 970 | radeon_property_change_mode(&radeon_encoder->base); |
| 971 | return 0; |
| 972 | } |
| 973 | |
| 974 | |
| 975 | static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { |
| 976 | .get_modes = radeon_lvds_get_modes, |
| 977 | .mode_valid = radeon_lvds_mode_valid, |
| 978 | .best_encoder = radeon_best_single_encoder, |
| 979 | }; |
| 980 | |
| 981 | static const struct drm_connector_funcs radeon_lvds_connector_funcs = { |
| 982 | .dpms = drm_helper_connector_dpms, |
| 983 | .detect = radeon_lvds_detect, |
| 984 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 985 | .early_unregister = radeon_connector_unregister, |
| 986 | .destroy = radeon_connector_destroy, |
| 987 | .set_property = radeon_lvds_set_property, |
| 988 | }; |
| 989 | |
| 990 | static int radeon_vga_get_modes(struct drm_connector *connector) |
| 991 | { |
| 992 | int ret; |
| 993 | |
| 994 | radeon_connector_get_edid(connector); |
| 995 | ret = radeon_ddc_get_modes(connector); |
| 996 | |
| 997 | radeon_get_native_mode(connector); |
| 998 | |
| 999 | return ret; |
| 1000 | } |
| 1001 | |
| 1002 | static enum drm_mode_status radeon_vga_mode_valid(struct drm_connector *connector, |
| 1003 | struct drm_display_mode *mode) |
| 1004 | { |
| 1005 | struct drm_device *dev = connector->dev; |
| 1006 | struct radeon_device *rdev = dev->dev_private; |
| 1007 | |
| 1008 | /* XXX check mode bandwidth */ |
| 1009 | |
| 1010 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) |
| 1011 | return MODE_CLOCK_HIGH; |
| 1012 | |
| 1013 | return MODE_OK; |
| 1014 | } |
| 1015 | |
| 1016 | static enum drm_connector_status |
| 1017 | radeon_vga_detect(struct drm_connector *connector, bool_Bool force) |
| 1018 | { |
| 1019 | struct drm_device *dev = connector->dev; |
| 1020 | struct radeon_device *rdev = dev->dev_private; |
| 1021 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1022 | struct drm_encoder *encoder; |
| 1023 | const struct drm_encoder_helper_funcs *encoder_funcs; |
| 1024 | bool_Bool dret = false0; |
| 1025 | enum drm_connector_status ret = connector_status_disconnected; |
| 1026 | int r; |
| 1027 | |
| 1028 | if (!drm_kms_helper_is_poll_worker()) { |
| 1029 | r = pm_runtime_get_sync(connector->dev->dev); |
| 1030 | if (r < 0) { |
| 1031 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 1032 | return connector_status_disconnected; |
| 1033 | } |
| 1034 | } |
| 1035 | |
| 1036 | encoder = radeon_best_single_encoder(connector); |
| 1037 | if (!encoder) |
| 1038 | ret = connector_status_disconnected; |
| 1039 | |
| 1040 | if (radeon_connector->ddc_bus) |
| 1041 | dret = radeon_ddc_probe(radeon_connector, false0); |
| 1042 | if (dret) { |
| 1043 | radeon_connector->detected_by_load = false0; |
| 1044 | radeon_connector_free_edid(connector); |
| 1045 | radeon_connector_get_edid(connector); |
| 1046 | |
| 1047 | if (!radeon_connector->edid) { |
| 1048 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",__drm_err("%s: probed a monitor but no|invalid EDID\n", connector ->name) |
| 1049 | connector->name)__drm_err("%s: probed a monitor but no|invalid EDID\n", connector ->name); |
| 1050 | ret = connector_status_connected; |
| 1051 | } else { |
| 1052 | radeon_connector->use_digital = |
| 1053 | !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL(1 << 7)); |
| 1054 | |
| 1055 | /* some oems have boards with separate digital and analog connectors |
| 1056 | * with a shared ddc line (often vga + hdmi) |
| 1057 | */ |
| 1058 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { |
| 1059 | radeon_connector_free_edid(connector); |
| 1060 | ret = connector_status_disconnected; |
| 1061 | } else { |
| 1062 | ret = connector_status_connected; |
| 1063 | } |
| 1064 | } |
| 1065 | } else { |
| 1066 | |
| 1067 | /* if we aren't forcing don't do destructive polling */ |
| 1068 | if (!force) { |
| 1069 | /* only return the previous status if we last |
| 1070 | * detected a monitor via load. |
| 1071 | */ |
| 1072 | if (radeon_connector->detected_by_load) |
| 1073 | ret = connector->status; |
| 1074 | goto out; |
| 1075 | } |
| 1076 | |
| 1077 | if (radeon_connector->dac_load_detect && encoder) { |
| 1078 | encoder_funcs = encoder->helper_private; |
| 1079 | ret = encoder_funcs->detect(encoder, connector); |
| 1080 | if (ret != connector_status_disconnected) |
| 1081 | radeon_connector->detected_by_load = true1; |
| 1082 | } |
| 1083 | } |
| 1084 | |
| 1085 | if (ret == connector_status_connected) |
| 1086 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true1); |
| 1087 | |
| 1088 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
| 1089 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor |
| 1090 | * by other means, assume the CRT is connected and use that EDID. |
| 1091 | */ |
| 1092 | if ((!rdev->is_atom_bios) && |
| 1093 | (ret == connector_status_disconnected) && |
| 1094 | rdev->mode_info.bios_hardcoded_edid_size) { |
| 1095 | ret = connector_status_connected; |
| 1096 | } |
| 1097 | |
| 1098 | radeon_connector_update_scratch_regs(connector, ret); |
| 1099 | |
| 1100 | out: |
| 1101 | if (!drm_kms_helper_is_poll_worker()) { |
| 1102 | pm_runtime_mark_last_busy(connector->dev->dev); |
| 1103 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 1104 | } |
| 1105 | |
| 1106 | return ret; |
| 1107 | } |
| 1108 | |
| 1109 | static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { |
| 1110 | .get_modes = radeon_vga_get_modes, |
| 1111 | .mode_valid = radeon_vga_mode_valid, |
| 1112 | .best_encoder = radeon_best_single_encoder, |
| 1113 | }; |
| 1114 | |
| 1115 | static const struct drm_connector_funcs radeon_vga_connector_funcs = { |
| 1116 | .dpms = drm_helper_connector_dpms, |
| 1117 | .detect = radeon_vga_detect, |
| 1118 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 1119 | .early_unregister = radeon_connector_unregister, |
| 1120 | .destroy = radeon_connector_destroy, |
| 1121 | .set_property = radeon_connector_set_property, |
| 1122 | }; |
| 1123 | |
| 1124 | static int radeon_tv_get_modes(struct drm_connector *connector) |
| 1125 | { |
| 1126 | struct drm_device *dev = connector->dev; |
| 1127 | struct radeon_device *rdev = dev->dev_private; |
| 1128 | struct drm_display_mode *tv_mode; |
| 1129 | struct drm_encoder *encoder; |
| 1130 | |
| 1131 | encoder = radeon_best_single_encoder(connector); |
| 1132 | if (!encoder) |
| 1133 | return 0; |
| 1134 | |
| 1135 | /* avivo chips can scale any mode */ |
| 1136 | if (rdev->family >= CHIP_RS600) |
| 1137 | /* add scaled modes */ |
| 1138 | radeon_add_common_modes(encoder, connector); |
| 1139 | else { |
| 1140 | /* only 800x600 is supported right now on pre-avivo chips */ |
| 1141 | tv_mode = drm_cvt_mode(dev, 800, 600, 60, false0, false0, false0); |
| 1142 | tv_mode->type = DRM_MODE_TYPE_DRIVER(1<<6) | DRM_MODE_TYPE_PREFERRED(1<<3); |
| 1143 | drm_mode_probed_add(connector, tv_mode); |
| 1144 | } |
| 1145 | return 1; |
| 1146 | } |
| 1147 | |
| 1148 | static enum drm_mode_status radeon_tv_mode_valid(struct drm_connector *connector, |
| 1149 | struct drm_display_mode *mode) |
| 1150 | { |
| 1151 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) |
| 1152 | return MODE_CLOCK_RANGE; |
| 1153 | return MODE_OK; |
| 1154 | } |
| 1155 | |
| 1156 | static enum drm_connector_status |
| 1157 | radeon_tv_detect(struct drm_connector *connector, bool_Bool force) |
| 1158 | { |
| 1159 | struct drm_encoder *encoder; |
| 1160 | const struct drm_encoder_helper_funcs *encoder_funcs; |
| 1161 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1162 | enum drm_connector_status ret = connector_status_disconnected; |
| 1163 | int r; |
| 1164 | |
| 1165 | if (!radeon_connector->dac_load_detect) |
| 1166 | return ret; |
| 1167 | |
| 1168 | if (!drm_kms_helper_is_poll_worker()) { |
| 1169 | r = pm_runtime_get_sync(connector->dev->dev); |
| 1170 | if (r < 0) { |
| 1171 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 1172 | return connector_status_disconnected; |
| 1173 | } |
| 1174 | } |
| 1175 | |
| 1176 | encoder = radeon_best_single_encoder(connector); |
| 1177 | if (!encoder) |
| 1178 | ret = connector_status_disconnected; |
| 1179 | else { |
| 1180 | encoder_funcs = encoder->helper_private; |
| 1181 | ret = encoder_funcs->detect(encoder, connector); |
| 1182 | } |
| 1183 | if (ret == connector_status_connected) |
| 1184 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false0); |
| 1185 | radeon_connector_update_scratch_regs(connector, ret); |
| 1186 | |
| 1187 | if (!drm_kms_helper_is_poll_worker()) { |
| 1188 | pm_runtime_mark_last_busy(connector->dev->dev); |
| 1189 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 1190 | } |
| 1191 | |
| 1192 | return ret; |
| 1193 | } |
| 1194 | |
| 1195 | static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { |
| 1196 | .get_modes = radeon_tv_get_modes, |
| 1197 | .mode_valid = radeon_tv_mode_valid, |
| 1198 | .best_encoder = radeon_best_single_encoder, |
| 1199 | }; |
| 1200 | |
| 1201 | static const struct drm_connector_funcs radeon_tv_connector_funcs = { |
| 1202 | .dpms = drm_helper_connector_dpms, |
| 1203 | .detect = radeon_tv_detect, |
| 1204 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 1205 | .early_unregister = radeon_connector_unregister, |
| 1206 | .destroy = radeon_connector_destroy, |
| 1207 | .set_property = radeon_connector_set_property, |
| 1208 | }; |
| 1209 | |
| 1210 | static bool_Bool radeon_check_hpd_status_unchanged(struct drm_connector *connector) |
| 1211 | { |
| 1212 | struct drm_device *dev = connector->dev; |
| 1213 | struct radeon_device *rdev = dev->dev_private; |
| 1214 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1215 | enum drm_connector_status status; |
| 1216 | |
| 1217 | /* We only trust HPD on R600 and newer ASICS. */ |
| 1218 | if (rdev->family >= CHIP_R600 |
| 1219 | && radeon_connector->hpd.hpd != RADEON_HPD_NONE) { |
| 1220 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)(rdev)->asic->hpd.sense((rdev), (radeon_connector->hpd .hpd))) |
| 1221 | status = connector_status_connected; |
| 1222 | else |
| 1223 | status = connector_status_disconnected; |
| 1224 | if (connector->status == status) |
| 1225 | return true1; |
| 1226 | } |
| 1227 | |
| 1228 | return false0; |
| 1229 | } |
| 1230 | |
| 1231 | /* |
| 1232 | * DVI is complicated |
| 1233 | * Do a DDC probe, if DDC probe passes, get the full EDID so |
| 1234 | * we can do analog/digital monitor detection at this point. |
| 1235 | * If the monitor is an analog monitor or we got no DDC, |
| 1236 | * we need to find the DAC encoder object for this connector. |
| 1237 | * If we got no DDC, we do load detection on the DAC encoder object. |
| 1238 | * If we got analog DDC or load detection passes on the DAC encoder |
| 1239 | * we have to check if this analog encoder is shared with anyone else (TV) |
| 1240 | * if its shared we have to set the other connector to disconnected. |
| 1241 | */ |
| 1242 | static enum drm_connector_status |
| 1243 | radeon_dvi_detect(struct drm_connector *connector, bool_Bool force) |
| 1244 | { |
| 1245 | struct drm_device *dev = connector->dev; |
| 1246 | struct radeon_device *rdev = dev->dev_private; |
| 1247 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1248 | struct drm_encoder *encoder = NULL((void *)0); |
| 1249 | const struct drm_encoder_helper_funcs *encoder_funcs; |
| 1250 | int r; |
| 1251 | enum drm_connector_status ret = connector_status_disconnected; |
| 1252 | bool_Bool dret = false0, broken_edid = false0; |
| 1253 | |
| 1254 | if (!drm_kms_helper_is_poll_worker()) { |
| 1255 | r = pm_runtime_get_sync(connector->dev->dev); |
| 1256 | if (r < 0) { |
| 1257 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 1258 | return connector_status_disconnected; |
| 1259 | } |
| 1260 | } |
| 1261 | |
| 1262 | if (radeon_connector->detected_hpd_without_ddc) { |
| 1263 | force = true1; |
| 1264 | radeon_connector->detected_hpd_without_ddc = false0; |
| 1265 | } |
| 1266 | |
| 1267 | if (!force && radeon_check_hpd_status_unchanged(connector)) { |
| 1268 | ret = connector->status; |
| 1269 | goto exit; |
| 1270 | } |
| 1271 | |
| 1272 | if (radeon_connector->ddc_bus) { |
| 1273 | dret = radeon_ddc_probe(radeon_connector, false0); |
| 1274 | |
| 1275 | /* Sometimes the pins required for the DDC probe on DVI |
| 1276 | * connectors don't make contact at the same time that the ones |
| 1277 | * for HPD do. If the DDC probe fails even though we had an HPD |
| 1278 | * signal, try again later */ |
| 1279 | if (!dret && !force && |
| 1280 | connector->status != connector_status_connected) { |
| 1281 | DRM_DEBUG_KMS("hpd detected without ddc, retrying in 1 second\n")__drm_dbg(DRM_UT_KMS, "hpd detected without ddc, retrying in 1 second\n" ); |
| 1282 | radeon_connector->detected_hpd_without_ddc = true1; |
| 1283 | schedule_delayed_work(&rdev->hotplug_work, |
| 1284 | msecs_to_jiffies(1000)(((uint64_t)(1000)) * hz / 1000)); |
| 1285 | goto exit; |
| 1286 | } |
| 1287 | } |
| 1288 | if (dret) { |
| 1289 | radeon_connector->detected_by_load = false0; |
| 1290 | radeon_connector_free_edid(connector); |
| 1291 | radeon_connector_get_edid(connector); |
| 1292 | |
| 1293 | if (!radeon_connector->edid) { |
| 1294 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",__drm_err("%s: probed a monitor but no|invalid EDID\n", connector ->name) |
| 1295 | connector->name)__drm_err("%s: probed a monitor but no|invalid EDID\n", connector ->name); |
| 1296 | /* rs690 seems to have a problem with connectors not existing and always |
| 1297 | * return a block of 0's. If we see this just stop polling on this output */ |
| 1298 | if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && |
| 1299 | radeon_connector->base.null_edid_counter) { |
| 1300 | ret = connector_status_disconnected; |
| 1301 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",__drm_err("%s: detected RS690 floating bus bug, stopping ddc detect\n" , connector->name) |
| 1302 | connector->name)__drm_err("%s: detected RS690 floating bus bug, stopping ddc detect\n" , connector->name); |
| 1303 | radeon_connector->ddc_bus = NULL((void *)0); |
| 1304 | } else { |
| 1305 | ret = connector_status_connected; |
| 1306 | broken_edid = true1; /* defer use_digital to later */ |
| 1307 | } |
| 1308 | } else { |
| 1309 | radeon_connector->use_digital = |
| 1310 | !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL(1 << 7)); |
| 1311 | |
| 1312 | /* some oems have boards with separate digital and analog connectors |
| 1313 | * with a shared ddc line (often vga + hdmi) |
| 1314 | */ |
| 1315 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { |
| 1316 | radeon_connector_free_edid(connector); |
| 1317 | ret = connector_status_disconnected; |
| 1318 | } else { |
| 1319 | ret = connector_status_connected; |
| 1320 | } |
| 1321 | /* This gets complicated. We have boards with VGA + HDMI with a |
| 1322 | * shared DDC line and we have boards with DVI-D + HDMI with a shared |
| 1323 | * DDC line. The latter is more complex because with DVI<->HDMI adapters |
| 1324 | * you don't really know what's connected to which port as both are digital. |
| 1325 | */ |
| 1326 | if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { |
| 1327 | struct drm_connector *list_connector; |
| 1328 | struct radeon_connector *list_radeon_connector; |
| 1329 | list_for_each_entry(list_connector, &dev->mode_config.connector_list, head)for (list_connector = ({ const __typeof( ((__typeof(*list_connector ) *)0)->head ) *__mptr = ((&dev->mode_config.connector_list )->next); (__typeof(*list_connector) *)( (char *)__mptr - __builtin_offsetof (__typeof(*list_connector), head) );}); &list_connector-> head != (&dev->mode_config.connector_list); list_connector = ({ const __typeof( ((__typeof(*list_connector) *)0)->head ) *__mptr = (list_connector->head.next); (__typeof(*list_connector ) *)( (char *)__mptr - __builtin_offsetof(__typeof(*list_connector ), head) );})) { |
| 1330 | if (connector == list_connector) |
| 1331 | continue; |
| 1332 | list_radeon_connector = to_radeon_connector(list_connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (list_connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1333 | if (list_radeon_connector->shared_ddc && |
| 1334 | (list_radeon_connector->ddc_bus->rec.i2c_id == |
| 1335 | radeon_connector->ddc_bus->rec.i2c_id)) { |
| 1336 | /* cases where both connectors are digital */ |
| 1337 | if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA1) { |
| 1338 | /* hpd is our only option in this case */ |
| 1339 | if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)(rdev)->asic->hpd.sense((rdev), (radeon_connector->hpd .hpd))) { |
| 1340 | radeon_connector_free_edid(connector); |
| 1341 | ret = connector_status_disconnected; |
| 1342 | } |
| 1343 | } |
| 1344 | } |
| 1345 | } |
| 1346 | } |
| 1347 | } |
| 1348 | } |
| 1349 | |
| 1350 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == true1)) |
| 1351 | goto out; |
| 1352 | |
| 1353 | /* DVI-D and HDMI-A are digital only */ |
| 1354 | if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID3) || |
| 1355 | (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA11)) |
| 1356 | goto out; |
| 1357 | |
| 1358 | /* if we aren't forcing don't do destructive polling */ |
| 1359 | if (!force) { |
| 1360 | /* only return the previous status if we last |
| 1361 | * detected a monitor via load. |
| 1362 | */ |
| 1363 | if (radeon_connector->detected_by_load) |
| 1364 | ret = connector->status; |
| 1365 | goto out; |
| 1366 | } |
| 1367 | |
| 1368 | /* find analog encoder */ |
| 1369 | if (radeon_connector->dac_load_detect) { |
| 1370 | drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *) 0)->head ) *__mptr = ((&((connector)->dev)->mode_config .encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof(*(encoder)), head) );}); & (encoder)->head != (&((connector)->dev)->mode_config .encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder )) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof (*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof (*(encoder)), head) );})) if (!(((connector)->possible_encoders ) & drm_encoder_mask(encoder))) {} else { |
| 1371 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC1 && |
| 1372 | encoder->encoder_type != DRM_MODE_ENCODER_TVDAC4) |
| 1373 | continue; |
| 1374 | |
| 1375 | encoder_funcs = encoder->helper_private; |
| 1376 | if (encoder_funcs->detect) { |
| 1377 | if (!broken_edid) { |
| 1378 | if (ret != connector_status_connected) { |
| 1379 | /* deal with analog monitors without DDC */ |
| 1380 | ret = encoder_funcs->detect(encoder, connector); |
| 1381 | if (ret == connector_status_connected) { |
| 1382 | radeon_connector->use_digital = false0; |
| 1383 | } |
| 1384 | if (ret != connector_status_disconnected) |
| 1385 | radeon_connector->detected_by_load = true1; |
| 1386 | } |
| 1387 | } else { |
| 1388 | enum drm_connector_status lret; |
| 1389 | /* assume digital unless load detected otherwise */ |
| 1390 | radeon_connector->use_digital = true1; |
| 1391 | lret = encoder_funcs->detect(encoder, connector); |
| 1392 | DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret)__drm_dbg(DRM_UT_KMS, "load_detect %x returned: %x\n",encoder ->encoder_type,lret); |
| 1393 | if (lret == connector_status_connected) |
| 1394 | radeon_connector->use_digital = false0; |
| 1395 | } |
| 1396 | break; |
| 1397 | } |
| 1398 | } |
| 1399 | } |
| 1400 | |
| 1401 | if ((ret == connector_status_connected) && (radeon_connector->use_digital == false0) && |
| 1402 | encoder) { |
| 1403 | ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true1); |
| 1404 | } |
| 1405 | |
| 1406 | /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the |
| 1407 | * vbios to deal with KVMs. If we have one and are not able to detect a monitor |
| 1408 | * by other means, assume the DFP is connected and use that EDID. In most |
| 1409 | * cases the DVI port is actually a virtual KVM port connected to the service |
| 1410 | * processor. |
| 1411 | */ |
| 1412 | out: |
| 1413 | if ((!rdev->is_atom_bios) && |
| 1414 | (ret == connector_status_disconnected) && |
| 1415 | rdev->mode_info.bios_hardcoded_edid_size) { |
| 1416 | radeon_connector->use_digital = true1; |
| 1417 | ret = connector_status_connected; |
| 1418 | } |
| 1419 | |
| 1420 | /* updated in get modes as well since we need to know if it's analog or digital */ |
| 1421 | radeon_connector_update_scratch_regs(connector, ret); |
| 1422 | |
| 1423 | if ((radeon_audio != 0) && radeon_connector->use_digital) { |
| 1424 | const struct drm_connector_helper_funcs *connector_funcs = |
| 1425 | connector->helper_private; |
| 1426 | |
| 1427 | encoder = connector_funcs->best_encoder(connector); |
| 1428 | if (encoder && (encoder->encoder_type == DRM_MODE_ENCODER_TMDS2)) { |
| 1429 | radeon_connector_get_edid(connector); |
| 1430 | radeon_audio_detect(connector, encoder, ret); |
| 1431 | } |
| 1432 | } |
| 1433 | |
| 1434 | exit: |
| 1435 | if (!drm_kms_helper_is_poll_worker()) { |
| 1436 | pm_runtime_mark_last_busy(connector->dev->dev); |
| 1437 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 1438 | } |
| 1439 | |
| 1440 | return ret; |
| 1441 | } |
| 1442 | |
| 1443 | /* okay need to be smart in here about which encoder to pick */ |
| 1444 | static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) |
| 1445 | { |
| 1446 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1447 | struct drm_encoder *encoder; |
| 1448 | |
| 1449 | drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *) 0)->head ) *__mptr = ((&((connector)->dev)->mode_config .encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof(*(encoder)), head) );}); & (encoder)->head != (&((connector)->dev)->mode_config .encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder )) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof (*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof (*(encoder)), head) );})) if (!(((connector)->possible_encoders ) & drm_encoder_mask(encoder))) {} else { |
| 1450 | if (radeon_connector->use_digital == true1) { |
| 1451 | if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS2) |
| 1452 | return encoder; |
| 1453 | } else { |
| 1454 | if (encoder->encoder_type == DRM_MODE_ENCODER_DAC1 || |
| 1455 | encoder->encoder_type == DRM_MODE_ENCODER_TVDAC4) |
| 1456 | return encoder; |
| 1457 | } |
| 1458 | } |
| 1459 | |
| 1460 | /* see if we have a default encoder TODO */ |
| 1461 | |
| 1462 | /* then check use digitial */ |
| 1463 | /* pick the first one */ |
| 1464 | drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *) 0)->head ) *__mptr = ((&((connector)->dev)->mode_config .encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof(*(encoder)), head) );}); & (encoder)->head != (&((connector)->dev)->mode_config .encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder )) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof (*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof (*(encoder)), head) );})) if (!(((connector)->possible_encoders ) & drm_encoder_mask(encoder))) {} else |
| 1465 | return encoder; |
| 1466 | |
| 1467 | return NULL((void *)0); |
| 1468 | } |
| 1469 | |
| 1470 | static void radeon_dvi_force(struct drm_connector *connector) |
| 1471 | { |
| 1472 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1473 | if (connector->force == DRM_FORCE_ON) |
| 1474 | radeon_connector->use_digital = false0; |
| 1475 | if (connector->force == DRM_FORCE_ON_DIGITAL) |
| 1476 | radeon_connector->use_digital = true1; |
| 1477 | } |
| 1478 | |
| 1479 | static enum drm_mode_status radeon_dvi_mode_valid(struct drm_connector *connector, |
| 1480 | struct drm_display_mode *mode) |
| 1481 | { |
| 1482 | struct drm_device *dev = connector->dev; |
| 1483 | struct radeon_device *rdev = dev->dev_private; |
| 1484 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1485 | |
| 1486 | /* XXX check mode bandwidth */ |
| 1487 | |
| 1488 | /* clocks over 135 MHz have heat issues with DVI on RV100 */ |
| 1489 | if (radeon_connector->use_digital && |
| 1490 | (rdev->family == CHIP_RV100) && |
| 1491 | (mode->clock > 135000)) |
| 1492 | return MODE_CLOCK_HIGH; |
| 1493 | |
| 1494 | if (radeon_connector->use_digital && (mode->clock > 165000)) { |
| 1495 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I0x02) || |
| 1496 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D0x04) || |
| 1497 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B0x0D)) |
| 1498 | return MODE_OK; |
| 1499 | else if (ASIC_IS_DCE6(rdev)((rdev->family >= CHIP_ARUBA)) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { |
| 1500 | /* HDMI 1.3+ supports max clock of 340 Mhz */ |
| 1501 | if (mode->clock > 340000) |
| 1502 | return MODE_CLOCK_HIGH; |
| 1503 | else |
| 1504 | return MODE_OK; |
| 1505 | } else { |
| 1506 | return MODE_CLOCK_HIGH; |
| 1507 | } |
| 1508 | } |
| 1509 | |
| 1510 | /* check against the max pixel clock */ |
| 1511 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) |
| 1512 | return MODE_CLOCK_HIGH; |
| 1513 | |
| 1514 | return MODE_OK; |
| 1515 | } |
| 1516 | |
| 1517 | static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
| 1518 | .get_modes = radeon_vga_get_modes, |
| 1519 | .mode_valid = radeon_dvi_mode_valid, |
| 1520 | .best_encoder = radeon_dvi_encoder, |
| 1521 | }; |
| 1522 | |
| 1523 | static const struct drm_connector_funcs radeon_dvi_connector_funcs = { |
| 1524 | .dpms = drm_helper_connector_dpms, |
| 1525 | .detect = radeon_dvi_detect, |
| 1526 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 1527 | .set_property = radeon_connector_set_property, |
| 1528 | .early_unregister = radeon_connector_unregister, |
| 1529 | .destroy = radeon_connector_destroy, |
| 1530 | .force = radeon_dvi_force, |
| 1531 | }; |
| 1532 | |
| 1533 | static int radeon_dp_get_modes(struct drm_connector *connector) |
| 1534 | { |
| 1535 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1536 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
| 1537 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
| 1538 | int ret; |
| 1539 | |
| 1540 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP14) || |
| 1541 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS7)) { |
| 1542 | struct drm_display_mode *mode; |
| 1543 | |
| 1544 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP14) { |
| 1545 | if (!radeon_dig_connector->edp_on) |
| 1546 | atombios_set_edp_panel_power(connector, |
| 1547 | ATOM_TRANSMITTER_ACTION_POWER_ON12); |
| 1548 | radeon_connector_get_edid(connector); |
| 1549 | ret = radeon_ddc_get_modes(connector); |
| 1550 | if (!radeon_dig_connector->edp_on) |
| 1551 | atombios_set_edp_panel_power(connector, |
| 1552 | ATOM_TRANSMITTER_ACTION_POWER_OFF13); |
| 1553 | } else { |
| 1554 | /* need to setup ddc on the bridge */ |
| 1555 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
| 1556 | ENCODER_OBJECT_ID_NONE0x00) { |
| 1557 | if (encoder) |
| 1558 | radeon_atom_ext_encoder_setup_ddc(encoder); |
| 1559 | } |
| 1560 | radeon_connector_get_edid(connector); |
| 1561 | ret = radeon_ddc_get_modes(connector); |
| 1562 | } |
| 1563 | |
| 1564 | if (ret > 0) { |
| 1565 | if (encoder) { |
| 1566 | radeon_fixup_lvds_native_mode(encoder, connector); |
| 1567 | /* add scaled modes */ |
| 1568 | radeon_add_common_modes(encoder, connector); |
| 1569 | } |
| 1570 | return ret; |
| 1571 | } |
| 1572 | |
| 1573 | if (!encoder) |
| 1574 | return 0; |
| 1575 | |
| 1576 | /* we have no EDID modes */ |
| 1577 | mode = radeon_fp_native_mode(encoder); |
| 1578 | if (mode) { |
| 1579 | ret = 1; |
| 1580 | drm_mode_probed_add(connector, mode); |
| 1581 | /* add the width/height from vbios tables if available */ |
| 1582 | connector->display_info.width_mm = mode->width_mm; |
| 1583 | connector->display_info.height_mm = mode->height_mm; |
| 1584 | /* add scaled modes */ |
| 1585 | radeon_add_common_modes(encoder, connector); |
| 1586 | } |
| 1587 | } else { |
| 1588 | /* need to setup ddc on the bridge */ |
| 1589 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
| 1590 | ENCODER_OBJECT_ID_NONE0x00) { |
| 1591 | if (encoder) |
| 1592 | radeon_atom_ext_encoder_setup_ddc(encoder); |
| 1593 | } |
| 1594 | radeon_connector_get_edid(connector); |
| 1595 | ret = radeon_ddc_get_modes(connector); |
| 1596 | |
| 1597 | radeon_get_native_mode(connector); |
| 1598 | } |
| 1599 | |
| 1600 | return ret; |
| 1601 | } |
| 1602 | |
| 1603 | u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector) |
| 1604 | { |
| 1605 | struct drm_encoder *encoder; |
| 1606 | struct radeon_encoder *radeon_encoder; |
| 1607 | |
| 1608 | drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *) 0)->head ) *__mptr = ((&((connector)->dev)->mode_config .encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof(*(encoder)), head) );}); & (encoder)->head != (&((connector)->dev)->mode_config .encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder )) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof (*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof (*(encoder)), head) );})) if (!(((connector)->possible_encoders ) & drm_encoder_mask(encoder))) {} else { |
| 1609 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 1610 | |
| 1611 | switch (radeon_encoder->encoder_id) { |
| 1612 | case ENCODER_OBJECT_ID_TRAVIS0x23: |
| 1613 | case ENCODER_OBJECT_ID_NUTMEG0x22: |
| 1614 | return radeon_encoder->encoder_id; |
| 1615 | default: |
| 1616 | break; |
| 1617 | } |
| 1618 | } |
| 1619 | |
| 1620 | return ENCODER_OBJECT_ID_NONE0x00; |
| 1621 | } |
| 1622 | |
| 1623 | static bool_Bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) |
| 1624 | { |
| 1625 | struct drm_encoder *encoder; |
| 1626 | struct radeon_encoder *radeon_encoder; |
| 1627 | bool_Bool found = false0; |
| 1628 | |
| 1629 | drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *) 0)->head ) *__mptr = ((&((connector)->dev)->mode_config .encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof(*(encoder)), head) );}); & (encoder)->head != (&((connector)->dev)->mode_config .encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder )) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof (*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof (*(encoder)), head) );})) if (!(((connector)->possible_encoders ) & drm_encoder_mask(encoder))) {} else { |
| 1630 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 1631 | if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR20x01) |
| 1632 | found = true1; |
| 1633 | } |
| 1634 | |
| 1635 | return found; |
| 1636 | } |
| 1637 | |
| 1638 | bool_Bool radeon_connector_is_dp12_capable(struct drm_connector *connector) |
| 1639 | { |
| 1640 | struct drm_device *dev = connector->dev; |
| 1641 | struct radeon_device *rdev = dev->dev_private; |
| 1642 | |
| 1643 | if (ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS)) && |
| 1644 | (rdev->clock.default_dispclk >= 53900) && |
| 1645 | radeon_connector_encoder_is_hbr2(connector)) { |
| 1646 | return true1; |
| 1647 | } |
| 1648 | |
| 1649 | return false0; |
| 1650 | } |
| 1651 | |
| 1652 | static enum drm_connector_status |
| 1653 | radeon_dp_detect(struct drm_connector *connector, bool_Bool force) |
| 1654 | { |
| 1655 | struct drm_device *dev = connector->dev; |
| 1656 | struct radeon_device *rdev = dev->dev_private; |
| 1657 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1658 | enum drm_connector_status ret = connector_status_disconnected; |
| 1659 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
| 1660 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
| 1661 | int r; |
| 1662 | |
| 1663 | if (radeon_dig_connector->is_mst) |
| 1664 | return connector_status_disconnected; |
| 1665 | |
| 1666 | if (!drm_kms_helper_is_poll_worker()) { |
| 1667 | r = pm_runtime_get_sync(connector->dev->dev); |
| 1668 | if (r < 0) { |
| 1669 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 1670 | return connector_status_disconnected; |
| 1671 | } |
| 1672 | } |
| 1673 | |
| 1674 | if (!force && radeon_check_hpd_status_unchanged(connector)) { |
| 1675 | ret = connector->status; |
| 1676 | goto out; |
| 1677 | } |
| 1678 | |
| 1679 | radeon_connector_free_edid(connector); |
| 1680 | |
| 1681 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP14) || |
| 1682 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS7)) { |
| 1683 | if (encoder) { |
| 1684 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 1685 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
| 1686 | |
| 1687 | /* check if panel is valid */ |
| 1688 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) |
| 1689 | ret = connector_status_connected; |
| 1690 | /* don't fetch the edid from the vbios if ddc fails and runpm is |
| 1691 | * enabled so we report disconnected. |
| 1692 | */ |
| 1693 | if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0)) |
| 1694 | ret = connector_status_disconnected; |
| 1695 | } |
| 1696 | /* eDP is always DP */ |
| 1697 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT0x13; |
| 1698 | if (!radeon_dig_connector->edp_on) |
| 1699 | atombios_set_edp_panel_power(connector, |
| 1700 | ATOM_TRANSMITTER_ACTION_POWER_ON12); |
| 1701 | if (radeon_dp_getdpcd(radeon_connector)) |
| 1702 | ret = connector_status_connected; |
| 1703 | if (!radeon_dig_connector->edp_on) |
| 1704 | atombios_set_edp_panel_power(connector, |
| 1705 | ATOM_TRANSMITTER_ACTION_POWER_OFF13); |
| 1706 | } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != |
| 1707 | ENCODER_OBJECT_ID_NONE0x00) { |
| 1708 | /* DP bridges are always DP */ |
| 1709 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT0x13; |
| 1710 | /* get the DPCD from the bridge */ |
| 1711 | radeon_dp_getdpcd(radeon_connector); |
| 1712 | |
| 1713 | if (encoder) { |
| 1714 | /* setup ddc on the bridge */ |
| 1715 | radeon_atom_ext_encoder_setup_ddc(encoder); |
| 1716 | /* bridge chips are always aux */ |
| 1717 | if (radeon_ddc_probe(radeon_connector, true1)) /* try DDC */ |
| 1718 | ret = connector_status_connected; |
| 1719 | else if (radeon_connector->dac_load_detect) { /* try load detection */ |
| 1720 | const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; |
| 1721 | ret = encoder_funcs->detect(encoder, connector); |
| 1722 | } |
| 1723 | } |
| 1724 | } else { |
| 1725 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
| 1726 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)(rdev)->asic->hpd.sense((rdev), (radeon_connector->hpd .hpd))) { |
| 1727 | ret = connector_status_connected; |
| 1728 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13) { |
| 1729 | radeon_dp_getdpcd(radeon_connector); |
| 1730 | r = radeon_dp_mst_probe(radeon_connector); |
| 1731 | if (r == 1) |
| 1732 | ret = connector_status_disconnected; |
| 1733 | } |
| 1734 | } else { |
| 1735 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13) { |
| 1736 | if (radeon_dp_getdpcd(radeon_connector)) { |
| 1737 | r = radeon_dp_mst_probe(radeon_connector); |
| 1738 | if (r == 1) |
| 1739 | ret = connector_status_disconnected; |
| 1740 | else |
| 1741 | ret = connector_status_connected; |
| 1742 | } |
| 1743 | } else { |
| 1744 | /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */ |
| 1745 | if (radeon_ddc_probe(radeon_connector, false0)) |
| 1746 | ret = connector_status_connected; |
| 1747 | } |
| 1748 | } |
| 1749 | } |
| 1750 | |
| 1751 | radeon_connector_update_scratch_regs(connector, ret); |
| 1752 | |
| 1753 | if ((radeon_audio != 0) && encoder) { |
| 1754 | radeon_connector_get_edid(connector); |
| 1755 | radeon_audio_detect(connector, encoder, ret); |
| 1756 | } |
| 1757 | |
| 1758 | out: |
| 1759 | if (!drm_kms_helper_is_poll_worker()) { |
| 1760 | pm_runtime_mark_last_busy(connector->dev->dev); |
| 1761 | pm_runtime_put_autosuspend(connector->dev->dev); |
| 1762 | } |
| 1763 | |
| 1764 | return ret; |
| 1765 | } |
| 1766 | |
| 1767 | static enum drm_mode_status radeon_dp_mode_valid(struct drm_connector *connector, |
| 1768 | struct drm_display_mode *mode) |
| 1769 | { |
| 1770 | struct drm_device *dev = connector->dev; |
| 1771 | struct radeon_device *rdev = dev->dev_private; |
| 1772 | struct radeon_connector *radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1773 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
| 1774 | |
| 1775 | /* XXX check mode bandwidth */ |
| 1776 | |
| 1777 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP14) || |
| 1778 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS7)) { |
| 1779 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
| 1780 | |
| 1781 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) |
| 1782 | return MODE_PANEL; |
| 1783 | |
| 1784 | if (encoder) { |
| 1785 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 1786 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
| 1787 | |
| 1788 | /* AVIVO hardware supports downscaling modes larger than the panel |
| 1789 | * to the panel size, but I'm not sure this is desirable. |
| 1790 | */ |
| 1791 | if ((mode->hdisplay > native_mode->hdisplay) || |
| 1792 | (mode->vdisplay > native_mode->vdisplay)) |
| 1793 | return MODE_PANEL; |
| 1794 | |
| 1795 | /* if scaling is disabled, block non-native modes */ |
| 1796 | if (radeon_encoder->rmx_type == RMX_OFF) { |
| 1797 | if ((mode->hdisplay != native_mode->hdisplay) || |
| 1798 | (mode->vdisplay != native_mode->vdisplay)) |
| 1799 | return MODE_PANEL; |
| 1800 | } |
| 1801 | } |
| 1802 | } else { |
| 1803 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13) || |
| 1804 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP0x14)) { |
| 1805 | return radeon_dp_mode_valid_helper(connector, mode); |
| 1806 | } else { |
| 1807 | if (ASIC_IS_DCE6(rdev)((rdev->family >= CHIP_ARUBA)) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { |
| 1808 | /* HDMI 1.3+ supports max clock of 340 Mhz */ |
| 1809 | if (mode->clock > 340000) |
| 1810 | return MODE_CLOCK_HIGH; |
| 1811 | } else { |
| 1812 | if (mode->clock > 165000) |
| 1813 | return MODE_CLOCK_HIGH; |
| 1814 | } |
| 1815 | } |
| 1816 | } |
| 1817 | |
| 1818 | return MODE_OK; |
| 1819 | } |
| 1820 | |
| 1821 | static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { |
| 1822 | .get_modes = radeon_dp_get_modes, |
| 1823 | .mode_valid = radeon_dp_mode_valid, |
| 1824 | .best_encoder = radeon_dvi_encoder, |
| 1825 | }; |
| 1826 | |
| 1827 | static const struct drm_connector_funcs radeon_dp_connector_funcs = { |
| 1828 | .dpms = drm_helper_connector_dpms, |
| 1829 | .detect = radeon_dp_detect, |
| 1830 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 1831 | .set_property = radeon_connector_set_property, |
| 1832 | .early_unregister = radeon_connector_unregister, |
| 1833 | .destroy = radeon_connector_destroy, |
| 1834 | .force = radeon_dvi_force, |
| 1835 | }; |
| 1836 | |
| 1837 | static const struct drm_connector_funcs radeon_edp_connector_funcs = { |
| 1838 | .dpms = drm_helper_connector_dpms, |
| 1839 | .detect = radeon_dp_detect, |
| 1840 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 1841 | .set_property = radeon_lvds_set_property, |
| 1842 | .early_unregister = radeon_connector_unregister, |
| 1843 | .destroy = radeon_connector_destroy, |
| 1844 | .force = radeon_dvi_force, |
| 1845 | }; |
| 1846 | |
| 1847 | static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = { |
| 1848 | .dpms = drm_helper_connector_dpms, |
| 1849 | .detect = radeon_dp_detect, |
| 1850 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 1851 | .set_property = radeon_lvds_set_property, |
| 1852 | .early_unregister = radeon_connector_unregister, |
| 1853 | .destroy = radeon_connector_destroy, |
| 1854 | .force = radeon_dvi_force, |
| 1855 | }; |
| 1856 | |
| 1857 | void |
| 1858 | radeon_add_atom_connector(struct drm_device *dev, |
| 1859 | uint32_t connector_id, |
| 1860 | uint32_t supported_device, |
| 1861 | int connector_type, |
| 1862 | struct radeon_i2c_bus_rec *i2c_bus, |
| 1863 | uint32_t igp_lane_info, |
| 1864 | uint16_t connector_object_id, |
| 1865 | struct radeon_hpd *hpd, |
| 1866 | struct radeon_router *router) |
| 1867 | { |
| 1868 | struct radeon_device *rdev = dev->dev_private; |
| 1869 | struct drm_connector *connector; |
| 1870 | struct radeon_connector *radeon_connector; |
| 1871 | struct radeon_connector_atom_dig *radeon_dig_connector; |
| 1872 | struct drm_encoder *encoder; |
| 1873 | struct radeon_encoder *radeon_encoder; |
| 1874 | struct i2c_adapter *ddc = NULL((void *)0); |
| 1875 | uint32_t subpixel_order = SubPixelNone; |
| 1876 | bool_Bool shared_ddc = false0; |
| 1877 | bool_Bool is_dp_bridge = false0; |
| 1878 | bool_Bool has_aux = false0; |
| 1879 | |
| 1880 | if (connector_type == DRM_MODE_CONNECTOR_Unknown0) |
| 1881 | return; |
| 1882 | |
| 1883 | /* if the user selected tv=0 don't try and add the connector */ |
| 1884 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO6) || |
| 1885 | (connector_type == DRM_MODE_CONNECTOR_Composite5) || |
| 1886 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN9)) && |
| 1887 | (radeon_tv == 0)) |
| 1888 | return; |
| 1889 | |
| 1890 | /* see if we already added it */ |
| 1891 | list_for_each_entry(connector, &dev->mode_config.connector_list, head)for (connector = ({ const __typeof( ((__typeof(*connector) *) 0)->head ) *__mptr = ((&dev->mode_config.connector_list )->next); (__typeof(*connector) *)( (char *)__mptr - __builtin_offsetof (__typeof(*connector), head) );}); &connector->head != (&dev->mode_config.connector_list); connector = ({ const __typeof( ((__typeof(*connector) *)0)->head ) *__mptr = ( connector->head.next); (__typeof(*connector) *)( (char *)__mptr - __builtin_offsetof(__typeof(*connector), head) );})) { |
| 1892 | radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 1893 | if (radeon_connector->connector_id == connector_id) { |
| 1894 | radeon_connector->devices |= supported_device; |
| 1895 | return; |
| 1896 | } |
| 1897 | if (radeon_connector->ddc_bus && i2c_bus->valid) { |
| 1898 | if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { |
| 1899 | radeon_connector->shared_ddc = true1; |
| 1900 | shared_ddc = true1; |
| 1901 | } |
| 1902 | if (radeon_connector->router_bus && router->ddc_valid && |
| 1903 | (radeon_connector->router.router_id == router->router_id)) { |
| 1904 | radeon_connector->shared_ddc = false0; |
| 1905 | shared_ddc = false0; |
| 1906 | } |
| 1907 | } |
| 1908 | } |
| 1909 | |
| 1910 | /* check if it's a dp bridge */ |
| 1911 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)for (encoder = ({ const __typeof( ((__typeof(*encoder) *)0)-> head ) *__mptr = ((&dev->mode_config.encoder_list)-> next); (__typeof(*encoder) *)( (char *)__mptr - __builtin_offsetof (__typeof(*encoder), head) );}); &encoder->head != (& dev->mode_config.encoder_list); encoder = ({ const __typeof ( ((__typeof(*encoder) *)0)->head ) *__mptr = (encoder-> head.next); (__typeof(*encoder) *)( (char *)__mptr - __builtin_offsetof (__typeof(*encoder), head) );})) { |
| 1912 | radeon_encoder = to_radeon_encoder(encoder)({ const __typeof( ((struct radeon_encoder *)0)->base ) *__mptr = (encoder); (struct radeon_encoder *)( (char *)__mptr - __builtin_offsetof (struct radeon_encoder, base) );}); |
| 1913 | if (radeon_encoder->devices & supported_device) { |
| 1914 | switch (radeon_encoder->encoder_id) { |
| 1915 | case ENCODER_OBJECT_ID_TRAVIS0x23: |
| 1916 | case ENCODER_OBJECT_ID_NUTMEG0x22: |
| 1917 | is_dp_bridge = true1; |
| 1918 | break; |
| 1919 | default: |
| 1920 | break; |
| 1921 | } |
| 1922 | } |
| 1923 | } |
| 1924 | |
| 1925 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL(0x0001 | 0x0004)); |
| 1926 | if (!radeon_connector) |
| 1927 | return; |
| 1928 | |
| 1929 | connector = &radeon_connector->base; |
| 1930 | |
| 1931 | radeon_connector->connector_id = connector_id; |
| 1932 | radeon_connector->devices = supported_device; |
| 1933 | radeon_connector->shared_ddc = shared_ddc; |
| 1934 | radeon_connector->connector_object_id = connector_object_id; |
| 1935 | radeon_connector->hpd = *hpd; |
| 1936 | |
| 1937 | radeon_connector->router = *router; |
| 1938 | if (router->ddc_valid || router->cd_valid) { |
| 1939 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); |
| 1940 | if (!radeon_connector->router_bus) |
| 1941 | DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n")__drm_err("Failed to assign router i2c bus! Check dmesg for i2c errors.\n" ); |
| 1942 | } |
| 1943 | |
| 1944 | if (is_dp_bridge) { |
| 1945 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004)); |
| 1946 | if (!radeon_dig_connector) |
| 1947 | goto failed; |
| 1948 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
| 1949 | radeon_connector->con_priv = radeon_dig_connector; |
| 1950 | if (i2c_bus->valid) { |
| 1951 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 1952 | if (radeon_connector->ddc_bus) { |
| 1953 | has_aux = true1; |
| 1954 | ddc = &radeon_connector->ddc_bus->adapter; |
| 1955 | } else { |
| 1956 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 1957 | } |
| 1958 | } |
| 1959 | switch (connector_type) { |
| 1960 | case DRM_MODE_CONNECTOR_VGA1: |
| 1961 | case DRM_MODE_CONNECTOR_DVIA4: |
| 1962 | default: |
| 1963 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 1964 | &radeon_dp_connector_funcs, |
| 1965 | connector_type, |
| 1966 | ddc); |
| 1967 | drm_connector_helper_add(&radeon_connector->base, |
| 1968 | &radeon_dp_connector_helper_funcs); |
| 1969 | connector->interlace_allowed = true1; |
| 1970 | connector->doublescan_allowed = true1; |
| 1971 | radeon_connector->dac_load_detect = true1; |
| 1972 | drm_object_attach_property(&radeon_connector->base.base, |
| 1973 | rdev->mode_info.load_detect_property, |
| 1974 | 1); |
| 1975 | drm_object_attach_property(&radeon_connector->base.base, |
| 1976 | dev->mode_config.scaling_mode_property, |
| 1977 | DRM_MODE_SCALE_NONE0); |
| 1978 | if (ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS))) |
| 1979 | drm_object_attach_property(&radeon_connector->base.base, |
| 1980 | rdev->mode_info.output_csc_property, |
| 1981 | RADEON_OUTPUT_CSC_BYPASS); |
| 1982 | break; |
| 1983 | case DRM_MODE_CONNECTOR_DVII2: |
| 1984 | case DRM_MODE_CONNECTOR_DVID3: |
| 1985 | case DRM_MODE_CONNECTOR_HDMIA11: |
| 1986 | case DRM_MODE_CONNECTOR_HDMIB12: |
| 1987 | case DRM_MODE_CONNECTOR_DisplayPort10: |
| 1988 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 1989 | &radeon_dp_connector_funcs, |
| 1990 | connector_type, |
| 1991 | ddc); |
| 1992 | drm_connector_helper_add(&radeon_connector->base, |
| 1993 | &radeon_dp_connector_helper_funcs); |
| 1994 | drm_object_attach_property(&radeon_connector->base.base, |
| 1995 | rdev->mode_info.underscan_property, |
| 1996 | UNDERSCAN_OFF); |
| 1997 | drm_object_attach_property(&radeon_connector->base.base, |
| 1998 | rdev->mode_info.underscan_hborder_property, |
| 1999 | 0); |
| 2000 | drm_object_attach_property(&radeon_connector->base.base, |
| 2001 | rdev->mode_info.underscan_vborder_property, |
| 2002 | 0); |
| 2003 | |
| 2004 | drm_object_attach_property(&radeon_connector->base.base, |
| 2005 | dev->mode_config.scaling_mode_property, |
| 2006 | DRM_MODE_SCALE_NONE0); |
| 2007 | |
| 2008 | drm_object_attach_property(&radeon_connector->base.base, |
| 2009 | rdev->mode_info.dither_property, |
| 2010 | RADEON_FMT_DITHER_DISABLE); |
| 2011 | |
| 2012 | if (radeon_audio != 0) { |
| 2013 | drm_object_attach_property(&radeon_connector->base.base, |
| 2014 | rdev->mode_info.audio_property, |
| 2015 | RADEON_AUDIO_AUTO); |
| 2016 | radeon_connector->audio = RADEON_AUDIO_AUTO; |
| 2017 | } |
| 2018 | if (ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS))) |
| 2019 | drm_object_attach_property(&radeon_connector->base.base, |
| 2020 | rdev->mode_info.output_csc_property, |
| 2021 | RADEON_OUTPUT_CSC_BYPASS); |
| 2022 | |
| 2023 | subpixel_order = SubPixelHorizontalRGB; |
| 2024 | connector->interlace_allowed = true1; |
| 2025 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB12) |
| 2026 | connector->doublescan_allowed = true1; |
| 2027 | else |
| 2028 | connector->doublescan_allowed = false0; |
| 2029 | if (connector_type == DRM_MODE_CONNECTOR_DVII2) { |
| 2030 | radeon_connector->dac_load_detect = true1; |
| 2031 | drm_object_attach_property(&radeon_connector->base.base, |
| 2032 | rdev->mode_info.load_detect_property, |
| 2033 | 1); |
| 2034 | } |
| 2035 | break; |
| 2036 | case DRM_MODE_CONNECTOR_LVDS7: |
| 2037 | case DRM_MODE_CONNECTOR_eDP14: |
| 2038 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2039 | &radeon_lvds_bridge_connector_funcs, |
| 2040 | connector_type, |
| 2041 | ddc); |
| 2042 | drm_connector_helper_add(&radeon_connector->base, |
| 2043 | &radeon_dp_connector_helper_funcs); |
| 2044 | drm_object_attach_property(&radeon_connector->base.base, |
| 2045 | dev->mode_config.scaling_mode_property, |
| 2046 | DRM_MODE_SCALE_FULLSCREEN1); |
| 2047 | subpixel_order = SubPixelHorizontalRGB; |
| 2048 | connector->interlace_allowed = false0; |
| 2049 | connector->doublescan_allowed = false0; |
| 2050 | break; |
| 2051 | } |
| 2052 | } else { |
| 2053 | switch (connector_type) { |
| 2054 | case DRM_MODE_CONNECTOR_VGA1: |
| 2055 | if (i2c_bus->valid) { |
| 2056 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2057 | if (!radeon_connector->ddc_bus) |
| 2058 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2059 | else |
| 2060 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2061 | } |
| 2062 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2063 | &radeon_vga_connector_funcs, |
| 2064 | connector_type, |
| 2065 | ddc); |
| 2066 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
| 2067 | radeon_connector->dac_load_detect = true1; |
| 2068 | drm_object_attach_property(&radeon_connector->base.base, |
| 2069 | rdev->mode_info.load_detect_property, |
| 2070 | 1); |
| 2071 | if (ASIC_IS_AVIVO(rdev)((rdev->family >= CHIP_RS600))) |
| 2072 | drm_object_attach_property(&radeon_connector->base.base, |
| 2073 | dev->mode_config.scaling_mode_property, |
| 2074 | DRM_MODE_SCALE_NONE0); |
| 2075 | if (ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS))) |
| 2076 | drm_object_attach_property(&radeon_connector->base.base, |
| 2077 | rdev->mode_info.output_csc_property, |
| 2078 | RADEON_OUTPUT_CSC_BYPASS); |
| 2079 | /* no HPD on analog connectors */ |
| 2080 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; |
| 2081 | connector->interlace_allowed = true1; |
| 2082 | connector->doublescan_allowed = true1; |
| 2083 | break; |
| 2084 | case DRM_MODE_CONNECTOR_DVIA4: |
| 2085 | if (i2c_bus->valid) { |
| 2086 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2087 | if (!radeon_connector->ddc_bus) |
| 2088 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2089 | else |
| 2090 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2091 | } |
| 2092 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2093 | &radeon_vga_connector_funcs, |
| 2094 | connector_type, |
| 2095 | ddc); |
| 2096 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
| 2097 | radeon_connector->dac_load_detect = true1; |
| 2098 | drm_object_attach_property(&radeon_connector->base.base, |
| 2099 | rdev->mode_info.load_detect_property, |
| 2100 | 1); |
| 2101 | if (ASIC_IS_AVIVO(rdev)((rdev->family >= CHIP_RS600))) |
| 2102 | drm_object_attach_property(&radeon_connector->base.base, |
| 2103 | dev->mode_config.scaling_mode_property, |
| 2104 | DRM_MODE_SCALE_NONE0); |
| 2105 | if (ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS))) |
| 2106 | drm_object_attach_property(&radeon_connector->base.base, |
| 2107 | rdev->mode_info.output_csc_property, |
| 2108 | RADEON_OUTPUT_CSC_BYPASS); |
| 2109 | /* no HPD on analog connectors */ |
| 2110 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; |
| 2111 | connector->interlace_allowed = true1; |
| 2112 | connector->doublescan_allowed = true1; |
| 2113 | break; |
| 2114 | case DRM_MODE_CONNECTOR_DVII2: |
| 2115 | case DRM_MODE_CONNECTOR_DVID3: |
| 2116 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004)); |
| 2117 | if (!radeon_dig_connector) |
| 2118 | goto failed; |
| 2119 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
| 2120 | radeon_connector->con_priv = radeon_dig_connector; |
| 2121 | if (i2c_bus->valid) { |
| 2122 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2123 | if (!radeon_connector->ddc_bus) |
| 2124 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2125 | else |
| 2126 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2127 | } |
| 2128 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2129 | &radeon_dvi_connector_funcs, |
| 2130 | connector_type, |
| 2131 | ddc); |
| 2132 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
| 2133 | subpixel_order = SubPixelHorizontalRGB; |
| 2134 | drm_object_attach_property(&radeon_connector->base.base, |
| 2135 | rdev->mode_info.coherent_mode_property, |
| 2136 | 1); |
| 2137 | if (ASIC_IS_AVIVO(rdev)((rdev->family >= CHIP_RS600))) { |
| 2138 | drm_object_attach_property(&radeon_connector->base.base, |
| 2139 | rdev->mode_info.underscan_property, |
| 2140 | UNDERSCAN_OFF); |
| 2141 | drm_object_attach_property(&radeon_connector->base.base, |
| 2142 | rdev->mode_info.underscan_hborder_property, |
| 2143 | 0); |
| 2144 | drm_object_attach_property(&radeon_connector->base.base, |
| 2145 | rdev->mode_info.underscan_vborder_property, |
| 2146 | 0); |
| 2147 | drm_object_attach_property(&radeon_connector->base.base, |
| 2148 | rdev->mode_info.dither_property, |
| 2149 | RADEON_FMT_DITHER_DISABLE); |
| 2150 | drm_object_attach_property(&radeon_connector->base.base, |
| 2151 | dev->mode_config.scaling_mode_property, |
| 2152 | DRM_MODE_SCALE_NONE0); |
| 2153 | } |
| 2154 | if (ASIC_IS_DCE2(rdev)((rdev->family == CHIP_RS600) || (rdev->family == CHIP_RS690 ) || (rdev->family == CHIP_RS740) || (rdev->family >= CHIP_R600)) && (radeon_audio != 0)) { |
| 2155 | drm_object_attach_property(&radeon_connector->base.base, |
| 2156 | rdev->mode_info.audio_property, |
| 2157 | RADEON_AUDIO_AUTO); |
| 2158 | radeon_connector->audio = RADEON_AUDIO_AUTO; |
| 2159 | } |
| 2160 | if (connector_type == DRM_MODE_CONNECTOR_DVII2) { |
| 2161 | radeon_connector->dac_load_detect = true1; |
| 2162 | drm_object_attach_property(&radeon_connector->base.base, |
| 2163 | rdev->mode_info.load_detect_property, |
| 2164 | 1); |
| 2165 | } |
| 2166 | if (ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS))) |
| 2167 | drm_object_attach_property(&radeon_connector->base.base, |
| 2168 | rdev->mode_info.output_csc_property, |
| 2169 | RADEON_OUTPUT_CSC_BYPASS); |
| 2170 | connector->interlace_allowed = true1; |
| 2171 | if (connector_type == DRM_MODE_CONNECTOR_DVII2) |
| 2172 | connector->doublescan_allowed = true1; |
| 2173 | else |
| 2174 | connector->doublescan_allowed = false0; |
| 2175 | break; |
| 2176 | case DRM_MODE_CONNECTOR_HDMIA11: |
| 2177 | case DRM_MODE_CONNECTOR_HDMIB12: |
| 2178 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004)); |
| 2179 | if (!radeon_dig_connector) |
| 2180 | goto failed; |
| 2181 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
| 2182 | radeon_connector->con_priv = radeon_dig_connector; |
| 2183 | if (i2c_bus->valid) { |
| 2184 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2185 | if (!radeon_connector->ddc_bus) |
| 2186 | DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2187 | else |
| 2188 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2189 | } |
| 2190 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2191 | &radeon_dvi_connector_funcs, |
| 2192 | connector_type, |
| 2193 | ddc); |
| 2194 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
| 2195 | drm_object_attach_property(&radeon_connector->base.base, |
| 2196 | rdev->mode_info.coherent_mode_property, |
| 2197 | 1); |
| 2198 | if (ASIC_IS_AVIVO(rdev)((rdev->family >= CHIP_RS600))) { |
| 2199 | drm_object_attach_property(&radeon_connector->base.base, |
| 2200 | rdev->mode_info.underscan_property, |
| 2201 | UNDERSCAN_OFF); |
| 2202 | drm_object_attach_property(&radeon_connector->base.base, |
| 2203 | rdev->mode_info.underscan_hborder_property, |
| 2204 | 0); |
| 2205 | drm_object_attach_property(&radeon_connector->base.base, |
| 2206 | rdev->mode_info.underscan_vborder_property, |
| 2207 | 0); |
| 2208 | drm_object_attach_property(&radeon_connector->base.base, |
| 2209 | rdev->mode_info.dither_property, |
| 2210 | RADEON_FMT_DITHER_DISABLE); |
| 2211 | drm_object_attach_property(&radeon_connector->base.base, |
| 2212 | dev->mode_config.scaling_mode_property, |
| 2213 | DRM_MODE_SCALE_NONE0); |
| 2214 | } |
| 2215 | if (ASIC_IS_DCE2(rdev)((rdev->family == CHIP_RS600) || (rdev->family == CHIP_RS690 ) || (rdev->family == CHIP_RS740) || (rdev->family >= CHIP_R600)) && (radeon_audio != 0)) { |
| 2216 | drm_object_attach_property(&radeon_connector->base.base, |
| 2217 | rdev->mode_info.audio_property, |
| 2218 | RADEON_AUDIO_AUTO); |
| 2219 | radeon_connector->audio = RADEON_AUDIO_AUTO; |
| 2220 | } |
| 2221 | if (ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS))) |
| 2222 | drm_object_attach_property(&radeon_connector->base.base, |
| 2223 | rdev->mode_info.output_csc_property, |
| 2224 | RADEON_OUTPUT_CSC_BYPASS); |
| 2225 | subpixel_order = SubPixelHorizontalRGB; |
| 2226 | connector->interlace_allowed = true1; |
| 2227 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB12) |
| 2228 | connector->doublescan_allowed = true1; |
| 2229 | else |
| 2230 | connector->doublescan_allowed = false0; |
| 2231 | break; |
| 2232 | case DRM_MODE_CONNECTOR_DisplayPort10: |
| 2233 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004)); |
| 2234 | if (!radeon_dig_connector) |
| 2235 | goto failed; |
| 2236 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
| 2237 | radeon_connector->con_priv = radeon_dig_connector; |
| 2238 | if (i2c_bus->valid) { |
| 2239 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2240 | if (radeon_connector->ddc_bus) { |
| 2241 | has_aux = true1; |
| 2242 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2243 | } else { |
| 2244 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2245 | } |
| 2246 | } |
| 2247 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2248 | &radeon_dp_connector_funcs, |
| 2249 | connector_type, |
| 2250 | ddc); |
| 2251 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); |
| 2252 | subpixel_order = SubPixelHorizontalRGB; |
| 2253 | drm_object_attach_property(&radeon_connector->base.base, |
| 2254 | rdev->mode_info.coherent_mode_property, |
| 2255 | 1); |
| 2256 | if (ASIC_IS_AVIVO(rdev)((rdev->family >= CHIP_RS600))) { |
| 2257 | drm_object_attach_property(&radeon_connector->base.base, |
| 2258 | rdev->mode_info.underscan_property, |
| 2259 | UNDERSCAN_OFF); |
| 2260 | drm_object_attach_property(&radeon_connector->base.base, |
| 2261 | rdev->mode_info.underscan_hborder_property, |
| 2262 | 0); |
| 2263 | drm_object_attach_property(&radeon_connector->base.base, |
| 2264 | rdev->mode_info.underscan_vborder_property, |
| 2265 | 0); |
| 2266 | drm_object_attach_property(&radeon_connector->base.base, |
| 2267 | rdev->mode_info.dither_property, |
| 2268 | RADEON_FMT_DITHER_DISABLE); |
| 2269 | drm_object_attach_property(&radeon_connector->base.base, |
| 2270 | dev->mode_config.scaling_mode_property, |
| 2271 | DRM_MODE_SCALE_NONE0); |
| 2272 | } |
| 2273 | if (ASIC_IS_DCE2(rdev)((rdev->family == CHIP_RS600) || (rdev->family == CHIP_RS690 ) || (rdev->family == CHIP_RS740) || (rdev->family >= CHIP_R600)) && (radeon_audio != 0)) { |
| 2274 | drm_object_attach_property(&radeon_connector->base.base, |
| 2275 | rdev->mode_info.audio_property, |
| 2276 | RADEON_AUDIO_AUTO); |
| 2277 | radeon_connector->audio = RADEON_AUDIO_AUTO; |
| 2278 | } |
| 2279 | if (ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS))) |
| 2280 | drm_object_attach_property(&radeon_connector->base.base, |
| 2281 | rdev->mode_info.output_csc_property, |
| 2282 | RADEON_OUTPUT_CSC_BYPASS); |
| 2283 | connector->interlace_allowed = true1; |
| 2284 | /* in theory with a DP to VGA converter... */ |
| 2285 | connector->doublescan_allowed = false0; |
| 2286 | break; |
| 2287 | case DRM_MODE_CONNECTOR_eDP14: |
| 2288 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004)); |
| 2289 | if (!radeon_dig_connector) |
| 2290 | goto failed; |
| 2291 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
| 2292 | radeon_connector->con_priv = radeon_dig_connector; |
| 2293 | if (i2c_bus->valid) { |
| 2294 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2295 | if (radeon_connector->ddc_bus) { |
| 2296 | has_aux = true1; |
| 2297 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2298 | } else { |
| 2299 | DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2300 | } |
| 2301 | } |
| 2302 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2303 | &radeon_edp_connector_funcs, |
| 2304 | connector_type, |
| 2305 | ddc); |
| 2306 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); |
| 2307 | drm_object_attach_property(&radeon_connector->base.base, |
| 2308 | dev->mode_config.scaling_mode_property, |
| 2309 | DRM_MODE_SCALE_FULLSCREEN1); |
| 2310 | subpixel_order = SubPixelHorizontalRGB; |
| 2311 | connector->interlace_allowed = false0; |
| 2312 | connector->doublescan_allowed = false0; |
| 2313 | break; |
| 2314 | case DRM_MODE_CONNECTOR_SVIDEO6: |
| 2315 | case DRM_MODE_CONNECTOR_Composite5: |
| 2316 | case DRM_MODE_CONNECTOR_9PinDIN9: |
| 2317 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2318 | &radeon_tv_connector_funcs, |
| 2319 | connector_type, |
| 2320 | ddc); |
| 2321 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); |
| 2322 | radeon_connector->dac_load_detect = true1; |
| 2323 | drm_object_attach_property(&radeon_connector->base.base, |
| 2324 | rdev->mode_info.load_detect_property, |
| 2325 | 1); |
| 2326 | drm_object_attach_property(&radeon_connector->base.base, |
| 2327 | rdev->mode_info.tv_std_property, |
| 2328 | radeon_atombios_get_tv_info(rdev)); |
| 2329 | /* no HPD on analog connectors */ |
| 2330 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; |
| 2331 | connector->interlace_allowed = false0; |
| 2332 | connector->doublescan_allowed = false0; |
| 2333 | break; |
| 2334 | case DRM_MODE_CONNECTOR_LVDS7: |
| 2335 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004)); |
| 2336 | if (!radeon_dig_connector) |
| 2337 | goto failed; |
| 2338 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
| 2339 | radeon_connector->con_priv = radeon_dig_connector; |
| 2340 | if (i2c_bus->valid) { |
| 2341 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2342 | if (!radeon_connector->ddc_bus) |
| 2343 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2344 | else |
| 2345 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2346 | } |
| 2347 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2348 | &radeon_lvds_connector_funcs, |
| 2349 | connector_type, |
| 2350 | ddc); |
| 2351 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
| 2352 | drm_object_attach_property(&radeon_connector->base.base, |
| 2353 | dev->mode_config.scaling_mode_property, |
| 2354 | DRM_MODE_SCALE_FULLSCREEN1); |
| 2355 | subpixel_order = SubPixelHorizontalRGB; |
| 2356 | connector->interlace_allowed = false0; |
| 2357 | connector->doublescan_allowed = false0; |
| 2358 | break; |
| 2359 | } |
| 2360 | } |
| 2361 | |
| 2362 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
| 2363 | if (i2c_bus->valid) { |
| 2364 | connector->polled = DRM_CONNECTOR_POLL_CONNECT(1 << 1) | |
| 2365 | DRM_CONNECTOR_POLL_DISCONNECT(1 << 2); |
| 2366 | } |
| 2367 | } else |
| 2368 | connector->polled = DRM_CONNECTOR_POLL_HPD(1 << 0); |
| 2369 | |
| 2370 | connector->display_info.subpixel_order = subpixel_order; |
| 2371 | drm_connector_register(connector); |
| 2372 | |
| 2373 | if (has_aux) |
| 2374 | radeon_dp_aux_init(radeon_connector); |
| 2375 | |
| 2376 | return; |
| 2377 | |
| 2378 | failed: |
| 2379 | drm_connector_cleanup(connector); |
| 2380 | kfree(connector); |
| 2381 | } |
| 2382 | |
| 2383 | void |
| 2384 | radeon_add_legacy_connector(struct drm_device *dev, |
| 2385 | uint32_t connector_id, |
| 2386 | uint32_t supported_device, |
| 2387 | int connector_type, |
| 2388 | struct radeon_i2c_bus_rec *i2c_bus, |
| 2389 | uint16_t connector_object_id, |
| 2390 | struct radeon_hpd *hpd) |
| 2391 | { |
| 2392 | struct radeon_device *rdev = dev->dev_private; |
| 2393 | struct drm_connector *connector; |
| 2394 | struct radeon_connector *radeon_connector; |
| 2395 | struct i2c_adapter *ddc = NULL((void *)0); |
| 2396 | uint32_t subpixel_order = SubPixelNone; |
| 2397 | |
| 2398 | if (connector_type == DRM_MODE_CONNECTOR_Unknown0) |
| 2399 | return; |
| 2400 | |
| 2401 | /* if the user selected tv=0 don't try and add the connector */ |
| 2402 | if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO6) || |
| 2403 | (connector_type == DRM_MODE_CONNECTOR_Composite5) || |
| 2404 | (connector_type == DRM_MODE_CONNECTOR_9PinDIN9)) && |
| 2405 | (radeon_tv == 0)) |
| 2406 | return; |
| 2407 | |
| 2408 | /* see if we already added it */ |
| 2409 | list_for_each_entry(connector, &dev->mode_config.connector_list, head)for (connector = ({ const __typeof( ((__typeof(*connector) *) 0)->head ) *__mptr = ((&dev->mode_config.connector_list )->next); (__typeof(*connector) *)( (char *)__mptr - __builtin_offsetof (__typeof(*connector), head) );}); &connector->head != (&dev->mode_config.connector_list); connector = ({ const __typeof( ((__typeof(*connector) *)0)->head ) *__mptr = ( connector->head.next); (__typeof(*connector) *)( (char *)__mptr - __builtin_offsetof(__typeof(*connector), head) );})) { |
| 2410 | radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 2411 | if (radeon_connector->connector_id == connector_id) { |
| 2412 | radeon_connector->devices |= supported_device; |
| 2413 | return; |
| 2414 | } |
| 2415 | } |
| 2416 | |
| 2417 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL(0x0001 | 0x0004)); |
| 2418 | if (!radeon_connector) |
| 2419 | return; |
| 2420 | |
| 2421 | connector = &radeon_connector->base; |
| 2422 | |
| 2423 | radeon_connector->connector_id = connector_id; |
| 2424 | radeon_connector->devices = supported_device; |
| 2425 | radeon_connector->connector_object_id = connector_object_id; |
| 2426 | radeon_connector->hpd = *hpd; |
| 2427 | |
| 2428 | switch (connector_type) { |
| 2429 | case DRM_MODE_CONNECTOR_VGA1: |
| 2430 | if (i2c_bus->valid) { |
| 2431 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2432 | if (!radeon_connector->ddc_bus) |
| 2433 | DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2434 | else |
| 2435 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2436 | } |
| 2437 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2438 | &radeon_vga_connector_funcs, |
| 2439 | connector_type, |
| 2440 | ddc); |
| 2441 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
| 2442 | radeon_connector->dac_load_detect = true1; |
| 2443 | drm_object_attach_property(&radeon_connector->base.base, |
| 2444 | rdev->mode_info.load_detect_property, |
| 2445 | 1); |
| 2446 | /* no HPD on analog connectors */ |
| 2447 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; |
| 2448 | connector->interlace_allowed = true1; |
| 2449 | connector->doublescan_allowed = true1; |
| 2450 | break; |
| 2451 | case DRM_MODE_CONNECTOR_DVIA4: |
| 2452 | if (i2c_bus->valid) { |
| 2453 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2454 | if (!radeon_connector->ddc_bus) |
| 2455 | DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2456 | else |
| 2457 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2458 | } |
| 2459 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2460 | &radeon_vga_connector_funcs, |
| 2461 | connector_type, |
| 2462 | ddc); |
| 2463 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
| 2464 | radeon_connector->dac_load_detect = true1; |
| 2465 | drm_object_attach_property(&radeon_connector->base.base, |
| 2466 | rdev->mode_info.load_detect_property, |
| 2467 | 1); |
| 2468 | /* no HPD on analog connectors */ |
| 2469 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; |
| 2470 | connector->interlace_allowed = true1; |
| 2471 | connector->doublescan_allowed = true1; |
| 2472 | break; |
| 2473 | case DRM_MODE_CONNECTOR_DVII2: |
| 2474 | case DRM_MODE_CONNECTOR_DVID3: |
| 2475 | if (i2c_bus->valid) { |
| 2476 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2477 | if (!radeon_connector->ddc_bus) |
| 2478 | DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2479 | else |
| 2480 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2481 | } |
| 2482 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2483 | &radeon_dvi_connector_funcs, |
| 2484 | connector_type, |
| 2485 | ddc); |
| 2486 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
| 2487 | if (connector_type == DRM_MODE_CONNECTOR_DVII2) { |
| 2488 | radeon_connector->dac_load_detect = true1; |
| 2489 | drm_object_attach_property(&radeon_connector->base.base, |
| 2490 | rdev->mode_info.load_detect_property, |
| 2491 | 1); |
| 2492 | } |
| 2493 | subpixel_order = SubPixelHorizontalRGB; |
| 2494 | connector->interlace_allowed = true1; |
| 2495 | if (connector_type == DRM_MODE_CONNECTOR_DVII2) |
| 2496 | connector->doublescan_allowed = true1; |
| 2497 | else |
| 2498 | connector->doublescan_allowed = false0; |
| 2499 | break; |
| 2500 | case DRM_MODE_CONNECTOR_SVIDEO6: |
| 2501 | case DRM_MODE_CONNECTOR_Composite5: |
| 2502 | case DRM_MODE_CONNECTOR_9PinDIN9: |
| 2503 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2504 | &radeon_tv_connector_funcs, |
| 2505 | connector_type, |
| 2506 | ddc); |
| 2507 | drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); |
| 2508 | radeon_connector->dac_load_detect = true1; |
| 2509 | /* RS400,RC410,RS480 chipset seems to report a lot |
| 2510 | * of false positive on load detect, we haven't yet |
| 2511 | * found a way to make load detect reliable on those |
| 2512 | * chipset, thus just disable it for TV. |
| 2513 | */ |
| 2514 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) |
| 2515 | radeon_connector->dac_load_detect = false0; |
| 2516 | drm_object_attach_property(&radeon_connector->base.base, |
| 2517 | rdev->mode_info.load_detect_property, |
| 2518 | radeon_connector->dac_load_detect); |
| 2519 | drm_object_attach_property(&radeon_connector->base.base, |
| 2520 | rdev->mode_info.tv_std_property, |
| 2521 | radeon_combios_get_tv_info(rdev)); |
| 2522 | /* no HPD on analog connectors */ |
| 2523 | radeon_connector->hpd.hpd = RADEON_HPD_NONE; |
| 2524 | connector->interlace_allowed = false0; |
| 2525 | connector->doublescan_allowed = false0; |
| 2526 | break; |
| 2527 | case DRM_MODE_CONNECTOR_LVDS7: |
| 2528 | if (i2c_bus->valid) { |
| 2529 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
| 2530 | if (!radeon_connector->ddc_bus) |
| 2531 | DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n" ); |
| 2532 | else |
| 2533 | ddc = &radeon_connector->ddc_bus->adapter; |
| 2534 | } |
| 2535 | drm_connector_init_with_ddc(dev, &radeon_connector->base, |
| 2536 | &radeon_lvds_connector_funcs, |
| 2537 | connector_type, |
| 2538 | ddc); |
| 2539 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
| 2540 | drm_object_attach_property(&radeon_connector->base.base, |
| 2541 | dev->mode_config.scaling_mode_property, |
| 2542 | DRM_MODE_SCALE_FULLSCREEN1); |
| 2543 | subpixel_order = SubPixelHorizontalRGB; |
| 2544 | connector->interlace_allowed = false0; |
| 2545 | connector->doublescan_allowed = false0; |
| 2546 | break; |
| 2547 | } |
| 2548 | |
| 2549 | if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
| 2550 | if (i2c_bus->valid) { |
| 2551 | connector->polled = DRM_CONNECTOR_POLL_CONNECT(1 << 1) | |
| 2552 | DRM_CONNECTOR_POLL_DISCONNECT(1 << 2); |
| 2553 | } |
| 2554 | } else |
| 2555 | connector->polled = DRM_CONNECTOR_POLL_HPD(1 << 0); |
| 2556 | |
| 2557 | connector->display_info.subpixel_order = subpixel_order; |
| 2558 | drm_connector_register(connector); |
| 2559 | } |
| 2560 | |
| 2561 | void radeon_setup_mst_connector(struct drm_device *dev) |
| 2562 | { |
| 2563 | struct radeon_device *rdev = dev->dev_private; |
| 2564 | struct drm_connector *connector; |
| 2565 | struct radeon_connector *radeon_connector; |
| 2566 | |
| 2567 | if (!ASIC_IS_DCE5(rdev)((rdev->family >= CHIP_BARTS))) |
| 2568 | return; |
| 2569 | |
| 2570 | if (radeon_mst == 0) |
| 2571 | return; |
| 2572 | |
| 2573 | list_for_each_entry(connector, &dev->mode_config.connector_list, head)for (connector = ({ const __typeof( ((__typeof(*connector) *) 0)->head ) *__mptr = ((&dev->mode_config.connector_list )->next); (__typeof(*connector) *)( (char *)__mptr - __builtin_offsetof (__typeof(*connector), head) );}); &connector->head != (&dev->mode_config.connector_list); connector = ({ const __typeof( ((__typeof(*connector) *)0)->head ) *__mptr = ( connector->head.next); (__typeof(*connector) *)( (char *)__mptr - __builtin_offsetof(__typeof(*connector), head) );})) { |
| 2574 | int ret; |
| 2575 | |
| 2576 | radeon_connector = to_radeon_connector(connector)({ const __typeof( ((struct radeon_connector *)0)->base ) * __mptr = (connector); (struct radeon_connector *)( (char *)__mptr - __builtin_offsetof(struct radeon_connector, base) );}); |
| 2577 | |
| 2578 | if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort10) |
| 2579 | continue; |
| 2580 | |
| 2581 | ret = radeon_dp_mst_init(radeon_connector); |
Value stored to 'ret' is never read | |
| 2582 | } |
| 2583 | } |