/usr/src/sys/dev/usb/if

Bug Summary

File:	dev/usb/if_rsu.c
Warning:	line 370, column 12 The left operand of '!=' is a garbage value
Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name if_rsu.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/usb/if_rsu.c
1/*	$OpenBSD: if_rsu.c,v 1.52 2023/03/08 04:43:08 guenther Exp $	*/

3/*-
* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/

19/*
* Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU.
*/

23#include "bpfilter.h"

25#include <sys/param.h>
26#include <sys/sockio.h>
27#include <sys/mbuf.h>
28#include <sys/kernel.h>
29#include <sys/socket.h>
30#include <sys/systm.h>
31#include <sys/timeout.h>
32#include <sys/conf.h>
33#include <sys/device.h>
34#include <sys/endian.h>

36#include <machine/intr.h>

38#if NBPFILTER1 > 0
39#include <net/bpf.h>
40#endif
41#include <net/if.h>
42#include <net/if_dl.h>
43#include <net/if_media.h>

45#include <netinet/in.h>
46#include <netinet/if_ether.h>

48#include <net80211/ieee80211_var.h>
49#include <net80211/ieee80211_radiotap.h>

51#include <dev/usb/usb.h>
52#include <dev/usb/usbdi.h>
53#include <dev/usb/usbdi_util.h>
54#include <dev/usb/usbdevs.h>

56#include <dev/usb/if_rsureg.h>

58#ifdef RSU_DEBUG
59#define DPRINTF(x)	do { if (rsu_debug) printf x; } while (0)
60#define DPRINTFN(n, x)	do { if (rsu_debug >= (n)) printf x; } while (0)
61int rsu_debug = 4;
62#else
63#define DPRINTF(x)
64#define DPRINTFN(n, x)
65#endif

67/*
* NB: When updating this list of devices, beware to also update the list
* of devices that have HT support disabled below, if applicable.
*/
71static const struct usb_devno rsu_devs[] = {
{ USB_VENDOR_ACCTON0x083a,		USB_PRODUCT_ACCTON_RTL8192SU0xc512 },
{ USB_VENDOR_ASUS0x0b05,		USB_PRODUCT_ASUS_USBN100x1786 },
{ USB_VENDOR_ASUS0x0b05,		USB_PRODUCT_ASUS_RTL8192SU_10x1791 },
{ USB_VENDOR_AZUREWAVE0x13d3,		USB_PRODUCT_AZUREWAVE_RTL8192SU_10x3306 },
{ USB_VENDOR_AZUREWAVE0x13d3,		USB_PRODUCT_AZUREWAVE_RTL8192SU_20x3309 },
{ USB_VENDOR_AZUREWAVE0x13d3,		USB_PRODUCT_AZUREWAVE_RTL8192SU_30x3310 },
{ USB_VENDOR_AZUREWAVE0x13d3,		USB_PRODUCT_AZUREWAVE_RTL8192SU_40x3311 },
{ USB_VENDOR_AZUREWAVE0x13d3,		USB_PRODUCT_AZUREWAVE_RTL8192SU_50x3325 },
{ USB_VENDOR_BELKIN0x050d,		USB_PRODUCT_BELKIN_RTL8192SU_10x815f },
{ USB_VENDOR_BELKIN0x050d,		USB_PRODUCT_BELKIN_RTL8192SU_20x845a },
{ USB_VENDOR_BELKIN0x050d,		USB_PRODUCT_BELKIN_RTL8192SU_30x945a },
{ USB_VENDOR_CONCEPTRONIC20x14b2,	USB_PRODUCT_CONCEPTRONIC2_RTL8192SU_10x3300 },
{ USB_VENDOR_CONCEPTRONIC20x14b2,	USB_PRODUCT_CONCEPTRONIC2_RTL8192SU_20x3301 },
{ USB_VENDOR_CONCEPTRONIC20x14b2,	USB_PRODUCT_CONCEPTRONIC2_RTL8192SU_30x3302 },
{ USB_VENDOR_COREGA0x07aa,		USB_PRODUCT_COREGA_RTL8192SU0x0047 },
{ USB_VENDOR_DLINK20x07d1,		USB_PRODUCT_DLINK2_DWA131A10x3303 },
{ USB_VENDOR_DLINK20x07d1,		USB_PRODUCT_DLINK2_RTL8192SU_10x3300 },
{ USB_VENDOR_DLINK20x07d1,		USB_PRODUCT_DLINK2_RTL8192SU_20x3302 },
{ USB_VENDOR_EDIMAX0x7392,		USB_PRODUCT_EDIMAX_RTL8192SU_10x7611 },
{ USB_VENDOR_EDIMAX0x7392,		USB_PRODUCT_EDIMAX_RTL8192SU_20x7612 },
{ USB_VENDOR_EDIMAX0x7392,		USB_PRODUCT_EDIMAX_RTL8192SU_30x7622 },
{ USB_VENDOR_GUILLEMOT0x06f8,		USB_PRODUCT_GUILLEMOT_HWGUN540xe032 },
{ USB_VENDOR_GUILLEMOT0x06f8,		USB_PRODUCT_GUILLEMOT_HWNUM3000xe031 },
{ USB_VENDOR_HAWKING0x0e66,		USB_PRODUCT_HAWKING_RTL8192SU_10x0015 },
{ USB_VENDOR_HAWKING0x0e66,		USB_PRODUCT_HAWKING_RTL8192SU_20x0016 },
{ USB_VENDOR_PLANEX20x2019,		USB_PRODUCT_PLANEX2_GWUSNANO0xab28 },
{ USB_VENDOR_REALTEK0x0bda,		USB_PRODUCT_REALTEK_RTL81710x8171 },
{ USB_VENDOR_REALTEK0x0bda,		USB_PRODUCT_REALTEK_RTL81720x8172 },
{ USB_VENDOR_REALTEK0x0bda,		USB_PRODUCT_REALTEK_RTL81730x8173 },
{ USB_VENDOR_REALTEK0x0bda,		USB_PRODUCT_REALTEK_RTL81740x8174 },
{ USB_VENDOR_REALTEK0x0bda,		USB_PRODUCT_REALTEK_RTL8192SU0xc512 },
{ USB_VENDOR_REALTEK0x0bda,		USB_PRODUCT_REALTEK_RTL87120x8712 },
{ USB_VENDOR_REALTEK0x0bda,		USB_PRODUCT_REALTEK_RTL87130x8713 },
{ USB_VENDOR_SENAO0x1740,		USB_PRODUCT_SENAO_RTL8192SU_10x9603 },
{ USB_VENDOR_SENAO0x1740,		USB_PRODUCT_SENAO_RTL8192SU_20x9605 },
{ USB_VENDOR_SITECOMEU0x0df6,		USB_PRODUCT_SITECOMEU_WL349V10x004b },
{ USB_VENDOR_SITECOMEU0x0df6,		USB_PRODUCT_SITECOMEU_WL3530x0045 },
{ USB_VENDOR_SWEEX20x177f,		USB_PRODUCT_SWEEX2_LW1540x0154 }
110};

112/* List of devices that have HT support disabled. */
113static const struct usb_devno rsu_devs_noht[] = {
{ USB_VENDOR_ASUS0x0b05,		USB_PRODUCT_ASUS_RTL8192SU_10x1791 },
{ USB_VENDOR_AZUREWAVE0x13d3,		USB_PRODUCT_AZUREWAVE_RTL8192SU_40x3311 }
116};

118int		rsu_match(struct device *, void *, void *);
119void		rsu_attach(struct device *, struct device *, void *);
120int		rsu_detach(struct device *, int);
121int		rsu_open_pipes(struct rsu_softc *);
122void		rsu_close_pipes(struct rsu_softc *);
123int		rsu_alloc_rx_list(struct rsu_softc *);
124void		rsu_free_rx_list(struct rsu_softc *);
125int		rsu_alloc_tx_list(struct rsu_softc *);
126void		rsu_free_tx_list(struct rsu_softc *);
127void		rsu_task(void *);
128void		rsu_do_async(struct rsu_softc *,
    void (*)(struct rsu_softc *, void *), void *, int);
130void		rsu_wait_async(struct rsu_softc *);
131int		rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *,
    int);
133void		rsu_write_1(struct rsu_softc *, uint16_t, uint8_t);
134void		rsu_write_2(struct rsu_softc *, uint16_t, uint16_t);
135void		rsu_write_4(struct rsu_softc *, uint16_t, uint32_t);
136int		rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *,
    int);
138uint8_t		rsu_read_1(struct rsu_softc *, uint16_t);
139uint16_t	rsu_read_2(struct rsu_softc *, uint16_t);
140uint32_t	rsu_read_4(struct rsu_softc *, uint16_t);
141int		rsu_fw_iocmd(struct rsu_softc *, uint32_t);
142uint8_t		rsu_efuse_read_1(struct rsu_softc *, uint16_t);
143int		rsu_read_rom(struct rsu_softc *);
144int		rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int);
145int		rsu_media_change(struct ifnet *);
146void		rsu_calib_to(void *);
147void		rsu_calib_cb(struct rsu_softc *, void *);
148int		rsu_newstate(struct ieee80211com *, enum ieee80211_state, int);
149void		rsu_newstate_cb(struct rsu_softc *, void *);
150int		rsu_set_key(struct ieee80211com *, struct ieee80211_node *,
    struct ieee80211_key *);
152void		rsu_set_key_cb(struct rsu_softc *, void *);
153void		rsu_delete_key(struct ieee80211com *, struct ieee80211_node *,
    struct ieee80211_key *);
155void		rsu_delete_key_cb(struct rsu_softc *, void *);
156int		rsu_site_survey(struct rsu_softc *);
157int		rsu_join_bss(struct rsu_softc *, struct ieee80211_node *);
158int		rsu_disconnect(struct rsu_softc *);
159void		rsu_event_survey(struct rsu_softc *, uint8_t *, int);
160void		rsu_event_join_bss(struct rsu_softc *, uint8_t *, int);
161void		rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int);
162void		rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int);
163int8_t		rsu_get_rssi(struct rsu_softc *, int, void *);
164void		rsu_rx_frame(struct rsu_softc *, uint8_t *, int,
    struct mbuf_list *);
166void		rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int);
167void		rsu_rxeof(struct usbd_xfer *, void *, usbd_status);
168void		rsu_txeof(struct usbd_xfer *, void *, usbd_status);
169int		rsu_tx(struct rsu_softc *, struct mbuf *,
    struct ieee80211_node *);
171int		rsu_send_mgmt(struct ieee80211com *, struct ieee80211_node *,
    int, int, int);
173void		rsu_start(struct ifnet *);
174void		rsu_watchdog(struct ifnet *);
175int		rsu_ioctl(struct ifnet *, u_long, caddr_t);
176void		rsu_power_on_acut(struct rsu_softc *);
177void		rsu_power_on_bcut(struct rsu_softc *);
178void		rsu_power_off(struct rsu_softc *);
179int		rsu_fw_loadsection(struct rsu_softc *, uint8_t *, int);
180int		rsu_load_firmware(struct rsu_softc *);
181int		rsu_init(struct ifnet *);
182void		rsu_stop(struct ifnet *);

184struct cfdriver rsu_cd = {
NULL((void *)0), "rsu", DV_IFNET
186};

188const struct cfattach rsu_ca = {
sizeof(struct rsu_softc), rsu_match, rsu_attach, rsu_detach,
190};

192int
193rsu_match(struct device *parent, void *match, void *aux)
194{
struct usb_attach_arg *uaa = aux;

if (uaa->iface == NULL((void *)0) || uaa->configno != 1)
return (UMATCH_NONE0);

return ((usb_lookup(rsu_devs, uaa->vendor, uaa->product)usbd_match_device((const struct usb_devno *)(rsu_devs), sizeof
 (rsu_devs) / sizeof ((rsu_devs)[0]), sizeof ((rsu_devs)[0]),
 (uaa->vendor), (uaa->product)) != NULL((void *)0)) ?
   UMATCH_VENDOR_PRODUCT_CONF_IFACE8 : UMATCH_NONE0);
202}

204void
205rsu_attach(struct device *parent, struct device *self, void *aux)
206{
struct rsu_softc *sc = (struct rsu_softc *)self;
struct usb_attach_arg *uaa = aux;
struct ieee80211com *ic = &sc->sc_ic;
struct ifnet *ifp = &ic->ic_ific_ac.ac_if;
int i, error;

sc->sc_udev = uaa->device;
sc->sc_iface = uaa->iface;

usb_init_task(&sc->sc_task, rsu_task, sc, USB_TASK_TYPE_GENERIC)((&sc->sc_task)->fun = (rsu_task), (&sc->sc_task
)->arg = (sc), (&sc->sc_task)->type = (0), (&
sc->sc_task)->state = 0x0);
timeout_set(&sc->calib_to, rsu_calib_to, sc);

/* Read chip revision. */
sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT)(((rsu_read_4(sc, (0x0000 + 0x004))) & 0x000f8000) >>
 15);
if (sc->cut != 3)
1
Assuming field 'cut' is equal to 3→
2
←
Taking false branch→
sc->cut = (sc->cut >> 1) + 1;

error = rsu_read_rom(sc);
if (error != 0) {
3
←
Assuming 'error' is equal to 0→
4
←
Taking false branch→
printf("%s: could not read ROM\n", sc->sc_dev.dv_xname);
return;
}
IEEE80211_ADDR_COPY(ic->ic_myaddr, &sc->rom[0x12])__builtin_memcpy((ic->ic_myaddr), (&sc->rom[0x12]),
 (6));

printf("%s: MAC/BB RTL8712 cut %d, address %s\n",
   sc->sc_dev.dv_xname, sc->cut, ether_sprintf(ic->ic_myaddr));

if (rsu_open_pipes(sc) != 0)
5
←
Calling 'rsu_open_pipes'→
return;

ic->ic_phytype = IEEE80211_T_OFDM;	/* Not only, but not used. */
ic->ic_opmode = IEEE80211_M_STA;	/* Default to BSS mode. */
ic->ic_state = IEEE80211_S_INIT;

/* Set device capabilities. */
ic->ic_caps =
   IEEE80211_C_SCANALL0x00000400 |	/* Hardware scan. */
   IEEE80211_C_SHPREAMBLE0x00000100 |	/* Short preamble supported. */
   IEEE80211_C_SHSLOT0x00000080 |	/* Short slot time supported. */
   IEEE80211_C_WEP0x00000001 |		/* WEP. */
   IEEE80211_C_RSN0x00001000;		/* WPA/RSN. */
/* Check if HT support is present. */
if (usb_lookup(rsu_devs_noht, uaa->vendor, uaa->product)usbd_match_device((const struct usb_devno *)(rsu_devs_noht), sizeof
 (rsu_devs_noht) / sizeof ((rsu_devs_noht)[0]), sizeof ((rsu_devs_noht
)[0]), (uaa->vendor), (uaa->product)) == NULL((void *)0)) {
250#ifdef notyet
/* Set HT capabilities. */
ic->ic_htcaps =
    IEEE80211_HTCAP_CBW20_400x00000002 |
    IEEE80211_HTCAP_DSSSCCK400x00001000;
/* Set supported HT rates. */
for (i = 0; i < 2; i++)
	ic->ic_sup_mcs[i] = 0xff;
258#endif
}

/* Set supported .11b and .11g rates. */
ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;

/* Set supported .11b and .11g channels (1 through 14). */
for (i = 1; i <= 14; i++) {
ic->ic_channels[i].ic_freq =
    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ0x0080);
ic->ic_channels[i].ic_flags =
    IEEE80211_CHAN_CCK0x0020 | IEEE80211_CHAN_OFDM0x0040 |
    IEEE80211_CHAN_DYN0x0400 | IEEE80211_CHAN_2GHZ0x0080;
}

ifp->if_softc = sc;
ifp->if_flags = IFF_BROADCAST0x2 | IFF_SIMPLEX0x800 | IFF_MULTICAST0x8000;
ifp->if_ioctl = rsu_ioctl;
ifp->if_start = rsu_start;
ifp->if_watchdog = rsu_watchdog;
memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ)__builtin_memcpy((ifp->if_xname), (sc->sc_dev.dv_xname)
, (16));

if_attach(ifp);
ieee80211_ifattach(ifp);
283#ifdef notyet
ic->ic_set_key = rsu_set_key;
ic->ic_delete_key = rsu_delete_key;
286#endif
/* Override state transition machine. */
sc->sc_newstate = ic->ic_newstate;
ic->ic_newstate = rsu_newstate;
ic->ic_send_mgmt = rsu_send_mgmt;
ieee80211_media_init(ifp, rsu_media_change, ieee80211_media_status);

293#if NBPFILTER1 > 0
bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO127,
   sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN64);

sc->sc_rxtap_len = sizeof(sc->sc_rxtapu);
sc->sc_rxtapsc_rxtapu.th.wr_ihdr.it_len = htole16(sc->sc_rxtap_len)((__uint16_t)(sc->sc_rxtap_len));
sc->sc_rxtapsc_rxtapu.th.wr_ihdr.it_present = htole32(RSU_RX_RADIOTAP_PRESENT)((__uint32_t)((1 << IEEE80211_RADIOTAP_FLAGS | 1 <<
 IEEE80211_RADIOTAP_RATE | 1 << IEEE80211_RADIOTAP_CHANNEL
 | 1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL)));

sc->sc_txtap_len = sizeof(sc->sc_txtapu);
sc->sc_txtapsc_txtapu.th.wt_ihdr.it_len = htole16(sc->sc_txtap_len)((__uint16_t)(sc->sc_txtap_len));
sc->sc_txtapsc_txtapu.th.wt_ihdr.it_present = htole32(RSU_TX_RADIOTAP_PRESENT)((__uint32_t)((1 << IEEE80211_RADIOTAP_FLAGS | 1 <<
 IEEE80211_RADIOTAP_CHANNEL)));
304#endif
305}

307int
308rsu_detach(struct device *self, int flags)
309{
struct rsu_softc *sc = (struct rsu_softc *)self;
struct ifnet *ifp = &sc->sc_ic.ic_ific_ac.ac_if;
int s;

s = splusb()splraise(0x2);

if (timeout_initialized(&sc->calib_to)((&sc->calib_to)->to_flags & 0x04))
timeout_del(&sc->calib_to);

/* Wait for all async commands to complete. */
usb_rem_wait_task(sc->sc_udev, &sc->sc_task);

usbd_ref_wait(sc->sc_udev);

if (ifp->if_softc != NULL((void *)0)) {
ieee80211_ifdetach(ifp);
if_detach(ifp);
}

/* Abort and close Tx/Rx pipes. */
rsu_close_pipes(sc);

/* Free Tx/Rx buffers. */
rsu_free_tx_list(sc);
rsu_free_rx_list(sc);
splx(s)spllower(s);

return (0);
338}

340int
341rsu_open_pipes(struct rsu_softc *sc)
342{
usb_interface_descriptor_t *id;
int i, error;
6
←
'error' declared without an initial value→

/*
* Determine the number of Tx/Rx endpoints (there are chips with
* 4, 6 or 11 endpoints).
*/
id = usbd_get_interface_descriptor(sc->sc_iface);
sc->npipes = id->bNumEndpoints;
if (sc->npipes == 4)
7
←
Assuming field 'npipes' is not equal to 4→
8
←
Taking false branch→
sc->qid2idx = rsu_qid2idx_4ep;
else if (sc->npipes == 6)
9
←
Assuming field 'npipes' is not equal to 6→
10
←
Taking false branch→
sc->qid2idx = rsu_qid2idx_6ep;
else	/* Assume npipes==11; will fail below otherwise. */
sc->qid2idx = rsu_qid2idx_11ep;
DPRINTF(("%d endpoints configuration\n", sc->npipes));

/* Open all pipes. */
for (i = 0; i < MIN(sc->npipes, nitems(r92s_epaddr))(((sc->npipes)<((sizeof((r92s_epaddr)) / sizeof((r92s_epaddr
)[0]))))?(sc->npipes):((sizeof((r92s_epaddr)) / sizeof((r92s_epaddr
)[0])))); i++) {
11
←
Assuming the condition is true→
12
←
'?' condition is true→
13
←
Assuming the condition is false→
14
←
Loop condition is false. Execution continues on line 370→
error = usbd_open_pipe(sc->sc_iface, r92s_epaddr[i], 0,
    &sc->pipe[i]);
if (error != 0) {
	printf("%s: could not open bulk pipe 0x%02x\n",
	    sc->sc_dev.dv_xname, r92s_epaddr[i]);
	break;
}
}
if (error != 0)
15
←
The left operand of '!=' is a garbage value
rsu_close_pipes(sc);
return (error);
373}

375void
376rsu_close_pipes(struct rsu_softc *sc)
377{
int i;

/* Close all pipes. */
for (i = 0; i < sc->npipes; i++) {
if (sc->pipe[i] == NULL((void *)0))
	continue;
usbd_close_pipe(sc->pipe[i]);
}
386}

388int
389rsu_alloc_rx_list(struct rsu_softc *sc)
390{
struct rsu_rx_data *data;
int i, error = 0;

for (i = 0; i < RSU_RX_LIST_COUNT1; i++) {
data = &sc->rx_data[i];

data->sc = sc;	/* Backpointer for callbacks. */

data->xfer = usbd_alloc_xfer(sc->sc_udev);
if (data->xfer == NULL((void *)0)) {
	printf("%s: could not allocate xfer\n",
	    sc->sc_dev.dv_xname);
	error = ENOMEM12;
	break;
}
data->buf = usbd_alloc_buffer(data->xfer, RSU_RXBUFSZ(8 * 1024));
if (data->buf == NULL((void *)0)) {
	printf("%s: could not allocate xfer buffer\n",
	    sc->sc_dev.dv_xname);
	error = ENOMEM12;
	break;
}
}
if (error != 0)
rsu_free_rx_list(sc);
return (error);
417}

419void
420rsu_free_rx_list(struct rsu_softc *sc)
421{
int i;

/* NB: Caller must abort pipe first. */
for (i = 0; i < RSU_RX_LIST_COUNT1; i++) {
if (sc->rx_data[i].xfer != NULL((void *)0))
	usbd_free_xfer(sc->rx_data[i].xfer);
sc->rx_data[i].xfer = NULL((void *)0);
}
430}

432int
433rsu_alloc_tx_list(struct rsu_softc *sc)
434{
struct rsu_tx_data *data;
int i, error = 0;

TAILQ_INIT(&sc->tx_free_list)do { (&sc->tx_free_list)->tqh_first = ((void *)0); (
&sc->tx_free_list)->tqh_last = &(&sc->tx_free_list
)->tqh_first; } while (0);
for (i = 0; i < RSU_TX_LIST_COUNT(8 + 1); i++) {
data = &sc->tx_data[i];

data->sc = sc;	/* Backpointer for callbacks. */

data->xfer = usbd_alloc_xfer(sc->sc_udev);
if (data->xfer == NULL((void *)0)) {
	printf("%s: could not allocate xfer\n",
	    sc->sc_dev.dv_xname);
	error = ENOMEM12;
	break;
}
data->buf = usbd_alloc_buffer(data->xfer, RSU_TXBUFSZ((sizeof(struct r92s_tx_desc) + (2300 + 4 + (3 + 1 + 4)) + 3)
 & ~3));
if (data->buf == NULL((void *)0)) {
	printf("%s: could not allocate xfer buffer\n",
	    sc->sc_dev.dv_xname);
	error = ENOMEM12;
	break;
}
/* Append this Tx buffer to our free list. */
TAILQ_INSERT_TAIL(&sc->tx_free_list, data, next)do { (data)->next.tqe_next = ((void *)0); (data)->next.
tqe_prev = (&sc->tx_free_list)->tqh_last; *(&sc
->tx_free_list)->tqh_last = (data); (&sc->tx_free_list
)->tqh_last = &(data)->next.tqe_next; } while (0);
}
if (error != 0)
rsu_free_tx_list(sc);
return (error);
464}

466void
467rsu_free_tx_list(struct rsu_softc *sc)
468{
int i;

/* NB: Caller must abort pipe first. */
for (i = 0; i < RSU_TX_LIST_COUNT(8 + 1); i++) {
if (sc->tx_data[i].xfer != NULL((void *)0))
	usbd_free_xfer(sc->tx_data[i].xfer);
sc->tx_data[i].xfer = NULL((void *)0);
}
477}

479void
480rsu_task(void *arg)
481{
struct rsu_softc *sc = arg;
struct rsu_host_cmd_ring *ring = &sc->cmdq;
struct rsu_host_cmd *cmd;
int s;

/* Process host commands. */
s = splusb()splraise(0x2);
while (ring->next != ring->cur) {
cmd = &ring->cmd[ring->next];
splx(s)spllower(s);
/* Invoke callback. */
cmd->cb(sc, cmd->data);
s = splusb()splraise(0x2);
ring->queued--;
ring->next = (ring->next + 1) % RSU_HOST_CMD_RING_COUNT32;
}
splx(s)spllower(s);
499}

501void
502rsu_do_async(struct rsu_softc *sc,
  void (*cb)(struct rsu_softc *, void *), void *arg, int len)
504{
struct rsu_host_cmd_ring *ring = &sc->cmdq;
struct rsu_host_cmd *cmd;
int s;

s = splusb()splraise(0x2);
cmd = &ring->cmd[ring->cur];
cmd->cb = cb;
KASSERT(len <= sizeof(cmd->data))((len <= sizeof(cmd->data)) ? (void)0 : __assert("diagnostic "
, "/usr/src/sys/dev/usb/if_rsu.c", 512, "len <= sizeof(cmd->data)"
));
memcpy(cmd->data, arg, len)__builtin_memcpy((cmd->data), (arg), (len));
ring->cur = (ring->cur + 1) % RSU_HOST_CMD_RING_COUNT32;

/* If there is no pending command already, schedule a task. */
if (++ring->queued == 1)
usb_add_task(sc->sc_udev, &sc->sc_task);
splx(s)spllower(s);
520}

522void
523rsu_wait_async(struct rsu_softc *sc)
524{
/* Wait for all queued asynchronous commands to complete. */
usb_wait_task(sc->sc_udev, &sc->sc_task);
527}

529int
530rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf,
  int len)
532{
usb_device_request_t req;

req.bmRequestType = UT_WRITE_VENDOR_DEVICE(0x00 | 0x40 | 0x00);
req.bRequest = R92S_REQ_REGS0x05;
USETW(req.wValue, addr)(*(u_int16_t *)(req.wValue) = (addr));
USETW(req.wIndex, 0)(*(u_int16_t *)(req.wIndex) = (0));
USETW(req.wLength, len)(*(u_int16_t *)(req.wLength) = (len));
return (usbd_do_request(sc->sc_udev, &req, buf));
541}

543void
544rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val)
545{
rsu_write_region_1(sc, addr, &val, 1);
547}

549void
550rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val)
551{
val = htole16(val)((__uint16_t)(val));
rsu_write_region_1(sc, addr, (uint8_t *)&val, 2);
554}

556void
557rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val)
558{
val = htole32(val)((__uint32_t)(val));
rsu_write_region_1(sc, addr, (uint8_t *)&val, 4);
561}

563int
564rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf,
  int len)
566{
usb_device_request_t req;

req.bmRequestType = UT_READ_VENDOR_DEVICE(0x80 | 0x40 | 0x00);
req.bRequest = R92S_REQ_REGS0x05;
USETW(req.wValue, addr)(*(u_int16_t *)(req.wValue) = (addr));
USETW(req.wIndex, 0)(*(u_int16_t *)(req.wIndex) = (0));
USETW(req.wLength, len)(*(u_int16_t *)(req.wLength) = (len));
return (usbd_do_request(sc->sc_udev, &req, buf));
575}

577uint8_t
578rsu_read_1(struct rsu_softc *sc, uint16_t addr)
579{
uint8_t val;

if (rsu_read_region_1(sc, addr, &val, 1) != 0)
return (0xff);
return (val);
585}

587uint16_t
588rsu_read_2(struct rsu_softc *sc, uint16_t addr)
589{
uint16_t val;

if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0)
return (0xffff);
return (letoh16(val)((__uint16_t)(val)));
595}

597uint32_t
598rsu_read_4(struct rsu_softc *sc, uint16_t addr)
599{
uint32_t val;

if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0)
return (0xffffffff);
return (letoh32(val)((__uint32_t)(val)));
605}

607int
608rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd)
609{
int ntries;

rsu_write_4(sc, R92S_IOCMD_CTRL0x0370, iocmd);
DELAY(100)(*delay_func)(100);
for (ntries = 0; ntries < 50; ntries++) {
if (rsu_read_4(sc, R92S_IOCMD_CTRL0x0370) == 0)
	return (0);
DELAY(10)(*delay_func)(10);
}
return (ETIMEDOUT60);
620}

622uint8_t
623rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr)
624{
uint32_t reg;
int ntries;

reg = rsu_read_4(sc, R92S_EFUSE_CTRL(0x0000 + 0x030));
reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr)(((reg) & ~0x0003ff00) | (((addr) << 8) & 0x0003ff00
));
reg &= ~R92S_EFUSE_CTRL_VALID0x80000000;
rsu_write_4(sc, R92S_EFUSE_CTRL(0x0000 + 0x030), reg);
/* Wait for read operation to complete. */
for (ntries = 0; ntries < 100; ntries++) {
reg = rsu_read_4(sc, R92S_EFUSE_CTRL(0x0000 + 0x030));
if (reg & R92S_EFUSE_CTRL_VALID0x80000000)
	return (MS(reg, R92S_EFUSE_CTRL_DATA)(((reg) & 0x000000ff) >> 0));
DELAY(5)(*delay_func)(5);
}
printf("%s: could not read efuse byte at address 0x%x\n",
   sc->sc_dev.dv_xname, addr);
return (0xff);
642}

644int
645rsu_read_rom(struct rsu_softc *sc)
646{
uint8_t *rom = sc->rom;
uint16_t addr = 0;
uint32_t reg;
uint8_t off, msk;
int i;

/* Make sure that ROM type is eFuse and that autoload succeeded. */
reg = rsu_read_1(sc, R92S_EE_9346CR(0x0000 + 0x00a));
if ((reg & (R92S_9356SEL0x10 | R92S_EEPROM_EN0x20)) != R92S_EEPROM_EN0x20)
return (EIO5);

/* Turn on 2.5V to prevent eFuse leakage. */
reg = rsu_read_1(sc, R92S_EFUSE_TEST(0x0000 + 0x034) + 3);
rsu_write_1(sc, R92S_EFUSE_TEST(0x0000 + 0x034) + 3, reg | 0x80);
DELAY(1000)(*delay_func)(1000);
rsu_write_1(sc, R92S_EFUSE_TEST(0x0000 + 0x034) + 3, reg & ~0x80);

/* Read full ROM image. */
memset(&sc->rom, 0xff, sizeof(sc->rom))__builtin_memset((&sc->rom), (0xff), (sizeof(sc->rom
)));
while (addr < 512) {
reg = rsu_efuse_read_1(sc, addr);
if (reg == 0xff)
	break;
addr++;
off = reg >> 4;
msk = reg & 0xf;
for (i = 0; i < 4; i++) {
	if (msk & (1 << i))
		continue;
	rom[off * 8 + i * 2 + 0] =
	    rsu_efuse_read_1(sc, addr);
	addr++;
	rom[off * 8 + i * 2 + 1] =
	    rsu_efuse_read_1(sc, addr);
	addr++;
}
}
684#ifdef RSU_DEBUG
if (rsu_debug >= 5) {
/* Dump ROM content. */
printf("\n");
for (i = 0; i < sizeof(sc->rom); i++)
	printf("%02x:", rom[i]);
printf("\n");
}
692#endif
return (0);
694}

696int
697rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len)
698{
struct rsu_tx_data *data;
struct r92s_tx_desc *txd;
struct r92s_fw_cmd_hdr *cmd;
struct usbd_pipe *pipe;
int cmdsz, xferlen;

data = sc->fwcmd_data;

/* Round-up command length to a multiple of 8 bytes. */
cmdsz = (len + 7) & ~7;

xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz;
KASSERT(xferlen <= RSU_TXBUFSZ)((xferlen <= ((sizeof(struct r92s_tx_desc) + (2300 + 4 + (
+ 1 + 4)) + 3) & ~3)) ? (void)0 : __assert("diagnostic "
, "/usr/src/sys/dev/usb/if_rsu.c", 711, "xferlen <= RSU_TXBUFSZ"
));
memset(data->buf, 0, xferlen)__builtin_memset((data->buf), (0), (xferlen));

/* Setup Tx descriptor. */
txd = (struct r92s_tx_desc *)data->buf;
txd->txdw0 = htole32(((__uint32_t)((((sizeof(*txd)) << 16) & 0x00ff0000)
 | (((sizeof(*cmd) + cmdsz) << 0) & 0x0000ffff) | 0x80000000
 | 0x08000000 | 0x04000000))
   SM(R92S_TXDW0_OFFSET, sizeof(*txd)) |((__uint32_t)((((sizeof(*txd)) << 16) & 0x00ff0000)
 | (((sizeof(*cmd) + cmdsz) << 0) & 0x0000ffff) | 0x80000000
 | 0x08000000 | 0x04000000))
   SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) |((__uint32_t)((((sizeof(*txd)) << 16) & 0x00ff0000)
 | (((sizeof(*cmd) + cmdsz) << 0) & 0x0000ffff) | 0x80000000
 | 0x08000000 | 0x04000000))
   R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG)((__uint32_t)((((sizeof(*txd)) << 16) & 0x00ff0000)
 | (((sizeof(*cmd) + cmdsz) << 0) & 0x0000ffff) | 0x80000000
 | 0x08000000 | 0x04000000));
txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C))((__uint32_t)((((0x1f) << 8) & 0x00001f00)));

/* Setup command header. */
cmd = (struct r92s_fw_cmd_hdr *)&txd[1];
cmd->len = htole16(cmdsz)((__uint16_t)(cmdsz));
cmd->code = code;
cmd->seq = sc->cmd_seq;
sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f;

/* Copy command payload. */
memcpy(&cmd[1], buf, len)__builtin_memcpy((&cmd[1]), (buf), (len));

DPRINTFN(2, ("Tx cmd code=%d len=%d\n", code, cmdsz));
pipe = sc->pipe[sc->qid2idx[RSU_QID_H2C8]];
usbd_setup_xfer(data->xfer, pipe, NULL((void *)0), data->buf, xferlen,
   USBD_SHORT_XFER_OK0x04 | USBD_NO_COPY0x01 | USBD_SYNCHRONOUS0x02,
   RSU_CMD_TIMEOUT2000, NULL((void *)0));
return (usbd_transfer(data->xfer));
738}

740int
741rsu_media_change(struct ifnet *ifp)
742{
int error;

error = ieee80211_media_change(ifp);
if (error != ENETRESET52)
return (error);

if ((ifp->if_flags & (IFF_UP0x1 | IFF_RUNNING0x40)) ==
   (IFF_UP0x1 | IFF_RUNNING0x40)) {
rsu_stop(ifp);
error = rsu_init(ifp);
}
return (error);
755}

757void
758rsu_calib_to(void *arg)
759{
struct rsu_softc *sc = arg;

if (usbd_is_dying(sc->sc_udev))
return;

usbd_ref_incr(sc->sc_udev);

/* Do it in a process context. */
rsu_do_async(sc, rsu_calib_cb, NULL((void *)0), 0);

usbd_ref_decr(sc->sc_udev);
771}

773void
774rsu_calib_cb(struct rsu_softc *sc, void *arg)
775{
uint32_t reg;

778#ifdef notyet
/* Read WPS PBC status. */
rsu_write_1(sc, R92S_MAC_PINMUX_CTRL(0x01e0 + 0x011),
   R92S_GPIOMUX_EN0x08 | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)(((0) << 0) & 0x03));
rsu_write_1(sc, R92S_GPIO_IO_SEL(0x01e0 + 0x00e),
   rsu_read_1(sc, R92S_GPIO_IO_SEL(0x01e0 + 0x00e)) & ~R92S_GPIO_WPS0x10);
reg = rsu_read_1(sc, R92S_GPIO_CTRL(0x01e0 + 0x00c));
if (reg != 0xff && (reg & R92S_GPIO_WPS0x10))
DPRINTF(("WPS PBC is pushed\n"));
787#endif
/* Read current signal level. */
if (rsu_fw_iocmd(sc, 0xf4000001) == 0) {
reg = rsu_read_4(sc, R92S_IOCMD_DATA0x0374);
DPRINTFN(8, ("RSSI=%d%%\n", reg >> 4));
}

if (!usbd_is_dying(sc->sc_udev))
timeout_add_sec(&sc->calib_to, 2);
796}

798int
799rsu_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
800{
struct rsu_softc *sc = ic->ic_softcic_ac.ac_if.if_softc;
struct rsu_cmd_newstate cmd;

/* Do it in a process context. */
cmd.state = nstate;
cmd.arg = arg;
rsu_do_async(sc, rsu_newstate_cb, &cmd, sizeof(cmd));
return (0);
809}

811void
812rsu_newstate_cb(struct rsu_softc *sc, void *arg)
813{
struct rsu_cmd_newstate *cmd = arg;
struct ieee80211com *ic = &sc->sc_ic;
struct ifnet *ifp = &ic->ic_ific_ac.ac_if;
enum ieee80211_state ostate;
int error, s;

s = splnet()splraise(0x4);
ostate = ic->ic_state;

if (ostate == IEEE80211_S_RUN) {
/* Stop calibration. */
timeout_del(&sc->calib_to);
/* Disassociate from our current BSS. */
(void)rsu_disconnect(sc);
}
switch (cmd->state) {
case IEEE80211_S_INIT:
break;
case IEEE80211_S_SCAN:
error = rsu_site_survey(sc);
if (error != 0) {
	printf("%s: could not send site survey command\n",
	    sc->sc_dev.dv_xname);
}
if (ifp->if_flags & IFF_DEBUG0x4)
	printf("%s: %s -> %s\n", ifp->if_xname,
	    ieee80211_state_name[ic->ic_state],
	    ieee80211_state_name[cmd->state]);
ic->ic_state = cmd->state;
splx(s)spllower(s);
return;
case IEEE80211_S_AUTH:
ic->ic_bss->ni_rsn_supp_state = RSNA_SUPP_INITIALIZE;
error = rsu_join_bss(sc, ic->ic_bss);
if (error != 0) {
	printf("%s: could not send join command\n",
	    sc->sc_dev.dv_xname);
	ieee80211_begin_scan(&ic->ic_ific_ac.ac_if);
	splx(s)spllower(s);
	return;
}
if (ifp->if_flags & IFF_DEBUG0x4)
	printf("%s: %s -> %s\n", ifp->if_xname,
	    ieee80211_state_name[ic->ic_state],
	    ieee80211_state_name[cmd->state]);
ic->ic_state = cmd->state;
if (ic->ic_flags & IEEE80211_F_RSNON0x00200000)
	ic->ic_bss->ni_rsn_supp_state = RSNA_SUPP_PTKSTART;
splx(s)spllower(s);
return;
case IEEE80211_S_ASSOC:
/* No-op for this driver. See rsu_event_join_bss(). */
if (ifp->if_flags & IFF_DEBUG0x4)
	printf("%s: %s -> %s\n", ifp->if_xname,
	    ieee80211_state_name[ic->ic_state],
	    ieee80211_state_name[cmd->state]);
ic->ic_state = cmd->state;
splx(s)spllower(s);
return;
case IEEE80211_S_RUN:
/* Indicate highest supported rate. */
ic->ic_bss->ni_txrate = ic->ic_bss->ni_rates.rs_nrates - 1;

/* Start periodic calibration. */
if (!usbd_is_dying(sc->sc_udev))
	timeout_add_sec(&sc->calib_to, 2);
break;
}
(void)sc->sc_newstate(ic, cmd->state, cmd->arg);
splx(s)spllower(s);
884}

886int
887rsu_set_key(struct ieee80211com *ic, struct ieee80211_node *ni,
  struct ieee80211_key *k)
889{
struct rsu_softc *sc = ic->ic_softcic_ac.ac_if.if_softc;
struct rsu_cmd_key cmd;

/* Defer setting of WEP keys until interface is brought up. */
if ((ic->ic_ific_ac.ac_if.if_flags & (IFF_UP0x1 | IFF_RUNNING0x40)) !=
   (IFF_UP0x1 | IFF_RUNNING0x40))
return (0);

/* Do it in a process context. */
cmd.key = *k;
cmd.ni = ni;
rsu_do_async(sc, rsu_set_key_cb, &cmd, sizeof(cmd));
sc->sc_key_tasks++;
return EBUSY16;
904}

906void
907rsu_set_key_cb(struct rsu_softc *sc, void *arg)
908{
struct rsu_cmd_key *cmd = arg;
struct ieee80211com *ic = &sc->sc_ic;
struct ieee80211_key *k = &cmd->key;
struct r92s_fw_cmd_set_key key;

sc->sc_key_tasks--;

memset(&key, 0, sizeof(key))__builtin_memset((&key), (0), (sizeof(key)));
/* Map net80211 cipher to HW crypto algorithm. */
switch (k->k_cipher) {
case IEEE80211_CIPHER_WEP40:
key.algo = R92S_KEY_ALGO_WEP401;
break;
case IEEE80211_CIPHER_WEP104:
key.algo = R92S_KEY_ALGO_WEP1045;
break;
case IEEE80211_CIPHER_TKIP:
key.algo = R92S_KEY_ALGO_TKIP2;
break;
case IEEE80211_CIPHER_CCMP:
key.algo = R92S_KEY_ALGO_AES4;
break;
default:
IEEE80211_SEND_MGMT(ic, cmd->ni, IEEE80211_FC0_SUBTYPE_DEAUTH,((*(ic)->ic_send_mgmt)(ic, cmd->ni, 0xc0, IEEE80211_REASON_AUTH_LEAVE
, 0))
    IEEE80211_REASON_AUTH_LEAVE)((*(ic)->ic_send_mgmt)(ic, cmd->ni, 0xc0, IEEE80211_REASON_AUTH_LEAVE
, 0));
ieee80211_new_state(ic, IEEE80211_S_SCAN, -1)(((ic)->ic_newstate)((ic), (IEEE80211_S_SCAN), (-1)));
return;
}
key.id = k->k_id;
key.grpkey = (k->k_flags & IEEE80211_KEY_GROUP0x00000001) != 0;
memcpy(key.key, k->k_key, MIN(k->k_len, sizeof(key.key)))__builtin_memcpy((key.key), (k->k_key), ((((k->k_len)<
(sizeof(key.key)))?(k->k_len):(sizeof(key.key)))));
(void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY20, &key, sizeof(key));

if (sc->sc_key_tasks == 0) {
DPRINTF(("marking port %s valid\n",
    ether_sprintf(cmd->ni->ni_macaddr)));
cmd->ni->ni_port_valid = 1;
ieee80211_set_link_state(ic, LINK_STATE_UP4);
}
948}

950void
951rsu_delete_key(struct ieee80211com *ic, struct ieee80211_node *ni,
  struct ieee80211_key *k)
953{
struct rsu_softc *sc = ic->ic_softcic_ac.ac_if.if_softc;
struct rsu_cmd_key cmd;

if (!(ic->ic_ific_ac.ac_if.if_flags & IFF_RUNNING0x40) ||
   ic->ic_state != IEEE80211_S_RUN)
return;	/* Nothing to do. */

/* Do it in a process context. */
cmd.key = *k;
rsu_do_async(sc, rsu_delete_key_cb, &cmd, sizeof(cmd));
964}

966void
967rsu_delete_key_cb(struct rsu_softc *sc, void *arg)
968{
struct rsu_cmd_key *cmd = arg;
struct ieee80211_key *k = &cmd->key;
struct r92s_fw_cmd_set_key key;

memset(&key, 0, sizeof(key))__builtin_memset((&key), (0), (sizeof(key)));
key.id = k->k_id;
(void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY20, &key, sizeof(key));
976}

978int
979rsu_site_survey(struct rsu_softc *sc)
980{
struct ieee80211com *ic = &sc->sc_ic;
struct r92s_fw_cmd_sitesurvey cmd;

memset(&cmd, 0, sizeof(cmd))__builtin_memset((&cmd), (0), (sizeof(cmd)));
if ((ic->ic_flags & IEEE80211_F_ASCAN0x00000001) || sc->scan_pass == 1)
cmd.active = htole32(1)((__uint32_t)(1));
cmd.limit = htole32(48)((__uint32_t)(48));
if (sc->scan_pass == 1) {
/* Do a directed scan for second pass. */
cmd.ssidlen = htole32(ic->ic_des_esslen)((__uint32_t)(ic->ic_des_esslen));
memcpy(cmd.ssid, ic->ic_des_essid, ic->ic_des_esslen)__builtin_memcpy((cmd.ssid), (ic->ic_des_essid), (ic->ic_des_esslen
));
}
DPRINTF(("sending site survey command, pass=%d\n", sc->scan_pass));
return (rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY18, &cmd, sizeof(cmd)));
995}

997int
998rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni)
999{
struct ieee80211com *ic = &sc->sc_ic;
struct ndis_wlan_bssid_ex *bss;
struct ndis_802_11_fixed_ies *fixed;
struct r92s_fw_cmd_auth auth;
uint8_t buf[sizeof(*bss) + 128], *frm;
uint8_t opmode;
int error;

/* Let the FW decide the opmode based on the capinfo field. */
opmode = NDIS802_11AUTOUNKNOWN2;
DPRINTF(("setting operating mode to %d\n", opmode));
error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE17, &opmode, sizeof(opmode));
if (error != 0)
return (error);

memset(&auth, 0, sizeof(auth))__builtin_memset((&auth), (0), (sizeof(auth)));
if (ic->ic_flags & IEEE80211_F_RSNON0x00200000) {
auth.mode = R92S_AUTHMODE_WPA2;
auth.dot1x = ieee80211_is_8021x_akm(ni->ni_rsnakms);
} else
auth.mode = R92S_AUTHMODE_OPEN0;
DPRINTF(("setting auth mode to %d\n", auth.mode));
error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH19, &auth, sizeof(auth));
if (error != 0)
return (error);

memset(buf, 0, sizeof(buf))__builtin_memset((buf), (0), (sizeof(buf)));
bss = (struct ndis_wlan_bssid_ex *)buf;
IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid)__builtin_memcpy((bss->macaddr), (ni->ni_bssid), (6));
bss->ssid.ssidlen = htole32(ni->ni_esslen)((__uint32_t)(ni->ni_esslen));
memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen)__builtin_memcpy((bss->ssid.ssid), (ni->ni_essid), (ni->
ni_esslen));
if (ic->ic_flags & (IEEE80211_F_WEPON0x00000100 | IEEE80211_F_RSNON0x00200000))
bss->privacy = htole32(1)((__uint32_t)(1));
bss->rssi = htole32(ni->ni_rssi)((__uint32_t)(ni->ni_rssi));
if (ic->ic_curmode == IEEE80211_MODE_11B)
bss->networktype = htole32(NDIS802_11DS)((__uint32_t)(1));
else
bss->networktype = htole32(NDIS802_11OFDM24)((__uint32_t)(3));
bss->config.len = htole32(sizeof(bss->config))((__uint32_t)(sizeof(bss->config)));
bss->config.bintval = htole32(ni->ni_intval)((__uint32_t)(ni->ni_intval));
bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan))((__uint32_t)(ieee80211_chan2ieee(ic, ni->ni_chan)));
bss->inframode = htole32(NDIS802_11INFRASTRUCTURE)((__uint32_t)(1));
memcpy(bss->supprates, ni->ni_rates.rs_rates,__builtin_memcpy((bss->supprates), (ni->ni_rates.rs_rates
), (ni->ni_rates.rs_nrates))
   ni->ni_rates.rs_nrates)__builtin_memcpy((bss->supprates), (ni->ni_rates.rs_rates
), (ni->ni_rates.rs_nrates));
/* Write the fixed fields of the beacon frame. */
fixed = (struct ndis_802_11_fixed_ies *)&bss[1];
memcpy(&fixed->tstamp, ni->ni_tstamp, 8)__builtin_memcpy((&fixed->tstamp), (ni->ni_tstamp),
 (8));
fixed->bintval = htole16(ni->ni_intval)((__uint16_t)(ni->ni_intval));
fixed->capabilities = htole16(ni->ni_capinfo)((__uint16_t)(ni->ni_capinfo));
/* Write IEs to be included in the association request. */
frm = (uint8_t *)&fixed[1];
if ((ic->ic_flags & IEEE80211_F_RSNON0x00200000) &&
   (ni->ni_rsnprotos & IEEE80211_PROTO_RSN(1 << 0)))
frm = ieee80211_add_rsn(frm, ic, ni);
if (ni->ni_flags & IEEE80211_NODE_QOS0x0002)
frm = ieee80211_add_qos_capability(frm, ic);
if (ni->ni_flags & IEEE80211_NODE_HT0x0400)
frm = ieee80211_add_htcaps(frm, ic);
if ((ic->ic_flags & IEEE80211_F_RSNON0x00200000) &&
   (ni->ni_rsnprotos & IEEE80211_PROTO_WPA(1 << 1)))
frm = ieee80211_add_wpa(frm, ic, ni);
bss->ieslen = htole32(frm - (uint8_t *)fixed)((__uint32_t)(frm - (uint8_t *)fixed));
bss->len = htole32(((frm - buf) + 3) & ~3)((__uint32_t)(((frm - buf) + 3) & ~3));
DPRINTF(("sending join bss command to %s chan %d\n",
   ether_sprintf(bss->macaddr), letoh32(bss->config.dsconfig)));
return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS14, buf, sizeof(buf)));
1066}

1068int
1069rsu_disconnect(struct rsu_softc *sc)
1070{
uint32_t zero = 0;	/* :-) */

/* Disassociate from our current BSS. */
DPRINTF(("sending disconnect command\n"));
return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT15, &zero, sizeof(zero)));
1076}

1078void
1079rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len)
1080{
struct ieee80211com *ic = &sc->sc_ic;
struct ifnet *ifp = &ic->ic_ific_ac.ac_if;
struct ieee80211_rxinfo rxi;
struct ieee80211_node *ni;
struct ieee80211_frame *wh;
struct ndis_wlan_bssid_ex *bss;
struct mbuf *m;
uint32_t pktlen, ieslen;

if (__predict_false(len < sizeof(*bss))__builtin_expect(((len < sizeof(*bss)) != 0), 0))
return;
bss = (struct ndis_wlan_bssid_ex *)buf;
ieslen = letoh32(bss->ieslen)((__uint32_t)(bss->ieslen));
if (ieslen > len - sizeof(*bss))
return;

DPRINTFN(2, ("found BSS %s: len=%d chan=%d inframode=%d "
   "networktype=%d privacy=%d\n",
   ether_sprintf(bss->macaddr), letoh32(bss->len),
   letoh32(bss->config.dsconfig), letoh32(bss->inframode),
   letoh32(bss->networktype), letoh32(bss->privacy)));

/* Build a fake beacon frame to let net80211 do all the parsing. */
pktlen = sizeof(*wh) + ieslen;
if (__predict_false(pktlen > MCLBYTES)__builtin_expect(((pktlen > (1 << 11)) != 0), 0))
return;
MGETHDR(m, M_DONTWAIT, MT_DATA)m = m_gethdr((0x0002), (1));
if (__predict_false(m == NULL)__builtin_expect(((m == ((void *)0)) != 0), 0))
return;
if (pktlen > MHLEN((256 - sizeof(struct m_hdr)) - sizeof(struct pkthdr))) {
MCLGET(m, M_DONTWAIT)(void) m_clget((m), (0x0002), (1 << 11));
if (!(m->m_flagsm_hdr.mh_flags & M_EXT0x0001)) {
	m_free(m);
	return;
}
}
wh = mtod(m, struct ieee80211_frame *)((struct ieee80211_frame *)((m)->m_hdr.mh_data));
wh->i_fc[0] = IEEE80211_FC0_VERSION_00x00 | IEEE80211_FC0_TYPE_MGT0x00 |
   IEEE80211_FC0_SUBTYPE_BEACON0x80;
wh->i_fc[1] = IEEE80211_FC1_DIR_NODS0x00;
*(uint16_t *)wh->i_dur = 0;
IEEE80211_ADDR_COPY(wh->i_addr1, etherbroadcastaddr)__builtin_memcpy((wh->i_addr1), (etherbroadcastaddr), (6));
IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr)__builtin_memcpy((wh->i_addr2), (bss->macaddr), (6));
IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr)__builtin_memcpy((wh->i_addr3), (bss->macaddr), (6));
*(uint16_t *)wh->i_seq = 0;
memcpy(&wh[1], (uint8_t *)&bss[1], ieslen)__builtin_memcpy((&wh[1]), ((uint8_t *)&bss[1]), (ieslen
));

/* Finalize mbuf. */
m->m_pkthdrM_dat.MH.MH_pkthdr.len = m->m_lenm_hdr.mh_len = pktlen;

ni = ieee80211_find_rxnode(ic, wh);
memset(&rxi, 0, sizeof(rxi))__builtin_memset((&rxi), (0), (sizeof(rxi)));
rxi.rxi_rssi = letoh32(bss->rssi)((__uint32_t)(bss->rssi));
ieee80211_input(ifp, m, ni, &rxi);
/* Node is no longer needed. */
ieee80211_release_node(ic, ni);
1137}

1139void
1140rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len)
1141{
struct ieee80211com *ic = &sc->sc_ic;
struct ieee80211_node *ni = ic->ic_bss;
struct r92s_event_join_bss *rsp;
int res;

if (__predict_false(len < sizeof(*rsp))__builtin_expect(((len < sizeof(*rsp)) != 0), 0))
return;
rsp = (struct r92s_event_join_bss *)buf;
res = (int)letoh32(rsp->join_res)((__uint32_t)(rsp->join_res));

DPRINTF(("Rx join BSS event len=%d res=%d\n", len, res));
if (res <= 0) {
ic->ic_stats.is_rx_auth_fail++;
ieee80211_new_state(ic, IEEE80211_S_SCAN, -1)(((ic)->ic_newstate)((ic), (IEEE80211_S_SCAN), (-1)));
return;
}
DPRINTF(("associated with %s associd=%d\n",
   ether_sprintf(rsp->bss.macaddr), letoh32(rsp->associd)));

ni->ni_associd = letoh32(rsp->associd)((__uint32_t)(rsp->associd)) | 0xc000;
if (ic->ic_flags & IEEE80211_F_WEPON0x00000100)
ni->ni_flags |= IEEE80211_NODE_TXRXPROT(0x0010 | 0x0008);

/* Force an ASSOC->RUN transition. AUTH->RUN is invalid. */
ic->ic_state = IEEE80211_S_ASSOC;
ieee80211_new_state(ic, IEEE80211_S_RUN,(((ic)->ic_newstate)((ic), (IEEE80211_S_RUN), (0x10)))
   IEEE80211_FC0_SUBTYPE_ASSOC_RESP)(((ic)->ic_newstate)((ic), (IEEE80211_S_RUN), (0x10)));
1169}

1171void
1172rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len)
1173{
struct ieee80211com *ic = &sc->sc_ic;
struct ifnet *ifp = &ic->ic_ific_ac.ac_if;

DPRINTFN(4, ("Rx event code=%d len=%d\n", code, len));
switch (code) {
case R92S_EVT_SURVEY8:
if (ic->ic_state == IEEE80211_S_SCAN)
	rsu_event_survey(sc, buf, len);
break;
case R92S_EVT_SURVEY_DONE9:
DPRINTF(("site survey pass %d done, found %d BSS\n",
    sc->scan_pass, letoh32(*(uint32_t *)buf)));
if (ic->ic_state != IEEE80211_S_SCAN)
	break;	/* Ignore if not scanning. */
if (sc->scan_pass == 0 && ic->ic_des_esslen != 0) {
	/* Schedule a directed scan for hidden APs. */
	sc->scan_pass = 1;
	ieee80211_new_state(ic, IEEE80211_S_SCAN, -1)(((ic)->ic_newstate)((ic), (IEEE80211_S_SCAN), (-1)));
	break;
}
ieee80211_end_scan(ifp);
sc->scan_pass = 0;
break;
case R92S_EVT_JOIN_BSS10:
if (ic->ic_state == IEEE80211_S_AUTH)
	rsu_event_join_bss(sc, buf, len);
break;
case R92S_EVT_DEL_STA12:
DPRINTF(("disassociated from %s\n", ether_sprintf(buf)));
if (ic->ic_state == IEEE80211_S_RUN &&
    IEEE80211_ADDR_EQ(ic->ic_bss->ni_bssid, buf)(__builtin_memcmp((ic->ic_bss->ni_bssid), (buf), (6)) ==
 0))
	ieee80211_new_state(ic, IEEE80211_S_SCAN, -1)(((ic)->ic_newstate)((ic), (IEEE80211_S_SCAN), (-1)));
break;
case R92S_EVT_WPS_PBC24:
DPRINTF(("WPS PBC pushed.\n"));
break;
case R92S_EVT_FWDBG19:
if (ifp->if_flags & IFF_DEBUG0x4) {
	buf[60] = '\0';
	printf("FWDBG: %s\n", (char *)buf);
}
break;
}
1217}

1219void
1220rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len)
1221{
struct r92s_fw_cmd_hdr *cmd;
int cmdsz;

DPRINTFN(6, ("Rx events len=%d\n", len));

/* Skip Rx status. */
buf += sizeof(struct r92s_rx_stat);
len -= sizeof(struct r92s_rx_stat);

/* Process all events. */
for (;;) {
/* Check that command header fits. */
if (__predict_false(len < sizeof(*cmd))__builtin_expect(((len < sizeof(*cmd)) != 0), 0))
	break;
cmd = (struct r92s_fw_cmd_hdr *)buf;
/* Check that command payload fits. */
cmdsz = letoh16(cmd->len)((__uint16_t)(cmd->len));
if (__predict_false(len < sizeof(*cmd) + cmdsz)__builtin_expect(((len < sizeof(*cmd) + cmdsz) != 0), 0))
	break;
if (cmdsz > len)
	break;

/* Process firmware event. */
rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz);

if (!(cmd->seq & R92S_FW_CMD_MORE0x80))
	break;
buf += sizeof(*cmd) + cmdsz;
len -= sizeof(*cmd) + cmdsz;
}
1252}

1254int8_t
1255rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt)
1256{
static const int8_t cckoff[] = { 14, -2, -20, -40 };
struct r92s_rx_phystat *phy;
struct r92s_rx_cck *cck;
uint8_t rpt;
int8_t rssi;

if (rate <= 3) {
cck = (struct r92s_rx_cck *)physt;
rpt = (cck->agc_rpt >> 6) & 0x3;
rssi = cck->agc_rpt & 0x3e;
rssi = cckoff[rpt] - rssi;
} else {	/* OFDM/HT. */
phy = (struct r92s_rx_phystat *)physt;
rssi = ((letoh32(phy->phydw1)((__uint32_t)(phy->phydw1)) >> 1) & 0x7f) - 106;
}
return (rssi);
1273}

1275void
1276rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen,
  struct mbuf_list *ml)
1278{
struct ieee80211com *ic = &sc->sc_ic;
struct ifnet *ifp = &ic->ic_ific_ac.ac_if;
struct ieee80211_rxinfo rxi;
struct ieee80211_frame *wh;
struct ieee80211_node *ni;
struct r92s_rx_stat *stat;
uint32_t rxdw0, rxdw3;
struct mbuf *m;
uint8_t rate;
int8_t rssi = 0;
int s, infosz;

stat = (struct r92s_rx_stat *)buf;
rxdw0 = letoh32(stat->rxdw0)((__uint32_t)(stat->rxdw0));
rxdw3 = letoh32(stat->rxdw3)((__uint32_t)(stat->rxdw3));

if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)__builtin_expect(((rxdw0 & 0x00004000) != 0), 0)) {
ifp->if_ierrorsif_data.ifi_ierrors++;
return;
}
if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)__builtin_expect(((pktlen < sizeof(*wh) || pktlen > (1 <<
 11)) != 0), 0)) {
ifp->if_ierrorsif_data.ifi_ierrors++;
return;
}

rate = MS(rxdw3, R92S_RXDW3_RATE)(((rxdw3) & 0x0000003f) >> 0);
infosz = MS(rxdw0, R92S_RXDW0_INFOSZ)(((rxdw0) & 0x000f0000) >> 16) * 8;

/* Get RSSI from PHY status descriptor if present. */
if (infosz != 0)
rssi = rsu_get_rssi(sc, rate, &stat[1]);

DPRINTFN(5, ("Rx frame len=%d rate=%d infosz=%d rssi=%d\n",
   pktlen, rate, infosz, rssi));

MGETHDR(m, M_DONTWAIT, MT_DATA)m = m_gethdr((0x0002), (1));
if (__predict_false(m == NULL)__builtin_expect(((m == ((void *)0)) != 0), 0)) {
ifp->if_ierrorsif_data.ifi_ierrors++;
return;
}
if (pktlen > MHLEN((256 - sizeof(struct m_hdr)) - sizeof(struct pkthdr))) {
MCLGET(m, M_DONTWAIT)(void) m_clget((m), (0x0002), (1 << 11));
if (__predict_false(!(m->m_flags & M_EXT))__builtin_expect(((!(m->m_hdr.mh_flags & 0x0001)) != 0
), 0)) {
	ifp->if_ierrorsif_data.ifi_ierrors++;
	m_freem(m);
	return;
}
}
/* Finalize mbuf. */
/* Hardware does Rx TCP checksum offload. */
if (rxdw3 & R92S_RXDW3_TCPCHKVALID0x00002000) {
if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)__builtin_expect(((rxdw3 & 0x00000800) != 0), 1))
	m->m_pkthdrM_dat.MH.MH_pkthdr.csum_flags |= M_TCP_CSUM_IN_OK0x0020;
else
	m->m_pkthdrM_dat.MH.MH_pkthdr.csum_flags |= M_TCP_CSUM_IN_BAD0x0040;
}
wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz);
memcpy(mtod(m, uint8_t *), wh, pktlen)__builtin_memcpy((((uint8_t *)((m)->m_hdr.mh_data))), (wh)
, (pktlen));
m->m_pkthdrM_dat.MH.MH_pkthdr.len = m->m_lenm_hdr.mh_len = pktlen;

s = splnet()splraise(0x4);
1340#if NBPFILTER1 > 0
if (__predict_false(sc->sc_drvbpf != NULL)__builtin_expect(((sc->sc_drvbpf != ((void *)0)) != 0), 0)) {
struct rsu_rx_radiotap_header *tap = &sc->sc_rxtapsc_rxtapu.th;
struct mbuf mb;

tap->wr_flags = 0;
/* Map HW rate index to 802.11 rate. */
tap->wr_flags = 2;
if (!(rxdw3 & R92S_RXDW3_HTC0x00004000)) {
	switch (rate) {
	/* CCK. */
	case  0: tap->wr_rate =   2; break;
	case  1: tap->wr_rate =   4; break;
	case  2: tap->wr_rate =  11; break;
	case  3: tap->wr_rate =  22; break;
	/* OFDM. */
	case  4: tap->wr_rate =  12; break;
	case  5: tap->wr_rate =  18; break;
	case  6: tap->wr_rate =  24; break;
	case  7: tap->wr_rate =  36; break;
	case  8: tap->wr_rate =  48; break;
	case  9: tap->wr_rate =  72; break;
	case 10: tap->wr_rate =  96; break;
	case 11: tap->wr_rate = 108; break;
	}
} else if (rate >= 12) {	/* MCS0~15. */
	/* Bit 7 set means HT MCS instead of rate. */
	tap->wr_rate = 0x80 | (rate - 12);
}
tap->wr_dbm_antsignal = rssi;
tap->wr_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq)((__uint16_t)(ic->ic_bss->ni_chan->ic_freq));
tap->wr_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags)((__uint16_t)(ic->ic_bss->ni_chan->ic_flags));

mb.m_datam_hdr.mh_data = (caddr_t)tap;
mb.m_lenm_hdr.mh_len = sc->sc_rxtap_len;
mb.m_nextm_hdr.mh_next = m;
mb.m_nextpktm_hdr.mh_nextpkt = NULL((void *)0);
mb.m_typem_hdr.mh_type = 0;
mb.m_flagsm_hdr.mh_flags = 0;
bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN(1 << 0));
}
1381#endif

ni = ieee80211_find_rxnode(ic, wh);
memset(&rxi, 0, sizeof(rxi))__builtin_memset((&rxi), (0), (sizeof(rxi)));
rxi.rxi_rssi = rssi;
ieee80211_inputm(ifp, m, ni, &rxi, ml);
/* Node is no longer needed. */
ieee80211_release_node(ic, ni);
splx(s)spllower(s);
1390}

1392void
1393rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len)
1394{
struct mbuf_list ml = MBUF_LIST_INITIALIZER(){ ((void *)0), ((void *)0), 0 };
struct r92s_rx_stat *stat;
uint32_t rxdw0;
int totlen, pktlen, infosz, npkts;

/* Get the number of encapsulated frames. */
stat = (struct r92s_rx_stat *)buf;
npkts = MS(letoh32(stat->rxdw2), R92S_RXDW2_PKTCNT)(((((__uint32_t)(stat->rxdw2))) & 0x00ff0000) >>
 16);
DPRINTFN(6, ("Rx %d frames in one chunk\n", npkts));

/* Process all of them. */
while (npkts-- > 0) {
if (__predict_false(len < sizeof(*stat))__builtin_expect(((len < sizeof(*stat)) != 0), 0))
	break;
stat = (struct r92s_rx_stat *)buf;
rxdw0 = letoh32(stat->rxdw0)((__uint32_t)(stat->rxdw0));

pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN)(((rxdw0) & 0x00003fff) >> 0);
if (__predict_false(pktlen == 0)__builtin_expect(((pktlen == 0) != 0), 0))
	break;

infosz = MS(rxdw0, R92S_RXDW0_INFOSZ)(((rxdw0) & 0x000f0000) >> 16) * 8;

/* Make sure everything fits in xfer. */
totlen = sizeof(*stat) + infosz + pktlen;
if (__predict_false(totlen > len)__builtin_expect(((totlen > len) != 0), 0))
	break;

/* Process 802.11 frame. */
rsu_rx_frame(sc, buf, pktlen, &ml);

/* Next chunk is 128-byte aligned. */
totlen = (totlen + 127) & ~127;
buf += totlen;
len -= totlen;
}
if_input(&sc->sc_ic.ic_ific_ac.ac_if, &ml);
1432}

1434void
1435rsu_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1436{
struct rsu_rx_data *data = priv;
struct rsu_softc *sc = data->sc;
struct r92s_rx_stat *stat;
struct ifnet *ifp = &sc->sc_ic.ic_ific_ac.ac_if;
int len;

if (__predict_false(status != USBD_NORMAL_COMPLETION)__builtin_expect(((status != USBD_NORMAL_COMPLETION) != 0), 0
)) {
DPRINTF(("RX status=%d\n", status));
if (status == USBD_STALLED)
	usbd_clear_endpoint_stall_async(data->pipe);
if (status != USBD_CANCELLED)
	goto resubmit;
return;
}
usbd_get_xfer_status(xfer, NULL((void *)0), NULL((void *)0), &len, NULL((void *)0));

if (__predict_false(len < sizeof(*stat))__builtin_expect(((len < sizeof(*stat)) != 0), 0)) {
DPRINTF(("xfer too short %d\n", len));
ifp->if_ierrorsif_data.ifi_ierrors++;
goto resubmit;
}
if (len > RSU_RXBUFSZ(8 * 1024)) {
DPRINTF(("xfer too large %d\n", len));
ifp->if_ierrorsif_data.ifi_ierrors++;
goto resubmit;
}

/* Determine if it is a firmware C2H event or an 802.11 frame. */
stat = (struct r92s_rx_stat *)data->buf;
if ((letoh32(stat->rxdw1)((__uint32_t)(stat->rxdw1)) & 0x1ff) == 0x1ff)
rsu_rx_multi_event(sc, data->buf, len);
else
rsu_rx_multi_frame(sc, data->buf, len);

resubmit:
/* Setup a new transfer. */
usbd_setup_xfer(xfer, data->pipe, data, data->buf, RSU_RXBUFSZ(8 * 1024),
   USBD_SHORT_XFER_OK0x04 | USBD_NO_COPY0x01, USBD_NO_TIMEOUT0, rsu_rxeof);
(void)usbd_transfer(xfer);
1476}

1478void
1479rsu_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1480{
struct rsu_tx_data *data = priv;
struct rsu_softc *sc = data->sc;
struct ifnet *ifp = &sc->sc_ic.ic_ific_ac.ac_if;
int s;

s = splnet()splraise(0x4);
/* Put this Tx buffer back to our free list. */
TAILQ_INSERT_TAIL(&sc->tx_free_list, data, next)do { (data)->next.tqe_next = ((void *)0); (data)->next.
tqe_prev = (&sc->tx_free_list)->tqh_last; *(&sc
->tx_free_list)->tqh_last = (data); (&sc->tx_free_list
)->tqh_last = &(data)->next.tqe_next; } while (0);

if (__predict_false(status != USBD_NORMAL_COMPLETION)__builtin_expect(((status != USBD_NORMAL_COMPLETION) != 0), 0
)) {
DPRINTF(("TX status=%d\n", status));
if (status == USBD_STALLED)
	usbd_clear_endpoint_stall_async(data->pipe);
ifp->if_oerrorsif_data.ifi_oerrors++;
splx(s)spllower(s);
return;
}
sc->sc_tx_timer = 0;

/* We just released a Tx buffer, notify Tx. */
if (ifq_is_oactive(&ifp->if_snd)) {
ifq_clr_oactive(&ifp->if_snd);
rsu_start(ifp);
}
splx(s)spllower(s);
1506}

1508int
1509rsu_tx(struct rsu_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
1510{
struct ieee80211com *ic = &sc->sc_ic;
struct ieee80211_frame *wh;
struct ieee80211_key *k = NULL((void *)0);
struct rsu_tx_data *data;
struct r92s_tx_desc *txd;
struct usbd_pipe *pipe;
uint16_t qos;
uint8_t type, qid, tid = 0;
int hasqos, xferlen, error;

wh = mtod(m, struct ieee80211_frame *)((struct ieee80211_frame *)((m)->m_hdr.mh_data));
type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK0x0c;

if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED0x40) {
k = ieee80211_get_txkey(ic, wh, ni);
if ((m = ieee80211_encrypt(ic, m, k)) == NULL((void *)0))
	return (ENOBUFS55);
wh = mtod(m, struct ieee80211_frame *)((struct ieee80211_frame *)((m)->m_hdr.mh_data));
}
if ((hasqos = ieee80211_has_qos(wh))) {
qos = ieee80211_get_qos(wh);
tid = qos & IEEE80211_QOS_TID0x000f;
qid = rsu_ac2qid[ieee80211_up_to_ac(ic, tid)];
} else
qid = RSU_QID_BE5;

/* Get the USB pipe to use for this queue id. */
pipe = sc->pipe[sc->qid2idx[qid]];

/* Grab a Tx buffer from our free list. */
data = TAILQ_FIRST(&sc->tx_free_list)((&sc->tx_free_list)->tqh_first);
TAILQ_REMOVE(&sc->tx_free_list, data, next)do { if (((data)->next.tqe_next) != ((void *)0)) (data)->
next.tqe_next->next.tqe_prev = (data)->next.tqe_prev; else
 (&sc->tx_free_list)->tqh_last = (data)->next.tqe_prev
; *(data)->next.tqe_prev = (data)->next.tqe_next; ((data
)->next.tqe_prev) = ((void *)-1); ((data)->next.tqe_next
) = ((void *)-1); } while (0);

/* Fill Tx descriptor. */
txd = (struct r92s_tx_desc *)data->buf;
memset(txd, 0, sizeof(*txd))__builtin_memset((txd), (0), (sizeof(*txd)));

txd->txdw0 |= htole32(((__uint32_t)((((m->M_dat.MH.MH_pkthdr.len) << 0) &
 0x0000ffff) | (((sizeof(*txd)) << 16) & 0x00ff0000
) | 0x80000000 | 0x08000000 | 0x04000000))
   SM(R92S_TXDW0_PKTLEN, m->m_pkthdr.len) |((__uint32_t)((((m->M_dat.MH.MH_pkthdr.len) << 0) &
 0x0000ffff) | (((sizeof(*txd)) << 16) & 0x00ff0000
) | 0x80000000 | 0x08000000 | 0x04000000))
   SM(R92S_TXDW0_OFFSET, sizeof(*txd)) |((__uint32_t)((((m->M_dat.MH.MH_pkthdr.len) << 0) &
 0x0000ffff) | (((sizeof(*txd)) << 16) & 0x00ff0000
) | 0x80000000 | 0x08000000 | 0x04000000))
   R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG)((__uint32_t)((((m->M_dat.MH.MH_pkthdr.len) << 0) &
 0x0000ffff) | (((sizeof(*txd)) << 16) & 0x00ff0000
) | 0x80000000 | 0x08000000 | 0x04000000));

txd->txdw1 |= htole32(((__uint32_t)((((5) << 0) & 0x0000001f) | (((0x03) <<
 8) & 0x00001f00)))
   SM(R92S_TXDW1_MACID, R92S_MACID_BSS) |((__uint32_t)((((5) << 0) & 0x0000001f) | (((0x03) <<
 8) & 0x00001f00)))
   SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_BE))((__uint32_t)((((5) << 0) & 0x0000001f) | (((0x03) <<
 8) & 0x00001f00)));
if (!hasqos)
txd->txdw1 |= htole32(R92S_TXDW1_NONQOS)((__uint32_t)(0x00010000));
1558#ifdef notyet
if (k != NULL((void *)0)) {
switch (k->k_cipher) {
case IEEE80211_CIPHER_WEP40:
case IEEE80211_CIPHER_WEP104:
	cipher = R92S_TXDW1_CIPHER_WEP1;
	break;
case IEEE80211_CIPHER_TKIP:
	cipher = R92S_TXDW1_CIPHER_TKIP2;
	break;
case IEEE80211_CIPHER_CCMP:
	cipher = R92S_TXDW1_CIPHER_AES3;
	break;
default:
	cipher = R92S_TXDW1_CIPHER_NONE;
}
txd->txdw1 |= htole32(((__uint32_t)((((cipher) << 22) & 0x00c00000) | (((
k->k_id) << 17) & 0x00060000)))
    SM(R92S_TXDW1_CIPHER, cipher) |((__uint32_t)((((cipher) << 22) & 0x00c00000) | (((
k->k_id) << 17) & 0x00060000)))
    SM(R92S_TXDW1_KEYIDX, k->k_id))((__uint32_t)((((cipher) << 22) & 0x00c00000) | (((
k->k_id) << 17) & 0x00060000)));
}
1578#endif
txd->txdw2 |= htole32(R92S_TXDW2_BK)((__uint32_t)(0x40000000));
if (IEEE80211_IS_MULTICAST(wh->i_addr1)(*(wh->i_addr1) & 0x01))
txd->txdw2 |= htole32(R92S_TXDW2_BMCAST)((__uint32_t)(0x00000080));
/*
* Firmware will use and increment the sequence number for the
* specified TID.
*/
txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, tid))((__uint32_t)((((tid) << 16) & 0x0fff0000)));

1588#if NBPFILTER1 > 0
if (__predict_false(sc->sc_drvbpf != NULL)__builtin_expect(((sc->sc_drvbpf != ((void *)0)) != 0), 0)) {
struct rsu_tx_radiotap_header *tap = &sc->sc_txtapsc_txtapu.th;
struct mbuf mb;

tap->wt_flags = 0;
tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq)((__uint16_t)(ic->ic_bss->ni_chan->ic_freq));
tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags)((__uint16_t)(ic->ic_bss->ni_chan->ic_flags));

mb.m_datam_hdr.mh_data = (caddr_t)tap;
mb.m_lenm_hdr.mh_len = sc->sc_txtap_len;
mb.m_nextm_hdr.mh_next = m;
mb.m_nextpktm_hdr.mh_nextpkt = NULL((void *)0);
mb.m_typem_hdr.mh_type = 0;
mb.m_flagsm_hdr.mh_flags = 0;
bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT(1 << 1));
}
1605#endif

xferlen = sizeof(*txd) + m->m_pkthdrM_dat.MH.MH_pkthdr.len;
m_copydata(m, 0, m->m_pkthdrM_dat.MH.MH_pkthdr.len, &txd[1]);
m_freem(m);

data->pipe = pipe;
usbd_setup_xfer(data->xfer, pipe, data, data->buf, xferlen,
   USBD_FORCE_SHORT_XFER0x08 | USBD_NO_COPY0x01, RSU_TX_TIMEOUT5000,
   rsu_txeof);
error = usbd_transfer(data->xfer);
if (__predict_false(error != USBD_IN_PROGRESS && error != 0)__builtin_expect(((error != USBD_IN_PROGRESS && error
 != 0) != 0), 0)) {
/* Put this Tx buffer back to our free list. */
TAILQ_INSERT_TAIL(&sc->tx_free_list, data, next)do { (data)->next.tqe_next = ((void *)0); (data)->next.
tqe_prev = (&sc->tx_free_list)->tqh_last; *(&sc
->tx_free_list)->tqh_last = (data); (&sc->tx_free_list
)->tqh_last = &(data)->next.tqe_next; } while (0);
return (error);
}
ieee80211_release_node(ic, ni);
return (0);
1623}

1625int
1626rsu_send_mgmt(struct ieee80211com *ic, struct ieee80211_node *ni, int type,
  int arg1, int arg2)
1628{
return (EOPNOTSUPP45);
1630}

1632void
1633rsu_start(struct ifnet *ifp)
1634{
struct rsu_softc *sc = ifp->if_softc;
struct ieee80211com *ic = &sc->sc_ic;
struct ieee80211_node *ni;
struct mbuf *m;

if (!(ifp->if_flags & IFF_RUNNING0x40) || ifq_is_oactive(&ifp->if_snd))
return;

for (;;) {
if (TAILQ_EMPTY(&sc->tx_free_list)(((&sc->tx_free_list)->tqh_first) == ((void *)0))) {
	ifq_set_oactive(&ifp->if_snd);
	break;
}
if (ic->ic_state != IEEE80211_S_RUN)
	break;

/* Encapsulate and send data frames. */
m = ifq_dequeue(&ifp->if_snd);
if (m == NULL((void *)0))
	break;
1655#if NBPFILTER1 > 0
if (ifp->if_bpf != NULL((void *)0))
	bpf_mtap(ifp->if_bpf, m, BPF_DIRECTION_OUT(1 << 1));
1658#endif
if ((m = ieee80211_encap(ifp, m, &ni)) == NULL((void *)0))
	continue;

1662#if NBPFILTER1 > 0
if (ic->ic_rawbpf != NULL((void *)0))
	bpf_mtap(ic->ic_rawbpf, m, BPF_DIRECTION_OUT(1 << 1));
1665#endif
if (rsu_tx(sc, m, ni) != 0) {
	ieee80211_release_node(ic, ni);
	ifp->if_oerrorsif_data.ifi_oerrors++;
	continue;
}

sc->sc_tx_timer = 5;
ifp->if_timer = 1;
}
1675}

1677void
1678rsu_watchdog(struct ifnet *ifp)
1679{
struct rsu_softc *sc = ifp->if_softc;

ifp->if_timer = 0;

if (sc->sc_tx_timer > 0) {
if (--sc->sc_tx_timer == 0) {
	printf("%s: device timeout\n", sc->sc_dev.dv_xname);
	/* rsu_init(ifp); XXX needs a process context! */
	ifp->if_oerrorsif_data.ifi_oerrors++;
	return;
}
ifp->if_timer = 1;
}
ieee80211_watchdog(ifp);
1694}

1696int
1697rsu_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1698{
struct rsu_softc *sc = ifp->if_softc;
int s, error = 0;

if (usbd_is_dying(sc->sc_udev))
return ENXIO6;

usbd_ref_incr(sc->sc_udev);

s = splnet()splraise(0x4);

switch (cmd) {
case SIOCSIFADDR((unsigned long)0x80000000 | ((sizeof(struct ifreq) & 0x1fff
) << 16) | ((('i')) << 8) | ((12))):
ifp->if_flags |= IFF_UP0x1;
/* FALLTHROUGH */
case SIOCSIFFLAGS((unsigned long)0x80000000 | ((sizeof(struct ifreq) & 0x1fff
) << 16) | ((('i')) << 8) | ((16))):
if (ifp->if_flags & IFF_UP0x1) {
	if (!(ifp->if_flags & IFF_RUNNING0x40))
		rsu_init(ifp);
} else {
	if (ifp->if_flags & IFF_RUNNING0x40)
		rsu_stop(ifp);
}
break;
default:
error = ieee80211_ioctl(ifp, cmd, data);
}

if (error == ENETRESET52) {
if ((ifp->if_flags & (IFF_UP0x1 | IFF_RUNNING0x40)) ==
    (IFF_UP0x1 | IFF_RUNNING0x40)) {
	rsu_stop(ifp);
	rsu_init(ifp);
}
error = 0;
}
splx(s)spllower(s);

usbd_ref_decr(sc->sc_udev);

return (error);
1739}

1741/*
* Power on sequence for A-cut adapters.
*/
1744void
1745rsu_power_on_acut(struct rsu_softc *sc)
1746{
uint32_t reg;

rsu_write_1(sc, R92S_SPS0_CTRL(0x0000 + 0x011) + 1, 0x53);
rsu_write_1(sc, R92S_SPS0_CTRL(0x0000 + 0x011) + 0, 0x57);

/* Enable AFE macro block's bandgap and Mbias. */
rsu_write_1(sc, R92S_AFE_MISC(0x0000 + 0x010),
   rsu_read_1(sc, R92S_AFE_MISC(0x0000 + 0x010)) |
   R92S_AFE_MISC_BGEN0x01 | R92S_AFE_MISC_MBEN0x02);
/* Enable LDOA15 block. */
rsu_write_1(sc, R92S_LDOA15_CTRL(0x0000 + 0x020),
   rsu_read_1(sc, R92S_LDOA15_CTRL(0x0000 + 0x020)) | R92S_LDA15_EN0x01);

rsu_write_1(sc, R92S_SPS1_CTRL(0x0000 + 0x018),
   rsu_read_1(sc, R92S_SPS1_CTRL(0x0000 + 0x018)) | R92S_SPS1_LDEN0x01);
usbd_delay_ms(sc->sc_udev, 2);
/* Enable switch regulator block. */
rsu_write_1(sc, R92S_SPS1_CTRL(0x0000 + 0x018),
   rsu_read_1(sc, R92S_SPS1_CTRL(0x0000 + 0x018)) | R92S_SPS1_SWEN0x02);

rsu_write_4(sc, R92S_SPS1_CTRL(0x0000 + 0x018), 0x00a7b267);

rsu_write_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 1,
   rsu_read_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 1) | 0x08);

rsu_write_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1,
   rsu_read_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1) | 0x20);

rsu_write_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 1,
   rsu_read_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 1) & ~0x90);

/* Enable AFE clock. */
rsu_write_1(sc, R92S_AFE_XTAL_CTRL(0x0000 + 0x026) + 1,
   rsu_read_1(sc, R92S_AFE_XTAL_CTRL(0x0000 + 0x026) + 1) & ~0x04);
/* Enable AFE PLL macro block. */
rsu_write_1(sc, R92S_AFE_PLL_CTRL(0x0000 + 0x028),
   rsu_read_1(sc, R92S_AFE_PLL_CTRL(0x0000 + 0x028)) | 0x11);
/* Attach AFE PLL to MACTOP/BB. */
rsu_write_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000),
   rsu_read_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000)) & ~0x11);

/* Switch to 40MHz clock instead of 80MHz. */
rsu_write_2(sc, R92S_SYS_CLKR(0x0000 + 0x008),
   rsu_read_2(sc, R92S_SYS_CLKR(0x0000 + 0x008)) & ~R92S_SYS_CLKSEL0x0001);

/* Enable MAC clock. */
rsu_write_2(sc, R92S_SYS_CLKR(0x0000 + 0x008),
   rsu_read_2(sc, R92S_SYS_CLKR(0x0000 + 0x008)) |
   R92S_MAC_CLK_EN0x0800 | R92S_SYS_CLK_EN0x1000);

rsu_write_1(sc, R92S_PMC_FSM(0x0000 + 0x004), 0x02);

/* Enable digital core and IOREG R/W. */
rsu_write_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1,
   rsu_read_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1) | 0x08);

rsu_write_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1,
   rsu_read_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1) | 0x80);

/* Switch the control path to firmware. */
reg = rsu_read_2(sc, R92S_SYS_CLKR(0x0000 + 0x008));
reg = (reg & ~R92S_SWHW_SEL0x4000) | R92S_FWHW_SEL0x8000;
rsu_write_2(sc, R92S_SYS_CLKR(0x0000 + 0x008), reg);

rsu_write_2(sc, R92S_CR(0x0040 + 0x000), 0x37fc);

/* Fix USB RX FIFO issue. */
rsu_write_1(sc, 0xfe5c,
   rsu_read_1(sc, 0xfe5c) | 0x80);
rsu_write_1(sc, 0x00ab,
   rsu_read_1(sc, 0x00ab) | 0xc0);

rsu_write_1(sc, R92S_SYS_CLKR(0x0000 + 0x008),
   rsu_read_1(sc, R92S_SYS_CLKR(0x0000 + 0x008)) & ~R92S_SYS_CPU_CLKSEL0x0004);
1821}

1823/*
* Power on sequence for B-cut and C-cut adapters.
*/
1826void
1827rsu_power_on_bcut(struct rsu_softc *sc)
1828{
uint32_t reg;
int ntries;

/* Prevent eFuse leakage. */
rsu_write_1(sc, 0x37, 0xb0);
usbd_delay_ms(sc->sc_udev, 10);
rsu_write_1(sc, 0x37, 0x30);

/* Switch the control path to hardware. */
reg = rsu_read_2(sc, R92S_SYS_CLKR(0x0000 + 0x008));
if (reg & R92S_FWHW_SEL0x8000) {
rsu_write_2(sc, R92S_SYS_CLKR(0x0000 + 0x008),
    reg & ~(R92S_SWHW_SEL0x4000 | R92S_FWHW_SEL0x8000));
}
rsu_write_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1,
   rsu_read_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1) & ~0x8c);
DELAY(1000)(*delay_func)(1000);

rsu_write_1(sc, R92S_SPS0_CTRL(0x0000 + 0x011) + 1, 0x53);
rsu_write_1(sc, R92S_SPS0_CTRL(0x0000 + 0x011) + 0, 0x57);

reg = rsu_read_1(sc, R92S_AFE_MISC(0x0000 + 0x010));
rsu_write_1(sc, R92S_AFE_MISC(0x0000 + 0x010), reg | R92S_AFE_MISC_BGEN0x01);
rsu_write_1(sc, R92S_AFE_MISC(0x0000 + 0x010), reg | R92S_AFE_MISC_BGEN0x01 |
   R92S_AFE_MISC_MBEN0x02 | R92S_AFE_MISC_I32_EN0x08);

/* Enable PLL. */
rsu_write_1(sc, R92S_LDOA15_CTRL(0x0000 + 0x020),
   rsu_read_1(sc, R92S_LDOA15_CTRL(0x0000 + 0x020)) | R92S_LDA15_EN0x01);

rsu_write_1(sc, R92S_LDOV12D_CTRL(0x0000 + 0x021),
   rsu_read_1(sc, R92S_LDOV12D_CTRL(0x0000 + 0x021)) | R92S_LDV12_EN0x01);

rsu_write_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 1,
   rsu_read_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 1) | 0x08);

rsu_write_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1,
   rsu_read_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1) | 0x20);

/* Support 64KB IMEM. */
rsu_write_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 1,
   rsu_read_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 1) & ~0x97);

/* Enable AFE clock. */
rsu_write_1(sc, R92S_AFE_XTAL_CTRL(0x0000 + 0x026) + 1,
   rsu_read_1(sc, R92S_AFE_XTAL_CTRL(0x0000 + 0x026) + 1) & ~0x04);
/* Enable AFE PLL macro block. */
reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL(0x0000 + 0x028));
rsu_write_1(sc, R92S_AFE_PLL_CTRL(0x0000 + 0x028), reg | 0x11);
DELAY(500)(*delay_func)(500);
rsu_write_1(sc, R92S_AFE_PLL_CTRL(0x0000 + 0x028), reg | 0x51);
DELAY(500)(*delay_func)(500);
rsu_write_1(sc, R92S_AFE_PLL_CTRL(0x0000 + 0x028), reg | 0x11);
DELAY(500)(*delay_func)(500);

/* Attach AFE PLL to MACTOP/BB. */
rsu_write_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000),
   rsu_read_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000)) & ~0x11);

/* Switch to 40MHz clock. */
rsu_write_1(sc, R92S_SYS_CLKR(0x0000 + 0x008), 0x00);
/* Disable CPU clock and 80MHz SSC. */
rsu_write_1(sc, R92S_SYS_CLKR(0x0000 + 0x008),
   rsu_read_1(sc, R92S_SYS_CLKR(0x0000 + 0x008)) | 0xa0);
/* Enable MAC clock. */
rsu_write_2(sc, R92S_SYS_CLKR(0x0000 + 0x008),
   rsu_read_2(sc, R92S_SYS_CLKR(0x0000 + 0x008)) |
   R92S_MAC_CLK_EN0x0800 | R92S_SYS_CLK_EN0x1000);

rsu_write_1(sc, R92S_PMC_FSM(0x0000 + 0x004), 0x02);

/* Enable digital core and IOREG R/W. */
rsu_write_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1,
   rsu_read_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1) | 0x08);

rsu_write_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1,
   rsu_read_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1) | 0x80);

/* Switch the control path to firmware. */
reg = rsu_read_2(sc, R92S_SYS_CLKR(0x0000 + 0x008));
reg = (reg & ~R92S_SWHW_SEL0x4000) | R92S_FWHW_SEL0x8000;
rsu_write_2(sc, R92S_SYS_CLKR(0x0000 + 0x008), reg);

rsu_write_2(sc, R92S_CR(0x0040 + 0x000), 0x37fc);

/* Fix USB RX FIFO issue. */
rsu_write_1(sc, 0xfe5c,
   rsu_read_1(sc, 0xfe5c) | 0x80);

rsu_write_1(sc, R92S_SYS_CLKR(0x0000 + 0x008),
   rsu_read_1(sc, R92S_SYS_CLKR(0x0000 + 0x008)) & ~R92S_SYS_CPU_CLKSEL0x0004);

rsu_write_1(sc, 0xfe1c, 0x80);

/* Make sure TxDMA is ready to download firmware. */
for (ntries = 0; ntries < 20; ntries++) {
reg = rsu_read_1(sc, R92S_TCR(0x0040 + 0x004));
if ((reg & (R92S_TCR_IMEM_CHK_RPT0x02 | R92S_TCR_EMEM_CHK_RPT0x08)) ==
    (R92S_TCR_IMEM_CHK_RPT0x02 | R92S_TCR_EMEM_CHK_RPT0x08))
	break;
DELAY(5)(*delay_func)(5);
}
if (ntries == 20) {
/* Reset TxDMA. */
reg = rsu_read_1(sc, R92S_CR(0x0040 + 0x000));
rsu_write_1(sc, R92S_CR(0x0040 + 0x000), reg & ~R92S_CR_TXDMA_EN0x10);
DELAY(2)(*delay_func)(2);
rsu_write_1(sc, R92S_CR(0x0040 + 0x000), reg | R92S_CR_TXDMA_EN0x10);
}
1938}

1940void
1941rsu_power_off(struct rsu_softc *sc)
1942{
/* Turn RF off. */
rsu_write_1(sc, R92S_RF_CTRL(0x0000 + 0x01f), 0x00);
usbd_delay_ms(sc->sc_udev, 5);

/* Turn MAC off. */
/* Switch control path. */
rsu_write_1(sc, R92S_SYS_CLKR(0x0000 + 0x008) + 1, 0x38);
/* Reset MACTOP. */
rsu_write_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1, 0x70);
rsu_write_1(sc, R92S_PMC_FSM(0x0000 + 0x004), 0x06);
rsu_write_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 0, 0xf9);
rsu_write_1(sc, R92S_SYS_ISO_CTRL(0x0000 + 0x000) + 1, 0xe8);

/* Disable AFE PLL. */
rsu_write_1(sc, R92S_AFE_PLL_CTRL(0x0000 + 0x028), 0x00);
/* Disable A15V. */
rsu_write_1(sc, R92S_LDOA15_CTRL(0x0000 + 0x020), 0x54);
/* Disable eFuse 1.2V. */
rsu_write_1(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002) + 1, 0x50);
rsu_write_1(sc, R92S_LDOV12D_CTRL(0x0000 + 0x021), 0x24);
/* Enable AFE macro block's bandgap and Mbias. */
rsu_write_1(sc, R92S_AFE_MISC(0x0000 + 0x010), 0x30);
/* Disable 1.6V LDO. */
rsu_write_1(sc, R92S_SPS0_CTRL(0x0000 + 0x011) + 0, 0x56);
rsu_write_1(sc, R92S_SPS0_CTRL(0x0000 + 0x011) + 1, 0x43);
1968}

1970int
1971rsu_fw_loadsection(struct rsu_softc *sc, uint8_t *buf, int len)
1972{
struct rsu_tx_data *data;
struct r92s_tx_desc *txd;
struct usbd_pipe *pipe;
int mlen, error;

data = sc->fwcmd_data;
pipe = sc->pipe[sc->qid2idx[RSU_QID_VO3]];
txd = (struct r92s_tx_desc *)data->buf;
while (len > 0) {
memset(txd, 0, sizeof(*txd))__builtin_memset((txd), (0), (sizeof(*txd)));
if (len <= RSU_TXBUFSZ((sizeof(struct r92s_tx_desc) + (2300 + 4 + (3 + 1 + 4)) + 3)
 & ~3) - sizeof(*txd)) {
	/* Last chunk. */
	txd->txdw0 |= htole32(R92S_TXDW0_LINIP)((__uint32_t)(0x10000000));
	mlen = len;
} else
	mlen = RSU_TXBUFSZ((sizeof(struct r92s_tx_desc) + (2300 + 4 + (3 + 1 + 4)) + 3)
 & ~3) - sizeof(*txd);
txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen))((__uint32_t)((((mlen) << 0) & 0x0000ffff)));
memcpy(&txd[1], buf, mlen)__builtin_memcpy((&txd[1]), (buf), (mlen));

usbd_setup_xfer(data->xfer, pipe, NULL((void *)0), data->buf,
    sizeof(*txd) + mlen,
    USBD_SHORT_XFER_OK0x04 | USBD_NO_COPY0x01 | USBD_SYNCHRONOUS0x02,
    RSU_TX_TIMEOUT5000, NULL((void *)0));
error = usbd_transfer(data->xfer);
if (error != 0)
	return (error);
buf += mlen;
len -= mlen;
}
return (0);
2003}

2005int
2006rsu_load_firmware(struct rsu_softc *sc)
2007{
struct ieee80211com *ic = &sc->sc_ic;
struct r92s_fw_hdr *hdr;
struct r92s_fw_priv *dmem;
uint8_t *imem, *emem;
int imemsz, ememsz;
u_char *fw;
size_t size;
uint32_t reg;
int ntries, error;

/* Read firmware image from the filesystem. */
if ((error = loadfirmware("rsu-rtl8712", &fw, &size)) != 0) {
printf("%s: failed loadfirmware of file %s (error %d)\n",
    sc->sc_dev.dv_xname, "rsu-rtl8712", error);
return (error);
}
if (size < sizeof(*hdr)) {
printf("%s: firmware too short\n", sc->sc_dev.dv_xname);
error = EINVAL22;
goto fail;
}
hdr = (struct r92s_fw_hdr *)fw;
if (hdr->signature != htole16(0x8712)((__uint16_t)(0x8712)) &&
   hdr->signature != htole16(0x8192)((__uint16_t)(0x8192))) {
printf("%s: invalid firmware signature 0x%x\n",
    sc->sc_dev.dv_xname, letoh16(hdr->signature)((__uint16_t)(hdr->signature)));
error = EINVAL22;
goto fail;
}
DPRINTF(("FW V%d %02x-%02x %02x:%02x\n", letoh16(hdr->version),
   hdr->month, hdr->day, hdr->hour, hdr->minute));

/* Make sure that driver and firmware are in sync. */
if (hdr->privsz != htole32(sizeof(*dmem))((__uint32_t)(sizeof(*dmem)))) {
printf("%s: unsupported firmware image\n",
    sc->sc_dev.dv_xname);
error = EINVAL22;
goto fail;
}
/* Get FW sections sizes. */
imemsz = letoh32(hdr->imemsz)((__uint32_t)(hdr->imemsz));
ememsz = letoh32(hdr->sramsz)((__uint32_t)(hdr->sramsz));
/* Check that all FW sections fit in image. */
if (size < sizeof(*hdr) + imemsz + ememsz) {
printf("%s: firmware too short\n", sc->sc_dev.dv_xname);
error = EINVAL22;
goto fail;
}
imem = (uint8_t *)&hdr[1];
emem = imem + imemsz;

/* Load IMEM section. */
error = rsu_fw_loadsection(sc, imem, imemsz);
if (error != 0) {
printf("%s: could not load firmware section %s\n",
    sc->sc_dev.dv_xname, "IMEM");
goto fail;
}
/* Wait for load to complete. */
for (ntries = 0; ntries < 10; ntries++) {
reg = rsu_read_2(sc, R92S_TCR(0x0040 + 0x004));
if (reg & R92S_TCR_IMEM_CODE_DONE0x01)
	break;
DELAY(10)(*delay_func)(10);
}
if (ntries == 10 || !(reg & R92S_TCR_IMEM_CHK_RPT0x02)) {
printf("%s: timeout waiting for %s transfer\n",
    sc->sc_dev.dv_xname, "IMEM");
error = ETIMEDOUT60;
goto fail;
}

/* Load EMEM section. */
error = rsu_fw_loadsection(sc, emem, ememsz);
if (error != 0) {
printf("%s: could not load firmware section %s\n",
    sc->sc_dev.dv_xname, "EMEM");
goto fail;
}
/* Wait for load to complete. */
for (ntries = 0; ntries < 10; ntries++) {
reg = rsu_read_2(sc, R92S_TCR(0x0040 + 0x004));
if (reg & R92S_TCR_EMEM_CODE_DONE0x04)
	break;
DELAY(10)(*delay_func)(10);
}
if (ntries == 10 || !(reg & R92S_TCR_EMEM_CHK_RPT0x08)) {
printf("%s: timeout waiting for %s transfer\n",
    sc->sc_dev.dv_xname, "EMEM");
error = ETIMEDOUT60;
goto fail;
}

/* Enable CPU. */
rsu_write_1(sc, R92S_SYS_CLKR(0x0000 + 0x008),
   rsu_read_1(sc, R92S_SYS_CLKR(0x0000 + 0x008)) | R92S_SYS_CPU_CLKSEL0x0004);
if (!(rsu_read_1(sc, R92S_SYS_CLKR(0x0000 + 0x008)) & R92S_SYS_CPU_CLKSEL0x0004)) {
printf("%s: could not enable system clock\n",
    sc->sc_dev.dv_xname);
error = EIO5;
goto fail;
}
rsu_write_2(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002),
   rsu_read_2(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002)) | R92S_FEN_CPUEN0x0400);
if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN(0x0000 + 0x002)) & R92S_FEN_CPUEN0x0400)) {
printf("%s: could not enable microcontroller\n",
    sc->sc_dev.dv_xname);
error = EIO5;
goto fail;
}
/* Wait for CPU to initialize. */
for (ntries = 0; ntries < 100; ntries++) {
if (rsu_read_2(sc, R92S_TCR(0x0040 + 0x004)) & R92S_TCR_IMEM_RDY0x20)
	break;
DELAY(1000)(*delay_func)(1000);
}
if (ntries == 100) {
printf("%s: timeout waiting for microcontroller\n",
    sc->sc_dev.dv_xname);
error = ETIMEDOUT60;
goto fail;
}

/* Update DMEM section before loading. */
dmem = &hdr->priv;
memset(dmem, 0, sizeof(*dmem))__builtin_memset((dmem), (0), (sizeof(*dmem)));
dmem->hci_sel = R92S_HCI_SEL_USB0x02 | R92S_HCI_SEL_81720x10;
dmem->nendpoints = sc->npipes;
dmem->rf_config = 0x12;	/* 1T2R */
dmem->vcs_type = R92S_VCS_TYPE_AUTO2;
dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS1;
dmem->bw40_en = (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_400x00000002) != 0;
dmem->turbo_mode = 1;
/* Load DMEM section. */
error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem));
if (error != 0) {
printf("%s: could not load firmware section %s\n",
    sc->sc_dev.dv_xname, "DMEM");
goto fail;
}
/* Wait for load to complete. */
for (ntries = 0; ntries < 100; ntries++) {
if (rsu_read_2(sc, R92S_TCR(0x0040 + 0x004)) & R92S_TCR_DMEM_CODE_DONE0x10)
	break;
DELAY(1000)(*delay_func)(1000);
}
if (ntries == 100) {
printf("%s: timeout waiting for %s transfer\n",
    sc->sc_dev.dv_xname, "DMEM");
error = ETIMEDOUT60;
goto fail;
}
/* Wait for firmware readiness. */
for (ntries = 0; ntries < 60; ntries++) {
if (!(rsu_read_2(sc, R92S_TCR(0x0040 + 0x004)) & R92S_TCR_FWRDY0x80))
	break;
DELAY(1000)(*delay_func)(1000);
}
if (ntries == 60) {
printf("%s: timeout waiting for firmware readiness\n",
    sc->sc_dev.dv_xname);
error = ETIMEDOUT60;
goto fail;
}
fail:
free(fw, M_DEVBUF2, size);
return (error);
2175}

2177int
2178rsu_init(struct ifnet *ifp)
2179{
struct rsu_softc *sc = ifp->if_softc;
struct ieee80211com *ic = &sc->sc_ic;
struct r92s_set_pwr_mode cmd;
struct rsu_rx_data *data;
int i, error;

/* Init host async commands ring. */
sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0;

/* Allocate Tx/Rx buffers. */
error = rsu_alloc_rx_list(sc);
if (error != 0) {
printf("%s: could not allocate Rx buffers\n",
    sc->sc_dev.dv_xname);
goto fail;
}
error = rsu_alloc_tx_list(sc);
if (error != 0) {
printf("%s: could not allocate Tx buffers\n",
    sc->sc_dev.dv_xname);
goto fail;
}
/* Reserve one Tx buffer for firmware commands. */
sc->fwcmd_data = TAILQ_FIRST(&sc->tx_free_list)((&sc->tx_free_list)->tqh_first);
TAILQ_REMOVE(&sc->tx_free_list, sc->fwcmd_data, next)do { if (((sc->fwcmd_data)->next.tqe_next) != ((void *)
0)) (sc->fwcmd_data)->next.tqe_next->next.tqe_prev =
 (sc->fwcmd_data)->next.tqe_prev; else (&sc->tx_free_list
)->tqh_last = (sc->fwcmd_data)->next.tqe_prev; *(sc->
fwcmd_data)->next.tqe_prev = (sc->fwcmd_data)->next.
tqe_next; ((sc->fwcmd_data)->next.tqe_prev) = ((void *)
-1); ((sc->fwcmd_data)->next.tqe_next) = ((void *)-1); }
 while (0);

/* Power on adapter. */
if (sc->cut == 1)
rsu_power_on_acut(sc);
else
rsu_power_on_bcut(sc);
/* Load firmware. */
error = rsu_load_firmware(sc);
if (error != 0)
goto fail;

/* Enable Rx TCP checksum offload. */
rsu_write_4(sc, R92S_RCR(0x0040 + 0x008),
   rsu_read_4(sc, R92S_RCR(0x0040 + 0x008)) | 0x04000000);
/* Append PHY status. */
rsu_write_4(sc, R92S_RCR(0x0040 + 0x008),
   rsu_read_4(sc, R92S_RCR(0x0040 + 0x008)) | 0x02000000);

rsu_write_4(sc, R92S_CR(0x0040 + 0x000),
   rsu_read_4(sc, R92S_CR(0x0040 + 0x000)) & ~0xff000000);

/* Use 128 bytes pages. */
rsu_write_1(sc, 0x00b5,
   rsu_read_1(sc, 0x00b5) | 0x01);
/* Enable USB Rx aggregation. */
rsu_write_1(sc, 0x00bd,
   rsu_read_1(sc, 0x00bd) | 0x80);
/* Set USB Rx aggregation threshold. */
rsu_write_1(sc, 0x00d9, 0x01);
/* Set USB Rx aggregation timeout (1.7ms/4). */
rsu_write_1(sc, 0xfe5b, 0x04);
/* Fix USB Rx FIFO issue. */
rsu_write_1(sc, 0xfe5c,
   rsu_read_1(sc, 0xfe5c) | 0x80);

/* Set MAC address. */
IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl))__builtin_memcpy((ic->ic_myaddr), (((caddr_t)((ifp->if_sadl
)->sdl_data + (ifp->if_sadl)->sdl_nlen))), (6));
rsu_write_region_1(sc, R92S_MACID(0x0050 + 0x000), ic->ic_myaddr, IEEE80211_ADDR_LEN6);		

/* Queue Rx xfers (XXX C2H pipe for 11-pipe configurations?) */
for (i = 0; i < RSU_RX_LIST_COUNT1; i++) {
data = &sc->rx_data[i];

data->pipe = sc->pipe[sc->qid2idx[RSU_QID_RXOFF7]];
usbd_setup_xfer(data->xfer, data->pipe, data, data->buf,
    RSU_RXBUFSZ(8 * 1024), USBD_SHORT_XFER_OK0x04 | USBD_NO_COPY0x01,
    USBD_NO_TIMEOUT0, rsu_rxeof);
error = usbd_transfer(data->xfer);
if (error != 0 && error != USBD_IN_PROGRESS)
	goto fail;
}

/* NB: it really takes that long for firmware to boot. */
usbd_delay_ms(sc->sc_udev, 1500);

DPRINTF(("setting MAC address to %s\n", ether_sprintf(ic->ic_myaddr)));
error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS58, ic->ic_myaddr,
   IEEE80211_ADDR_LEN6);
if (error != 0) {
printf("%s: could not set MAC address\n", sc->sc_dev.dv_xname);
goto fail;
}

rsu_write_1(sc, R92S_USB_HRPWM0xfe58,
   R92S_USB_HRPWM_PS_ST_ACTIVE0x08 | R92S_USB_HRPWM_PS_ALL_ON0x04);

memset(&cmd, 0, sizeof(cmd))__builtin_memset((&cmd), (0), (sizeof(cmd)));
cmd.mode = R92S_PS_MODE_ACTIVE0;
DPRINTF(("setting ps mode to %d\n", cmd.mode));
error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE36, &cmd, sizeof(cmd));
if (error != 0) {
printf("%s: could not set PS mode\n", sc->sc_dev.dv_xname);
goto fail;
}

if (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_400x00000002) {
/* Enable 40MHz mode. */
error = rsu_fw_iocmd(sc,
    SM(R92S_IOCMD_CLASS, 0xf4)(((0xf4) << 24) & 0xff000000) |
    SM(R92S_IOCMD_INDEX, 0x00)(((0x00) << 0) & 0x000000ff) |
    SM(R92S_IOCMD_VALUE, 0x0007)(((0x0007) << 8) & 0x00ffff00));
if (error != 0) {
	printf("%s: could not enable 40MHz mode\n",
	    sc->sc_dev.dv_xname);
	goto fail;
}
}

/* Set default channel. */
ic->ic_bss->ni_chan = ic->ic_ibss_chan;

/* We're ready to go. */
ifp->if_flags |= IFF_RUNNING0x40;
ifq_clr_oactive(&ifp->if_snd);

2300#ifdef notyet
if (ic->ic_flags & IEEE80211_F_WEPON0x00000100) {
/* Install WEP keys. */
for (i = 0; i < IEEE80211_WEP_NKID4; i++)
	rsu_set_key(ic, NULL((void *)0), &ic->ic_nw_keys[i]);
rsu_wait_async(sc);
}
2307#endif

sc->scan_pass = 0;
ieee80211_begin_scan(ifp);
return (0);
fail:
rsu_stop(ifp);
return (error);
2315}

2317void
2318rsu_stop(struct ifnet *ifp)
2319{
struct rsu_softc *sc = ifp->if_softc;
struct ieee80211com *ic = &sc->sc_ic;
int i, s;

sc->sc_tx_timer = 0;
ifp->if_timer = 0;
ifp->if_flags &= ~IFF_RUNNING0x40;
ifq_clr_oactive(&ifp->if_snd);

s = splusb()splraise(0x2);
ieee80211_new_state(ic, IEEE80211_S_INIT, -1)(((ic)->ic_newstate)((ic), (IEEE80211_S_INIT), (-1)));
/* Wait for all async commands to complete. */
rsu_wait_async(sc);
splx(s)spllower(s);

timeout_del(&sc->calib_to);

/* Power off adapter. */
rsu_power_off(sc);

/* Abort Tx/Rx. */
for (i = 0; i < sc->npipes; i++)
usbd_abort_pipe(sc->pipe[i]);

/* Free Tx/Rx buffers. */
rsu_free_tx_list(sc);
rsu_free_rx_list(sc);
2347}