/usr/src/sys/dev/pci/drm/amd/display/include/fixed31

Bug Summary

File:	dev/pci/drm/amd/display/include/fixed31_32.h
Warning:	line 528, column 22 The result of the left shift is undefined because the left operand is negative

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name dc_resource.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

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1/*
* Copyright 2012-15 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/

26#include "dm_services.h"

28#include "resource.h"
29#include "include/irq_service_interface.h"
30#include "link_encoder.h"
31#include "stream_encoder.h"
32#include "opp.h"
33#include "timing_generator.h"
34#include "transform.h"
35#include "dccg.h"
36#include "dchubbub.h"
37#include "dpp.h"
38#include "core_types.h"
39#include "set_mode_types.h"
40#include "virtual/virtual_stream_encoder.h"
41#include "dpcd_defs.h"
42#include "link_enc_cfg.h"
43#include "dc_link_dp.h"
44#include "virtual/virtual_link_hwss.h"
45#include "link/link_hwss_dio.h"
46#include "link/link_hwss_dpia.h"
47#include "link/link_hwss_hpo_dp.h"

49#if defined(CONFIG_DRM_AMD_DC_SI)
50#include "dce60/dce60_resource.h"
51#endif
52#include "dce80/dce80_resource.h"
53#include "dce100/dce100_resource.h"
54#include "dce110/dce110_resource.h"
55#include "dce112/dce112_resource.h"
56#include "dce120/dce120_resource.h"
57#include "dcn10/dcn10_resource.h"
58#include "dcn20/dcn20_resource.h"
59#include "dcn21/dcn21_resource.h"
60#include "dcn201/dcn201_resource.h"
61#include "dcn30/dcn30_resource.h"
62#include "dcn301/dcn301_resource.h"
63#include "dcn302/dcn302_resource.h"
64#include "dcn303/dcn303_resource.h"
65#include "dcn31/dcn31_resource.h"
66#include "dcn314/dcn314_resource.h"
67#include "dcn315/dcn315_resource.h"
68#include "dcn316/dcn316_resource.h"
69#include "../dcn32/dcn32_resource.h"
70#include "../dcn321/dcn321_resource.h"

72#define DC_LOGGER_INIT(logger)

74enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
75{
enum dce_version dc_version = DCE_VERSION_UNKNOWN;

switch (asic_id.chip_family) {

80#if defined(CONFIG_DRM_AMD_DC_SI)
case FAMILY_SI110:
if (ASIC_REV_IS_TAHITI_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x01) && (asic_id.hw_internal_rev
 < 0x14)) ||
    ASIC_REV_IS_PITCAIRN_PM(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x14) && (asic_id.hw_internal_rev
 < 0x28)) ||
    ASIC_REV_IS_CAPEVERDE_M(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x28) && (asic_id.hw_internal_rev
 < 0x3C)))
	dc_version = DCE_VERSION_6_0;
else if (ASIC_REV_IS_OLAND_M(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x3C) && (asic_id.hw_internal_rev
 < 0x46)))
	dc_version = DCE_VERSION_6_4;
else
	dc_version = DCE_VERSION_6_1;
break;
91#endif
case FAMILY_CI120:
dc_version = DCE_VERSION_8_0;
break;
case FAMILY_KV125:
if (ASIC_REV_IS_KALINDI(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x81) && (asic_id.hw_internal_rev
 < 0xFF)) ||
    ASIC_REV_IS_BHAVANI(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x85) && (asic_id.hw_internal_rev
 < 0xA1)) ||
    ASIC_REV_IS_GODAVARI(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0xA1) && (asic_id.hw_internal_rev
 < 0xFF)))
	dc_version = DCE_VERSION_8_3;
else
	dc_version = DCE_VERSION_8_1;
break;
case FAMILY_CZ135:
dc_version = DCE_VERSION_11_0;
break;

case FAMILY_VI130:
if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 20) && (asic_id.hw_internal_rev
 < 40)) ||
		ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 60) && (asic_id.hw_internal_rev
 < 80))) {
	dc_version = DCE_VERSION_10_0;
	break;
}
if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 80) && (asic_id.hw_internal_rev
 < 90)) ||
		ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 90) && (asic_id.hw_internal_rev
 < 100)) ||
		ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 100) && (asic_id.hw_internal_rev
 < 110))) {
	dc_version = DCE_VERSION_11_2;
}
if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)(asic_id.hw_internal_rev >= 110))
	dc_version = DCE_VERSION_11_22;
break;
case FAMILY_AI141:
if (ASICREV_IS_VEGA20_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 40) && (asic_id.hw_internal_rev
 < 0xFF)))
	dc_version = DCE_VERSION_12_1;
else
	dc_version = DCE_VERSION_12_0;
break;
case FAMILY_RV142:
dc_version = DCN_VERSION_1_0;
if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x81) && (asic_id.hw_internal_rev
 < 0x91)))
	dc_version = DCN_VERSION_1_01;
if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x91) && (asic_id.hw_internal_rev
 < 0xF0)))
	dc_version = DCN_VERSION_2_1;
if (ASICREV_IS_GREEN_SARDINE(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0xA1) && (asic_id.hw_internal_rev
 < 0xFF)))
	dc_version = DCN_VERSION_2_1;
break;

case FAMILY_NV143:
dc_version = DCN_VERSION_2_0;
if (asic_id.chip_id == DEVICE_ID_NV_13FE0x13FE || asic_id.chip_id == DEVICE_ID_NV_143F0x143F) {
	dc_version = DCN_VERSION_2_01;
	break;
}
if (ASICREV_IS_SIENNA_CICHLID_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= NV_SIENNA_CICHLID_P_A0) &&
 (asic_id.hw_internal_rev < NV_DIMGREY_CAVEFISH_P_A0)))
	dc_version = DCN_VERSION_3_0;
if (ASICREV_IS_DIMGREY_CAVEFISH_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= NV_DIMGREY_CAVEFISH_P_A0) &&
 (asic_id.hw_internal_rev < NV_BEIGE_GOBY_P_A0)))
	dc_version = DCN_VERSION_3_02;
if (ASICREV_IS_BEIGE_GOBY_P(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= NV_BEIGE_GOBY_P_A0) &&
 (asic_id.hw_internal_rev < NV_UNKNOWN)))
	dc_version = DCN_VERSION_3_03;
break;

case FAMILY_VGH144:
dc_version = DCN_VERSION_3_01;
break;

case FAMILY_YELLOW_CARP146:
if (ASICREV_IS_YELLOW_CARP(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x01) && (asic_id.hw_internal_rev
 < 0xFF)))
	dc_version = DCN_VERSION_3_1;
break;
case AMDGPU_FAMILY_GC_10_3_6149:
if (ASICREV_IS_GC_10_3_6(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x01) && (asic_id.hw_internal_rev
 < 0xFF)))
	dc_version = DCN_VERSION_3_15;
break;
case AMDGPU_FAMILY_GC_10_3_7151:
if (ASICREV_IS_GC_10_3_7(asic_id.hw_internal_rev)((asic_id.hw_internal_rev >= 0x01) && (asic_id.hw_internal_rev
 < 0xFF)))
	dc_version = DCN_VERSION_3_16;
break;
case AMDGPU_FAMILY_GC_11_0_0145:
dc_version = DCN_VERSION_3_2;
if (ASICREV_IS_GC_11_0_2(asic_id.hw_internal_rev)(asic_id.hw_internal_rev >= 0x10 && asic_id.hw_internal_rev
 < 0x20))
	dc_version = DCN_VERSION_3_21;
break;
case AMDGPU_FAMILY_GC_11_0_1148:
dc_version = DCN_VERSION_3_14;
break;
default:
dc_version = DCE_VERSION_UNKNOWN;
break;
}
return dc_version;
180}

182struct resource_pool *dc_create_resource_pool(struct dc  *dc,
			      const struct dc_init_data *init_data,
			      enum dce_version dc_version)
185{
struct resource_pool *res_pool = NULL((void *)0);

switch (dc_version) {
189#if defined(CONFIG_DRM_AMD_DC_SI)
case DCE_VERSION_6_0:
res_pool = dce60_create_resource_pool(
	init_data->num_virtual_links, dc);
break;
case DCE_VERSION_6_1:
res_pool = dce61_create_resource_pool(
	init_data->num_virtual_links, dc);
break;
case DCE_VERSION_6_4:
res_pool = dce64_create_resource_pool(
	init_data->num_virtual_links, dc);
break;
202#endif
case DCE_VERSION_8_0:
res_pool = dce80_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_8_1:
res_pool = dce81_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_8_3:
res_pool = dce83_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_10_0:
res_pool = dce100_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_11_0:
res_pool = dce110_create_resource_pool(
		init_data->num_virtual_links, dc,
		init_data->asic_id);
break;
case DCE_VERSION_11_2:
case DCE_VERSION_11_22:
res_pool = dce112_create_resource_pool(
		init_data->num_virtual_links, dc);
break;
case DCE_VERSION_12_0:
case DCE_VERSION_12_1:
res_pool = dce120_create_resource_pool(
		init_data->num_virtual_links, dc);
break;

235#if defined(CONFIG_DRM_AMD_DC_DCN1)
case DCN_VERSION_1_0:
case DCN_VERSION_1_01:
res_pool = dcn10_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_2_0:
res_pool = dcn20_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_2_1:
res_pool = dcn21_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_2_01:
res_pool = dcn201_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_0:
res_pool = dcn30_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_01:
res_pool = dcn301_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_02:
res_pool = dcn302_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_03:
res_pool = dcn303_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_1:
res_pool = dcn31_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_14:
res_pool = dcn314_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_15:
res_pool = dcn315_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_16:
res_pool = dcn316_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_2:
res_pool = dcn32_create_resource_pool(init_data, dc);
break;
case DCN_VERSION_3_21:
res_pool = dcn321_create_resource_pool(init_data, dc);
break;
279#endif
default:
break;
}

if (res_pool != NULL((void *)0)) {
if (dc->ctx->dc_bios->fw_info_valid) {
	res_pool->ref_clocks.xtalin_clock_inKhz =
		dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency;
	/* initialize with firmware data first, no all
	 * ASIC have DCCG SW component. FPGA or
	 * simulation need initialization of
	 * dccg_ref_clock_inKhz, dchub_ref_clock_inKhz
	 * with xtalin_clock_inKhz
	 */
	res_pool->ref_clocks.dccg_ref_clock_inKhz =
		res_pool->ref_clocks.xtalin_clock_inKhz;
	res_pool->ref_clocks.dchub_ref_clock_inKhz =
		res_pool->ref_clocks.xtalin_clock_inKhz;
} else
	ASSERT_CRITICAL(false)do { if (({ int __ret = !!(!(0)); if (__ret) printf("WARNING %s failed at %s:%d\n"
, "!(0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 299); __builtin_expect(!!(__ret), 0); })) do {} while (0); }
 while (0);
}

return res_pool;
303}

305void dc_destroy_resource_pool(struct dc  *dc)
306{
if (dc) {
if (dc->res_pool)
	dc->res_pool->funcs->destroy(&dc->res_pool);

kfree(dc->hwseq);
}
313}

315static void update_num_audio(
const struct resource_straps *straps,
unsigned int *num_audio,
struct audio_support *aud_support)
319{
aud_support->dp_audio = true1;
aud_support->hdmi_audio_native = false0;
aud_support->hdmi_audio_on_dongle = false0;

if (straps->hdmi_disable == 0) {
if (straps->dc_pinstraps_audio & 0x2) {
	aud_support->hdmi_audio_on_dongle = true1;
	aud_support->hdmi_audio_native = true1;
}
}

switch (straps->audio_stream_number) {
case 0: /* multi streams supported */
break;
case 1: /* multi streams not supported */
*num_audio = 1;
break;
default:
DC_ERR("DC: unexpected audio fuse!\n")do { __drm_err("DC: unexpected audio fuse!\n"); do { ___drm_dbg
(((void *)0), DRM_UT_DRIVER, "%s():%d\n", __func__, 338); do {
} while (0); } while (0); } while (0);
}
340}

342bool_Bool resource_construct(
unsigned int num_virtual_links,
struct dc  *dc,
struct resource_pool *pool,
const struct resource_create_funcs *create_funcs)
347{
struct dc_context *ctx = dc->ctx;
const struct resource_caps *caps = pool->res_cap;
int i;
unsigned int num_audio = caps->num_audio;
struct resource_straps straps = {0};

if (create_funcs->read_dce_straps)
create_funcs->read_dce_straps(dc->ctx, &straps);

pool->audio_count = 0;
if (create_funcs->create_audio) {
/* find the total number of streams available via the
 * AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT
 * registers (one for each pin) starting from pin 1
 * up to the max number of audio pins.
 * We stop on the first pin where
 * PORT_CONNECTIVITY == 1 (as instructed by HW team).
 */
update_num_audio(&straps, &num_audio, &pool->audio_support);
for (i = 0; i < caps->num_audio; i++) {
	struct audio *aud = create_funcs->create_audio(ctx, i);

	if (aud == NULL((void *)0)) {
		DC_ERR("DC: failed to create audio!\n")do { __drm_err("DC: failed to create audio!\n"); do { ___drm_dbg
(((void *)0), DRM_UT_DRIVER, "%s():%d\n", __func__, 371); do {
} while (0); } while (0); } while (0);
		return false0;
	}
	if (!aud->funcs->endpoint_valid(aud)) {
		aud->funcs->destroy(&aud);
		break;
	}
	pool->audios[i] = aud;
	pool->audio_count++;
}
}

pool->stream_enc_count = 0;
if (create_funcs->create_stream_encoder) {
for (i = 0; i < caps->num_stream_encoder; i++) {
	pool->stream_enc[i] = create_funcs->create_stream_encoder(i, ctx);
	if (pool->stream_enc[i] == NULL((void *)0))
		DC_ERR("DC: failed to create stream_encoder!\n")do { __drm_err("DC: failed to create stream_encoder!\n"); do {
 ___drm_dbg(((void *)0), DRM_UT_DRIVER, "%s():%d\n", __func__
, 388); do {} while (0); } while (0); } while (0);
	pool->stream_enc_count++;
}
}

pool->hpo_dp_stream_enc_count = 0;
if (create_funcs->create_hpo_dp_stream_encoder) {
for (i = 0; i < caps->num_hpo_dp_stream_encoder; i++) {
	pool->hpo_dp_stream_enc[i] = create_funcs->create_hpo_dp_stream_encoder(i+ENGINE_ID_HPO_DP_0, ctx);
	if (pool->hpo_dp_stream_enc[i] == NULL((void *)0))
		DC_ERR("DC: failed to create HPO DP stream encoder!\n")do { __drm_err("DC: failed to create HPO DP stream encoder!\n"
); do { ___drm_dbg(((void *)0), DRM_UT_DRIVER, "%s():%d\n", __func__
, 398); do {} while (0); } while (0); } while (0);
	pool->hpo_dp_stream_enc_count++;

}
}

pool->hpo_dp_link_enc_count = 0;
if (create_funcs->create_hpo_dp_link_encoder) {
for (i = 0; i < caps->num_hpo_dp_link_encoder; i++) {
	pool->hpo_dp_link_enc[i] = create_funcs->create_hpo_dp_link_encoder(i, ctx);
	if (pool->hpo_dp_link_enc[i] == NULL((void *)0))
		DC_ERR("DC: failed to create HPO DP link encoder!\n")do { __drm_err("DC: failed to create HPO DP link encoder!\n")
; do { ___drm_dbg(((void *)0), DRM_UT_DRIVER, "%s():%d\n", __func__
, 409); do {} while (0); } while (0); } while (0);
	pool->hpo_dp_link_enc_count++;
}
}

for (i = 0; i < caps->num_mpc_3dlut; i++) {
pool->mpc_lut[i] = dc_create_3dlut_func();
if (pool->mpc_lut[i] == NULL((void *)0))
	DC_ERR("DC: failed to create MPC 3dlut!\n")do { __drm_err("DC: failed to create MPC 3dlut!\n"); do { ___drm_dbg
(((void *)0), DRM_UT_DRIVER, "%s():%d\n", __func__, 417); do {
} while (0); } while (0); } while (0);
pool->mpc_shaper[i] = dc_create_transfer_func();
if (pool->mpc_shaper[i] == NULL((void *)0))
	DC_ERR("DC: failed to create MPC shaper!\n")do { __drm_err("DC: failed to create MPC shaper!\n"); do { ___drm_dbg
(((void *)0), DRM_UT_DRIVER, "%s():%d\n", __func__, 420); do {
} while (0); } while (0); } while (0);
}

dc->caps.dynamic_audio = false0;
if (pool->audio_count < pool->stream_enc_count) {
dc->caps.dynamic_audio = true1;
}
for (i = 0; i < num_virtual_links; i++) {
pool->stream_enc[pool->stream_enc_count] =
	virtual_stream_encoder_create(
			ctx, ctx->dc_bios);
if (pool->stream_enc[pool->stream_enc_count] == NULL((void *)0)) {
	DC_ERR("DC: failed to create stream_encoder!\n")do { __drm_err("DC: failed to create stream_encoder!\n"); do {
 ___drm_dbg(((void *)0), DRM_UT_DRIVER, "%s():%d\n", __func__
, 432); do {} while (0); } while (0); } while (0);
	return false0;
}
pool->stream_enc_count++;
}

dc->hwseq = create_funcs->create_hwseq(ctx);

return true1;
441}
442static int find_matching_clock_source(
const struct resource_pool *pool,
struct clock_source *clock_source)
445{

int i;

for (i = 0; i < pool->clk_src_count; i++) {
if (pool->clock_sources[i] == clock_source)
	return i;
}
return -1;
454}

456void resource_unreference_clock_source(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct clock_source *clock_source)
460{
int i = find_matching_clock_source(pool, clock_source);

if (i > -1)
res_ctx->clock_source_ref_count[i]--;

if (pool->dp_clock_source == clock_source)
res_ctx->dp_clock_source_ref_count--;
468}

470void resource_reference_clock_source(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct clock_source *clock_source)
474{
int i = find_matching_clock_source(pool, clock_source);

if (i > -1)
res_ctx->clock_source_ref_count[i]++;

if (pool->dp_clock_source == clock_source)
res_ctx->dp_clock_source_ref_count++;
482}

484int resource_get_clock_source_reference(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct clock_source *clock_source)
488{
int i = find_matching_clock_source(pool, clock_source);

if (i > -1)
return res_ctx->clock_source_ref_count[i];

if (pool->dp_clock_source == clock_source)
return res_ctx->dp_clock_source_ref_count;

return -1;
498}

500bool_Bool resource_are_vblanks_synchronizable(
struct dc_stream_state *stream1,
struct dc_stream_state *stream2)
503{
uint32_t base60_refresh_rates[] = {10, 20, 5};
uint8_t i;
uint8_t rr_count = ARRAY_SIZE(base60_refresh_rates)(sizeof((base60_refresh_rates)) / sizeof((base60_refresh_rates
)[0]));
uint64_t frame_time_diff;

if (stream1->ctx->dc->config.vblank_alignment_dto_params &&
stream1->ctx->dc->config.vblank_alignment_max_frame_time_diff > 0 &&
dc_is_dp_signal(stream1->signal) &&
dc_is_dp_signal(stream2->signal) &&
false0 == stream1->has_non_synchronizable_pclk &&
false0 == stream2->has_non_synchronizable_pclk &&
stream1->timing.flags.VBLANK_SYNCHRONIZABLE &&
stream2->timing.flags.VBLANK_SYNCHRONIZABLE) {
/* disable refresh rates higher than 60Hz for now */
if (stream1->timing.pix_clk_100hz*100/stream1->timing.h_total/
		stream1->timing.v_total > 60)
	return false0;
if (stream2->timing.pix_clk_100hz*100/stream2->timing.h_total/
		stream2->timing.v_total > 60)
	return false0;
frame_time_diff = (uint64_t)10000 *
	stream1->timing.h_total *
	stream1->timing.v_total *
	stream2->timing.pix_clk_100hz;
frame_time_diff = div_u64(frame_time_diff, stream1->timing.pix_clk_100hz);
frame_time_diff = div_u64(frame_time_diff, stream2->timing.h_total);
frame_time_diff = div_u64(frame_time_diff, stream2->timing.v_total);
for (i = 0; i < rr_count; i++) {
	int64_t diff = (int64_t)div_u64(frame_time_diff * base60_refresh_rates[i], 10) - 10000;

	if (diff < 0)
		diff = -diff;
	if (diff < stream1->ctx->dc->config.vblank_alignment_max_frame_time_diff)
		return true1;
}
}
return false0;
541}

543bool_Bool resource_are_streams_timing_synchronizable(
struct dc_stream_state *stream1,
struct dc_stream_state *stream2)
546{
if (stream1->timing.h_total != stream2->timing.h_total)
return false0;

if (stream1->timing.v_total != stream2->timing.v_total)
return false0;

if (stream1->timing.h_addressable
		!= stream2->timing.h_addressable)
return false0;

if (stream1->timing.v_addressable
		!= stream2->timing.v_addressable)
return false0;

if (stream1->timing.v_front_porch
		!= stream2->timing.v_front_porch)
return false0;

if (stream1->timing.pix_clk_100hz
		!= stream2->timing.pix_clk_100hz)
return false0;

if (stream1->clamping.c_depth != stream2->clamping.c_depth)
return false0;

if (stream1->phy_pix_clk != stream2->phy_pix_clk
	&& (!dc_is_dp_signal(stream1->signal)
	|| !dc_is_dp_signal(stream2->signal)))
return false0;

if (stream1->view_format != stream2->view_format)
return false0;

if (stream1->ignore_msa_timing_param || stream2->ignore_msa_timing_param)
return false0;

return true1;
584}
585static bool_Bool is_dp_and_hdmi_sharable(
struct dc_stream_state *stream1,
struct dc_stream_state *stream2)
588{
if (stream1->ctx->dc->caps.disable_dp_clk_share)
return false0;

if (stream1->clamping.c_depth != COLOR_DEPTH_888 ||
stream2->clamping.c_depth != COLOR_DEPTH_888)
return false0;

return true1;

598}

600static bool_Bool is_sharable_clk_src(
const struct pipe_ctx *pipe_with_clk_src,
const struct pipe_ctx *pipe)
603{
if (pipe_with_clk_src->clock_source == NULL((void *)0))
return false0;

if (pipe_with_clk_src->stream->signal == SIGNAL_TYPE_VIRTUAL)
return false0;

if (dc_is_dp_signal(pipe_with_clk_src->stream->signal) ||
(dc_is_dp_signal(pipe->stream->signal) &&
!is_dp_and_hdmi_sharable(pipe_with_clk_src->stream,
		     pipe->stream)))
return false0;

if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal)
	&& dc_is_dual_link_signal(pipe->stream->signal))
return false0;

if (dc_is_hdmi_signal(pipe->stream->signal)
	&& dc_is_dual_link_signal(pipe_with_clk_src->stream->signal))
return false0;

if (!resource_are_streams_timing_synchronizable(
	pipe_with_clk_src->stream, pipe->stream))
return false0;

return true1;
629}

631struct clock_source *resource_find_used_clk_src_for_sharing(
			struct resource_context *res_ctx,
			struct pipe_ctx *pipe_ctx)
634{
int i;

for (i = 0; i < MAX_PIPES6; i++) {
if (is_sharable_clk_src(&res_ctx->pipe_ctx[i], pipe_ctx))
	return res_ctx->pipe_ctx[i].clock_source;
}

return NULL((void *)0);
643}

645static enum pixel_format convert_pixel_format_to_dalsurface(
enum surface_pixel_format surface_pixel_format)
647{
enum pixel_format dal_pixel_format = PIXEL_FORMAT_UNKNOWN;

switch (surface_pixel_format) {
case SURFACE_PIXEL_FORMAT_GRPH_PALETA_256_COLORS:
dal_pixel_format = PIXEL_FORMAT_INDEX8;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555:
dal_pixel_format = PIXEL_FORMAT_RGB565;
break;
case SURFACE_PIXEL_FORMAT_GRPH_RGB565:
dal_pixel_format = PIXEL_FORMAT_RGB565;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888:
dal_pixel_format = PIXEL_FORMAT_ARGB8888;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888:
dal_pixel_format = PIXEL_FORMAT_ARGB8888;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010:
dal_pixel_format = PIXEL_FORMAT_ARGB2101010;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010:
dal_pixel_format = PIXEL_FORMAT_ARGB2101010;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010_XR_BIAS:
dal_pixel_format = PIXEL_FORMAT_ARGB2101010_XRBIAS;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F:
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F:
dal_pixel_format = PIXEL_FORMAT_FP16;
break;
case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr:
case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb:
dal_pixel_format = PIXEL_FORMAT_420BPP8;
break;
case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr:
case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb:
dal_pixel_format = PIXEL_FORMAT_420BPP10;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616:
default:
dal_pixel_format = PIXEL_FORMAT_UNKNOWN;
break;
}
return dal_pixel_format;
694}

696static inline void get_vp_scan_direction(
enum dc_rotation_angle rotation,
bool_Bool horizontal_mirror,
bool_Bool *orthogonal_rotation,
bool_Bool *flip_vert_scan_dir,
bool_Bool *flip_horz_scan_dir)
702{
*orthogonal_rotation = false0;
*flip_vert_scan_dir = false0;
*flip_horz_scan_dir = false0;
if (rotation == ROTATION_ANGLE_180) {
*flip_vert_scan_dir = true1;
*flip_horz_scan_dir = true1;
} else if (rotation == ROTATION_ANGLE_90) {
*orthogonal_rotation = true1;
*flip_horz_scan_dir = true1;
} else if (rotation == ROTATION_ANGLE_270) {
*orthogonal_rotation = true1;
*flip_vert_scan_dir = true1;
}

if (horizontal_mirror)
*flip_horz_scan_dir = !*flip_horz_scan_dir;
719}

721int get_num_mpc_splits(struct pipe_ctx *pipe)
722{
int mpc_split_count = 0;
struct pipe_ctx *other_pipe = pipe->bottom_pipe;

while (other_pipe && other_pipe->plane_state == pipe->plane_state) {
mpc_split_count++;
other_pipe = other_pipe->bottom_pipe;
}
other_pipe = pipe->top_pipe;
while (other_pipe && other_pipe->plane_state == pipe->plane_state) {
mpc_split_count++;
other_pipe = other_pipe->top_pipe;
}

return mpc_split_count;
737}

739int get_num_odm_splits(struct pipe_ctx *pipe)
740{
int odm_split_count = 0;
struct pipe_ctx *next_pipe = pipe->next_odm_pipe;
while (next_pipe) {
odm_split_count++;
next_pipe = next_pipe->next_odm_pipe;
}
pipe = pipe->prev_odm_pipe;
while (pipe) {
odm_split_count++;
pipe = pipe->prev_odm_pipe;
}
return odm_split_count;
753}

755static void calculate_split_count_and_index(struct pipe_ctx *pipe_ctx, int *split_count, int *split_idx)
756{
*split_count = get_num_odm_splits(pipe_ctx);
*split_idx = 0;
if (*split_count == 0) {
/*Check for mpc split*/
struct pipe_ctx *split_pipe = pipe_ctx->top_pipe;

*split_count = get_num_mpc_splits(pipe_ctx);
while (split_pipe && split_pipe->plane_state == pipe_ctx->plane_state) {
	(*split_idx)++;
	split_pipe = split_pipe->top_pipe;
}

/* MPO window on right side of ODM split */
if (split_pipe && split_pipe->prev_odm_pipe && !pipe_ctx->prev_odm_pipe)
	(*split_idx)++;
} else {
/*Get odm split index*/
struct pipe_ctx *split_pipe = pipe_ctx->prev_odm_pipe;

while (split_pipe) {
	(*split_idx)++;
	split_pipe = split_pipe->prev_odm_pipe;
}
}
781}

783/*
* This is a preliminary vp size calculation to allow us to check taps support.
* The result is completely overridden afterwards.
*/
787static void calculate_viewport_size(struct pipe_ctx *pipe_ctx)
788{
struct scaler_data *data = &pipe_ctx->plane_res.scl_data;

data->viewport.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz, data->recout.width));
data->viewport.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert, data->recout.height));
data->viewport_c.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz_c, data->recout.width));
data->viewport_c.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert_c, data->recout.height));
if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
	pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) {
swap(data->viewport.width, data->viewport.height)do { __typeof(data->viewport.width) __tmp = (data->viewport
.width); (data->viewport.width) = (data->viewport.height
); (data->viewport.height) = __tmp; } while(0);
swap(data->viewport_c.width, data->viewport_c.height)do { __typeof(data->viewport_c.width) __tmp = (data->viewport_c
.width); (data->viewport_c.width) = (data->viewport_c.height
); (data->viewport_c.height) = __tmp; } while(0);
}
800}

802static void calculate_recout(struct pipe_ctx *pipe_ctx)
803{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
const struct dc_stream_state *stream = pipe_ctx->stream;
struct scaler_data *data = &pipe_ctx->plane_res.scl_data;
struct rect surf_clip = plane_state->clip_rect;
bool_Bool split_tb = stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM;
int split_count, split_idx;

calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx);
if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)
split_idx = 0;

/*
* Only the leftmost ODM pipe should be offset by a nonzero distance
*/
if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->prev_odm_pipe && !pipe_ctx->prev_odm_pipe) {
/* MPO window on right side of ODM split */
data->recout.x = stream->dst.x + (surf_clip.x - stream->src.x - stream->src.width/2) *
		stream->dst.width / stream->src.width;
} else if (!pipe_ctx->prev_odm_pipe || split_idx == split_count) {
data->recout.x = stream->dst.x;
if (stream->src.x < surf_clip.x)
	data->recout.x += (surf_clip.x - stream->src.x) * stream->dst.width
				/ stream->src.width;
} else
data->recout.x = 0;

if (stream->src.x > surf_clip.x)
surf_clip.width -= stream->src.x - surf_clip.x;
data->recout.width = surf_clip.width * stream->dst.width / stream->src.width;
if (data->recout.width + data->recout.x > stream->dst.x + stream->dst.width)
data->recout.width = stream->dst.x + stream->dst.width - data->recout.x;

data->recout.y = stream->dst.y;
if (stream->src.y < surf_clip.y)
data->recout.y += (surf_clip.y - stream->src.y) * stream->dst.height
				/ stream->src.height;
else if (stream->src.y > surf_clip.y)
surf_clip.height -= stream->src.y - surf_clip.y;

data->recout.height = surf_clip.height * stream->dst.height / stream->src.height;
if (data->recout.height + data->recout.y > stream->dst.y + stream->dst.height)
data->recout.height = stream->dst.y + stream->dst.height - data->recout.y;

/* Handle h & v split */
if (split_tb) {
ASSERT(data->recout.height % 2 == 0)do { if (({ static int __warned; int __ret = !!(!(data->recout
.height % 2 == 0)); if (__ret && !__warned) { printf(
"WARNING %s failed at %s:%d\n", "!(data->recout.height % 2 == 0)"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 849); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
data->recout.height /= 2;
} else if (split_count) {
if (!pipe_ctx->next_odm_pipe && !pipe_ctx->prev_odm_pipe) {
	/* extra pixels in the division remainder need to go to pipes after
	 * the extra pixel index minus one(epimo) defined here as:
	 */
	int epimo = split_count - data->recout.width % (split_count + 1);

	data->recout.x += (data->recout.width / (split_count + 1)) * split_idx;
	if (split_idx > epimo)
		data->recout.x += split_idx - epimo - 1;
	ASSERT(stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE || data->recout.width % 2 == 0)do { if (({ static int __warned; int __ret = !!(!(stream->
view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE || data->recout
.width % 2 == 0)); if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE || data->recout.width % 2 == 0)"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 861); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
	data->recout.width = data->recout.width / (split_count + 1) + (split_idx > epimo ? 1 : 0);
} else {
	/* odm */
	if (split_idx == split_count) {
		/* rightmost pipe is the remainder recout */
		data->recout.width -= data->h_active * split_count - data->recout.x;

		/* ODM combine cases with MPO we can get negative widths */
		if (data->recout.width < 0)
			data->recout.width = 0;

		data->recout.x = 0;
	} else
		data->recout.width = data->h_active - data->recout.x;
}
}
878}

880static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx)
881{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
const struct dc_stream_state *stream = pipe_ctx->stream;
struct rect surf_src = plane_state->src_rect;
const int in_w = stream->src.width;
const int in_h = stream->src.height;
const int out_w = stream->dst.width;
const int out_h = stream->dst.height;

/*Swap surf_src height and width since scaling ratios are in recout rotation*/
if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
	pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270)
swap(surf_src.height, surf_src.width)do { __typeof(surf_src.height) __tmp = (surf_src.height); (surf_src
.height) = (surf_src.width); (surf_src.width) = __tmp; } while
(0);

pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_from_fraction(
			surf_src.width,
			plane_state->dst_rect.width);
pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_from_fraction(
			surf_src.height,
			plane_state->dst_rect.height);

if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)
pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2;
else if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM)
pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2;

pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64(
pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h);
pipe_ctx->plane_res.scl_data.ratios.horz.value = div64_s64(
pipe_ctx->plane_res.scl_data.ratios.horz.value * in_w, out_w);

pipe_ctx->plane_res.scl_data.ratios.horz_c = pipe_ctx->plane_res.scl_data.ratios.horz;
pipe_ctx->plane_res.scl_data.ratios.vert_c = pipe_ctx->plane_res.scl_data.ratios.vert;

if (pipe_ctx->plane_res.scl_data.format == PIXEL_FORMAT_420BPP8
	|| pipe_ctx->plane_res.scl_data.format == PIXEL_FORMAT_420BPP10) {
pipe_ctx->plane_res.scl_data.ratios.horz_c.value /= 2;
pipe_ctx->plane_res.scl_data.ratios.vert_c.value /= 2;
}
pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_truncate(
	pipe_ctx->plane_res.scl_data.ratios.horz, 19);
pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_truncate(
	pipe_ctx->plane_res.scl_data.ratios.vert, 19);
pipe_ctx->plane_res.scl_data.ratios.horz_c = dc_fixpt_truncate(
	pipe_ctx->plane_res.scl_data.ratios.horz_c, 19);
pipe_ctx->plane_res.scl_data.ratios.vert_c = dc_fixpt_truncate(
	pipe_ctx->plane_res.scl_data.ratios.vert_c, 19);
928}


931/*
* We completely calculate vp offset, size and inits here based entirely on scaling
* ratios and recout for pixel perfect pipe combine.
*/
935static void calculate_init_and_vp(
bool_Bool flip_scan_dir,
int recout_offset_within_recout_full,
int recout_size,
int src_size,
int taps,
struct fixed31_32 ratio,
struct fixed31_32 *init,
int *vp_offset,
int *vp_size)
945{
struct fixed31_32 temp;
int int_part;

/*
* First of the taps starts sampling pixel number <init_int_part> corresponding to recout
* pixel 1. Next recout pixel samples int part of <init + scaling ratio> and so on.
* All following calculations are based on this logic.
*
* Init calculated according to formula:
* 	init = (scaling_ratio + number_of_taps + 1) / 2
* 	init_bot = init + scaling_ratio
* 	to get pixel perfect combine add the fraction from calculating vp offset
*/
temp = dc_fixpt_mul_int(ratio, recout_offset_within_recout_full);
*vp_offset = dc_fixpt_floor(temp);
temp.value &= 0xffffffff;
*init = dc_fixpt_truncate(dc_fixpt_add(dc_fixpt_div_int(
1
Calling 'dc_fixpt_truncate'→
	dc_fixpt_add_int(ratio, taps + 1), 2), temp), 19);
/*
* If viewport has non 0 offset and there are more taps than covered by init then
* we should decrease the offset and increase init so we are never sampling
* outside of viewport.
*/
int_part = dc_fixpt_floor(*init);
if (int_part < taps) {
int_part = taps - int_part;
if (int_part > *vp_offset)
	int_part = *vp_offset;
*vp_offset -= int_part;
*init = dc_fixpt_add_int(*init, int_part);
}
/*
* If taps are sampling outside of viewport at end of recout and there are more pixels
* available in the surface we should increase the viewport size, regardless set vp to
* only what is used.
*/
temp = dc_fixpt_add(*init, dc_fixpt_mul_int(ratio, recout_size - 1));
*vp_size = dc_fixpt_floor(temp);
if (*vp_size + *vp_offset > src_size)
*vp_size = src_size - *vp_offset;

/* We did all the math assuming we are scanning same direction as display does,
* however mirror/rotation changes how vp scans vs how it is offset. If scan direction
* is flipped we simply need to calculate offset from the other side of plane.
* Note that outside of viewport all scaling hardware works in recout space.
*/
if (flip_scan_dir)
*vp_offset = src_size - *vp_offset - *vp_size;
994}

996static void calculate_inits_and_viewports(struct pipe_ctx *pipe_ctx)
997{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
const struct dc_stream_state *stream = pipe_ctx->stream;
struct scaler_data *data = &pipe_ctx->plane_res.scl_data;
struct rect src = plane_state->src_rect;
int vpc_div = (data->format == PIXEL_FORMAT_420BPP8
		|| data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1;
int split_count, split_idx, ro_lb, ro_tb, recout_full_x, recout_full_y;
bool_Bool orthogonal_rotation, flip_vert_scan_dir, flip_horz_scan_dir;

calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx);
/*
* recout full is what the recout would have been if we didnt clip
* the source plane at all. We only care about left(ro_lb) and top(ro_tb)
* offsets of recout within recout full because those are the directions
* we scan from and therefore the only ones that affect inits.
*/
recout_full_x = stream->dst.x + (plane_state->dst_rect.x - stream->src.x)
	* stream->dst.width / stream->src.width;
recout_full_y = stream->dst.y + (plane_state->dst_rect.y - stream->src.y)
	* stream->dst.height / stream->src.height;
if (pipe_ctx->prev_odm_pipe && split_idx)
ro_lb = data->h_active * split_idx - recout_full_x;
else if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->prev_odm_pipe)
ro_lb = data->h_active * split_idx - recout_full_x + data->recout.x;
else
ro_lb = data->recout.x - recout_full_x;
ro_tb = data->recout.y - recout_full_y;
ASSERT(ro_lb >= 0 && ro_tb >= 0)do { if (({ static int __warned; int __ret = !!(!(ro_lb >=
&& ro_tb >= 0)); if (__ret && !__warned
) { printf("WARNING %s failed at %s:%d\n", "!(ro_lb >= 0 && ro_tb >= 0)"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1025); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);

/*
* Work in recout rotation since that requires less transformations
*/
get_vp_scan_direction(
	plane_state->rotation,
	plane_state->horizontal_mirror,
	&orthogonal_rotation,
	&flip_vert_scan_dir,
	&flip_horz_scan_dir);

if (orthogonal_rotation) {
swap(src.width, src.height)do { __typeof(src.width) __tmp = (src.width); (src.width) = (
src.height); (src.height) = __tmp; } while(0);
swap(flip_vert_scan_dir, flip_horz_scan_dir)do { __typeof(flip_vert_scan_dir) __tmp = (flip_vert_scan_dir
); (flip_vert_scan_dir) = (flip_horz_scan_dir); (flip_horz_scan_dir
) = __tmp; } while(0);
}

calculate_init_and_vp(
	flip_horz_scan_dir,
	ro_lb,
	data->recout.width,
	src.width,
	data->taps.h_taps,
	data->ratios.horz,
	&data->inits.h,
	&data->viewport.x,
	&data->viewport.width);
calculate_init_and_vp(
	flip_horz_scan_dir,
	ro_lb,
	data->recout.width,
	src.width / vpc_div,
	data->taps.h_taps_c,
	data->ratios.horz_c,
	&data->inits.h_c,
	&data->viewport_c.x,
	&data->viewport_c.width);
calculate_init_and_vp(
	flip_vert_scan_dir,
	ro_tb,
	data->recout.height,
	src.height,
	data->taps.v_taps,
	data->ratios.vert,
	&data->inits.v,
	&data->viewport.y,
	&data->viewport.height);
calculate_init_and_vp(
	flip_vert_scan_dir,
	ro_tb,
	data->recout.height,
	src.height / vpc_div,
	data->taps.v_taps_c,
	data->ratios.vert_c,
	&data->inits.v_c,
	&data->viewport_c.y,
	&data->viewport_c.height);
if (orthogonal_rotation) {
swap(data->viewport.x, data->viewport.y)do { __typeof(data->viewport.x) __tmp = (data->viewport
.x); (data->viewport.x) = (data->viewport.y); (data->
viewport.y) = __tmp; } while(0);
swap(data->viewport.width, data->viewport.height)do { __typeof(data->viewport.width) __tmp = (data->viewport
.width); (data->viewport.width) = (data->viewport.height
); (data->viewport.height) = __tmp; } while(0);
swap(data->viewport_c.x, data->viewport_c.y)do { __typeof(data->viewport_c.x) __tmp = (data->viewport_c
.x); (data->viewport_c.x) = (data->viewport_c.y); (data
->viewport_c.y) = __tmp; } while(0);
swap(data->viewport_c.width, data->viewport_c.height)do { __typeof(data->viewport_c.width) __tmp = (data->viewport_c
.width); (data->viewport_c.width) = (data->viewport_c.height
); (data->viewport_c.height) = __tmp; } while(0);
}
data->viewport.x += src.x;
data->viewport.y += src.y;
ASSERT(src.x % vpc_div == 0 && src.y % vpc_div == 0)do { if (({ static int __warned; int __ret = !!(!(src.x % vpc_div
 == 0 && src.y % vpc_div == 0)); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(src.x % vpc_div == 0 && src.y % vpc_div == 0)"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1090); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
data->viewport_c.x += src.x / vpc_div;
data->viewport_c.y += src.y / vpc_div;
1093}

1095bool_Bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
1096{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;
bool_Bool res = false0;
DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);

/* Invalid input */
if (!plane_state->dst_rect.width ||
	!plane_state->dst_rect.height ||
	!plane_state->src_rect.width ||
	!plane_state->src_rect.height) {
ASSERT(0)do { if (({ static int __warned; int __ret = !!(!(0)); if (__ret
 && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1107); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
return false0;
}

pipe_ctx->plane_res.scl_data.format = convert_pixel_format_to_dalsurface(
	pipe_ctx->plane_state->format);

/* Timing borders are part of vactive that we are also supposed to skip in addition
* to any stream dst offset. Since dm logic assumes dst is in addressable
* space we need to add the left and top borders to dst offsets temporarily.
* TODO: fix in DM, stream dst is supposed to be in vactive
*/
pipe_ctx->stream->dst.x += timing->h_border_left;
pipe_ctx->stream->dst.y += timing->v_border_top;

/* Calculate H and V active size */
pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable +
	timing->h_border_left + timing->h_border_right;
pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable +
timing->v_border_top + timing->v_border_bottom;
if (pipe_ctx->next_odm_pipe || pipe_ctx->prev_odm_pipe) {
pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx) + 1;

DC_LOG_SCALER("%s pipe %d: next_odm_pipe:%d   prev_odm_pipe:%d\n",do { } while(0)
		__func__,do { } while(0)
		pipe_ctx->pipe_idx,do { } while(0)
		pipe_ctx->next_odm_pipe ? pipe_ctx->next_odm_pipe->pipe_idx : -1,do { } while(0)
		pipe_ctx->prev_odm_pipe ? pipe_ctx->prev_odm_pipe->pipe_idx : -1)do { } while(0);
}	/* ODM + windows MPO, where window is on either right or left ODM half */
else if (pipe_ctx->top_pipe && (pipe_ctx->top_pipe->next_odm_pipe || pipe_ctx->top_pipe->prev_odm_pipe)) {

pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx->top_pipe) + 1;

DC_LOG_SCALER("%s ODM + windows MPO: pipe:%d top_pipe:%d   top_pipe->next_odm_pipe:%d   top_pipe->prev_odm_pipe:%d\n",do { } while(0)
		__func__,do { } while(0)
		pipe_ctx->pipe_idx,do { } while(0)
		pipe_ctx->top_pipe->pipe_idx,do { } while(0)
		pipe_ctx->top_pipe->next_odm_pipe ? pipe_ctx->top_pipe->next_odm_pipe->pipe_idx : -1,do { } while(0)
		pipe_ctx->top_pipe->prev_odm_pipe ? pipe_ctx->top_pipe->prev_odm_pipe->pipe_idx : -1)do { } while(0);
}
/* depends on h_active */
calculate_recout(pipe_ctx);
/* depends on pixel format */
calculate_scaling_ratios(pipe_ctx);
/* depends on scaling ratios and recout, does not calculate offset yet */
calculate_viewport_size(pipe_ctx);

if (!pipe_ctx->stream->ctx->dc->config.enable_windowed_mpo_odm) {
/* Stopgap for validation of ODM + MPO on one side of screen case */
if (pipe_ctx->plane_res.scl_data.viewport.height < 1 ||
		pipe_ctx->plane_res.scl_data.viewport.width < 1)
	return false0;
}

/*
* LB calculations depend on vp size, h/v_active and scaling ratios
* Setting line buffer pixel depth to 24bpp yields banding
* on certain displays, such as the Sharp 4k. 36bpp is needed
* to support SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616 and
* SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616 with actual > 10 bpc
* precision on DCN display engines, but apparently not for DCE, as
* far as testing on DCE-11.2 and DCE-8 showed. Various DCE parts have
* problems: Carrizo with DCE_VERSION_11_0 does not like 36 bpp lb depth,
* neither do DCE-8 at 4k resolution, or DCE-11.2 (broken identify pixel
* passthrough). Therefore only use 36 bpp on DCN where it is actually needed.
*/
if (plane_state->ctx->dce_version > DCE_VERSION_MAX)
pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_36BPP;
else
pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;

pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha;

if (pipe_ctx->plane_res.xfm != NULL((void *)0))
res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(
		pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);

if (pipe_ctx->plane_res.dpp != NULL((void *)0))
res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(
		pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);


if (!res) {
/* Try 24 bpp linebuffer */
pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP;

if (pipe_ctx->plane_res.xfm != NULL((void *)0))
	res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(
			pipe_ctx->plane_res.xfm,
			&pipe_ctx->plane_res.scl_data,
			&plane_state->scaling_quality);

if (pipe_ctx->plane_res.dpp != NULL((void *)0))
	res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(
			pipe_ctx->plane_res.dpp,
			&pipe_ctx->plane_res.scl_data,
			&plane_state->scaling_quality);
}

/*
* Depends on recout, scaling ratios, h_active and taps
* May need to re-check lb size after this in some obscure scenario
*/
if (res)
calculate_inits_and_viewports(pipe_ctx);

/*
* Handle side by side and top bottom 3d recout offsets after vp calculation
* since 3d is special and needs to calculate vp as if there is no recout offset
* This may break with rotation, good thing we aren't mixing hw rotation and 3d
*/
if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->plane_state == plane_state) {
ASSERT(plane_state->rotation == ROTATION_ANGLE_0 ||do { if (({ static int __warned; int __ret = !!(!(plane_state
->rotation == ROTATION_ANGLE_0 || (pipe_ctx->stream->
view_format != VIEW_3D_FORMAT_TOP_AND_BOTTOM && pipe_ctx
->stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE)))
; if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(plane_state->rotation == ROTATION_ANGLE_0 || (pipe_ctx->stream->view_format != VIEW_3D_FORMAT_TOP_AND_BOTTOM && pipe_ctx->stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE))"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1221); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0)
	(pipe_ctx->stream->view_format != VIEW_3D_FORMAT_TOP_AND_BOTTOM &&do { if (({ static int __warned; int __ret = !!(!(plane_state
->rotation == ROTATION_ANGLE_0 || (pipe_ctx->stream->
view_format != VIEW_3D_FORMAT_TOP_AND_BOTTOM && pipe_ctx
->stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE)))
; if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(plane_state->rotation == ROTATION_ANGLE_0 || (pipe_ctx->stream->view_format != VIEW_3D_FORMAT_TOP_AND_BOTTOM && pipe_ctx->stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE))"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1221); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0)
		pipe_ctx->stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE))do { if (({ static int __warned; int __ret = !!(!(plane_state
->rotation == ROTATION_ANGLE_0 || (pipe_ctx->stream->
view_format != VIEW_3D_FORMAT_TOP_AND_BOTTOM && pipe_ctx
->stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE)))
; if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(plane_state->rotation == ROTATION_ANGLE_0 || (pipe_ctx->stream->view_format != VIEW_3D_FORMAT_TOP_AND_BOTTOM && pipe_ctx->stream->view_format != VIEW_3D_FORMAT_SIDE_BY_SIDE))"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1221); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
if (pipe_ctx->stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM)
	pipe_ctx->plane_res.scl_data.recout.y += pipe_ctx->plane_res.scl_data.recout.height;
else if (pipe_ctx->stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)
	pipe_ctx->plane_res.scl_data.recout.x += pipe_ctx->plane_res.scl_data.recout.width;
}

if (!pipe_ctx->stream->ctx->dc->config.enable_windowed_mpo_odm) {
if (pipe_ctx->plane_res.scl_data.viewport.height < MIN_VIEWPORT_SIZE12 ||
		pipe_ctx->plane_res.scl_data.viewport.width < MIN_VIEWPORT_SIZE12)
	res = false0;
} else {
/* Clamp minimum viewport size */
if (pipe_ctx->plane_res.scl_data.viewport.height < MIN_VIEWPORT_SIZE12)
	pipe_ctx->plane_res.scl_data.viewport.height = MIN_VIEWPORT_SIZE12;
if (pipe_ctx->plane_res.scl_data.viewport.width < MIN_VIEWPORT_SIZE12)
	pipe_ctx->plane_res.scl_data.viewport.width = MIN_VIEWPORT_SIZE12;
}

DC_LOG_SCALER("%s pipe %d:\nViewport: height:%d width:%d x:%d y:%d  Recout: height:%d width:%d x:%d y:%d  HACTIVE:%d VACTIVE:%d\n"do { } while(0)
	"src_rect: height:%d width:%d x:%d y:%d  dst_rect: height:%d width:%d x:%d y:%d  clip_rect: height:%d width:%d x:%d y:%d\n",do { } while(0)
	__func__,do { } while(0)
	pipe_ctx->pipe_idx,do { } while(0)
	pipe_ctx->plane_res.scl_data.viewport.height,do { } while(0)
	pipe_ctx->plane_res.scl_data.viewport.width,do { } while(0)
	pipe_ctx->plane_res.scl_data.viewport.x,do { } while(0)
	pipe_ctx->plane_res.scl_data.viewport.y,do { } while(0)
	pipe_ctx->plane_res.scl_data.recout.height,do { } while(0)
	pipe_ctx->plane_res.scl_data.recout.width,do { } while(0)
	pipe_ctx->plane_res.scl_data.recout.x,do { } while(0)
	pipe_ctx->plane_res.scl_data.recout.y,do { } while(0)
	pipe_ctx->plane_res.scl_data.h_active,do { } while(0)
	pipe_ctx->plane_res.scl_data.v_active,do { } while(0)
	plane_state->src_rect.height,do { } while(0)
	plane_state->src_rect.width,do { } while(0)
	plane_state->src_rect.x,do { } while(0)
	plane_state->src_rect.y,do { } while(0)
	plane_state->dst_rect.height,do { } while(0)
	plane_state->dst_rect.width,do { } while(0)
	plane_state->dst_rect.x,do { } while(0)
	plane_state->dst_rect.y,do { } while(0)
	plane_state->clip_rect.height,do { } while(0)
	plane_state->clip_rect.width,do { } while(0)
	plane_state->clip_rect.x,do { } while(0)
	plane_state->clip_rect.y)do { } while(0);

pipe_ctx->stream->dst.x -= timing->h_border_left;
pipe_ctx->stream->dst.y -= timing->v_border_top;

return res;
1271}


1274enum dc_status resource_build_scaling_params_for_context(
const struct dc  *dc,
struct dc_state *context)
1277{
int i;

for (i = 0; i < MAX_PIPES6; i++) {
if (context->res_ctx.pipe_ctx[i].plane_state != NULL((void *)0) &&
		context->res_ctx.pipe_ctx[i].stream != NULL((void *)0))
	if (!resource_build_scaling_params(&context->res_ctx.pipe_ctx[i]))
		return DC_FAIL_SCALING;
}

return DC_OK;
1288}

1290struct pipe_ctx *find_idle_secondary_pipe(
struct resource_context *res_ctx,
const struct resource_pool *pool,
const struct pipe_ctx *primary_pipe)
1294{
int i;
struct pipe_ctx *secondary_pipe = NULL((void *)0);

/*
* We add a preferred pipe mapping to avoid the chance that
* MPCCs already in use will need to be reassigned to other trees.
* For example, if we went with the strict, assign backwards logic:
*
* (State 1)
* Display A on, no surface, top pipe = 0
* Display B on, no surface, top pipe = 1
*
* (State 2)
* Display A on, no surface, top pipe = 0
* Display B on, surface enable, top pipe = 1, bottom pipe = 5
*
* (State 3)
* Display A on, surface enable, top pipe = 0, bottom pipe = 5
* Display B on, surface enable, top pipe = 1, bottom pipe = 4
*
* The state 2->3 transition requires remapping MPCC 5 from display B
* to display A.
*
* However, with the preferred pipe logic, state 2 would look like:
*
* (State 2)
* Display A on, no surface, top pipe = 0
* Display B on, surface enable, top pipe = 1, bottom pipe = 4
*
* This would then cause 2->3 to not require remapping any MPCCs.
*/
if (primary_pipe) {
int preferred_pipe_idx = (pool->pipe_count - 1) - primary_pipe->pipe_idx;
if (res_ctx->pipe_ctx[preferred_pipe_idx].stream == NULL((void *)0)) {
	secondary_pipe = &res_ctx->pipe_ctx[preferred_pipe_idx];
	secondary_pipe->pipe_idx = preferred_pipe_idx;
}
}

/*
* search backwards for the second pipe to keep pipe
* assignment more consistent
*/
if (!secondary_pipe)
for (i = pool->pipe_count - 1; i >= 0; i--) {
	if (res_ctx->pipe_ctx[i].stream == NULL((void *)0)) {
		secondary_pipe = &res_ctx->pipe_ctx[i];
		secondary_pipe->pipe_idx = i;
		break;
	}
}

return secondary_pipe;
1348}

1350struct pipe_ctx *resource_get_head_pipe_for_stream(
struct resource_context *res_ctx,
struct dc_stream_state *stream)
1353{
int i;

for (i = 0; i < MAX_PIPES6; i++) {
if (res_ctx->pipe_ctx[i].stream == stream
		&& !res_ctx->pipe_ctx[i].top_pipe
		&& !res_ctx->pipe_ctx[i].prev_odm_pipe)
	return &res_ctx->pipe_ctx[i];
}
return NULL((void *)0);
1363}

1365static struct pipe_ctx *resource_get_tail_pipe(
struct resource_context *res_ctx,
struct pipe_ctx *head_pipe)
1368{
struct pipe_ctx *tail_pipe;

tail_pipe = head_pipe->bottom_pipe;

while (tail_pipe) {
head_pipe = tail_pipe;
tail_pipe = tail_pipe->bottom_pipe;
}

return head_pipe;
1379}

1381/*
* A free_pipe for a stream is defined here as a pipe
* that has no surface attached yet
*/
1385static struct pipe_ctx *acquire_free_pipe_for_head(
struct dc_state *context,
const struct resource_pool *pool,
struct pipe_ctx *head_pipe)
1389{
int i;
struct resource_context *res_ctx = &context->res_ctx;

if (!head_pipe->plane_state)
return head_pipe;

/* Re-use pipe already acquired for this stream if available*/
for (i = pool->pipe_count - 1; i >= 0; i--) {
if (res_ctx->pipe_ctx[i].stream == head_pipe->stream &&
		!res_ctx->pipe_ctx[i].plane_state) {
	return &res_ctx->pipe_ctx[i];
}
}

/*
* At this point we have no re-useable pipe for this stream and we need
* to acquire an idle one to satisfy the request
*/

if (!pool->funcs->acquire_idle_pipe_for_layer) {
if (!pool->funcs->acquire_idle_pipe_for_head_pipe_in_layer)
	return NULL((void *)0);
else
	return pool->funcs->acquire_idle_pipe_for_head_pipe_in_layer(context, pool, head_pipe->stream, head_pipe);
}

return pool->funcs->acquire_idle_pipe_for_layer(context, pool, head_pipe->stream);
1417}

1419static int acquire_first_split_pipe(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct dc_stream_state *stream)
1423{
int i;

for (i = 0; i < pool->pipe_count; i++) {
struct pipe_ctx *split_pipe = &res_ctx->pipe_ctx[i];

if (split_pipe->top_pipe &&
		split_pipe->top_pipe->plane_state == split_pipe->plane_state) {
	split_pipe->top_pipe->bottom_pipe = split_pipe->bottom_pipe;
	if (split_pipe->bottom_pipe)
		split_pipe->bottom_pipe->top_pipe = split_pipe->top_pipe;

	if (split_pipe->top_pipe->plane_state)
		resource_build_scaling_params(split_pipe->top_pipe);

	memset(split_pipe, 0, sizeof(*split_pipe))__builtin_memset((split_pipe), (0), (sizeof(*split_pipe)));
	split_pipe->stream_res.tg = pool->timing_generators[i];
	split_pipe->plane_res.hubp = pool->hubps[i];
	split_pipe->plane_res.ipp = pool->ipps[i];
	split_pipe->plane_res.dpp = pool->dpps[i];
	split_pipe->stream_res.opp = pool->opps[i];
	split_pipe->plane_res.mpcc_inst = pool->dpps[i]->inst;
	split_pipe->pipe_idx = i;

	split_pipe->stream = stream;
	return i;
} else if (split_pipe->prev_odm_pipe &&
		split_pipe->prev_odm_pipe->plane_state == split_pipe->plane_state) {
	split_pipe->prev_odm_pipe->next_odm_pipe = split_pipe->next_odm_pipe;
	if (split_pipe->next_odm_pipe)
		split_pipe->next_odm_pipe->prev_odm_pipe = split_pipe->prev_odm_pipe;

	if (split_pipe->prev_odm_pipe->plane_state)
		resource_build_scaling_params(split_pipe->prev_odm_pipe);

	memset(split_pipe, 0, sizeof(*split_pipe))__builtin_memset((split_pipe), (0), (sizeof(*split_pipe)));
	split_pipe->stream_res.tg = pool->timing_generators[i];
	split_pipe->plane_res.hubp = pool->hubps[i];
	split_pipe->plane_res.ipp = pool->ipps[i];
	split_pipe->plane_res.dpp = pool->dpps[i];
	split_pipe->stream_res.opp = pool->opps[i];
	split_pipe->plane_res.mpcc_inst = pool->dpps[i]->inst;
	split_pipe->pipe_idx = i;

	split_pipe->stream = stream;
	return i;
}
}
return -1;
1472}

1474bool_Bool dc_add_plane_to_context(
const struct dc *dc,
struct dc_stream_state *stream,
struct dc_plane_state *plane_state,
struct dc_state *context)
1479{
int i;
struct resource_pool *pool = dc->res_pool;
struct pipe_ctx *head_pipe, *tail_pipe, *free_pipe;
struct dc_stream_status *stream_status = NULL((void *)0);
struct pipe_ctx *prev_right_head = NULL((void *)0);
struct pipe_ctx *free_right_pipe = NULL((void *)0);
struct pipe_ctx *prev_left_head = NULL((void *)0);

DC_LOGGER_INIT(stream->ctx->logger);
for (i = 0; i < context->stream_count; i++)
if (context->streams[i] == stream) {
	stream_status = &context->stream_status[i];
	break;
}
if (stream_status == NULL((void *)0)) {
dm_error("Existing stream not found; failed to attach surface!\n")__drm_err("Existing stream not found; failed to attach surface!\n"
);
return false0;
}


if (stream_status->plane_count == MAX_SURFACE_NUM4) {
dm_error("Surface: can not attach plane_state %p! Maximum is: %d\n",__drm_err("Surface: can not attach plane_state %p! Maximum is: %d\n"
, plane_state, 4)
		plane_state, MAX_SURFACE_NUM)__drm_err("Surface: can not attach plane_state %p! Maximum is: %d\n"
, plane_state, 4);
return false0;
}

head_pipe = resource_get_head_pipe_for_stream(&context->res_ctx, stream);

if (!head_pipe) {
dm_error("Head pipe not found for stream_state %p !\n", stream)__drm_err("Head pipe not found for stream_state %p !\n", stream
);
return false0;
}

/* retain new surface, but only once per stream */
dc_plane_state_retain(plane_state);

while (head_pipe) {
free_pipe = acquire_free_pipe_for_head(context, pool, head_pipe);

if (!free_pipe) {
	int pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);
	if (pipe_idx >= 0)
		free_pipe = &context->res_ctx.pipe_ctx[pipe_idx];
}

if (!free_pipe) {
	dc_plane_state_release(plane_state);
	return false0;
}

free_pipe->plane_state = plane_state;

if (head_pipe != free_pipe) {
	tail_pipe = resource_get_tail_pipe(&context->res_ctx, head_pipe);
	ASSERT(tail_pipe)do { if (({ static int __warned; int __ret = !!(!(tail_pipe))
; if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(tail_pipe)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 1534); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);

	/* ODM + window MPO, where MPO window is on right half only */
	if (free_pipe->plane_state &&
		(free_pipe->plane_state->clip_rect.x >= free_pipe->stream->src.x + free_pipe->stream->src.width/2) &&
		tail_pipe->next_odm_pipe) {

		/* For ODM + window MPO, in 3 plane case, if we already have a MPO window on
		 *  the right side, then we will invalidate a 2nd one on the right side
		 */
		if (head_pipe->next_odm_pipe && tail_pipe->next_odm_pipe->bottom_pipe) {
			dc_plane_state_release(plane_state);
			return false0;
		}

		DC_LOG_SCALER("%s - ODM + window MPO(right). free_pipe:%d  tail_pipe->next_odm_pipe:%d\n",do { } while(0)
				__func__,do { } while(0)
				free_pipe->pipe_idx,do { } while(0)
				tail_pipe->next_odm_pipe ? tail_pipe->next_odm_pipe->pipe_idx : -1)do { } while(0);

		/*
		 * We want to avoid the case where the right side already has a pipe assigned to
		 *  it and is different from free_pipe ( which would cause trigger a pipe
		 *  reallocation ).
		 * Check the old context to see if the right side already has a pipe allocated
		 * - If not, continue to use free_pipe
		 * - If the right side already has a pipe, use that pipe instead if its available
		 */

		/*
		 * We also want to avoid the case where with three plane ( 2 MPO videos ), we have
		 *  both videos on the left side so one of the videos is invalidated.  Then we
		 *  move the invalidated video back to the right side.  If the order of the plane
		 *  states is such that the right MPO plane is processed first, the free pipe
		 *  selected by the head will be the left MPO pipe. But since there was no right
		 *  MPO pipe, it will assign the free pipe to the right MPO pipe instead and
		 *  a pipe reallocation will occur.
		 * Check the old context to see if the left side already has a pipe allocated
		 * - If not, continue to use free_pipe
		 * - If the left side is already using this pipe, then pick another pipe for right
		 */

		prev_right_head = &dc->current_state->res_ctx.pipe_ctx[tail_pipe->next_odm_pipe->pipe_idx];
		if ((prev_right_head->bottom_pipe) &&
			(free_pipe->pipe_idx != prev_right_head->bottom_pipe->pipe_idx)) {
			free_right_pipe = acquire_free_pipe_for_head(context, pool, tail_pipe->next_odm_pipe);
		} else {
			prev_left_head = &dc->current_state->res_ctx.pipe_ctx[head_pipe->pipe_idx];
			if ((prev_left_head->bottom_pipe) &&
				(free_pipe->pipe_idx == prev_left_head->bottom_pipe->pipe_idx)) {
				free_right_pipe = acquire_free_pipe_for_head(context, pool, head_pipe);
			}
		}

		if (free_right_pipe) {
			free_pipe->stream = NULL((void *)0);
			memset(&free_pipe->stream_res, 0, sizeof(struct stream_resource))__builtin_memset((&free_pipe->stream_res), (0), (sizeof
(struct stream_resource)));
			memset(&free_pipe->plane_res, 0, sizeof(struct plane_resource))__builtin_memset((&free_pipe->plane_res), (0), (sizeof
(struct plane_resource)));
			free_pipe->plane_state = NULL((void *)0);
			free_pipe->pipe_idx = 0;
			free_right_pipe->plane_state = plane_state;
			free_pipe = free_right_pipe;
		}

		free_pipe->stream_res.tg = tail_pipe->next_odm_pipe->stream_res.tg;
		free_pipe->stream_res.abm = tail_pipe->next_odm_pipe->stream_res.abm;
		free_pipe->stream_res.opp = tail_pipe->next_odm_pipe->stream_res.opp;
		free_pipe->stream_res.stream_enc = tail_pipe->next_odm_pipe->stream_res.stream_enc;
		free_pipe->stream_res.audio = tail_pipe->next_odm_pipe->stream_res.audio;
		free_pipe->clock_source = tail_pipe->next_odm_pipe->clock_source;

		free_pipe->top_pipe = tail_pipe->next_odm_pipe;
		tail_pipe->next_odm_pipe->bottom_pipe = free_pipe;
	} else if (free_pipe->plane_state &&
		(free_pipe->plane_state->clip_rect.x >= free_pipe->stream->src.x + free_pipe->stream->src.width/2)
		&& head_pipe->next_odm_pipe) {

		/* For ODM + window MPO, support 3 plane ( 2 MPO ) case.
		 * Here we have a desktop ODM + left window MPO and a new MPO window appears
		 *  on the right side only.  It fails the first case, because tail_pipe is the
		 *  left window MPO, so it has no next_odm_pipe.  So in this scenario, we check
		 *  for head_pipe->next_odm_pipe instead
		 */
		DC_LOG_SCALER("%s - ODM + win MPO (left) + win MPO (right). free_pipe:%d  head_pipe->next_odm:%d\n",do { } while(0)
				__func__,do { } while(0)
				free_pipe->pipe_idx,do { } while(0)
				head_pipe->next_odm_pipe ? head_pipe->next_odm_pipe->pipe_idx : -1)do { } while(0);

		/*
		 * We want to avoid the case where the right side already has a pipe assigned to
		 *  it and is different from free_pipe ( which would cause trigger a pipe
		 *  reallocation ).
		 * Check the old context to see if the right side already has a pipe allocated
		 * - If not, continue to use free_pipe
		 * - If the right side already has a pipe, use that pipe instead if its available
		 */
		prev_right_head = &dc->current_state->res_ctx.pipe_ctx[head_pipe->next_odm_pipe->pipe_idx];
		if ((prev_right_head->bottom_pipe) &&
			(free_pipe->pipe_idx != prev_right_head->bottom_pipe->pipe_idx)) {
			free_right_pipe = acquire_free_pipe_for_head(context, pool, head_pipe->next_odm_pipe);
			if (free_right_pipe) {
				free_pipe->stream = NULL((void *)0);
				memset(&free_pipe->stream_res, 0, sizeof(struct stream_resource))__builtin_memset((&free_pipe->stream_res), (0), (sizeof
(struct stream_resource)));
				memset(&free_pipe->plane_res, 0, sizeof(struct plane_resource))__builtin_memset((&free_pipe->plane_res), (0), (sizeof
(struct plane_resource)));
				free_pipe->plane_state = NULL((void *)0);
				free_pipe->pipe_idx = 0;
				free_right_pipe->plane_state = plane_state;
				free_pipe = free_right_pipe;
			}
		}

		free_pipe->stream_res.tg = head_pipe->next_odm_pipe->stream_res.tg;
		free_pipe->stream_res.abm = head_pipe->next_odm_pipe->stream_res.abm;
		free_pipe->stream_res.opp = head_pipe->next_odm_pipe->stream_res.opp;
		free_pipe->stream_res.stream_enc = head_pipe->next_odm_pipe->stream_res.stream_enc;
		free_pipe->stream_res.audio = head_pipe->next_odm_pipe->stream_res.audio;
		free_pipe->clock_source = head_pipe->next_odm_pipe->clock_source;

		free_pipe->top_pipe = head_pipe->next_odm_pipe;
		head_pipe->next_odm_pipe->bottom_pipe = free_pipe;
	} else {

		/* For ODM + window MPO, in 3 plane case, if we already have a MPO window on
		 *  the left side, then we will invalidate a 2nd one on the left side
		 */
		if (head_pipe->next_odm_pipe && tail_pipe->top_pipe) {
			dc_plane_state_release(plane_state);
			return false0;
		}

		free_pipe->stream_res.tg = tail_pipe->stream_res.tg;
		free_pipe->stream_res.abm = tail_pipe->stream_res.abm;
		free_pipe->stream_res.opp = tail_pipe->stream_res.opp;
		free_pipe->stream_res.stream_enc = tail_pipe->stream_res.stream_enc;
		free_pipe->stream_res.audio = tail_pipe->stream_res.audio;
		free_pipe->clock_source = tail_pipe->clock_source;

		free_pipe->top_pipe = tail_pipe;
		tail_pipe->bottom_pipe = free_pipe;

		/* Connect MPO pipes together if MPO window is in the centre */
		if (!(free_pipe->plane_state &&
				(free_pipe->plane_state->clip_rect.x + free_pipe->plane_state->clip_rect.width <=
				free_pipe->stream->src.x + free_pipe->stream->src.width/2))) {
			if (!free_pipe->next_odm_pipe &&
				tail_pipe->next_odm_pipe && tail_pipe->next_odm_pipe->bottom_pipe) {
				free_pipe->next_odm_pipe = tail_pipe->next_odm_pipe->bottom_pipe;
				tail_pipe->next_odm_pipe->bottom_pipe->prev_odm_pipe = free_pipe;
			}
			if (!free_pipe->prev_odm_pipe &&
				tail_pipe->prev_odm_pipe && tail_pipe->prev_odm_pipe->bottom_pipe) {
				free_pipe->prev_odm_pipe = tail_pipe->prev_odm_pipe->bottom_pipe;
				tail_pipe->prev_odm_pipe->bottom_pipe->next_odm_pipe = free_pipe;
			}
		}
	}
}

/* ODM + window MPO, where MPO window is on left half only */
if (free_pipe->plane_state &&
	(free_pipe->plane_state->clip_rect.x + free_pipe->plane_state->clip_rect.width <=
	free_pipe->stream->src.x + free_pipe->stream->src.width/2)) {
	DC_LOG_SCALER("%s - ODM + window MPO(left). free_pipe:%d\n",do { } while(0)
			__func__,do { } while(0)
			free_pipe->pipe_idx)do { } while(0);
	break;
}
/* ODM + window MPO, where MPO window is on right half only */
if (free_pipe->plane_state &&
	(free_pipe->plane_state->clip_rect.x >= free_pipe->stream->src.x + free_pipe->stream->src.width/2)) {
	DC_LOG_SCALER("%s - ODM + window MPO(right). free_pipe:%d\n",do { } while(0)
			__func__,do { } while(0)
			free_pipe->pipe_idx)do { } while(0);
	break;
}

head_pipe = head_pipe->next_odm_pipe;
}
/* assign new surfaces*/
stream_status->plane_states[stream_status->plane_count] = plane_state;

stream_status->plane_count++;

return true1;
1718}

1720bool_Bool dc_remove_plane_from_context(
const struct dc *dc,
struct dc_stream_state *stream,
struct dc_plane_state *plane_state,
struct dc_state *context)
1725{
int i;
struct dc_stream_status *stream_status = NULL((void *)0);
struct resource_pool *pool = dc->res_pool;

if (!plane_state)
return true1;

for (i = 0; i < context->stream_count; i++)
if (context->streams[i] == stream) {
	stream_status = &context->stream_status[i];
	break;
}

if (stream_status == NULL((void *)0)) {
dm_error("Existing stream not found; failed to remove plane.\n")__drm_err("Existing stream not found; failed to remove plane.\n"
);
return false0;
}

/* release pipe for plane*/
for (i = pool->pipe_count - 1; i >= 0; i--) {
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];

if (pipe_ctx->plane_state == plane_state) {
	if (pipe_ctx->top_pipe)
		pipe_ctx->top_pipe->bottom_pipe = pipe_ctx->bottom_pipe;

	/* Second condition is to avoid setting NULL to top pipe
	 * of tail pipe making it look like head pipe in subsequent
	 * deletes
	 */
	if (pipe_ctx->bottom_pipe && pipe_ctx->top_pipe)
		pipe_ctx->bottom_pipe->top_pipe = pipe_ctx->top_pipe;

	/*
	 * For head pipe detach surfaces from pipe for tail
	 * pipe just zero it out
	 */
	if (!pipe_ctx->top_pipe)
		pipe_ctx->plane_state = NULL((void *)0);
	else
		memset(pipe_ctx, 0, sizeof(*pipe_ctx))__builtin_memset((pipe_ctx), (0), (sizeof(*pipe_ctx)));
}
}


for (i = 0; i < stream_status->plane_count; i++) {
if (stream_status->plane_states[i] == plane_state) {
	dc_plane_state_release(stream_status->plane_states[i]);
	break;
}
}

if (i == stream_status->plane_count) {
dm_error("Existing plane_state not found; failed to detach it!\n")__drm_err("Existing plane_state not found; failed to detach it!\n"
);
return false0;
}

stream_status->plane_count--;

/* Start at the plane we've just released, and move all the planes one index forward to "trim" the array */
for (; i < stream_status->plane_count; i++)
stream_status->plane_states[i] = stream_status->plane_states[i + 1];

stream_status->plane_states[stream_status->plane_count] = NULL((void *)0);

return true1;
1792}

1794bool_Bool dc_rem_all_planes_for_stream(
const struct dc *dc,
struct dc_stream_state *stream,
struct dc_state *context)
1798{
int i, old_plane_count;
struct dc_stream_status *stream_status = NULL((void *)0);
struct dc_plane_state *del_planes[MAX_SURFACE_NUM4] = { 0 };

for (i = 0; i < context->stream_count; i++)
	if (context->streams[i] == stream) {
		stream_status = &context->stream_status[i];
		break;
	}

if (stream_status == NULL((void *)0)) {
dm_error("Existing stream %p not found!\n", stream)__drm_err("Existing stream %p not found!\n", stream);
return false0;
}

old_plane_count = stream_status->plane_count;

for (i = 0; i < old_plane_count; i++)
del_planes[i] = stream_status->plane_states[i];

for (i = 0; i < old_plane_count; i++)
if (!dc_remove_plane_from_context(dc, stream, del_planes[i], context))
	return false0;

return true1;
1824}

1826static bool_Bool add_all_planes_for_stream(
const struct dc *dc,
struct dc_stream_state *stream,
const struct dc_validation_set set[],
int set_count,
struct dc_state *context)
1832{
int i, j;

for (i = 0; i < set_count; i++)
if (set[i].stream == stream)
	break;

if (i == set_count) {
dm_error("Stream %p not found in set!\n", stream)__drm_err("Stream %p not found in set!\n", stream);
return false0;
}

for (j = 0; j < set[i].plane_count; j++)
if (!dc_add_plane_to_context(dc, stream, set[i].plane_states[j], context))
	return false0;

return true1;
1849}

1851bool_Bool dc_add_all_planes_for_stream(
const struct dc *dc,
struct dc_stream_state *stream,
struct dc_plane_state * const *plane_states,
int plane_count,
struct dc_state *context)
1857{
struct dc_validation_set set;
int i;

set.stream = stream;
set.plane_count = plane_count;

for (i = 0; i < plane_count; i++)
set.plane_states[i] = plane_states[i];

return add_all_planes_for_stream(dc, stream, &set, 1, context);
1868}

1870bool_Bool is_timing_changed(struct dc_stream_state *cur_stream,
       struct dc_stream_state *new_stream)
1872{
if (cur_stream == NULL((void *)0))
return true1;

/* If output color space is changed, need to reprogram info frames */
if (cur_stream->output_color_space != new_stream->output_color_space)
return true1;

return memcmp(__builtin_memcmp((&cur_stream->timing), (&new_stream
->timing), (sizeof(struct dc_crtc_timing)))
&cur_stream->timing,__builtin_memcmp((&cur_stream->timing), (&new_stream
->timing), (sizeof(struct dc_crtc_timing)))
&new_stream->timing,__builtin_memcmp((&cur_stream->timing), (&new_stream
->timing), (sizeof(struct dc_crtc_timing)))
sizeof(struct dc_crtc_timing))__builtin_memcmp((&cur_stream->timing), (&new_stream
->timing), (sizeof(struct dc_crtc_timing))) != 0;
1884}

1886static bool_Bool are_stream_backends_same(
struct dc_stream_state *stream_a, struct dc_stream_state *stream_b)
1888{
if (stream_a == stream_b)
return true1;

if (stream_a == NULL((void *)0) || stream_b == NULL((void *)0))
return false0;

if (is_timing_changed(stream_a, stream_b))
return false0;

if (stream_a->signal != stream_b->signal)
return false0;

if (stream_a->dpms_off != stream_b->dpms_off)
return false0;

return true1;
1905}

1907/*
* dc_is_stream_unchanged() - Compare two stream states for equivalence.
*
* Checks if there a difference between the two states
* that would require a mode change.
*
* Does not compare cursor position or attributes.
*/
1915bool_Bool dc_is_stream_unchanged(
struct dc_stream_state *old_stream, struct dc_stream_state *stream)
1917{

if (!are_stream_backends_same(old_stream, stream))
return false0;

if (old_stream->ignore_msa_timing_param != stream->ignore_msa_timing_param)
return false0;

/*compare audio info*/
if (memcmp(&old_stream->audio_info, &stream->audio_info, sizeof(stream->audio_info))__builtin_memcmp((&old_stream->audio_info), (&stream
->audio_info), (sizeof(stream->audio_info))) != 0)
return false0;

return true1;
1930}

1932/*
* dc_is_stream_scaling_unchanged() - Compare scaling rectangles of two streams.
*/
1935bool_Bool dc_is_stream_scaling_unchanged(struct dc_stream_state *old_stream,
		    struct dc_stream_state *stream)
1937{
if (old_stream == stream)
return true1;

if (old_stream == NULL((void *)0) || stream == NULL((void *)0))
return false0;

if (memcmp(&old_stream->src,__builtin_memcmp((&old_stream->src), (&stream->
src), (sizeof(struct rect)))
	&stream->src,__builtin_memcmp((&old_stream->src), (&stream->
src), (sizeof(struct rect)))
	sizeof(struct rect))__builtin_memcmp((&old_stream->src), (&stream->
src), (sizeof(struct rect))) != 0)
return false0;

if (memcmp(&old_stream->dst,__builtin_memcmp((&old_stream->dst), (&stream->
dst), (sizeof(struct rect)))
	&stream->dst,__builtin_memcmp((&old_stream->dst), (&stream->
dst), (sizeof(struct rect)))
	sizeof(struct rect))__builtin_memcmp((&old_stream->dst), (&stream->
dst), (sizeof(struct rect))) != 0)
return false0;

return true1;
1955}

1957static void update_stream_engine_usage(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct stream_encoder *stream_enc,
bool_Bool acquired)
1962{
int i;

for (i = 0; i < pool->stream_enc_count; i++) {
if (pool->stream_enc[i] == stream_enc)
	res_ctx->is_stream_enc_acquired[i] = acquired;
}
1969}

1971static void update_hpo_dp_stream_engine_usage(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct hpo_dp_stream_encoder *hpo_dp_stream_enc,
bool_Bool acquired)
1976{
int i;

for (i = 0; i < pool->hpo_dp_stream_enc_count; i++) {
if (pool->hpo_dp_stream_enc[i] == hpo_dp_stream_enc)
	res_ctx->is_hpo_dp_stream_enc_acquired[i] = acquired;
}
1983}

1985static inline int find_acquired_hpo_dp_link_enc_for_link(
const struct resource_context *res_ctx,
const struct dc_link *link)
1988{
int i;

for (i = 0; i < ARRAY_SIZE(res_ctx->hpo_dp_link_enc_to_link_idx)(sizeof((res_ctx->hpo_dp_link_enc_to_link_idx)) / sizeof((
res_ctx->hpo_dp_link_enc_to_link_idx)[0])); i++)
if (res_ctx->hpo_dp_link_enc_ref_cnts[i] > 0 &&
		res_ctx->hpo_dp_link_enc_to_link_idx[i] == link->link_index)
	return i;

return -1;
1997}

1999static inline int find_free_hpo_dp_link_enc(const struct resource_context *res_ctx,
const struct resource_pool *pool)
2001{
int i;

for (i = 0; i < ARRAY_SIZE(res_ctx->hpo_dp_link_enc_ref_cnts)(sizeof((res_ctx->hpo_dp_link_enc_ref_cnts)) / sizeof((res_ctx
->hpo_dp_link_enc_ref_cnts)[0])); i++)
if (res_ctx->hpo_dp_link_enc_ref_cnts[i] == 0)
	break;

return (i < ARRAY_SIZE(res_ctx->hpo_dp_link_enc_ref_cnts)(sizeof((res_ctx->hpo_dp_link_enc_ref_cnts)) / sizeof((res_ctx
->hpo_dp_link_enc_ref_cnts)[0])) &&
	i < pool->hpo_dp_link_enc_count) ? i : -1;
2010}

2012static inline void acquire_hpo_dp_link_enc(
struct resource_context *res_ctx,
unsigned int link_index,
int enc_index)
2016{
res_ctx->hpo_dp_link_enc_to_link_idx[enc_index] = link_index;
res_ctx->hpo_dp_link_enc_ref_cnts[enc_index] = 1;
2019}

2021static inline void retain_hpo_dp_link_enc(
struct resource_context *res_ctx,
int enc_index)
2024{
res_ctx->hpo_dp_link_enc_ref_cnts[enc_index]++;
2026}

2028static inline void release_hpo_dp_link_enc(
struct resource_context *res_ctx,
int enc_index)
2031{
ASSERT(res_ctx->hpo_dp_link_enc_ref_cnts[enc_index] > 0)do { if (({ static int __warned; int __ret = !!(!(res_ctx->
hpo_dp_link_enc_ref_cnts[enc_index] > 0)); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(res_ctx->hpo_dp_link_enc_ref_cnts[enc_index] > 0)"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 2032); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
res_ctx->hpo_dp_link_enc_ref_cnts[enc_index]--;
2034}

2036static bool_Bool add_hpo_dp_link_enc_to_ctx(struct resource_context *res_ctx,
const struct resource_pool *pool,
struct pipe_ctx *pipe_ctx,
struct dc_stream_state *stream)
2040{
int enc_index;

enc_index = find_acquired_hpo_dp_link_enc_for_link(res_ctx, stream->link);

if (enc_index >= 0) {
retain_hpo_dp_link_enc(res_ctx, enc_index);
} else {
enc_index = find_free_hpo_dp_link_enc(res_ctx, pool);
if (enc_index >= 0)
	acquire_hpo_dp_link_enc(res_ctx, stream->link->link_index, enc_index);
}

if (enc_index >= 0)
pipe_ctx->link_res.hpo_dp_link_enc = pool->hpo_dp_link_enc[enc_index];

return pipe_ctx->link_res.hpo_dp_link_enc != NULL((void *)0);
2057}

2059static void remove_hpo_dp_link_enc_from_ctx(struct resource_context *res_ctx,
struct pipe_ctx *pipe_ctx,
struct dc_stream_state *stream)
2062{
int enc_index;

enc_index = find_acquired_hpo_dp_link_enc_for_link(res_ctx, stream->link);

if (enc_index >= 0) {
release_hpo_dp_link_enc(res_ctx, enc_index);
pipe_ctx->link_res.hpo_dp_link_enc = NULL((void *)0);
}
2071}

2073/* TODO: release audio object */
2074void update_audio_usage(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct audio *audio,
bool_Bool acquired)
2079{
int i;
for (i = 0; i < pool->audio_count; i++) {
if (pool->audios[i] == audio)
	res_ctx->is_audio_acquired[i] = acquired;
}
2085}

2087static int acquire_first_free_pipe(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct dc_stream_state *stream)
2091{
int i;

for (i = 0; i < pool->pipe_count; i++) {
if (!res_ctx->pipe_ctx[i].stream) {
	struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];

	pipe_ctx->stream_res.tg = pool->timing_generators[i];
	pipe_ctx->plane_res.mi = pool->mis[i];
	pipe_ctx->plane_res.hubp = pool->hubps[i];
	pipe_ctx->plane_res.ipp = pool->ipps[i];
	pipe_ctx->plane_res.xfm = pool->transforms[i];
	pipe_ctx->plane_res.dpp = pool->dpps[i];
	pipe_ctx->stream_res.opp = pool->opps[i];
	if (pool->dpps[i])
		pipe_ctx->plane_res.mpcc_inst = pool->dpps[i]->inst;
	pipe_ctx->pipe_idx = i;

	if (i >= pool->timing_generator_count) {
		int tg_inst = pool->timing_generator_count - 1;

		pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst];
		pipe_ctx->stream_res.opp = pool->opps[tg_inst];
	}

	pipe_ctx->stream = stream;
	return i;
}
}
return -1;
2121}

2123static struct hpo_dp_stream_encoder *find_first_free_match_hpo_dp_stream_enc_for_link(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct dc_stream_state *stream)
2127{
int i;

for (i = 0; i < pool->hpo_dp_stream_enc_count; i++) {
if (!res_ctx->is_hpo_dp_stream_enc_acquired[i] &&
		pool->hpo_dp_stream_enc[i]) {

	return pool->hpo_dp_stream_enc[i];
}
}

return NULL((void *)0);
2139}

2141static struct audio *find_first_free_audio(
struct resource_context *res_ctx,
const struct resource_pool *pool,
enum engine_id id,
enum dce_version dc_version)
2146{
int i, available_audio_count;

available_audio_count = pool->audio_count;

for (i = 0; i < available_audio_count; i++) {
if ((res_ctx->is_audio_acquired[i] == false0) && (res_ctx->is_stream_enc_acquired[i] == true1)) {
	/*we have enough audio endpoint, find the matching inst*/
	if (id != i)
		continue;
	return pool->audios[i];
}
}

/* use engine id to find free audio */
if ((id < available_audio_count) && (res_ctx->is_audio_acquired[id] == false0)) {
return pool->audios[id];
}
/*not found the matching one, first come first serve*/
for (i = 0; i < available_audio_count; i++) {
if (res_ctx->is_audio_acquired[i] == false0) {
	return pool->audios[i];
}
}
return NULL((void *)0);
2171}

2173/*
* dc_add_stream_to_ctx() - Add a new dc_stream_state to a dc_state.
*/
2176enum dc_status dc_add_stream_to_ctx(
struct dc *dc,
struct dc_state *new_ctx,
struct dc_stream_state *stream)
2180{
enum dc_status res;
DC_LOGGER_INIT(dc->ctx->logger);

if (new_ctx->stream_count >= dc->res_pool->timing_generator_count) {
DC_LOG_WARNING("Max streams reached, can't add stream %p !\n", stream)printk("\0014" "[" "drm" "] " "Max streams reached, can't add stream %p !\n"
, stream);
return DC_ERROR_UNEXPECTED;
}

new_ctx->streams[new_ctx->stream_count] = stream;
dc_stream_retain(stream);
new_ctx->stream_count++;

res = dc->res_pool->funcs->add_stream_to_ctx(dc, new_ctx, stream);
if (res != DC_OK)
DC_LOG_WARNING("Adding stream %p to context failed with err %d!\n", stream, res)printk("\0014" "[" "drm" "] " "Adding stream %p to context failed with err %d!\n"
, stream, res);

return res;
2198}

2200/*
* dc_remove_stream_from_ctx() - Remove a stream from a dc_state.
*/
2203enum dc_status dc_remove_stream_from_ctx(
	struct dc *dc,
	struct dc_state *new_ctx,
	struct dc_stream_state *stream)
2207{
int i;
struct dc_context *dc_ctx = dc->ctx;
struct pipe_ctx *del_pipe = resource_get_head_pipe_for_stream(&new_ctx->res_ctx, stream);
struct pipe_ctx *odm_pipe;

if (!del_pipe) {
DC_ERROR("Pipe not found for stream %p !\n", stream)do { (void)(dc_ctx); __drm_err("Pipe not found for stream %p !\n"
, stream); } while (0);
return DC_ERROR_UNEXPECTED;
}

odm_pipe = del_pipe->next_odm_pipe;

/* Release primary pipe */
ASSERT(del_pipe->stream_res.stream_enc)do { if (({ static int __warned; int __ret = !!(!(del_pipe->
stream_res.stream_enc)); if (__ret && !__warned) { printf
("WARNING %s failed at %s:%d\n", "!(del_pipe->stream_res.stream_enc)"
, "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 2221); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
update_stream_engine_usage(
	&new_ctx->res_ctx,
		dc->res_pool,
	del_pipe->stream_res.stream_enc,
	false0);

if (is_dp_128b_132b_signal(del_pipe)) {
update_hpo_dp_stream_engine_usage(
	&new_ctx->res_ctx, dc->res_pool,
	del_pipe->stream_res.hpo_dp_stream_enc,
	false0);
remove_hpo_dp_link_enc_from_ctx(&new_ctx->res_ctx, del_pipe, del_pipe->stream);
}

if (del_pipe->stream_res.audio)
update_audio_usage(
	&new_ctx->res_ctx,
	dc->res_pool,
	del_pipe->stream_res.audio,
	false0);

resource_unreference_clock_source(&new_ctx->res_ctx,
			  dc->res_pool,
			  del_pipe->clock_source);

if (dc->res_pool->funcs->remove_stream_from_ctx)
dc->res_pool->funcs->remove_stream_from_ctx(dc, new_ctx, stream);

while (odm_pipe) {
struct pipe_ctx *next_odm_pipe = odm_pipe->next_odm_pipe;

memset(odm_pipe, 0, sizeof(*odm_pipe))__builtin_memset((odm_pipe), (0), (sizeof(*odm_pipe)));
odm_pipe = next_odm_pipe;
}
memset(del_pipe, 0, sizeof(*del_pipe))__builtin_memset((del_pipe), (0), (sizeof(*del_pipe)));

for (i = 0; i < new_ctx->stream_count; i++)
if (new_ctx->streams[i] == stream)
	break;

if (new_ctx->streams[i] != stream) {
DC_ERROR("Context doesn't have stream %p !\n", stream)do { (void)(dc_ctx); __drm_err("Context doesn't have stream %p !\n"
, stream); } while (0);
return DC_ERROR_UNEXPECTED;
}

dc_stream_release(new_ctx->streams[i]);
new_ctx->stream_count--;

/* Trim back arrays */
for (; i < new_ctx->stream_count; i++) {
new_ctx->streams[i] = new_ctx->streams[i + 1];
new_ctx->stream_status[i] = new_ctx->stream_status[i + 1];
}

new_ctx->streams[new_ctx->stream_count] = NULL((void *)0);
memset(__builtin_memset((&new_ctx->stream_status[new_ctx->
stream_count]), (0), (sizeof(new_ctx->stream_status[0])))
	&new_ctx->stream_status[new_ctx->stream_count],__builtin_memset((&new_ctx->stream_status[new_ctx->
stream_count]), (0), (sizeof(new_ctx->stream_status[0])))
	0,__builtin_memset((&new_ctx->stream_status[new_ctx->
stream_count]), (0), (sizeof(new_ctx->stream_status[0])))
	sizeof(new_ctx->stream_status[0]))__builtin_memset((&new_ctx->stream_status[new_ctx->
stream_count]), (0), (sizeof(new_ctx->stream_status[0])));

return DC_OK;
2283}

2285static struct dc_stream_state *find_pll_sharable_stream(
struct dc_stream_state *stream_needs_pll,
struct dc_state *context)
2288{
int i;

for (i = 0; i < context->stream_count; i++) {
struct dc_stream_state *stream_has_pll = context->streams[i];

/* We are looking for non dp, non virtual stream */
if (resource_are_streams_timing_synchronizable(
	stream_needs_pll, stream_has_pll)
	&& !dc_is_dp_signal(stream_has_pll->signal)
	&& stream_has_pll->link->connector_signal
	!= SIGNAL_TYPE_VIRTUAL)
	return stream_has_pll;

}

return NULL((void *)0);
2305}

2307static int get_norm_pix_clk(const struct dc_crtc_timing *timing)
2308{
uint32_t pix_clk = timing->pix_clk_100hz;
uint32_t normalized_pix_clk = pix_clk;

if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
pix_clk /= 2;
if (timing->pixel_encoding != PIXEL_ENCODING_YCBCR422) {
switch (timing->display_color_depth) {
case COLOR_DEPTH_666:
case COLOR_DEPTH_888:
	normalized_pix_clk = pix_clk;
	break;
case COLOR_DEPTH_101010:
	normalized_pix_clk = (pix_clk * 30) / 24;
	break;
case COLOR_DEPTH_121212:
	normalized_pix_clk = (pix_clk * 36) / 24;
break;
case COLOR_DEPTH_161616:
	normalized_pix_clk = (pix_clk * 48) / 24;
break;
default:
	ASSERT(0)do { if (({ static int __warned; int __ret = !!(!(0)); if (__ret
 && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 2330); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
break;
}
}
return normalized_pix_clk;
2335}

2337static void calculate_phy_pix_clks(struct dc_stream_state *stream)
2338{
/* update actual pixel clock on all streams */
if (dc_is_hdmi_signal(stream->signal))
stream->phy_pix_clk = get_norm_pix_clk(
	&stream->timing) / 10;
else
stream->phy_pix_clk =
	stream->timing.pix_clk_100hz / 10;

if (stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)
stream->phy_pix_clk *= 2;
2349}

2351static int acquire_resource_from_hw_enabled_state(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct dc_stream_state *stream)
2355{
struct dc_link *link = stream->link;
unsigned int i, inst, tg_inst = 0;
uint32_t numPipes = 1;
uint32_t id_src[4] = {0};

/* Check for enabled DIG to identify enabled display */
if (!link->link_enc->funcs->is_dig_enabled(link->link_enc))
return -1;

inst = link->link_enc->funcs->get_dig_frontend(link->link_enc);

if (inst == ENGINE_ID_UNKNOWN)
return -1;

for (i = 0; i < pool->stream_enc_count; i++) {
if (pool->stream_enc[i]->id == inst) {
	tg_inst = pool->stream_enc[i]->funcs->dig_source_otg(
		pool->stream_enc[i]);
	break;
}
}

// tg_inst not found
if (i == pool->stream_enc_count)
return -1;

if (tg_inst >= pool->timing_generator_count)
return -1;

if (!res_ctx->pipe_ctx[tg_inst].stream) {
struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[tg_inst];

pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst];
id_src[0] = tg_inst;

if (pipe_ctx->stream_res.tg->funcs->get_optc_source)
	pipe_ctx->stream_res.tg->funcs->get_optc_source(pipe_ctx->stream_res.tg,
				&numPipes, &id_src[0], &id_src[1]);

if (id_src[0] == 0xf && id_src[1] == 0xf) {
	id_src[0] = tg_inst;
	numPipes = 1;
}

for (i = 0; i < numPipes; i++) {
	//Check if src id invalid
	if (id_src[i] == 0xf)
		return -1;

	pipe_ctx = &res_ctx->pipe_ctx[id_src[i]];

	pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst];
	pipe_ctx->plane_res.mi = pool->mis[id_src[i]];
	pipe_ctx->plane_res.hubp = pool->hubps[id_src[i]];
	pipe_ctx->plane_res.ipp = pool->ipps[id_src[i]];
	pipe_ctx->plane_res.xfm = pool->transforms[id_src[i]];
	pipe_ctx->plane_res.dpp = pool->dpps[id_src[i]];
	pipe_ctx->stream_res.opp = pool->opps[id_src[i]];

	if (pool->dpps[id_src[i]]) {
		pipe_ctx->plane_res.mpcc_inst = pool->dpps[id_src[i]]->inst;

		if (pool->mpc->funcs->read_mpcc_state) {
			struct mpcc_state s = {0};

			pool->mpc->funcs->read_mpcc_state(pool->mpc, pipe_ctx->plane_res.mpcc_inst, &s);

			if (s.dpp_id < MAX_MPCC6)
				pool->mpc->mpcc_array[pipe_ctx->plane_res.mpcc_inst].dpp_id =
						s.dpp_id;

			if (s.bot_mpcc_id < MAX_MPCC6)
				pool->mpc->mpcc_array[pipe_ctx->plane_res.mpcc_inst].mpcc_bot =
						&pool->mpc->mpcc_array[s.bot_mpcc_id];

			if (s.opp_id < MAX_OPP6)
				pipe_ctx->stream_res.opp->mpc_tree_params.opp_id = s.opp_id;
		}
	}
	pipe_ctx->pipe_idx = id_src[i];

	if (id_src[i] >= pool->timing_generator_count) {
		id_src[i] = pool->timing_generator_count - 1;

		pipe_ctx->stream_res.tg = pool->timing_generators[id_src[i]];
		pipe_ctx->stream_res.opp = pool->opps[id_src[i]];
	}

	pipe_ctx->stream = stream;
}

if (numPipes == 2) {
	stream->apply_boot_odm_mode = dm_odm_combine_policy_2to1;
	res_ctx->pipe_ctx[id_src[0]].next_odm_pipe = &res_ctx->pipe_ctx[id_src[1]];
	res_ctx->pipe_ctx[id_src[0]].prev_odm_pipe = NULL((void *)0);
	res_ctx->pipe_ctx[id_src[1]].next_odm_pipe = NULL((void *)0);
	res_ctx->pipe_ctx[id_src[1]].prev_odm_pipe = &res_ctx->pipe_ctx[id_src[0]];
} else
	stream->apply_boot_odm_mode = dm_odm_combine_mode_disabled;

return id_src[0];
}

return -1;
2460}

2462static void mark_seamless_boot_stream(
const struct dc  *dc,
struct dc_stream_state *stream)
2465{
struct dc_bios *dcb = dc->ctx->dc_bios;

if (dc->config.allow_seamless_boot_optimization &&
	!dcb->funcs->is_accelerated_mode(dcb)) {
if (dc_validate_boot_timing(dc, stream->sink, &stream->timing))
	stream->apply_seamless_boot_optimization = true1;
}
2473}

2475enum dc_status resource_map_pool_resources(
const struct dc  *dc,
struct dc_state *context,
struct dc_stream_state *stream)
2479{
const struct resource_pool *pool = dc->res_pool;
int i;
struct dc_context *dc_ctx = dc->ctx;
struct pipe_ctx *pipe_ctx = NULL((void *)0);
int pipe_idx = -1;

calculate_phy_pix_clks(stream);

mark_seamless_boot_stream(dc, stream);

if (stream->apply_seamless_boot_optimization) {
pipe_idx = acquire_resource_from_hw_enabled_state(
		&context->res_ctx,
		pool,
		stream);
if (pipe_idx < 0)
	/* hw resource was assigned to other stream */
	stream->apply_seamless_boot_optimization = false0;
}

if (pipe_idx < 0)
/* acquire new resources */
pipe_idx = acquire_first_free_pipe(&context->res_ctx, pool, stream);

if (pipe_idx < 0)
pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);

if (pipe_idx < 0 || context->res_ctx.pipe_ctx[pipe_idx].stream_res.tg == NULL((void *)0))
return DC_NO_CONTROLLER_RESOURCE;

pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx];

pipe_ctx->stream_res.stream_enc =
dc->res_pool->funcs->find_first_free_match_stream_enc_for_link(
	&context->res_ctx, pool, stream);

if (!pipe_ctx->stream_res.stream_enc)
return DC_NO_STREAM_ENC_RESOURCE;

update_stream_engine_usage(
&context->res_ctx, pool,
pipe_ctx->stream_res.stream_enc,
true1);

/* Allocate DP HPO Stream Encoder based on signal, hw capabilities
* and link settings
*/
if (dc_is_dp_signal(stream->signal)) {
if (!decide_link_settings(stream, &pipe_ctx->link_config.dp_link_settings))
	return DC_FAIL_DP_LINK_BANDWIDTH;
if (dp_get_link_encoding_format(&pipe_ctx->link_config.dp_link_settings) == DP_128b_132b_ENCODING) {
	pipe_ctx->stream_res.hpo_dp_stream_enc =
			find_first_free_match_hpo_dp_stream_enc_for_link(
					&context->res_ctx, pool, stream);

	if (!pipe_ctx->stream_res.hpo_dp_stream_enc)
		return DC_NO_STREAM_ENC_RESOURCE;

	update_hpo_dp_stream_engine_usage(
			&context->res_ctx, pool,
			pipe_ctx->stream_res.hpo_dp_stream_enc,
			true1);
	if (!add_hpo_dp_link_enc_to_ctx(&context->res_ctx, pool, pipe_ctx, stream))
		return DC_NO_LINK_ENC_RESOURCE;
}
}

/* TODO: Add check if ASIC support and EDID audio */
if (!stream->converter_disable_audio &&
   dc_is_audio_capable_signal(pipe_ctx->stream->signal) &&
   stream->audio_info.mode_count && stream->audio_info.flags.all) {
pipe_ctx->stream_res.audio = find_first_free_audio(
&context->res_ctx, pool, pipe_ctx->stream_res.stream_enc->id, dc_ctx->dce_version);

/*
 * Audio assigned in order first come first get.
 * There are asics which has number of audio
 * resources less then number of pipes
 */
if (pipe_ctx->stream_res.audio)
	update_audio_usage(&context->res_ctx, pool,
			   pipe_ctx->stream_res.audio, true1);
}

/* Add ABM to the resource if on EDP */
if (pipe_ctx->stream && dc_is_embedded_signal(pipe_ctx->stream->signal)) {
if (pool->abm)
	pipe_ctx->stream_res.abm = pool->abm;
else
	pipe_ctx->stream_res.abm = pool->multiple_abms[pipe_ctx->stream_res.tg->inst];
}

for (i = 0; i < context->stream_count; i++)
if (context->streams[i] == stream) {
	context->stream_status[i].primary_otg_inst = pipe_ctx->stream_res.tg->inst;
	context->stream_status[i].stream_enc_inst = pipe_ctx->stream_res.stream_enc->stream_enc_inst;
	context->stream_status[i].audio_inst =
		pipe_ctx->stream_res.audio ? pipe_ctx->stream_res.audio->inst : -1;

	return DC_OK;
}

DC_ERROR("Stream %p not found in new ctx!\n", stream)do { (void)(dc_ctx); __drm_err("Stream %p not found in new ctx!\n"
, stream); } while (0);
return DC_ERROR_UNEXPECTED;
2584}

2586/**
* dc_resource_state_copy_construct_current() - Creates a new dc_state from existing state
* Is a shallow copy.  Increments refcounts on existing streams and planes.
* @dc: copy out of dc->current_state
* @dst_ctx: copy into this
*/
2592void dc_resource_state_copy_construct_current(
const struct dc *dc,
struct dc_state *dst_ctx)
2595{
dc_resource_state_copy_construct(dc->current_state, dst_ctx);
2597}


2600void dc_resource_state_construct(
const struct dc *dc,
struct dc_state *dst_ctx)
2603{
dst_ctx->clk_mgr = dc->clk_mgr;

/* Initialise DIG link encoder resource tracking variables. */
link_enc_cfg_init(dc, dst_ctx);
2608}


2611bool_Bool dc_resource_is_dsc_encoding_supported(const struct dc *dc)
2612{
if (dc->res_pool == NULL((void *)0))
return false0;

return dc->res_pool->res_cap->num_dsc > 0;
2617}

2619static bool_Bool planes_changed_for_existing_stream(struct dc_state *context,
			       struct dc_stream_state *stream,
			       const struct dc_validation_set set[],
			       int set_count)
2623{
int i, j;
struct dc_stream_status *stream_status = NULL((void *)0);

for (i = 0; i < context->stream_count; i++) {
if (context->streams[i] == stream) {
	stream_status = &context->stream_status[i];
	break;
}
}

if (!stream_status)
ASSERT(0)do { if (({ static int __warned; int __ret = !!(!(0)); if (__ret
 && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 2635); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);

for (i = 0; i < set_count; i++)
if (set[i].stream == stream)
	break;

if (i == set_count)
ASSERT(0)do { if (({ static int __warned; int __ret = !!(!(0)); if (__ret
 && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 2642); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);

if (set[i].plane_count != stream_status->plane_count)
return true1;

for (j = 0; j < set[i].plane_count; j++)
if (set[i].plane_states[j] != stream_status->plane_states[j])
	return true1;

return false0;
2652}

2654/**
* dc_validate_with_context - Validate and update the potential new stream in the context object
*
* @dc: Used to get the current state status
* @set: An array of dc_validation_set with all the current streams reference
* @set_count: Total of streams
* @context: New context
* @fast_validate: Enable or disable fast validation
*
* This function updates the potential new stream in the context object. It
* creates multiple lists for the add, remove, and unchanged streams. In
* particular, if the unchanged streams have a plane that changed, it is
* necessary to remove all planes from the unchanged streams. In summary, this
* function is responsible for validating the new context.
*
* Return:
* In case of success, return DC_OK (1), otherwise, return a DC error.
*/
2672enum dc_status dc_validate_with_context(struct dc *dc,
			const struct dc_validation_set set[],
			int set_count,
			struct dc_state *context,
			bool_Bool fast_validate)
2677{
struct dc_stream_state *unchanged_streams[MAX_PIPES6] = { 0 };
struct dc_stream_state *del_streams[MAX_PIPES6] = { 0 };
struct dc_stream_state *add_streams[MAX_PIPES6] = { 0 };
int old_stream_count = context->stream_count;
enum dc_status res = DC_ERROR_UNEXPECTED;
int unchanged_streams_count = 0;
int del_streams_count = 0;
int add_streams_count = 0;
bool_Bool found = false0;
int i, j, k;

DC_LOGGER_INIT(dc->ctx->logger);

/* First build a list of streams to be remove from current context */
for (i = 0; i < old_stream_count; i++) {
struct dc_stream_state *stream = context->streams[i];

for (j = 0; j < set_count; j++) {
	if (stream == set[j].stream) {
		found = true1;
		break;
	}
}

if (!found)
	del_streams[del_streams_count++] = stream;

found = false0;
}

/* Second, build a list of new streams */
for (i = 0; i < set_count; i++) {
struct dc_stream_state *stream = set[i].stream;

for (j = 0; j < old_stream_count; j++) {
	if (stream == context->streams[j]) {
		found = true1;
		break;
	}
}

if (!found)
	add_streams[add_streams_count++] = stream;

found = false0;
}

/* Build a list of unchanged streams which is necessary for handling
* planes change such as added, removed, and updated.
*/
for (i = 0; i < set_count; i++) {
/* Check if stream is part of the delete list */
for (j = 0; j < del_streams_count; j++) {
	if (set[i].stream == del_streams[j]) {
		found = true1;
		break;
	}
}

if (!found) {
	/* Check if stream is part of the add list */
	for (j = 0; j < add_streams_count; j++) {
		if (set[i].stream == add_streams[j]) {
			found = true1;
			break;
		}
	}
}

if (!found)
	unchanged_streams[unchanged_streams_count++] = set[i].stream;

found = false0;
}

/* Remove all planes for unchanged streams if planes changed */
for (i = 0; i < unchanged_streams_count; i++) {
if (planes_changed_for_existing_stream(context,
				       unchanged_streams[i],
				       set,
				       set_count)) {
	if (!dc_rem_all_planes_for_stream(dc,
					  unchanged_streams[i],
					  context)) {
		res = DC_FAIL_DETACH_SURFACES;
		goto fail;
	}
}
}

/* Remove all planes for removed streams and then remove the streams */
for (i = 0; i < del_streams_count; i++) {
/* Need to cpy the dwb data from the old stream in order to efc to work */
if (del_streams[i]->num_wb_info > 0) {
	for (j = 0; j < add_streams_count; j++) {
		if (del_streams[i]->sink == add_streams[j]->sink) {
			add_streams[j]->num_wb_info = del_streams[i]->num_wb_info;
			for (k = 0; k < del_streams[i]->num_wb_info; k++)
				add_streams[j]->writeback_info[k] = del_streams[i]->writeback_info[k];
		}
	}
}

if (!dc_rem_all_planes_for_stream(dc, del_streams[i], context)) {
	res = DC_FAIL_DETACH_SURFACES;
	goto fail;
}

res = dc_remove_stream_from_ctx(dc, context, del_streams[i]);
if (res != DC_OK)
	goto fail;
}

/* Swap seamless boot stream to pipe 0 (if needed) to ensure pipe_ctx
* matches. This may change in the future if seamless_boot_stream can be
* multiple.
*/
for (i = 0; i < add_streams_count; i++) {
mark_seamless_boot_stream(dc, add_streams[i]);
if (add_streams[i]->apply_seamless_boot_optimization && i != 0) {
	struct dc_stream_state *temp = add_streams[0];

	add_streams[0] = add_streams[i];
	add_streams[i] = temp;
	break;
}
}

/* Add new streams and then add all planes for the new stream */
for (i = 0; i < add_streams_count; i++) {
calculate_phy_pix_clks(add_streams[i]);
res = dc_add_stream_to_ctx(dc, context, add_streams[i]);
if (res != DC_OK)
	goto fail;

if (!add_all_planes_for_stream(dc, add_streams[i], set, set_count, context)) {
	res = DC_FAIL_ATTACH_SURFACES;
	goto fail;
}
}

/* Add all planes for unchanged streams if planes changed */
for (i = 0; i < unchanged_streams_count; i++) {
if (planes_changed_for_existing_stream(context,
				       unchanged_streams[i],
				       set,
				       set_count)) {
	if (!add_all_planes_for_stream(dc, unchanged_streams[i], set, set_count, context)) {
		res = DC_FAIL_ATTACH_SURFACES;
		goto fail;
	}
}
}

res = dc_validate_global_state(dc, context, fast_validate);

2834fail:
if (res != DC_OK)
DC_LOG_WARNING("%s:resource validation failed, dc_status:%d\n",printk("\0014" "[" "drm" "] " "%s:resource validation failed, dc_status:%d\n"
, __func__, res)
	       __func__,printk("\0014" "[" "drm" "] " "%s:resource validation failed, dc_status:%d\n"
, __func__, res)
	       res)printk("\0014" "[" "drm" "] " "%s:resource validation failed, dc_status:%d\n"
, __func__, res);

return res;
2841}

2843/**
* dc_validate_global_state() - Determine if hardware can support a given state
*
* @dc: dc struct for this driver
* @new_ctx: state to be validated
* @fast_validate: set to true if only yes/no to support matters
*
* Checks hardware resource availability and bandwidth requirement.
*
* Return:
* DC_OK if the result can be programmed. Otherwise, an error code.
*/
2855enum dc_status dc_validate_global_state(
struct dc *dc,
struct dc_state *new_ctx,
bool_Bool fast_validate)
2859{
enum dc_status result = DC_ERROR_UNEXPECTED;
int i, j;

if (!new_ctx)
return DC_ERROR_UNEXPECTED;

if (dc->res_pool->funcs->validate_global) {
result = dc->res_pool->funcs->validate_global(dc, new_ctx);
if (result != DC_OK)
	return result;
}

for (i = 0; i < new_ctx->stream_count; i++) {
struct dc_stream_state *stream = new_ctx->streams[i];

for (j = 0; j < dc->res_pool->pipe_count; j++) {
	struct pipe_ctx *pipe_ctx = &new_ctx->res_ctx.pipe_ctx[j];

	if (pipe_ctx->stream != stream)
		continue;

	if (dc->res_pool->funcs->patch_unknown_plane_state &&
			pipe_ctx->plane_state &&
			pipe_ctx->plane_state->tiling_info.gfx9.swizzle == DC_SW_UNKNOWN) {
		result = dc->res_pool->funcs->patch_unknown_plane_state(pipe_ctx->plane_state);
		if (result != DC_OK)
			return result;
	}

	/* Switch to dp clock source only if there is
	 * no non dp stream that shares the same timing
	 * with the dp stream.
	 */
	if (dc_is_dp_signal(pipe_ctx->stream->signal) &&
		!find_pll_sharable_stream(stream, new_ctx)) {

		resource_unreference_clock_source(
				&new_ctx->res_ctx,
				dc->res_pool,
				pipe_ctx->clock_source);

		pipe_ctx->clock_source = dc->res_pool->dp_clock_source;
		resource_reference_clock_source(
				&new_ctx->res_ctx,
				dc->res_pool,
				 pipe_ctx->clock_source);
	}
}
}

result = resource_build_scaling_params_for_context(dc, new_ctx);

if (result == DC_OK)
if (!dc->res_pool->funcs->validate_bandwidth(dc, new_ctx, fast_validate))
	result = DC_FAIL_BANDWIDTH_VALIDATE;

/*
* Only update link encoder to stream assignment after bandwidth validation passed.
* TODO: Split out assignment and validation.
*/
if (result == DC_OK && dc->res_pool->funcs->link_encs_assign && fast_validate == false0)
dc->res_pool->funcs->link_encs_assign(
	dc, new_ctx, new_ctx->streams, new_ctx->stream_count);

return result;
2925}

2927static void patch_gamut_packet_checksum(
struct dc_info_packet *gamut_packet)
2929{
/* For gamut we recalc checksum */
if (gamut_packet->valid) {
uint8_t chk_sum = 0;
uint8_t *ptr;
uint8_t i;

/*start of the Gamut data. */
ptr = &gamut_packet->sb[3];

for (i = 0; i <= gamut_packet->sb[1]; i++)
	chk_sum += ptr[i];

gamut_packet->sb[2] = (uint8_t) (0x100 - chk_sum);
}
2944}

2946static void set_avi_info_frame(
struct dc_info_packet *info_packet,
struct pipe_ctx *pipe_ctx)
2949{
struct dc_stream_state *stream = pipe_ctx->stream;
enum dc_color_space color_space = COLOR_SPACE_UNKNOWN;
uint32_t pixel_encoding = 0;
enum scanning_type scan_type = SCANNING_TYPE_NODATA;
enum dc_aspect_ratio aspect = ASPECT_RATIO_NO_DATA;
bool_Bool itc = false0;
uint8_t itc_value = 0;
uint8_t cn0_cn1 = 0;
unsigned int cn0_cn1_value = 0;
uint8_t *check_sum = NULL((void *)0);
uint8_t byte_index = 0;
union hdmi_info_packet hdmi_info;
union display_content_support support = {0};
unsigned int vic = pipe_ctx->stream->timing.vic;
unsigned int rid = pipe_ctx->stream->timing.rid;
unsigned int fr_ind = pipe_ctx->stream->timing.fr_index;
enum dc_timing_3d_format format;

memset(&hdmi_info, 0, sizeof(union hdmi_info_packet))__builtin_memset((&hdmi_info), (0), (sizeof(union hdmi_info_packet
)));

color_space = pipe_ctx->stream->output_color_space;
if (color_space == COLOR_SPACE_UNKNOWN)
color_space = (stream->timing.pixel_encoding == PIXEL_ENCODING_RGB) ?
	COLOR_SPACE_SRGB:COLOR_SPACE_YCBCR709;

/* Initialize header */
hdmi_info.bits.header.info_frame_type = HDMI_INFOFRAME_TYPE_AVI;
/* InfoFrameVersion_3 is defined by CEA861F (Section 6.4), but shall
* not be used in HDMI 2.0 (Section 10.1) */
hdmi_info.bits.header.version = 2;
hdmi_info.bits.header.length = HDMI_AVI_INFOFRAME_SIZE13;

/*
* IDO-defined (Y2,Y1,Y0 = 1,1,1) shall not be used by devices built
* according to HDMI 2.0 spec (Section 10.1)
*/

switch (stream->timing.pixel_encoding) {
case PIXEL_ENCODING_YCBCR422:
pixel_encoding = 1;
break;

case PIXEL_ENCODING_YCBCR444:
pixel_encoding = 2;
break;
case PIXEL_ENCODING_YCBCR420:
pixel_encoding = 3;
break;

case PIXEL_ENCODING_RGB:
default:
pixel_encoding = 0;
}

/* Y0_Y1_Y2 : The pixel encoding */
/* H14b AVI InfoFrame has extension on Y-field from 2 bits to 3 bits */
hdmi_info.bits.Y0_Y1_Y2 = pixel_encoding;

/* A0 = 1 Active Format Information valid */
hdmi_info.bits.A0 = ACTIVE_FORMAT_VALID;

/* B0, B1 = 3; Bar info data is valid */
hdmi_info.bits.B0_B1 = BAR_INFO_BOTH_VALID;

hdmi_info.bits.SC0_SC1 = PICTURE_SCALING_UNIFORM;

/* S0, S1 : Underscan / Overscan */
/* TODO: un-hardcode scan type */
scan_type = SCANNING_TYPE_UNDERSCAN;
hdmi_info.bits.S0_S1 = scan_type;

/* C0, C1 : Colorimetry */
if (color_space == COLOR_SPACE_YCBCR709 ||
	color_space == COLOR_SPACE_YCBCR709_LIMITED)
hdmi_info.bits.C0_C1 = COLORIMETRY_ITU709;
else if (color_space == COLOR_SPACE_YCBCR601 ||
	color_space == COLOR_SPACE_YCBCR601_LIMITED)
hdmi_info.bits.C0_C1 = COLORIMETRY_ITU601;
else {
hdmi_info.bits.C0_C1 = COLORIMETRY_NO_DATA;
}
if (color_space == COLOR_SPACE_2020_RGB_FULLRANGE ||
	color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE ||
	color_space == COLOR_SPACE_2020_YCBCR) {
hdmi_info.bits.EC0_EC2 = COLORIMETRYEX_BT2020RGBYCBCR;
hdmi_info.bits.C0_C1   = COLORIMETRY_EXTENDED;
} else if (color_space == COLOR_SPACE_ADOBERGB) {
hdmi_info.bits.EC0_EC2 = COLORIMETRYEX_ADOBERGB;
hdmi_info.bits.C0_C1   = COLORIMETRY_EXTENDED;
}

/* TODO: un-hardcode aspect ratio */
aspect = stream->timing.aspect_ratio;

switch (aspect) {
case ASPECT_RATIO_4_3:
case ASPECT_RATIO_16_9:
hdmi_info.bits.M0_M1 = aspect;
break;

case ASPECT_RATIO_NO_DATA:
case ASPECT_RATIO_64_27:
case ASPECT_RATIO_256_135:
default:
hdmi_info.bits.M0_M1 = 0;
}

/* Active Format Aspect ratio - same as Picture Aspect Ratio. */
hdmi_info.bits.R0_R3 = ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE;

/* TODO: un-hardcode cn0_cn1 and itc */

cn0_cn1 = 0;
cn0_cn1_value = 0;

itc = true1;
itc_value = 1;

support = stream->content_support;

if (itc) {
if (!support.bits.valid_content_type) {
	cn0_cn1_value = 0;
} else {
	if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GRAPHICS) {
		if (support.bits.graphics_content == 1) {
			cn0_cn1_value = 0;
		}
	} else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_PHOTO) {
		if (support.bits.photo_content == 1) {
			cn0_cn1_value = 1;
		} else {
			cn0_cn1_value = 0;
			itc_value = 0;
		}
	} else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_CINEMA) {
		if (support.bits.cinema_content == 1) {
			cn0_cn1_value = 2;
		} else {
			cn0_cn1_value = 0;
			itc_value = 0;
		}
	} else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GAME) {
		if (support.bits.game_content == 1) {
			cn0_cn1_value = 3;
		} else {
			cn0_cn1_value = 0;
			itc_value = 0;
		}
	}
}
hdmi_info.bits.CN0_CN1 = cn0_cn1_value;
hdmi_info.bits.ITC = itc_value;
}

if (stream->qs_bit == 1) {
if (color_space == COLOR_SPACE_SRGB ||
	color_space == COLOR_SPACE_2020_RGB_FULLRANGE)
	hdmi_info.bits.Q0_Q1   = RGB_QUANTIZATION_FULL_RANGE;
else if (color_space == COLOR_SPACE_SRGB_LIMITED ||
			color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE)
	hdmi_info.bits.Q0_Q1   = RGB_QUANTIZATION_LIMITED_RANGE;
else
	hdmi_info.bits.Q0_Q1   = RGB_QUANTIZATION_DEFAULT_RANGE;
} else
hdmi_info.bits.Q0_Q1   = RGB_QUANTIZATION_DEFAULT_RANGE;

/* TODO : We should handle YCC quantization */
/* but we do not have matrix calculation */
hdmi_info.bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE;

///VIC
if (pipe_ctx->stream->timing.hdmi_vic != 0)
vic = 0;
format = stream->timing.timing_3d_format;
/*todo, add 3DStereo support*/
if (format != TIMING_3D_FORMAT_NONE) {
// Based on HDMI specs hdmi vic needs to be converted to cea vic when 3D is enabled
switch (pipe_ctx->stream->timing.hdmi_vic) {
case 1:
	vic = 95;
	break;
case 2:
	vic = 94;
	break;
case 3:
	vic = 93;
	break;
case 4:
	vic = 98;
	break;
default:
	break;
}
}
/* If VIC >= 128, the Source shall use AVI InfoFrame Version 3*/
hdmi_info.bits.VIC0_VIC7 = vic;
if (vic >= 128)
hdmi_info.bits.header.version = 3;
/* If (C1, C0)=(1, 1) and (EC2, EC1, EC0)=(1, 1, 1),
* the Source shall use 20 AVI InfoFrame Version 4
*/
if (hdmi_info.bits.C0_C1 == COLORIMETRY_EXTENDED &&
	hdmi_info.bits.EC0_EC2 == COLORIMETRYEX_RESERVED) {
hdmi_info.bits.header.version = 4;
hdmi_info.bits.header.length = 14;
}

if (rid != 0 && fr_ind != 0) {
hdmi_info.bits.header.version = 5;
hdmi_info.bits.header.length = 15;

hdmi_info.bits.FR0_FR3 = fr_ind & 0xF;
hdmi_info.bits.FR4 = (fr_ind >> 4) & 0x1;
hdmi_info.bits.RID0_RID5 = rid;
}

/* pixel repetition
* PR0 - PR3 start from 0 whereas pHwPathMode->mode.timing.flags.pixel
* repetition start from 1 */
hdmi_info.bits.PR0_PR3 = 0;

/* Bar Info
* barTop:    Line Number of End of Top Bar.
* barBottom: Line Number of Start of Bottom Bar.
* barLeft:   Pixel Number of End of Left Bar.
* barRight:  Pixel Number of Start of Right Bar. */
hdmi_info.bits.bar_top = stream->timing.v_border_top;
hdmi_info.bits.bar_bottom = (stream->timing.v_total
	- stream->timing.v_border_bottom + 1);
hdmi_info.bits.bar_left  = stream->timing.h_border_left;
hdmi_info.bits.bar_right = (stream->timing.h_total
	- stream->timing.h_border_right + 1);

  /* Additional Colorimetry Extension
   * Used in conduction with C0-C1 and EC0-EC2
   * 0 = DCI-P3 RGB (D65)
   * 1 = DCI-P3 RGB (theater)
   */
hdmi_info.bits.ACE0_ACE3 = 0;

/* check_sum - Calculate AFMT_AVI_INFO0 ~ AFMT_AVI_INFO3 */
check_sum = &hdmi_info.packet_raw_data.sb[0];

*check_sum = HDMI_INFOFRAME_TYPE_AVI + hdmi_info.bits.header.length + hdmi_info.bits.header.version;

for (byte_index = 1; byte_index <= hdmi_info.bits.header.length; byte_index++)
*check_sum += hdmi_info.packet_raw_data.sb[byte_index];

/* one byte complement */
*check_sum = (uint8_t) (0x100 - *check_sum);

/* Store in hw_path_mode */
info_packet->hb0 = hdmi_info.packet_raw_data.hb0;
info_packet->hb1 = hdmi_info.packet_raw_data.hb1;
info_packet->hb2 = hdmi_info.packet_raw_data.hb2;

for (byte_index = 0; byte_index < sizeof(hdmi_info.packet_raw_data.sb); byte_index++)
info_packet->sb[byte_index] = hdmi_info.packet_raw_data.sb[byte_index];

info_packet->valid = true1;
3211}

3213static void set_vendor_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
3216{
/* SPD info packet for FreeSync */

/* Check if Freesync is supported. Return if false. If true,
* set the corresponding bit in the info packet
*/
if (!stream->vsp_infopacket.valid)
return;

*info_packet = stream->vsp_infopacket;
3226}

3228static void set_spd_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
3231{
/* SPD info packet for FreeSync */

/* Check if Freesync is supported. Return if false. If true,
* set the corresponding bit in the info packet
*/
if (!stream->vrr_infopacket.valid)
return;

*info_packet = stream->vrr_infopacket;
3241}

3243static void set_hdr_static_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
3246{
/* HDR Static Metadata info packet for HDR10 */

if (!stream->hdr_static_metadata.valid ||
	stream->use_dynamic_meta)
return;

*info_packet = stream->hdr_static_metadata;
3254}

3256static void set_vsc_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
3259{
if (!stream->vsc_infopacket.valid)
return;

*info_packet = stream->vsc_infopacket;
3264}
3265static void set_hfvs_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
3268{
if (!stream->hfvsif_infopacket.valid)
return;

*info_packet = stream->hfvsif_infopacket;
3273}


3276static void set_vtem_info_packet(
struct dc_info_packet *info_packet,
struct dc_stream_state *stream)
3279{
if (!stream->vtem_infopacket.valid)
return;

*info_packet = stream->vtem_infopacket;
3284}

3286void dc_resource_state_destruct(struct dc_state *context)
3287{
int i, j;

for (i = 0; i < context->stream_count; i++) {
for (j = 0; j < context->stream_status[i].plane_count; j++)
	dc_plane_state_release(
		context->stream_status[i].plane_states[j]);

context->stream_status[i].plane_count = 0;
dc_stream_release(context->streams[i]);
context->streams[i] = NULL((void *)0);
}
context->stream_count = 0;
3300}

3302void dc_resource_state_copy_construct(
const struct dc_state *src_ctx,
struct dc_state *dst_ctx)
3305{
int i, j;
struct kref refcount = dst_ctx->refcount;

*dst_ctx = *src_ctx;

for (i = 0; i < MAX_PIPES6; i++) {
struct pipe_ctx *cur_pipe = &dst_ctx->res_ctx.pipe_ctx[i];

if (cur_pipe->top_pipe)
	cur_pipe->top_pipe =  &dst_ctx->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx];

if (cur_pipe->bottom_pipe)
	cur_pipe->bottom_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx];

if (cur_pipe->next_odm_pipe)
	cur_pipe->next_odm_pipe =  &dst_ctx->res_ctx.pipe_ctx[cur_pipe->next_odm_pipe->pipe_idx];

if (cur_pipe->prev_odm_pipe)
	cur_pipe->prev_odm_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->prev_odm_pipe->pipe_idx];
}

for (i = 0; i < dst_ctx->stream_count; i++) {
dc_stream_retain(dst_ctx->streams[i]);
for (j = 0; j < dst_ctx->stream_status[i].plane_count; j++)
	dc_plane_state_retain(
		dst_ctx->stream_status[i].plane_states[j]);
}

/* context refcount should not be overridden */
dst_ctx->refcount = refcount;

3337}

3339struct clock_source *dc_resource_find_first_free_pll(
struct resource_context *res_ctx,
const struct resource_pool *pool)
3342{
int i;

for (i = 0; i < pool->clk_src_count; ++i) {
if (res_ctx->clock_source_ref_count[i] == 0)
	return pool->clock_sources[i];
}

return NULL((void *)0);
3351}

3353void resource_build_info_frame(struct pipe_ctx *pipe_ctx)
3354{
enum amd_signal_type signal = SIGNAL_TYPE_NONE;
struct encoder_info_frame *info = &pipe_ctx->stream_res.encoder_info_frame;

/* default all packets to invalid */
info->avi.valid = false0;
info->gamut.valid = false0;
info->vendor.valid = false0;
info->spd.valid = false0;
info->hdrsmd.valid = false0;
info->vsc.valid = false0;
info->hfvsif.valid = false0;
info->vtem.valid = false0;
signal = pipe_ctx->stream->signal;

/* HDMi and DP have different info packets*/
if (dc_is_hdmi_signal(signal)) {
set_avi_info_frame(&info->avi, pipe_ctx);

set_vendor_info_packet(&info->vendor, pipe_ctx->stream);
set_hfvs_info_packet(&info->hfvsif, pipe_ctx->stream);
set_vtem_info_packet(&info->vtem, pipe_ctx->stream);

set_spd_info_packet(&info->spd, pipe_ctx->stream);

set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream);

} else if (dc_is_dp_signal(signal)) {
set_vsc_info_packet(&info->vsc, pipe_ctx->stream);

set_spd_info_packet(&info->spd, pipe_ctx->stream);

set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream);
}

patch_gamut_packet_checksum(&info->gamut);
3390}

3392enum dc_status resource_map_clock_resources(
const struct dc  *dc,
struct dc_state *context,
struct dc_stream_state *stream)
3396{
/* acquire new resources */
const struct resource_pool *pool = dc->res_pool;
struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(
		&context->res_ctx, stream);

if (!pipe_ctx)
return DC_ERROR_UNEXPECTED;

if (dc_is_dp_signal(pipe_ctx->stream->signal)
|| pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL)
pipe_ctx->clock_source = pool->dp_clock_source;
else {
pipe_ctx->clock_source = NULL((void *)0);

if (!dc->config.disable_disp_pll_sharing)
	pipe_ctx->clock_source = resource_find_used_clk_src_for_sharing(
		&context->res_ctx,
		pipe_ctx);

if (pipe_ctx->clock_source == NULL((void *)0))
	pipe_ctx->clock_source =
		dc_resource_find_first_free_pll(
			&context->res_ctx,
			pool);
}

if (pipe_ctx->clock_source == NULL((void *)0))
return DC_NO_CLOCK_SOURCE_RESOURCE;

resource_reference_clock_source(
&context->res_ctx, pool,
pipe_ctx->clock_source);

return DC_OK;
3431}

3433/*
* Note: We need to disable output if clock sources change,
* since bios does optimization and doesn't apply if changing
* PHY when not already disabled.
*/
3438bool_Bool pipe_need_reprogram(
struct pipe_ctx *pipe_ctx_old,
struct pipe_ctx *pipe_ctx)
3441{
if (!pipe_ctx_old->stream)
return false0;

if (pipe_ctx_old->stream->sink != pipe_ctx->stream->sink)
return true1;

if (pipe_ctx_old->stream->signal != pipe_ctx->stream->signal)
return true1;

if (pipe_ctx_old->stream_res.audio != pipe_ctx->stream_res.audio)
return true1;

if (pipe_ctx_old->clock_source != pipe_ctx->clock_source
	&& pipe_ctx_old->stream != pipe_ctx->stream)
return true1;

if (pipe_ctx_old->stream_res.stream_enc != pipe_ctx->stream_res.stream_enc)
return true1;

if (is_timing_changed(pipe_ctx_old->stream, pipe_ctx->stream))
return true1;

if (pipe_ctx_old->stream->dpms_off != pipe_ctx->stream->dpms_off)
return true1;

if (false0 == pipe_ctx_old->stream->link->link_state_valid &&
false0 == pipe_ctx_old->stream->dpms_off)
return true1;

if (pipe_ctx_old->stream_res.dsc != pipe_ctx->stream_res.dsc)
return true1;

if (pipe_ctx_old->stream_res.hpo_dp_stream_enc != pipe_ctx->stream_res.hpo_dp_stream_enc)
return true1;
if (pipe_ctx_old->link_res.hpo_dp_link_enc != pipe_ctx->link_res.hpo_dp_link_enc)
return true1;

/* DIG link encoder resource assignment for stream changed. */
if (pipe_ctx_old->stream->ctx->dc->res_pool->funcs->link_encs_assign) {
bool_Bool need_reprogram = false0;
struct dc *dc = pipe_ctx_old->stream->ctx->dc;
struct link_encoder *link_enc_prev =
	link_enc_cfg_get_link_enc_used_by_stream_current(dc, pipe_ctx_old->stream);

if (link_enc_prev != pipe_ctx->stream->link_enc)
	need_reprogram = true1;

return need_reprogram;
}

return false0;
3493}

3495void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
struct bit_depth_reduction_params *fmt_bit_depth)
3497{
enum dc_dither_option option = stream->dither_option;
enum dc_pixel_encoding pixel_encoding =
	stream->timing.pixel_encoding;

memset(fmt_bit_depth, 0, sizeof(*fmt_bit_depth))__builtin_memset((fmt_bit_depth), (0), (sizeof(*fmt_bit_depth
)));

if (option == DITHER_OPTION_DEFAULT) {
switch (stream->timing.display_color_depth) {
case COLOR_DEPTH_666:
	option = DITHER_OPTION_SPATIAL6;
	break;
case COLOR_DEPTH_888:
	option = DITHER_OPTION_SPATIAL8;
	break;
case COLOR_DEPTH_101010:
	option = DITHER_OPTION_SPATIAL10;
	break;
default:
	option = DITHER_OPTION_DISABLE;
}
}

if (option == DITHER_OPTION_DISABLE)
return;

if (option == DITHER_OPTION_TRUN6) {
fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
fmt_bit_depth->flags.TRUNCATE_DEPTH = 0;
} else if (option == DITHER_OPTION_TRUN8 ||
	option == DITHER_OPTION_TRUN8_SPATIAL6 ||
	option == DITHER_OPTION_TRUN8_FM6) {
fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
fmt_bit_depth->flags.TRUNCATE_DEPTH = 1;
} else if (option == DITHER_OPTION_TRUN10        ||
	option == DITHER_OPTION_TRUN10_SPATIAL6   ||
	option == DITHER_OPTION_TRUN10_SPATIAL8   ||
	option == DITHER_OPTION_TRUN10_FM8     ||
	option == DITHER_OPTION_TRUN10_FM6     ||
	option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
fmt_bit_depth->flags.TRUNCATE_DEPTH = 2;
}

/* special case - Formatter can only reduce by 4 bits at most.
* When reducing from 12 to 6 bits,
* HW recommends we use trunc with round mode
* (if we did nothing, trunc to 10 bits would be used)
* note that any 12->10 bit reduction is ignored prior to DCE8,
* as the input was 10 bits.
*/
if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM ||
	option == DITHER_OPTION_SPATIAL6 ||
	option == DITHER_OPTION_FM6) {
fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
fmt_bit_depth->flags.TRUNCATE_DEPTH = 2;
fmt_bit_depth->flags.TRUNCATE_MODE = 1;
}

/* spatial dither
* note that spatial modes 1-3 are never used
*/
if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM            ||
	option == DITHER_OPTION_SPATIAL6 ||
	option == DITHER_OPTION_TRUN10_SPATIAL6      ||
	option == DITHER_OPTION_TRUN8_SPATIAL6) {
fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 0;
fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
fmt_bit_depth->flags.RGB_RANDOM =
		(pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
} else if (option == DITHER_OPTION_SPATIAL8_FRAME_RANDOM            ||
	option == DITHER_OPTION_SPATIAL8 ||
	option == DITHER_OPTION_SPATIAL8_FM6        ||
	option == DITHER_OPTION_TRUN10_SPATIAL8      ||
	option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 1;
fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
fmt_bit_depth->flags.RGB_RANDOM =
		(pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
} else if (option == DITHER_OPTION_SPATIAL10_FRAME_RANDOM ||
	option == DITHER_OPTION_SPATIAL10 ||
	option == DITHER_OPTION_SPATIAL10_FM8 ||
	option == DITHER_OPTION_SPATIAL10_FM6) {
fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 2;
fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
fmt_bit_depth->flags.RGB_RANDOM =
		(pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
}

if (option == DITHER_OPTION_SPATIAL6 ||
	option == DITHER_OPTION_SPATIAL8 ||
	option == DITHER_OPTION_SPATIAL10) {
fmt_bit_depth->flags.FRAME_RANDOM = 0;
} else {
fmt_bit_depth->flags.FRAME_RANDOM = 1;
}

//////////////////////
//// temporal dither
//////////////////////
if (option == DITHER_OPTION_FM6           ||
	option == DITHER_OPTION_SPATIAL8_FM6     ||
	option == DITHER_OPTION_SPATIAL10_FM6     ||
	option == DITHER_OPTION_TRUN10_FM6     ||
	option == DITHER_OPTION_TRUN8_FM6      ||
	option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 0;
} else if (option == DITHER_OPTION_FM8        ||
	option == DITHER_OPTION_SPATIAL10_FM8  ||
	option == DITHER_OPTION_TRUN10_FM8) {
fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 1;
} else if (option == DITHER_OPTION_FM10) {
fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 2;
}

fmt_bit_depth->pixel_encoding = pixel_encoding;
3619}

3621enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream)
3622{
struct dc_link *link = stream->link;
struct timing_generator *tg = dc->res_pool->timing_generators[0];
enum dc_status res = DC_OK;

calculate_phy_pix_clks(stream);

if (!tg->funcs->validate_timing(tg, &stream->timing))
res = DC_FAIL_CONTROLLER_VALIDATE;

if (res == DC_OK) {
if (link->ep_type == DISPLAY_ENDPOINT_PHY &&
		!link->link_enc->funcs->validate_output_with_stream(
				link->link_enc, stream))
	res = DC_FAIL_ENC_VALIDATE;
}

/* TODO: validate audio ASIC caps, encoder */

if (res == DC_OK)
res = dc_link_validate_mode_timing(stream,
      link,
      &stream->timing);

return res;
3647}

3649enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state)
3650{
enum dc_status res = DC_OK;

/* check if surface has invalid dimensions */
if (plane_state->src_rect.width == 0 || plane_state->src_rect.height == 0 ||
plane_state->dst_rect.width == 0 || plane_state->dst_rect.height == 0)
return DC_FAIL_SURFACE_VALIDATE;

/* TODO For now validates pixel format only */
if (dc->res_pool->funcs->validate_plane)
return dc->res_pool->funcs->validate_plane(plane_state, &dc->caps);

return res;
3663}

3665unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format)
3666{
switch (format) {
case SURFACE_PIXEL_FORMAT_GRPH_PALETA_256_COLORS:
return 8;
case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr:
case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb:
return 12;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555:
case SURFACE_PIXEL_FORMAT_GRPH_RGB565:
case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr:
case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb:
return 16;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888:
case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010_XR_BIAS:
case SURFACE_PIXEL_FORMAT_GRPH_RGBE:
case SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA:
return 32;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616:
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F:
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F:
return 64;
default:
ASSERT_CRITICAL(false)do { if (({ int __ret = !!(!(0)); if (__ret) printf("WARNING %s failed at %s:%d\n"
, "!(0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 3692); __builtin_expect(!!(__ret), 0); })) do {} while (0);
 } while (0);
return -1;
}
3695}
3696static unsigned int get_max_audio_sample_rate(struct audio_mode *modes)
3697{
if (modes) {
if (modes->sample_rates.rate.RATE_192)
	return 192000;
if (modes->sample_rates.rate.RATE_176_4)
	return 176400;
if (modes->sample_rates.rate.RATE_96)
	return 96000;
if (modes->sample_rates.rate.RATE_88_2)
	return 88200;
if (modes->sample_rates.rate.RATE_48)
	return 48000;
if (modes->sample_rates.rate.RATE_44_1)
	return 44100;
if (modes->sample_rates.rate.RATE_32)
	return 32000;
}
/*original logic when no audio info*/
return 441000;
3716}

3718void get_audio_check(struct audio_info *aud_modes,
struct audio_check *audio_chk)
3720{
unsigned int i;
unsigned int max_sample_rate = 0;

if (aud_modes) {
audio_chk->audio_packet_type = 0x2;/*audio sample packet AP = .25 for layout0, 1 for layout1*/

audio_chk->max_audiosample_rate = 0;
for (i = 0; i < aud_modes->mode_count; i++) {
	max_sample_rate = get_max_audio_sample_rate(&aud_modes->modes[i]);
	if (audio_chk->max_audiosample_rate < max_sample_rate)
		audio_chk->max_audiosample_rate = max_sample_rate;
	/*dts takes the same as type 2: AP = 0.25*/
}
/*check which one take more bandwidth*/
if (audio_chk->max_audiosample_rate > 192000)
	audio_chk->audio_packet_type = 0x9;/*AP =1*/
audio_chk->acat = 0;/*not support*/
}
3739}

3741static struct hpo_dp_link_encoder *get_temp_hpo_dp_link_enc(
const struct resource_context *res_ctx,
const struct resource_pool *const pool,
const struct dc_link *link)
3745{
struct hpo_dp_link_encoder *hpo_dp_link_enc = NULL((void *)0);
int enc_index;

enc_index = find_acquired_hpo_dp_link_enc_for_link(res_ctx, link);

if (enc_index < 0)
enc_index = find_free_hpo_dp_link_enc(res_ctx, pool);

if (enc_index >= 0)
hpo_dp_link_enc = pool->hpo_dp_link_enc[enc_index];

return hpo_dp_link_enc;
3758}

3760bool_Bool get_temp_dp_link_res(struct dc_link *link,
struct link_resource *link_res,
struct dc_link_settings *link_settings)
3763{
const struct dc *dc  = link->dc;
const struct resource_context *res_ctx = &dc->current_state->res_ctx;

memset(link_res, 0, sizeof(*link_res))__builtin_memset((link_res), (0), (sizeof(*link_res)));

if (dp_get_link_encoding_format(link_settings) == DP_128b_132b_ENCODING) {
link_res->hpo_dp_link_enc = get_temp_hpo_dp_link_enc(res_ctx,
		dc->res_pool, link);
if (!link_res->hpo_dp_link_enc)
	return false0;
}
return true1;
3776}

3778void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
struct dc_state *context)
3780{
int i, j;
struct pipe_ctx *pipe_ctx_old, *pipe_ctx, *pipe_ctx_syncd;

/* If pipe backend is reset, need to reset pipe syncd status */
for (i = 0; i < dc->res_pool->pipe_count; i++) {
pipe_ctx_old =	&dc->current_state->res_ctx.pipe_ctx[i];
pipe_ctx = &context->res_ctx.pipe_ctx[i];

if (!pipe_ctx_old->stream)
	continue;

if (pipe_ctx_old->top_pipe || pipe_ctx_old->prev_odm_pipe)
	continue;

if (!pipe_ctx->stream ||
		pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {

	/* Reset all the syncd pipes from the disabled pipe */
	for (j = 0; j < dc->res_pool->pipe_count; j++) {
		pipe_ctx_syncd = &context->res_ctx.pipe_ctx[j];
		if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx_syncd)((pipe_ctx_syncd)->pipe_idx_syncd & 0x7F) == pipe_ctx_old->pipe_idx) ||
			!IS_PIPE_SYNCD_VALID(pipe_ctx_syncd)((((pipe_ctx_syncd)->pipe_idx_syncd) & 0x80)?1:0))
			SET_PIPE_SYNCD_TO_PIPE(pipe_ctx_syncd, j)((pipe_ctx_syncd)->pipe_idx_syncd = (0x80 | j));
	}
}
}
3807}

3809void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
struct dc_state *context,
uint8_t disabled_master_pipe_idx)
3812{
int i;
struct pipe_ctx *pipe_ctx, *pipe_ctx_check;

pipe_ctx = &context->res_ctx.pipe_ctx[disabled_master_pipe_idx];
if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx)((pipe_ctx)->pipe_idx_syncd & 0x7F) != disabled_master_pipe_idx) ||
!IS_PIPE_SYNCD_VALID(pipe_ctx)((((pipe_ctx)->pipe_idx_syncd) & 0x80)?1:0))
SET_PIPE_SYNCD_TO_PIPE(pipe_ctx, disabled_master_pipe_idx)((pipe_ctx)->pipe_idx_syncd = (0x80 | disabled_master_pipe_idx
));

/* for the pipe disabled, check if any slave pipe exists and assert */
for (i = 0; i < dc->res_pool->pipe_count; i++) {
pipe_ctx_check = &context->res_ctx.pipe_ctx[i];

if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx_check)((pipe_ctx_check)->pipe_idx_syncd & 0x7F) == disabled_master_pipe_idx) &&
	IS_PIPE_SYNCD_VALID(pipe_ctx_check)((((pipe_ctx_check)->pipe_idx_syncd) & 0x80)?1:0) && (i != disabled_master_pipe_idx))
	DC_ERR("DC: Failure: pipe_idx[%d] syncd with disabled master pipe_idx[%d]\n",do { __drm_err("DC: Failure: pipe_idx[%d] syncd with disabled master pipe_idx[%d]\n"
, i, disabled_master_pipe_idx); do { ___drm_dbg(((void *)0), DRM_UT_DRIVER
, "%s():%d\n", __func__, 3828); do {} while (0); } while (0);
 } while (0)
		i, disabled_master_pipe_idx)do { __drm_err("DC: Failure: pipe_idx[%d] syncd with disabled master pipe_idx[%d]\n"
, i, disabled_master_pipe_idx); do { ___drm_dbg(((void *)0), DRM_UT_DRIVER
, "%s():%d\n", __func__, 3828); do {} while (0); } while (0);
 } while (0);
}
3830}

3832void reset_sync_context_for_pipe(const struct dc *dc,
struct dc_state *context,
uint8_t pipe_idx)
3835{
int i;
struct pipe_ctx *pipe_ctx_reset;

/* reset the otg sync context for the pipe and its slave pipes if any */
for (i = 0; i < dc->res_pool->pipe_count; i++) {
pipe_ctx_reset = &context->res_ctx.pipe_ctx[i];

if (((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx_reset)((pipe_ctx_reset)->pipe_idx_syncd & 0x7F) == pipe_idx) &&
	IS_PIPE_SYNCD_VALID(pipe_ctx_reset)((((pipe_ctx_reset)->pipe_idx_syncd) & 0x80)?1:0)) || (i == pipe_idx))
	SET_PIPE_SYNCD_TO_PIPE(pipe_ctx_reset, i)((pipe_ctx_reset)->pipe_idx_syncd = (0x80 | i));
}
3847}

3849uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter)
3850{
/* TODO - get transmitter to phy idx mapping from DMUB */
uint8_t phy_idx = transmitter - TRANSMITTER_UNIPHY_A;

if (dc->ctx->dce_version == DCN_VERSION_3_1 &&
	dc->ctx->asic_id.hw_internal_rev == YELLOW_CARP_B00x20) {
switch (transmitter) {
case TRANSMITTER_UNIPHY_A:
	phy_idx = 0;
	break;
case TRANSMITTER_UNIPHY_B:
	phy_idx = 1;
	break;
case TRANSMITTER_UNIPHY_C:
	phy_idx = 5;
	break;
case TRANSMITTER_UNIPHY_D:
	phy_idx = 6;
	break;
case TRANSMITTER_UNIPHY_E:
	phy_idx = 4;
	break;
default:
	phy_idx = 0;
	break;
}
}

return phy_idx;
3879}

3881const struct link_hwss *get_link_hwss(const struct dc_link *link,
const struct link_resource *link_res)
3883{
/* Link_hwss is only accessible by getter function instead of accessing
* by pointers in dc with the intent to protect against breaking polymorphism.
*/
if (can_use_hpo_dp_link_hwss(link, link_res))
/* TODO: some assumes that if decided link settings is 128b/132b
 * channel coding format hpo_dp_link_enc should be used.
 * Others believe that if hpo_dp_link_enc is available in link
 * resource then hpo_dp_link_enc must be used. This bound between
 * hpo_dp_link_enc != NULL and decided link settings is loosely coupled
 * with a premise that both hpo_dp_link_enc pointer and decided link
 * settings are determined based on single policy function like
 * "decide_link_settings" from upper layer. This "convention"
 * cannot be maintained and enforced at current level.
 * Therefore a refactor is due so we can enforce a strong bound
 * between those two parameters at this level.
 *
 * To put it simple, we want to make enforcement at low level so that
 * we will not return link hwss if caller plans to do 8b/10b
 * with an hpo encoder. Or we can return a very dummy one that doesn't
 * do work for all functions
 */
return get_hpo_dp_link_hwss();
else if (can_use_dpia_link_hwss(link, link_res))
return get_dpia_link_hwss();
else if (can_use_dio_link_hwss(link, link_res))
return get_dio_link_hwss();
else
return get_virtual_link_hwss();
3912}

3914bool_Bool is_h_timing_divisible_by_2(struct dc_stream_state *stream)
3915{
bool_Bool divisible = false0;
uint16_t h_blank_start = 0;
uint16_t h_blank_end = 0;

if (stream) {
h_blank_start = stream->timing.h_total - stream->timing.h_front_porch;
h_blank_end = h_blank_start - stream->timing.h_addressable;

/* HTOTAL, Hblank start/end, and Hsync start/end all must be
 * divisible by 2 in order for the horizontal timing params
 * to be considered divisible by 2. Hsync start is always 0.
 */
divisible = (stream->timing.h_total % 2 == 0) &&
		(h_blank_start % 2 == 0) &&
		(h_blank_end % 2 == 0) &&
		(stream->timing.h_sync_width % 2 == 0);
}
return divisible;
3934}

3936bool_Bool dc_resource_acquire_secondary_pipe_for_mpc_odm(
const struct dc *dc,
struct dc_state *state,
struct pipe_ctx *pri_pipe,
struct pipe_ctx *sec_pipe,
bool_Bool odm)
3942{
int pipe_idx = sec_pipe->pipe_idx;
struct pipe_ctx *sec_top, *sec_bottom, *sec_next, *sec_prev;
const struct resource_pool *pool = dc->res_pool;

sec_top = sec_pipe->top_pipe;
sec_bottom = sec_pipe->bottom_pipe;
sec_next = sec_pipe->next_odm_pipe;
sec_prev = sec_pipe->prev_odm_pipe;

*sec_pipe = *pri_pipe;

sec_pipe->top_pipe = sec_top;
sec_pipe->bottom_pipe = sec_bottom;
sec_pipe->next_odm_pipe = sec_next;
sec_pipe->prev_odm_pipe = sec_prev;

sec_pipe->pipe_idx = pipe_idx;
sec_pipe->plane_res.mi = pool->mis[pipe_idx];
sec_pipe->plane_res.hubp = pool->hubps[pipe_idx];
sec_pipe->plane_res.ipp = pool->ipps[pipe_idx];
sec_pipe->plane_res.xfm = pool->transforms[pipe_idx];
sec_pipe->plane_res.dpp = pool->dpps[pipe_idx];
sec_pipe->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst;
sec_pipe->stream_res.dsc = NULL((void *)0);
if (odm) {
if (!sec_pipe->top_pipe)
	sec_pipe->stream_res.opp = pool->opps[pipe_idx];
else
	sec_pipe->stream_res.opp = sec_pipe->top_pipe->stream_res.opp;
if (sec_pipe->stream->timing.flags.DSC == 1) {
3973#if defined(CONFIG_DRM_AMD_DC_DCN1)
	dcn20_acquire_dsc(dc, &state->res_ctx, &sec_pipe->stream_res.dsc, pipe_idx);
3975#endif
	ASSERT(sec_pipe->stream_res.dsc)do { if (({ static int __warned; int __ret = !!(!(sec_pipe->
stream_res.dsc)); if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(sec_pipe->stream_res.dsc)", "/usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_resource.c"
, 3976); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
	if (sec_pipe->stream_res.dsc == NULL((void *)0))
		return false0;
}
3980#if defined(CONFIG_DRM_AMD_DC_DCN1)
dcn20_build_mapped_resource(dc, state, sec_pipe->stream);
3982#endif
}

return true1;
3986}

←

/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h

1/*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25 
26#ifndef __DAL_FIXED31_32_H__
27#define __DAL_FIXED31_32_H__
28 
29#ifndef LLONG_MAX0x7fffffffffffffffLL
30#define LLONG_MAX0x7fffffffffffffffLL 9223372036854775807ll
31#endif
32#ifndef LLONG_MIN(-0x7fffffffffffffffLL-1)
33#define LLONG_MIN(-0x7fffffffffffffffLL-1) (-LLONG_MAX0x7fffffffffffffffLL - 1ll)
34#endif
35 
36#define FIXED31_32_BITS_PER_FRACTIONAL_PART32 32
37#ifndef LLONG_MIN(-0x7fffffffffffffffLL-1)
38#define LLONG_MIN(-0x7fffffffffffffffLL-1) (1LL<<63)
39#endif
40#ifndef LLONG_MAX0x7fffffffffffffffLL
41#define LLONG_MAX0x7fffffffffffffffLL (-1LL>>1)
42#endif
43 
44/*
45 * @brief
46 * Arithmetic operations on real numbers
47 * represented as fixed-point numbers.
48 * There are: 1 bit for sign,
49 * 31 bit for integer part,
50 * 32 bits for fractional part.
51 *
52 * @note
53 * Currently, overflows and underflows are asserted;
54 * no special result returned.
55 */
56 
57struct fixed31_32 {
58	long long value;
59};
60 
61 
62/*
63 * @brief
64 * Useful constants
65 */
66 
67static const struct fixed31_32 dc_fixpt_zero = { 0 };
68static const struct fixed31_32 dc_fixpt_epsilon = { 1LL };
69static const struct fixed31_32 dc_fixpt_half = { 0x80000000LL };
70static const struct fixed31_32 dc_fixpt_one = { 0x100000000LL };
71 
72/*
73 * @brief
74 * Initialization routines
75 */
76 
77/*
78 * @brief
79 * result = numerator / denominator
80 */
81struct fixed31_32 dc_fixpt_from_fraction(long long numerator, long long denominator);
82 
83/*
84 * @brief
85 * result = arg
86 */
87static inline struct fixed31_32 dc_fixpt_from_int(int arg)
88{
89	struct fixed31_32 res;
90 
91	res.value = (long long) arg << FIXED31_32_BITS_PER_FRACTIONAL_PART32;
92 
93	return res;
94}
95 
96/*
97 * @brief
98 * Unary operators
99 */
100 
101/*
102 * @brief
103 * result = -arg
104 */
105static inline struct fixed31_32 dc_fixpt_neg(struct fixed31_32 arg)
106{
107	struct fixed31_32 res;
108 
109	res.value = -arg.value;
110 
111	return res;
112}
113 
114/*
115 * @brief
116 * result = abs(arg) := (arg >= 0) ? arg : -arg
117 */
118static inline struct fixed31_32 dc_fixpt_abs(struct fixed31_32 arg)
119{
120	if (arg.value < 0)
121		return dc_fixpt_neg(arg);
122	else
123		return arg;
124}
125 
126/*
127 * @brief
128 * Binary relational operators
129 */
130 
131/*
132 * @brief
133 * result = arg1 < arg2
134 */
135static inline bool_Bool dc_fixpt_lt(struct fixed31_32 arg1, struct fixed31_32 arg2)
136{
137	return arg1.value < arg2.value;
138}
139 
140/*
141 * @brief
142 * result = arg1 <= arg2
143 */
144static inline bool_Bool dc_fixpt_le(struct fixed31_32 arg1, struct fixed31_32 arg2)
145{
146	return arg1.value <= arg2.value;
147}
148 
149/*
150 * @brief
151 * result = arg1 == arg2
152 */
153static inline bool_Bool dc_fixpt_eq(struct fixed31_32 arg1, struct fixed31_32 arg2)
154{
155	return arg1.value == arg2.value;
156}
157 
158/*
159 * @brief
160 * result = min(arg1, arg2) := (arg1 <= arg2) ? arg1 : arg2
161 */
162static inline struct fixed31_32 dc_fixpt_min(struct fixed31_32 arg1, struct fixed31_32 arg2)
163{
164	if (arg1.value <= arg2.value)
165		return arg1;
166	else
167		return arg2;
168}
169 
170/*
171 * @brief
172 * result = max(arg1, arg2) := (arg1 <= arg2) ? arg2 : arg1
173 */
174static inline struct fixed31_32 dc_fixpt_max(struct fixed31_32 arg1, struct fixed31_32 arg2)
175{
176	if (arg1.value <= arg2.value)
177		return arg2;
178	else
179		return arg1;
180}
181 
182/*
183 * @brief
184 *          | min_value, when arg <= min_value
185 * result = | arg, when min_value < arg < max_value
186 *          | max_value, when arg >= max_value
187 */
188static inline struct fixed31_32 dc_fixpt_clamp(
189	struct fixed31_32 arg,
190	struct fixed31_32 min_value,
191	struct fixed31_32 max_value)
192{
193	if (dc_fixpt_le(arg, min_value))
194		return min_value;
195	else if (dc_fixpt_le(max_value, arg))
196		return max_value;
197	else
198		return arg;
199}
200 
201/*
202 * @brief
203 * Binary shift operators
204 */
205 
206/*
207 * @brief
208 * result = arg << shift
209 */
210static inline struct fixed31_32 dc_fixpt_shl(struct fixed31_32 arg, unsigned char shift)
211{
212	ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) ||do { if (({ static int __warned; int __ret = !!(!(((arg.value
 >= 0) && (arg.value <= 0x7fffffffffffffffLL >>
 shift)) || ((arg.value < 0) && (arg.value >= ~
(0x7fffffffffffffffLL >> shift))))); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(((arg.value >= 0) && (arg.value <= 0x7fffffffffffffffLL >> shift)) || ((arg.value < 0) && (arg.value >= ~(0x7fffffffffffffffLL >> shift))))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 213); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0)
213		((arg.value < 0) && (arg.value >= ~(LLONG_MAX >> shift))))do { if (({ static int __warned; int __ret = !!(!(((arg.value
 >= 0) && (arg.value <= 0x7fffffffffffffffLL >>
 shift)) || ((arg.value < 0) && (arg.value >= ~
(0x7fffffffffffffffLL >> shift))))); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(((arg.value >= 0) && (arg.value <= 0x7fffffffffffffffLL >> shift)) || ((arg.value < 0) && (arg.value >= ~(0x7fffffffffffffffLL >> shift))))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 213); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
214 
215	arg.value = arg.value << shift;
216 
217	return arg;
218}
219 
220/*
221 * @brief
222 * result = arg >> shift
223 */
224static inline struct fixed31_32 dc_fixpt_shr(struct fixed31_32 arg, unsigned char shift)
225{
226	bool_Bool negative = arg.value < 0;
227 
228	if (negative)
229		arg.value = -arg.value;
230	arg.value = arg.value >> shift;
231	if (negative)
232		arg.value = -arg.value;
233	return arg;
234}
235 
236/*
237 * @brief
238 * Binary additive operators
239 */
240 
241/*
242 * @brief
243 * result = arg1 + arg2
244 */
245static inline struct fixed31_32 dc_fixpt_add(struct fixed31_32 arg1, struct fixed31_32 arg2)
246{
247	struct fixed31_32 res;
248 
249	ASSERT(((arg1.value >= 0) && (LLONG_MAX - arg1.value >= arg2.value)) ||do { if (({ static int __warned; int __ret = !!(!(((arg1.value
 >= 0) && (0x7fffffffffffffffLL - arg1.value >=
 arg2.value)) || ((arg1.value < 0) && ((-0x7fffffffffffffffLL
-1) - arg1.value <= arg2.value)))); if (__ret && !
__warned) { printf("WARNING %s failed at %s:%d\n", "!(((arg1.value >= 0) && (0x7fffffffffffffffLL - arg1.value >= arg2.value)) || ((arg1.value < 0) && ((-0x7fffffffffffffffLL-1) - arg1.value <= arg2.value)))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 250); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0)
250		((arg1.value < 0) && (LLONG_MIN - arg1.value <= arg2.value)))do { if (({ static int __warned; int __ret = !!(!(((arg1.value
 >= 0) && (0x7fffffffffffffffLL - arg1.value >=
 arg2.value)) || ((arg1.value < 0) && ((-0x7fffffffffffffffLL
-1) - arg1.value <= arg2.value)))); if (__ret && !
__warned) { printf("WARNING %s failed at %s:%d\n", "!(((arg1.value >= 0) && (0x7fffffffffffffffLL - arg1.value >= arg2.value)) || ((arg1.value < 0) && ((-0x7fffffffffffffffLL-1) - arg1.value <= arg2.value)))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 250); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
251 
252	res.value = arg1.value + arg2.value;
253 
254	return res;
255}
256 
257/*
258 * @brief
259 * result = arg1 + arg2
260 */
261static inline struct fixed31_32 dc_fixpt_add_int(struct fixed31_32 arg1, int arg2)
262{
263	return dc_fixpt_add(arg1, dc_fixpt_from_int(arg2));
264}
265 
266/*
267 * @brief
268 * result = arg1 - arg2
269 */
270static inline struct fixed31_32 dc_fixpt_sub(struct fixed31_32 arg1, struct fixed31_32 arg2)
271{
272	struct fixed31_32 res;
273 
274	ASSERT(((arg2.value >= 0) && (LLONG_MIN + arg2.value <= arg1.value)) ||do { if (({ static int __warned; int __ret = !!(!(((arg2.value
 >= 0) && ((-0x7fffffffffffffffLL-1) + arg2.value <=
 arg1.value)) || ((arg2.value < 0) && (0x7fffffffffffffffLL
 + arg2.value >= arg1.value)))); if (__ret && !__warned
) { printf("WARNING %s failed at %s:%d\n", "!(((arg2.value >= 0) && ((-0x7fffffffffffffffLL-1) + arg2.value <= arg1.value)) || ((arg2.value < 0) && (0x7fffffffffffffffLL + arg2.value >= arg1.value)))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 275); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0)
275		((arg2.value < 0) && (LLONG_MAX + arg2.value >= arg1.value)))do { if (({ static int __warned; int __ret = !!(!(((arg2.value
 >= 0) && ((-0x7fffffffffffffffLL-1) + arg2.value <=
 arg1.value)) || ((arg2.value < 0) && (0x7fffffffffffffffLL
 + arg2.value >= arg1.value)))); if (__ret && !__warned
) { printf("WARNING %s failed at %s:%d\n", "!(((arg2.value >= 0) && ((-0x7fffffffffffffffLL-1) + arg2.value <= arg1.value)) || ((arg2.value < 0) && (0x7fffffffffffffffLL + arg2.value >= arg1.value)))"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 275); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
276 
277	res.value = arg1.value - arg2.value;
278 
279	return res;
280}
281 
282/*
283 * @brief
284 * result = arg1 - arg2
285 */
286static inline struct fixed31_32 dc_fixpt_sub_int(struct fixed31_32 arg1, int arg2)
287{
288	return dc_fixpt_sub(arg1, dc_fixpt_from_int(arg2));
289}
290 
291 
292/*
293 * @brief
294 * Binary multiplicative operators
295 */
296 
297/*
298 * @brief
299 * result = arg1 * arg2
300 */
301struct fixed31_32 dc_fixpt_mul(struct fixed31_32 arg1, struct fixed31_32 arg2);
302 
303 
304/*
305 * @brief
306 * result = arg1 * arg2
307 */
308static inline struct fixed31_32 dc_fixpt_mul_int(struct fixed31_32 arg1, int arg2)
309{
310	return dc_fixpt_mul(arg1, dc_fixpt_from_int(arg2));
311}
312 
313/*
314 * @brief
315 * result = square(arg) := arg * arg
316 */
317struct fixed31_32 dc_fixpt_sqr(struct fixed31_32 arg);
318 
319/*
320 * @brief
321 * result = arg1 / arg2
322 */
323static inline struct fixed31_32 dc_fixpt_div_int(struct fixed31_32 arg1, long long arg2)
324{
325	return dc_fixpt_from_fraction(arg1.value, dc_fixpt_from_int((int)arg2).value);
326}
327 
328/*
329 * @brief
330 * result = arg1 / arg2
331 */
332static inline struct fixed31_32 dc_fixpt_div(struct fixed31_32 arg1, struct fixed31_32 arg2)
333{
334	return dc_fixpt_from_fraction(arg1.value, arg2.value);
335}
336 
337/*
338 * @brief
339 * Reciprocal function
340 */
341 
342/*
343 * @brief
344 * result = reciprocal(arg) := 1 / arg
345 *
346 * @note
347 * No special actions taken in case argument is zero.
348 */
349struct fixed31_32 dc_fixpt_recip(struct fixed31_32 arg);
350 
351/*
352 * @brief
353 * Trigonometric functions
354 */
355 
356/*
357 * @brief
358 * result = sinc(arg) := sin(arg) / arg
359 *
360 * @note
361 * Argument specified in radians,
362 * internally it's normalized to [-2pi...2pi] range.
363 */
364struct fixed31_32 dc_fixpt_sinc(struct fixed31_32 arg);
365 
366/*
367 * @brief
368 * result = sin(arg)
369 *
370 * @note
371 * Argument specified in radians,
372 * internally it's normalized to [-2pi...2pi] range.
373 */
374struct fixed31_32 dc_fixpt_sin(struct fixed31_32 arg);
375 
376/*
377 * @brief
378 * result = cos(arg)
379 *
380 * @note
381 * Argument specified in radians
382 * and should be in [-2pi...2pi] range -
383 * passing arguments outside that range
384 * will cause incorrect result!
385 */
386struct fixed31_32 dc_fixpt_cos(struct fixed31_32 arg);
387 
388/*
389 * @brief
390 * Transcendent functions
391 */
392 
393/*
394 * @brief
395 * result = exp(arg)
396 *
397 * @note
398 * Currently, function is verified for abs(arg) <= 1.
399 */
400struct fixed31_32 dc_fixpt_exp(struct fixed31_32 arg);
401 
402/*
403 * @brief
404 * result = log(arg)
405 *
406 * @note
407 * Currently, abs(arg) should be less than 1.
408 * No normalization is done.
409 * Currently, no special actions taken
410 * in case of invalid argument(s). Take care!
411 */
412struct fixed31_32 dc_fixpt_log(struct fixed31_32 arg);
413 
414/*
415 * @brief
416 * Power function
417 */
418 
419/*
420 * @brief
421 * result = pow(arg1, arg2)
422 *
423 * @note
424 * Currently, abs(arg1) should be less than 1. Take care!
425 */
426static inline struct fixed31_32 dc_fixpt_pow(struct fixed31_32 arg1, struct fixed31_32 arg2)
427{
428	if (arg1.value == 0)
429		return arg2.value == 0 ? dc_fixpt_one : dc_fixpt_zero;
430 
431	return dc_fixpt_exp(
432		dc_fixpt_mul(
433			dc_fixpt_log(arg1),
434			arg2));
435}
436 
437/*
438 * @brief
439 * Rounding functions
440 */
441 
442/*
443 * @brief
444 * result = floor(arg) := greatest integer lower than or equal to arg
445 */
446static inline int dc_fixpt_floor(struct fixed31_32 arg)
447{
448	unsigned long long arg_value = arg.value > 0 ? arg.value : -arg.value;
449 
450	if (arg.value >= 0)
451		return (int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
452	else
453		return -(int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
454}
455 
456/*
457 * @brief
458 * result = round(arg) := integer nearest to arg
459 */
460static inline int dc_fixpt_round(struct fixed31_32 arg)
461{
462	unsigned long long arg_value = arg.value > 0 ? arg.value : -arg.value;
463 
464	const long long summand = dc_fixpt_half.value;
465 
466	ASSERT(LLONG_MAX - (long long)arg_value >= summand)do { if (({ static int __warned; int __ret = !!(!(0x7fffffffffffffffLL
 - (long long)arg_value >= summand)); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(0x7fffffffffffffffLL - (long long)arg_value >= summand)"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 466); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
467 
468	arg_value += summand;
469 
470	if (arg.value >= 0)
471		return (int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
472	else
473		return -(int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
474}
475 
476/*
477 * @brief
478 * result = ceil(arg) := lowest integer greater than or equal to arg
479 */
480static inline int dc_fixpt_ceil(struct fixed31_32 arg)
481{
482	unsigned long long arg_value = arg.value > 0 ? arg.value : -arg.value;
483 
484	const long long summand = dc_fixpt_one.value -
485		dc_fixpt_epsilon.value;
486 
487	ASSERT(LLONG_MAX - (long long)arg_value >= summand)do { if (({ static int __warned; int __ret = !!(!(0x7fffffffffffffffLL
 - (long long)arg_value >= summand)); if (__ret &&
 !__warned) { printf("WARNING %s failed at %s:%d\n", "!(0x7fffffffffffffffLL - (long long)arg_value >= summand)"
, "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 487); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
488 
489	arg_value += summand;
490 
491	if (arg.value >= 0)
492		return (int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
493	else
494		return -(int)(arg_value >> FIXED31_32_BITS_PER_FRACTIONAL_PART32);
495}
496 
497/* the following two function are used in scaler hw programming to convert fixed
498 * point value to format 2 bits from integer part and 19 bits from fractional
499 * part. The same applies for u0d19, 0 bits from integer part and 19 bits from
500 * fractional
501 */
502 
503unsigned int dc_fixpt_u4d19(struct fixed31_32 arg);
504 
505unsigned int dc_fixpt_u3d19(struct fixed31_32 arg);
506 
507unsigned int dc_fixpt_u2d19(struct fixed31_32 arg);
508 
509unsigned int dc_fixpt_u0d19(struct fixed31_32 arg);
510 
511unsigned int dc_fixpt_clamp_u0d14(struct fixed31_32 arg);
512 
513unsigned int dc_fixpt_clamp_u0d10(struct fixed31_32 arg);
514 
515int dc_fixpt_s4d19(struct fixed31_32 arg);
516 
517static inline struct fixed31_32 dc_fixpt_truncate(struct fixed31_32 arg, unsigned int frac_bits)
518{
519	bool_Bool negative = arg.value < 0;
2
←
Assuming field 'value' is >= 0→
520 
521	if (frac_bits2.1
'frac_bits' is < FIXED31_32_BITS_PER_FRACTIONAL_PART
2.1
'frac_bits' is < FIXED31_32_BITS_PER_FRACTIONAL_PART
 >= FIXED31_32_BITS_PER_FRACTIONAL_PART32) {
3
←
Taking false branch→
522		ASSERT(frac_bits == FIXED31_32_BITS_PER_FRACTIONAL_PART)do { if (({ static int __warned; int __ret = !!(!(frac_bits ==
 32)); if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(frac_bits == 32)", "/usr/src/sys/dev/pci/drm/amd/display/include/fixed31_32.h"
, 522); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
 {} while (0); } while (0);
523		return arg;
524	}
525 
526	if (negative3.1
'negative' is false
3.1
'negative' is false
)
4
←
Taking false branch→
527		arg.value = -arg.value;
528	arg.value &= (~0LL) << (FIXED31_32_BITS_PER_FRACTIONAL_PART32 - frac_bits);
5
←
The result of the left shift is undefined because the left operand is negative
529	if (negative)
530		arg.value = -arg.value;
531	return arg;
532}
533 
534#endif