File: | dev/pci/drm/amd/display/dc/dml/display_mode_lib.c |
Warning: | line 176, column 3 Value stored to 'pipe_dest' is never read |
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1 | /* |
2 | * Copyright 2017 Advanced Micro Devices, Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | * Authors: AMD |
23 | * |
24 | */ |
25 | |
26 | #include "display_mode_lib.h" |
27 | #include "dc_features.h" |
28 | #include "dcn20/display_mode_vba_20.h" |
29 | #include "dcn20/display_rq_dlg_calc_20.h" |
30 | #include "dcn20/display_mode_vba_20v2.h" |
31 | #include "dcn20/display_rq_dlg_calc_20v2.h" |
32 | #include "dcn21/display_mode_vba_21.h" |
33 | #include "dcn21/display_rq_dlg_calc_21.h" |
34 | #include "dcn30/display_mode_vba_30.h" |
35 | #include "dcn30/display_rq_dlg_calc_30.h" |
36 | #include "dcn31/display_mode_vba_31.h" |
37 | #include "dcn31/display_rq_dlg_calc_31.h" |
38 | #include "dcn314/display_mode_vba_314.h" |
39 | #include "dcn314/display_rq_dlg_calc_314.h" |
40 | #include "dcn32/display_mode_vba_32.h" |
41 | #include "dcn32/display_rq_dlg_calc_32.h" |
42 | #include "dml_logger.h" |
43 | |
44 | const struct dml_funcs dml20_funcs = { |
45 | .validate = dml20_ModeSupportAndSystemConfigurationFull, |
46 | .recalculate = dml20_recalculate, |
47 | .rq_dlg_get_dlg_reg = dml20_rq_dlg_get_dlg_reg, |
48 | .rq_dlg_get_rq_reg = dml20_rq_dlg_get_rq_reg |
49 | }; |
50 | |
51 | const struct dml_funcs dml20v2_funcs = { |
52 | .validate = dml20v2_ModeSupportAndSystemConfigurationFull, |
53 | .recalculate = dml20v2_recalculate, |
54 | .rq_dlg_get_dlg_reg = dml20v2_rq_dlg_get_dlg_reg, |
55 | .rq_dlg_get_rq_reg = dml20v2_rq_dlg_get_rq_reg |
56 | }; |
57 | |
58 | const struct dml_funcs dml21_funcs = { |
59 | .validate = dml21_ModeSupportAndSystemConfigurationFull, |
60 | .recalculate = dml21_recalculate, |
61 | .rq_dlg_get_dlg_reg = dml21_rq_dlg_get_dlg_reg, |
62 | .rq_dlg_get_rq_reg = dml21_rq_dlg_get_rq_reg |
63 | }; |
64 | |
65 | const struct dml_funcs dml30_funcs = { |
66 | .validate = dml30_ModeSupportAndSystemConfigurationFull, |
67 | .recalculate = dml30_recalculate, |
68 | .rq_dlg_get_dlg_reg = dml30_rq_dlg_get_dlg_reg, |
69 | .rq_dlg_get_rq_reg = dml30_rq_dlg_get_rq_reg |
70 | }; |
71 | |
72 | const struct dml_funcs dml31_funcs = { |
73 | .validate = dml31_ModeSupportAndSystemConfigurationFull, |
74 | .recalculate = dml31_recalculate, |
75 | .rq_dlg_get_dlg_reg = dml31_rq_dlg_get_dlg_reg, |
76 | .rq_dlg_get_rq_reg = dml31_rq_dlg_get_rq_reg |
77 | }; |
78 | |
79 | const struct dml_funcs dml314_funcs = { |
80 | .validate = dml314_ModeSupportAndSystemConfigurationFull, |
81 | .recalculate = dml314_recalculate, |
82 | .rq_dlg_get_dlg_reg = dml314_rq_dlg_get_dlg_reg, |
83 | .rq_dlg_get_rq_reg = dml314_rq_dlg_get_rq_reg |
84 | }; |
85 | |
86 | const struct dml_funcs dml32_funcs = { |
87 | .validate = dml32_ModeSupportAndSystemConfigurationFull, |
88 | .recalculate = dml32_recalculate, |
89 | .rq_dlg_get_dlg_reg_v2 = dml32_rq_dlg_get_dlg_reg, |
90 | .rq_dlg_get_rq_reg_v2 = dml32_rq_dlg_get_rq_reg |
91 | }; |
92 | |
93 | void dml_init_instance(struct display_mode_lib *lib, |
94 | const struct _vcs_dpi_soc_bounding_box_st *soc_bb, |
95 | const struct _vcs_dpi_ip_params_st *ip_params, |
96 | enum dml_project project) |
97 | { |
98 | lib->soc = *soc_bb; |
99 | lib->ip = *ip_params; |
100 | lib->project = project; |
101 | switch (project) { |
102 | case DML_PROJECT_NAVI10: |
103 | case DML_PROJECT_DCN201: |
104 | lib->funcs = dml20_funcs; |
105 | break; |
106 | case DML_PROJECT_NAVI10v2: |
107 | lib->funcs = dml20v2_funcs; |
108 | break; |
109 | case DML_PROJECT_DCN21: |
110 | lib->funcs = dml21_funcs; |
111 | break; |
112 | case DML_PROJECT_DCN30: |
113 | lib->funcs = dml30_funcs; |
114 | break; |
115 | case DML_PROJECT_DCN31: |
116 | case DML_PROJECT_DCN31_FPGA: |
117 | case DML_PROJECT_DCN315: |
118 | lib->funcs = dml31_funcs; |
119 | break; |
120 | case DML_PROJECT_DCN314: |
121 | lib->funcs = dml314_funcs; |
122 | break; |
123 | case DML_PROJECT_DCN32: |
124 | lib->funcs = dml32_funcs; |
125 | break; |
126 | |
127 | default: |
128 | break; |
129 | } |
130 | } |
131 | |
132 | const char *dml_get_status_message(enum dm_validation_status status) |
133 | { |
134 | switch (status) { |
135 | case DML_VALIDATION_OK: return "Validation OK"; |
136 | case DML_FAIL_SCALE_RATIO_TAP: return "Scale ratio/tap"; |
137 | case DML_FAIL_SOURCE_PIXEL_FORMAT: return "Source pixel format"; |
138 | case DML_FAIL_VIEWPORT_SIZE: return "Viewport size"; |
139 | case DML_FAIL_TOTAL_V_ACTIVE_BW: return "Total vertical active bandwidth"; |
140 | case DML_FAIL_DIO_SUPPORT: return "DIO support"; |
141 | case DML_FAIL_NOT_ENOUGH_DSC: return "Not enough DSC Units"; |
142 | case DML_FAIL_DSC_CLK_REQUIRED: return "DSC clock required"; |
143 | case DML_FAIL_URGENT_LATENCY: return "Urgent latency"; |
144 | case DML_FAIL_REORDERING_BUFFER: return "Re-ordering buffer"; |
145 | case DML_FAIL_DISPCLK_DPPCLK: return "Dispclk and Dppclk"; |
146 | case DML_FAIL_TOTAL_AVAILABLE_PIPES: return "Total available pipes"; |
147 | case DML_FAIL_NUM_OTG: return "Number of OTG"; |
148 | case DML_FAIL_WRITEBACK_MODE: return "Writeback mode"; |
149 | case DML_FAIL_WRITEBACK_LATENCY: return "Writeback latency"; |
150 | case DML_FAIL_WRITEBACK_SCALE_RATIO_TAP: return "Writeback scale ratio/tap"; |
151 | case DML_FAIL_CURSOR_SUPPORT: return "Cursor support"; |
152 | case DML_FAIL_PITCH_SUPPORT: return "Pitch support"; |
153 | case DML_FAIL_PTE_BUFFER_SIZE: return "PTE buffer size"; |
154 | case DML_FAIL_DSC_INPUT_BPC: return "DSC input bpc"; |
155 | case DML_FAIL_PREFETCH_SUPPORT: return "Prefetch support"; |
156 | case DML_FAIL_V_RATIO_PREFETCH: return "Vertical ratio prefetch"; |
157 | default: return "Unknown Status"; |
158 | } |
159 | } |
160 | |
161 | void dml_log_pipe_params( |
162 | struct display_mode_lib *mode_lib, |
163 | display_e2e_pipe_params_st *pipes, |
164 | int pipe_cnt) |
165 | { |
166 | display_pipe_source_params_st *pipe_src; |
167 | display_pipe_dest_params_st *pipe_dest; |
168 | scaler_ratio_depth_st *scale_ratio_depth; |
169 | scaler_taps_st *scale_taps; |
170 | display_output_params_st *dout; |
171 | display_clocks_and_cfg_st *clks_cfg; |
172 | int i; |
173 | |
174 | for (i = 0; i < pipe_cnt; i++) { |
175 | pipe_src = &(pipes[i].pipe.src); |
176 | pipe_dest = &(pipes[i].pipe.dest); |
Value stored to 'pipe_dest' is never read | |
177 | scale_ratio_depth = &(pipes[i].pipe.scale_ratio_depth); |
178 | scale_taps = &(pipes[i].pipe.scale_taps); |
179 | dout = &(pipes[i].dout); |
180 | clks_cfg = &(pipes[i].clks_cfg); |
181 | |
182 | dml_print("DML PARAMS: =====================================\n"){do { } while(0); }; |
183 | dml_print("DML PARAMS: PIPE [%d] SOURCE PARAMS:\n", i){do { } while(0); }; |
184 | dml_print("DML PARAMS: source_format = %d\n", pipe_src->source_format){do { } while(0); }; |
185 | dml_print("DML PARAMS: dcc = %d\n", pipe_src->dcc){do { } while(0); }; |
186 | dml_print("DML PARAMS: dcc_rate = %d\n", pipe_src->dcc_rate){do { } while(0); }; |
187 | dml_print("DML PARAMS: dcc_use_global = %d\n", pipe_src->dcc_use_global){do { } while(0); }; |
188 | dml_print("DML PARAMS: vm = %d\n", pipe_src->vm){do { } while(0); }; |
189 | dml_print("DML PARAMS: gpuvm = %d\n", pipe_src->gpuvm){do { } while(0); }; |
190 | dml_print("DML PARAMS: hostvm = %d\n", pipe_src->hostvm){do { } while(0); }; |
191 | dml_print("DML PARAMS: gpuvm_levels_force_en = %d\n", pipe_src->gpuvm_levels_force_en){do { } while(0); }; |
192 | dml_print("DML PARAMS: gpuvm_levels_force = %d\n", pipe_src->gpuvm_levels_force){do { } while(0); }; |
193 | dml_print("DML PARAMS: source_scan = %d\n", pipe_src->source_scan){do { } while(0); }; |
194 | dml_print("DML PARAMS: sw_mode = %d\n", pipe_src->sw_mode){do { } while(0); }; |
195 | dml_print("DML PARAMS: macro_tile_size = %d\n", pipe_src->macro_tile_size){do { } while(0); }; |
196 | dml_print("DML PARAMS: viewport_width = %d\n", pipe_src->viewport_width){do { } while(0); }; |
197 | dml_print("DML PARAMS: viewport_height = %d\n", pipe_src->viewport_height){do { } while(0); }; |
198 | dml_print("DML PARAMS: viewport_y_y = %d\n", pipe_src->viewport_y_y){do { } while(0); }; |
199 | dml_print("DML PARAMS: viewport_y_c = %d\n", pipe_src->viewport_y_c){do { } while(0); }; |
200 | dml_print("DML PARAMS: viewport_width_c = %d\n", pipe_src->viewport_width_c){do { } while(0); }; |
201 | dml_print("DML PARAMS: viewport_height_c = %d\n", pipe_src->viewport_height_c){do { } while(0); }; |
202 | dml_print("DML PARAMS: data_pitch = %d\n", pipe_src->data_pitch){do { } while(0); }; |
203 | dml_print("DML PARAMS: data_pitch_c = %d\n", pipe_src->data_pitch_c){do { } while(0); }; |
204 | dml_print("DML PARAMS: meta_pitch = %d\n", pipe_src->meta_pitch){do { } while(0); }; |
205 | dml_print("DML PARAMS: meta_pitch_c = %d\n", pipe_src->meta_pitch_c){do { } while(0); }; |
206 | dml_print("DML PARAMS: cur0_src_width = %d\n", pipe_src->cur0_src_width){do { } while(0); }; |
207 | dml_print("DML PARAMS: cur0_bpp = %d\n", pipe_src->cur0_bpp){do { } while(0); }; |
208 | dml_print("DML PARAMS: cur1_src_width = %d\n", pipe_src->cur1_src_width){do { } while(0); }; |
209 | dml_print("DML PARAMS: cur1_bpp = %d\n", pipe_src->cur1_bpp){do { } while(0); }; |
210 | dml_print("DML PARAMS: num_cursors = %d\n", pipe_src->num_cursors){do { } while(0); }; |
211 | dml_print("DML PARAMS: is_hsplit = %d\n", pipe_src->is_hsplit){do { } while(0); }; |
212 | dml_print("DML PARAMS: hsplit_grp = %d\n", pipe_src->hsplit_grp){do { } while(0); }; |
213 | dml_print("DML PARAMS: dynamic_metadata_enable = %d\n", pipe_src->dynamic_metadata_enable){do { } while(0); }; |
214 | dml_print("DML PARAMS: dmdata_lines_before_active = %d\n", pipe_src->dynamic_metadata_lines_before_active){do { } while(0); }; |
215 | dml_print("DML PARAMS: dmdata_xmit_bytes = %d\n", pipe_src->dynamic_metadata_xmit_bytes){do { } while(0); }; |
216 | dml_print("DML PARAMS: immediate_flip = %d\n", pipe_src->immediate_flip){do { } while(0); }; |
217 | dml_print("DML PARAMS: v_total_min = %d\n", pipe_src->v_total_min){do { } while(0); }; |
218 | dml_print("DML PARAMS: v_total_max = %d\n", pipe_src->v_total_max){do { } while(0); }; |
219 | dml_print("DML PARAMS: =====================================\n"){do { } while(0); }; |
220 | |
221 | dml_print("DML PARAMS: PIPE [%d] DESTINATION PARAMS:\n", i){do { } while(0); }; |
222 | dml_print("DML PARAMS: recout_width = %d\n", pipe_dest->recout_width){do { } while(0); }; |
223 | dml_print("DML PARAMS: recout_height = %d\n", pipe_dest->recout_height){do { } while(0); }; |
224 | dml_print("DML PARAMS: full_recout_width = %d\n", pipe_dest->full_recout_width){do { } while(0); }; |
225 | dml_print("DML PARAMS: full_recout_height = %d\n", pipe_dest->full_recout_height){do { } while(0); }; |
226 | dml_print("DML PARAMS: hblank_start = %d\n", pipe_dest->hblank_start){do { } while(0); }; |
227 | dml_print("DML PARAMS: hblank_end = %d\n", pipe_dest->hblank_end){do { } while(0); }; |
228 | dml_print("DML PARAMS: vblank_start = %d\n", pipe_dest->vblank_start){do { } while(0); }; |
229 | dml_print("DML PARAMS: vblank_end = %d\n", pipe_dest->vblank_end){do { } while(0); }; |
230 | dml_print("DML PARAMS: htotal = %d\n", pipe_dest->htotal){do { } while(0); }; |
231 | dml_print("DML PARAMS: vtotal = %d\n", pipe_dest->vtotal){do { } while(0); }; |
232 | dml_print("DML PARAMS: vactive = %d\n", pipe_dest->vactive){do { } while(0); }; |
233 | dml_print("DML PARAMS: hactive = %d\n", pipe_dest->hactive){do { } while(0); }; |
234 | dml_print("DML PARAMS: vstartup_start = %d\n", pipe_dest->vstartup_start){do { } while(0); }; |
235 | dml_print("DML PARAMS: vupdate_offset = %d\n", pipe_dest->vupdate_offset){do { } while(0); }; |
236 | dml_print("DML PARAMS: vupdate_width = %d\n", pipe_dest->vupdate_width){do { } while(0); }; |
237 | dml_print("DML PARAMS: vready_offset = %d\n", pipe_dest->vready_offset){do { } while(0); }; |
238 | dml_print("DML PARAMS: interlaced = %d\n", pipe_dest->interlaced){do { } while(0); }; |
239 | dml_print("DML PARAMS: pixel_rate_mhz = %3.2f\n", pipe_dest->pixel_rate_mhz){do { } while(0); }; |
240 | dml_print("DML PARAMS: sync_vblank_all_planes = %d\n", pipe_dest->synchronized_vblank_all_planes){do { } while(0); }; |
241 | dml_print("DML PARAMS: otg_inst = %d\n", pipe_dest->otg_inst){do { } while(0); }; |
242 | dml_print("DML PARAMS: odm_combine = %d\n", pipe_dest->odm_combine){do { } while(0); }; |
243 | dml_print("DML PARAMS: use_maximum_vstartup = %d\n", pipe_dest->use_maximum_vstartup){do { } while(0); }; |
244 | dml_print("DML PARAMS: vtotal_max = %d\n", pipe_dest->vtotal_max){do { } while(0); }; |
245 | dml_print("DML PARAMS: vtotal_min = %d\n", pipe_dest->vtotal_min){do { } while(0); }; |
246 | dml_print("DML PARAMS: =====================================\n"){do { } while(0); }; |
247 | |
248 | dml_print("DML PARAMS: PIPE [%d] SCALER PARAMS:\n", i){do { } while(0); }; |
249 | dml_print("DML PARAMS: hscl_ratio = %3.4f\n", scale_ratio_depth->hscl_ratio){do { } while(0); }; |
250 | dml_print("DML PARAMS: vscl_ratio = %3.4f\n", scale_ratio_depth->vscl_ratio){do { } while(0); }; |
251 | dml_print("DML PARAMS: hscl_ratio_c = %3.4f\n", scale_ratio_depth->hscl_ratio_c){do { } while(0); }; |
252 | dml_print("DML PARAMS: vscl_ratio_c = %3.4f\n", scale_ratio_depth->vscl_ratio_c){do { } while(0); }; |
253 | dml_print("DML PARAMS: vinit = %3.4f\n", scale_ratio_depth->vinit){do { } while(0); }; |
254 | dml_print("DML PARAMS: vinit_c = %3.4f\n", scale_ratio_depth->vinit_c){do { } while(0); }; |
255 | dml_print("DML PARAMS: vinit_bot = %3.4f\n", scale_ratio_depth->vinit_bot){do { } while(0); }; |
256 | dml_print("DML PARAMS: vinit_bot_c = %3.4f\n", scale_ratio_depth->vinit_bot_c){do { } while(0); }; |
257 | dml_print("DML PARAMS: lb_depth = %d\n", scale_ratio_depth->lb_depth){do { } while(0); }; |
258 | dml_print("DML PARAMS: scl_enable = %d\n", scale_ratio_depth->scl_enable){do { } while(0); }; |
259 | dml_print("DML PARAMS: htaps = %d\n", scale_taps->htaps){do { } while(0); }; |
260 | dml_print("DML PARAMS: vtaps = %d\n", scale_taps->vtaps){do { } while(0); }; |
261 | dml_print("DML PARAMS: htaps_c = %d\n", scale_taps->htaps_c){do { } while(0); }; |
262 | dml_print("DML PARAMS: vtaps_c = %d\n", scale_taps->vtaps_c){do { } while(0); }; |
263 | dml_print("DML PARAMS: =====================================\n"){do { } while(0); }; |
264 | |
265 | dml_print("DML PARAMS: PIPE [%d] DISPLAY OUTPUT PARAMS:\n", i){do { } while(0); }; |
266 | dml_print("DML PARAMS: output_type = %d\n", dout->output_type){do { } while(0); }; |
267 | dml_print("DML PARAMS: output_format = %d\n", dout->output_format){do { } while(0); }; |
268 | dml_print("DML PARAMS: dsc_input_bpc = %d\n", dout->dsc_input_bpc){do { } while(0); }; |
269 | dml_print("DML PARAMS: output_bpp = %3.4f\n", dout->output_bpp){do { } while(0); }; |
270 | dml_print("DML PARAMS: dp_lanes = %d\n", dout->dp_lanes){do { } while(0); }; |
271 | dml_print("DML PARAMS: dsc_enable = %d\n", dout->dsc_enable){do { } while(0); }; |
272 | dml_print("DML PARAMS: dsc_slices = %d\n", dout->dsc_slices){do { } while(0); }; |
273 | dml_print("DML PARAMS: wb_enable = %d\n", dout->wb_enable){do { } while(0); }; |
274 | dml_print("DML PARAMS: num_active_wb = %d\n", dout->num_active_wb){do { } while(0); }; |
275 | dml_print("DML PARAMS: =====================================\n"){do { } while(0); }; |
276 | |
277 | dml_print("DML PARAMS: PIPE [%d] CLOCK CONFIG PARAMS:\n", i){do { } while(0); }; |
278 | dml_print("DML PARAMS: voltage = %d\n", clks_cfg->voltage){do { } while(0); }; |
279 | dml_print("DML PARAMS: dppclk_mhz = %3.2f\n", clks_cfg->dppclk_mhz){do { } while(0); }; |
280 | dml_print("DML PARAMS: refclk_mhz = %3.2f\n", clks_cfg->refclk_mhz){do { } while(0); }; |
281 | dml_print("DML PARAMS: dispclk_mhz = %3.2f\n", clks_cfg->dispclk_mhz){do { } while(0); }; |
282 | dml_print("DML PARAMS: dcfclk_mhz = %3.2f\n", clks_cfg->dcfclk_mhz){do { } while(0); }; |
283 | dml_print("DML PARAMS: socclk_mhz = %3.2f\n", clks_cfg->socclk_mhz){do { } while(0); }; |
284 | dml_print("DML PARAMS: =====================================\n"){do { } while(0); }; |
285 | } |
286 | } |
287 | |
288 | void dml_log_mode_support_params(struct display_mode_lib *mode_lib) |
289 | { |
290 | int i; |
291 | |
292 | for (i = mode_lib->vba.soc.num_states; i >= 0; i--) { |
293 | dml_print("DML SUPPORT: ===============================================\n"){do { } while(0); }; |
294 | dml_print("DML SUPPORT: Voltage State %d\n", i){do { } while(0); }; |
295 | dml_print("DML SUPPORT: Mode Supported : %s\n", mode_lib->vba.ModeSupport[i][0] ? "Supported" : "NOT Supported"){do { } while(0); }; |
296 | dml_print("DML SUPPORT: Mode Supported (pipe split) : %s\n", mode_lib->vba.ModeSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
297 | dml_print("DML SUPPORT: Scale Ratio And Taps : %s\n", mode_lib->vba.ScaleRatioAndTapsSupport ? "Supported" : "NOT Supported"){do { } while(0); }; |
298 | dml_print("DML SUPPORT: Source Format Pixel And Scan : %s\n", mode_lib->vba.SourceFormatPixelAndScanSupport ? "Supported" : "NOT Supported"){do { } while(0); }; |
299 | dml_print("DML SUPPORT: Viewport Size : [%s, %s]\n", mode_lib->vba.ViewportSizeSupport[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.ViewportSizeSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
300 | dml_print("DML SUPPORT: DIO Support : %s\n", mode_lib->vba.DIOSupport[i] ? "Supported" : "NOT Supported"){do { } while(0); }; |
301 | dml_print("DML SUPPORT: ODM Combine 4To1 Support Check : %s\n", mode_lib->vba.ODMCombine4To1SupportCheckOK[i] ? "Supported" : "NOT Supported"){do { } while(0); }; |
302 | dml_print("DML SUPPORT: DSC Units : %s\n", mode_lib->vba.NotEnoughDSCUnits[i] ? "Not Supported" : "Supported"){do { } while(0); }; |
303 | dml_print("DML SUPPORT: DSCCLK Required : %s\n", mode_lib->vba.DSCCLKRequiredMoreThanSupported[i] ? "Not Supported" : "Supported"){do { } while(0); }; |
304 | dml_print("DML SUPPORT: DTBCLK Required : %s\n", mode_lib->vba.DTBCLKRequiredMoreThanSupported[i] ? "Not Supported" : "Supported"){do { } while(0); }; |
305 | dml_print("DML SUPPORT: Re-ordering Buffer : [%s, %s]\n", mode_lib->vba.ROBSupport[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.ROBSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
306 | dml_print("DML SUPPORT: DISPCLK and DPPCLK : [%s, %s]\n", mode_lib->vba.DISPCLK_DPPCLK_Support[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.DISPCLK_DPPCLK_Support[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
307 | dml_print("DML SUPPORT: Total Available Pipes : [%s, %s]\n", mode_lib->vba.TotalAvailablePipesSupport[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.TotalAvailablePipesSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
308 | dml_print("DML SUPPORT: Writeback Latency : %s\n", mode_lib->vba.WritebackLatencySupport ? "Supported" : "NOT Supported"){do { } while(0); }; |
309 | dml_print("DML SUPPORT: Writeback Scale Ratio And Taps : %s\n", mode_lib->vba.WritebackScaleRatioAndTapsSupport ? "Supported" : "NOT Supported"){do { } while(0); }; |
310 | dml_print("DML SUPPORT: Cursor : %s\n", mode_lib->vba.CursorSupport ? "Supported" : "NOT Supported"){do { } while(0); }; |
311 | dml_print("DML SUPPORT: Pitch : %s\n", mode_lib->vba.PitchSupport ? "Supported" : "NOT Supported"){do { } while(0); }; |
312 | dml_print("DML SUPPORT: Prefetch : [%s, %s]\n", mode_lib->vba.PrefetchSupported[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.PrefetchSupported[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
313 | dml_print("DML SUPPORT: Dynamic Metadata : [%s, %s]\n", mode_lib->vba.DynamicMetadataSupported[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.DynamicMetadataSupported[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
314 | dml_print("DML SUPPORT: Total Vertical Active Bandwidth : [%s, %s]\n", mode_lib->vba.TotalVerticalActiveBandwidthSupport[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.TotalVerticalActiveBandwidthSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
315 | dml_print("DML SUPPORT: VRatio In Prefetch : [%s, %s]\n", mode_lib->vba.VRatioInPrefetchSupported[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.VRatioInPrefetchSupported[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
316 | dml_print("DML SUPPORT: PTE Buffer Size Not Exceeded : [%s, %s]\n", mode_lib->vba.PTEBufferSizeNotExceeded[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.PTEBufferSizeNotExceeded[i][1] ? "Supported" : "NOT Supported"){do { } while(0); }; |
317 | dml_print("DML SUPPORT: DSC Input BPC : %s\n", mode_lib->vba.NonsupportedDSCInputBPC ? "Not Supported" : "Supported"){do { } while(0); }; |
318 | dml_print("DML SUPPORT: HostVMEnable : %d\n", mode_lib->vba.HostVMEnable){do { } while(0); }; |
319 | dml_print("DML SUPPORT: ImmediateFlipSupportedForState : [%d, %d]\n", mode_lib->vba.ImmediateFlipSupportedForState[i][0], mode_lib->vba.ImmediateFlipSupportedForState[i][1]){do { } while(0); }; |
320 | } |
321 | } |