| File: | dev/mii/icsphy.c |
| Warning: | line 224, column 2 Value stored to 'qpr' is never read |
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| 1 | /* $OpenBSD: icsphy.c,v 1.25 2022/04/06 18:59:29 naddy Exp $ */ |
| 2 | /* $NetBSD: icsphy.c,v 1.17 2000/02/02 23:34:56 thorpej Exp $ */ |
| 3 | |
| 4 | /*- |
| 5 | * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. |
| 6 | * All rights reserved. |
| 7 | * |
| 8 | * This code is derived from software contributed to The NetBSD Foundation |
| 9 | * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, |
| 10 | * NASA Ames Research Center. |
| 11 | * |
| 12 | * Redistribution and use in source and binary forms, with or without |
| 13 | * modification, are permitted provided that the following conditions |
| 14 | * are met: |
| 15 | * 1. Redistributions of source code must retain the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer. |
| 17 | * 2. Redistributions in binary form must reproduce the above copyright |
| 18 | * notice, this list of conditions and the following disclaimer in the |
| 19 | * documentation and/or other materials provided with the distribution. |
| 20 | * |
| 21 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
| 22 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
| 23 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 24 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
| 25 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 26 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 27 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 28 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 29 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 30 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 31 | * POSSIBILITY OF SUCH DAMAGE. |
| 32 | */ |
| 33 | |
| 34 | /* |
| 35 | * Copyright (c) 1997 Manuel Bouyer. All rights reserved. |
| 36 | * |
| 37 | * Redistribution and use in source and binary forms, with or without |
| 38 | * modification, are permitted provided that the following conditions |
| 39 | * are met: |
| 40 | * 1. Redistributions of source code must retain the above copyright |
| 41 | * notice, this list of conditions and the following disclaimer. |
| 42 | * 2. Redistributions in binary form must reproduce the above copyright |
| 43 | * notice, this list of conditions and the following disclaimer in the |
| 44 | * documentation and/or other materials provided with the distribution. |
| 45 | * |
| 46 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 47 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 48 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 49 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 50 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 51 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 52 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 53 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 54 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 55 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 56 | */ |
| 57 | |
| 58 | /* |
| 59 | * driver for Integrated Circuit Systems' ICS1890 ethernet 10/100 PHY |
| 60 | * and its successor ICS1892 |
| 61 | * datasheet from www.icst.com |
| 62 | */ |
| 63 | |
| 64 | #include <sys/param.h> |
| 65 | #include <sys/systm.h> |
| 66 | #include <sys/device.h> |
| 67 | #include <sys/socket.h> |
| 68 | |
| 69 | #include <net/if.h> |
| 70 | #include <net/if_var.h> |
| 71 | #include <net/if_media.h> |
| 72 | |
| 73 | #include <dev/mii/mii.h> |
| 74 | #include <dev/mii/miivar.h> |
| 75 | #include <dev/mii/miidevs.h> |
| 76 | |
| 77 | #include <dev/mii/icsphyreg.h> |
| 78 | |
| 79 | int icsphymatch(struct device *, void *, void *); |
| 80 | void icsphyattach(struct device *, struct device *, void *); |
| 81 | |
| 82 | const struct cfattach icsphy_ca = { |
| 83 | sizeof(struct mii_softc), icsphymatch, icsphyattach, mii_phy_detach |
| 84 | }; |
| 85 | |
| 86 | struct cfdriver icsphy_cd = { |
| 87 | NULL((void *)0), "icsphy", DV_DULL |
| 88 | }; |
| 89 | |
| 90 | int icsphy_service(struct mii_softc *, struct mii_data *, int); |
| 91 | void icsphy_reset(struct mii_softc *); |
| 92 | void icsphy_status(struct mii_softc *); |
| 93 | |
| 94 | const struct mii_phy_funcs icsphy_funcs = { |
| 95 | icsphy_service, icsphy_status, icsphy_reset, |
| 96 | }; |
| 97 | |
| 98 | static const struct mii_phydesc icsphys[] = { |
| 99 | { MII_OUI_xxICS0x00057d, MII_MODEL_xxICS_18900x0002, |
| 100 | MII_STR_xxICS_1890"ICS1890 10/100 PHY" }, |
| 101 | { MII_OUI_xxICS0x00057d, MII_MODEL_xxICS_18920x0003, |
| 102 | MII_STR_xxICS_1892"ICS1892 10/100 PHY" }, |
| 103 | { MII_OUI_xxICS0x00057d, MII_MODEL_xxICS_18930x0004, |
| 104 | MII_STR_xxICS_1893"ICS1893 10/100 PHY" }, |
| 105 | |
| 106 | { 0, 0, |
| 107 | NULL((void *)0) }, |
| 108 | |
| 109 | }; |
| 110 | |
| 111 | int |
| 112 | icsphymatch(struct device *parent, void *match, void *aux) |
| 113 | { |
| 114 | struct mii_attach_args *ma = aux; |
| 115 | |
| 116 | if (mii_phy_match(ma, icsphys) != NULL((void *)0)) |
| 117 | return (10); |
| 118 | |
| 119 | return (0); |
| 120 | } |
| 121 | |
| 122 | void |
| 123 | icsphyattach(struct device *parent, struct device *self, void *aux) |
| 124 | { |
| 125 | struct mii_softc *sc = (struct mii_softc *)self; |
| 126 | struct mii_attach_args *ma = aux; |
| 127 | struct mii_data *mii = ma->mii_data; |
| 128 | const struct mii_phydesc *mpd; |
| 129 | |
| 130 | mpd = mii_phy_match(ma, icsphys); |
| 131 | printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)((ma->mii_id2) & 0x000f)); |
| 132 | |
| 133 | sc->mii_inst = mii->mii_instance; |
| 134 | sc->mii_phy = ma->mii_phyno; |
| 135 | sc->mii_funcs = &icsphy_funcs; |
| 136 | sc->mii_pdata = mii; |
| 137 | sc->mii_flags = ma->mii_flags; |
| 138 | |
| 139 | PHY_RESET(sc)(*(sc)->mii_funcs->pf_reset)((sc)); |
| 140 | |
| 141 | sc->mii_capabilities = |
| 142 | PHY_READ(sc, MII_BMSR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent , (sc)->mii_phy, (0x01)) & ma->mii_capmask; |
| 143 | if (sc->mii_capabilities & BMSR_MEDIAMASK(0x8000|0x4000|0x2000| 0x1000|0x0800|0x0400|0x0200)) |
| 144 | mii_phy_add_media(sc); |
| 145 | } |
| 146 | |
| 147 | int |
| 148 | icsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) |
| 149 | { |
| 150 | struct ifmedia_entry *ife = mii->mii_media.ifm_cur; |
| 151 | int reg; |
| 152 | |
| 153 | if ((sc->mii_dev.dv_flags & DVF_ACTIVE0x0001) == 0) |
| 154 | return (ENXIO6); |
| 155 | |
| 156 | switch (cmd) { |
| 157 | case MII_POLLSTAT3: |
| 158 | /* |
| 159 | * If we're not polling our PHY instance, just return. |
| 160 | */ |
| 161 | if (IFM_INST(ife->ifm_media)(((ife->ifm_media) & 0xff00000000000000ULL) >> 56 ) != sc->mii_inst) |
| 162 | return (0); |
| 163 | break; |
| 164 | |
| 165 | case MII_MEDIACHG2: |
| 166 | /* |
| 167 | * If the media indicates a different PHY instance, |
| 168 | * isolate ourselves. |
| 169 | */ |
| 170 | if (IFM_INST(ife->ifm_media)(((ife->ifm_media) & 0xff00000000000000ULL) >> 56 ) != sc->mii_inst) { |
| 171 | reg = PHY_READ(sc, MII_BMCR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent , (sc)->mii_phy, (0x00)); |
| 172 | PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent , (sc)->mii_phy, (0x00), (reg | 0x0400)); |
| 173 | return (0); |
| 174 | } |
| 175 | |
| 176 | /* |
| 177 | * If the interface is not up, don't do anything. |
| 178 | */ |
| 179 | if ((mii->mii_ifp->if_flags & IFF_UP0x1) == 0) |
| 180 | break; |
| 181 | |
| 182 | mii_phy_setmedia(sc); |
| 183 | break; |
| 184 | |
| 185 | case MII_TICK1: |
| 186 | /* |
| 187 | * If we're not currently selected, just return. |
| 188 | */ |
| 189 | if (IFM_INST(ife->ifm_media)(((ife->ifm_media) & 0xff00000000000000ULL) >> 56 ) != sc->mii_inst) |
| 190 | return (0); |
| 191 | |
| 192 | if (mii_phy_tick(sc) == EJUSTRETURN-2) |
| 193 | return (0); |
| 194 | break; |
| 195 | |
| 196 | case MII_DOWN4: |
| 197 | mii_phy_down(sc); |
| 198 | return (0); |
| 199 | } |
| 200 | |
| 201 | /* Update the media status. */ |
| 202 | mii_phy_status(sc); |
| 203 | |
| 204 | /* Callback if something changed. */ |
| 205 | mii_phy_update(sc, cmd); |
| 206 | return (0); |
| 207 | } |
| 208 | |
| 209 | void |
| 210 | icsphy_status(struct mii_softc *sc) |
| 211 | { |
| 212 | struct mii_data *mii = sc->mii_pdata; |
| 213 | struct ifmedia_entry *ife = mii->mii_media.ifm_cur; |
| 214 | int bmcr, qpr; |
| 215 | |
| 216 | mii->mii_media_status = IFM_AVALID0x0000000000000001ULL; |
| 217 | mii->mii_media_active = IFM_ETHER0x0000000000000100ULL; |
| 218 | |
| 219 | /* |
| 220 | * Don't get link from the BMSR. It's available in the QPR, |
| 221 | * and we have to read it twice to unlatch it anyhow. This |
| 222 | * gives us fewer register reads. |
| 223 | */ |
| 224 | qpr = PHY_READ(sc, MII_ICSPHY_QPR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent , (sc)->mii_phy, (0x11)); /* unlatch */ |
Value stored to 'qpr' is never read | |
| 225 | qpr = PHY_READ(sc, MII_ICSPHY_QPR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent , (sc)->mii_phy, (0x11)); /* real value */ |
| 226 | |
| 227 | if (qpr & QPR_LINK0x0001) |
| 228 | mii->mii_media_status |= IFM_ACTIVE0x0000000000000002ULL; |
| 229 | |
| 230 | bmcr = PHY_READ(sc, MII_BMCR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent , (sc)->mii_phy, (0x00)); |
| 231 | if (bmcr & BMCR_ISO0x0400) { |
| 232 | mii->mii_media_active |= IFM_NONE2ULL; |
| 233 | mii->mii_media_status = 0; |
| 234 | return; |
| 235 | } |
| 236 | |
| 237 | if (bmcr & BMCR_LOOP0x4000) |
| 238 | mii->mii_media_active |= IFM_LOOP0x0000800000000000ULL; |
| 239 | |
| 240 | if (bmcr & BMCR_AUTOEN0x1000) { |
| 241 | if ((qpr & QPR_ACOMP0x0010) == 0) { |
| 242 | /* Erg, still trying, I guess... */ |
| 243 | mii->mii_media_active |= IFM_NONE2ULL; |
| 244 | return; |
| 245 | } |
| 246 | |
| 247 | if (qpr & QPR_SPEED0x8000) |
| 248 | mii->mii_media_active |= IFM_100_TX6; |
| 249 | else |
| 250 | mii->mii_media_active |= IFM_10_T3; |
| 251 | |
| 252 | if (qpr & QPR_FDX0x4000) |
| 253 | mii->mii_media_active |= IFM_FDX0x0000010000000000ULL; |
| 254 | else |
| 255 | mii->mii_media_active |= IFM_HDX0x0000020000000000ULL; |
| 256 | } else |
| 257 | mii->mii_media_active = ife->ifm_media; |
| 258 | } |
| 259 | |
| 260 | void |
| 261 | icsphy_reset(struct mii_softc *sc) |
| 262 | { |
| 263 | |
| 264 | mii_phy_reset(sc); |
| 265 | PHY_WRITE(sc, MII_ICSPHY_ECR2, ECR2_10TPROT|ECR2_Q10T)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent , (sc)->mii_phy, (0x13), (0x0002|0x0004)); |
| 266 | |
| 267 | /* |
| 268 | * XXX the ICS1892 doesn't set the BMCR properly after |
| 269 | * XXX reset, which breaks autonegotiation. |
| 270 | */ |
| 271 | PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent , (sc)->mii_phy, (0x00), (0x2000|0x1000|0x0100)); |
| 272 | |
| 273 | } |