Bug Summary

File:dev/pci/drm/amd/display/dc/dcn31/dcn31_apg.c
Warning:line 125, column 2
Value stored to 'channels' is never read

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name dcn31_apg.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_apg.c
1/*
2 * Copyright 2019 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26
27#include "dc_bios_types.h"
28#include "hw_shared.h"
29#include "dcn31_apg.h"
30#include "reg_helper.h"
31
32#define DC_LOGGERapg31->base.ctx->logger \
33 apg31->base.ctx->logger
34
35#define REG(reg)(apg31->regs->reg)\
36 (apg31->regs->reg)
37
38#undef FN
39#define FN(reg_name, field_name)apg31->apg_shift->field_name, apg31->apg_mask->field_name \
40 apg31->apg_shift->field_name, apg31->apg_mask->field_name
41
42
43#define CTXapg31->base.ctx \
44 apg31->base.ctx
45
46
47static void apg31_enable(
48 struct apg *apg)
49{
50 struct dcn31_apg *apg31 = DCN31_APG_FROM_APG(apg)({ const __typeof( ((struct dcn31_apg *)0)->base ) *__mptr
= (apg); (struct dcn31_apg *)( (char *)__mptr - __builtin_offsetof
(struct dcn31_apg, base) );});
51
52 /* Reset APG */
53 REG_UPDATE(APG_CONTROL, APG_RESET, 1)generic_reg_update_ex(apg31->base.ctx, (apg31->regs->
APG_CONTROL), 1, apg31->apg_shift->APG_RESET, apg31->
apg_mask->APG_RESET, 1);
54 REG_WAIT(APG_CONTROL,generic_reg_wait(apg31->base.ctx, (apg31->regs->APG_CONTROL
), apg31->apg_shift->APG_RESET_DONE, apg31->apg_mask
->APG_RESET_DONE, 1, 1, 10, __func__, 56)
55 APG_RESET_DONE, 1,generic_reg_wait(apg31->base.ctx, (apg31->regs->APG_CONTROL
), apg31->apg_shift->APG_RESET_DONE, apg31->apg_mask
->APG_RESET_DONE, 1, 1, 10, __func__, 56)
56 1, 10)generic_reg_wait(apg31->base.ctx, (apg31->regs->APG_CONTROL
), apg31->apg_shift->APG_RESET_DONE, apg31->apg_mask
->APG_RESET_DONE, 1, 1, 10, __func__, 56);
57 REG_UPDATE(APG_CONTROL, APG_RESET, 0)generic_reg_update_ex(apg31->base.ctx, (apg31->regs->
APG_CONTROL), 1, apg31->apg_shift->APG_RESET, apg31->
apg_mask->APG_RESET, 0);
58 REG_WAIT(APG_CONTROL,generic_reg_wait(apg31->base.ctx, (apg31->regs->APG_CONTROL
), apg31->apg_shift->APG_RESET_DONE, apg31->apg_mask
->APG_RESET_DONE, 0, 1, 10, __func__, 60)
59 APG_RESET_DONE, 0,generic_reg_wait(apg31->base.ctx, (apg31->regs->APG_CONTROL
), apg31->apg_shift->APG_RESET_DONE, apg31->apg_mask
->APG_RESET_DONE, 0, 1, 10, __func__, 60)
60 1, 10)generic_reg_wait(apg31->base.ctx, (apg31->regs->APG_CONTROL
), apg31->apg_shift->APG_RESET_DONE, apg31->apg_mask
->APG_RESET_DONE, 0, 1, 10, __func__, 60);
61
62 /* Enable APG */
63 REG_UPDATE(APG_CONTROL2, APG_ENABLE, 1)generic_reg_update_ex(apg31->base.ctx, (apg31->regs->
APG_CONTROL2), 1, apg31->apg_shift->APG_ENABLE, apg31->
apg_mask->APG_ENABLE, 1);
64}
65
66static void apg31_disable(
67 struct apg *apg)
68{
69 struct dcn31_apg *apg31 = DCN31_APG_FROM_APG(apg)({ const __typeof( ((struct dcn31_apg *)0)->base ) *__mptr
= (apg); (struct dcn31_apg *)( (char *)__mptr - __builtin_offsetof
(struct dcn31_apg, base) );});
70
71 /* Disable APG */
72 REG_UPDATE(APG_CONTROL2, APG_ENABLE, 0)generic_reg_update_ex(apg31->base.ctx, (apg31->regs->
APG_CONTROL2), 1, apg31->apg_shift->APG_ENABLE, apg31->
apg_mask->APG_ENABLE, 0);
73}
74
75static union audio_cea_channels speakers_to_channels(
76 struct audio_speaker_flags speaker_flags)
77{
78 union audio_cea_channels cea_channels = {0};
79
80 /* these are one to one */
81 cea_channels.channels.FL = speaker_flags.FL_FR;
82 cea_channels.channels.FR = speaker_flags.FL_FR;
83 cea_channels.channels.LFE = speaker_flags.LFE;
84 cea_channels.channels.FC = speaker_flags.FC;
85
86 /* if Rear Left and Right exist move RC speaker to channel 7
87 * otherwise to channel 5
88 */
89 if (speaker_flags.RL_RR) {
90 cea_channels.channels.RL_RC = speaker_flags.RL_RR;
91 cea_channels.channels.RR = speaker_flags.RL_RR;
92 cea_channels.channels.RC_RLC_FLC = speaker_flags.RC;
93 } else {
94 cea_channels.channels.RL_RC = speaker_flags.RC;
95 }
96
97 /* FRONT Left Right Center and REAR Left Right Center are exclusive */
98 if (speaker_flags.FLC_FRC) {
99 cea_channels.channels.RC_RLC_FLC = speaker_flags.FLC_FRC;
100 cea_channels.channels.RRC_FRC = speaker_flags.FLC_FRC;
101 } else {
102 cea_channels.channels.RC_RLC_FLC = speaker_flags.RLC_RRC;
103 cea_channels.channels.RRC_FRC = speaker_flags.RLC_RRC;
104 }
105
106 return cea_channels;
107}
108
109static void apg31_se_audio_setup(
110 struct apg *apg,
111 unsigned int az_inst,
112 struct audio_info *audio_info)
113{
114 struct dcn31_apg *apg31 = DCN31_APG_FROM_APG(apg)({ const __typeof( ((struct dcn31_apg *)0)->base ) *__mptr
= (apg); (struct dcn31_apg *)( (char *)__mptr - __builtin_offsetof
(struct dcn31_apg, base) );});
115
116 uint32_t speakers = 0;
117 uint32_t channels = 0;
118
119 ASSERT(audio_info)do { if (({ static int __warned; int __ret = !!(!(audio_info)
); if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n"
, "!(audio_info)", "/usr/src/sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_apg.c"
, 119); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
{} while (0); } while (0);
120 /* This should not happen.it does so we don't get BSOD*/
121 if (audio_info == NULL((void *)0))
122 return;
123
124 speakers = audio_info->flags.info.ALLSPEAKERS;
125 channels = speakers_to_channels(audio_info->flags.speaker_flags).all;
Value stored to 'channels' is never read
126
127 /* DisplayPort only allows for one audio stream with stream ID 0 */
128 REG_UPDATE(APG_CONTROL2, APG_DP_AUDIO_STREAM_ID, 0)generic_reg_update_ex(apg31->base.ctx, (apg31->regs->
APG_CONTROL2), 1, apg31->apg_shift->APG_DP_AUDIO_STREAM_ID
, apg31->apg_mask->APG_DP_AUDIO_STREAM_ID, 0);
129
130 /* When running in "pair mode", pairs of audio channels have their own enable
131 * this is for really old audio drivers */
132 REG_UPDATE(APG_DBG_GEN_CONTROL, APG_DBG_AUDIO_CHANNEL_ENABLE, 0xFF)generic_reg_update_ex(apg31->base.ctx, (apg31->regs->
APG_DBG_GEN_CONTROL), 1, apg31->apg_shift->APG_DBG_AUDIO_CHANNEL_ENABLE
, apg31->apg_mask->APG_DBG_AUDIO_CHANNEL_ENABLE, 0xFF);
133 // REG_UPDATE(APG_DBG_GEN_CONTROL, APG_DBG_AUDIO_CHANNEL_ENABLE, channels);
134
135 /* Disable forced mem power off */
136 REG_UPDATE(APG_MEM_PWR, APG_MEM_PWR_FORCE, 0)generic_reg_update_ex(apg31->base.ctx, (apg31->regs->
APG_MEM_PWR), 1, apg31->apg_shift->APG_MEM_PWR_FORCE, apg31
->apg_mask->APG_MEM_PWR_FORCE, 0);
137
138 apg31_enable(apg);
139}
140
141static void apg31_audio_mute_control(
142 struct apg *apg,
143 bool_Bool mute)
144{
145 if (mute)
146 apg31_disable(apg);
147 else
148 apg31_enable(apg);
149}
150
151static struct apg_funcs dcn31_apg_funcs = {
152 .se_audio_setup = apg31_se_audio_setup,
153 .audio_mute_control = apg31_audio_mute_control,
154 .enable_apg = apg31_enable,
155 .disable_apg = apg31_disable,
156};
157
158void apg31_construct(struct dcn31_apg *apg31,
159 struct dc_context *ctx,
160 uint32_t inst,
161 const struct dcn31_apg_registers *apg_regs,
162 const struct dcn31_apg_shift *apg_shift,
163 const struct dcn31_apg_mask *apg_mask)
164{
165 apg31->base.ctx = ctx;
166
167 apg31->base.inst = inst;
168 apg31->base.funcs = &dcn31_apg_funcs;
169
170 apg31->regs = apg_regs;
171 apg31->apg_shift = apg_shift;
172 apg31->apg_mask = apg_mask;
173}