/usr/src/sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba

Bug Summary

File:	dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
Warning:	line 1352, column 3 Value stored to 'TimeForFetchingMetaPTE' is never read

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.0 -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name display_mode_vba_30.c -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +sse -target-feature +sse2 -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/lib/clang/13.0.0 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -D CONFIG_DRM_AMD_DC_DCN3_0 -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /usr/obj/sys/arch/amd64/compile/GENERIC.MP/scan-build/2022-01-12-131800-47421-1 -x c /usr/src/sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

1	/*
2	* Copyright 2020 Advanced Micro Devices, Inc.
3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:
10	*
11	* The above copyright notice and this permission notice shall be included in
12	* all copies or substantial portions of the Software.
13	*
14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20	* OTHER DEALINGS IN THE SOFTWARE.
21	*
22	* Authors: AMD
23	*
24	*/
25
26	#ifdef CONFIG_DRM_AMD_DC_DCN3_01
27	#include "dc.h"
28	#include "dc_link.h"
29	#include "../display_mode_lib.h"
30	#include "display_mode_vba_30.h"
31	#include "../dml_inline_defs.h"
32
33
34	/*
35	* NOTE:
36	* This file is gcc-parsable HW gospel, coming straight from HW engineers.
37	*
38	* It doesn't adhere to Linux kernel style and sometimes will do things in odd
39	* ways. Unless there is something clearly wrong with it the code should
40	* remain as-is as it provides us with a guarantee from HW that it is correct.
41	*/
42
43
44	typedef struct {
45	double DPPCLK;
46	double DISPCLK;
47	double PixelClock;
48	double DCFCLKDeepSleep;
49	unsigned int DPPPerPlane;
50	bool_Bool ScalerEnabled;
51	enum scan_direction_class SourceScan;
52	unsigned int BlockWidth256BytesY;
53	unsigned int BlockHeight256BytesY;
54	unsigned int BlockWidth256BytesC;
55	unsigned int BlockHeight256BytesC;
56	unsigned int InterlaceEnable;
57	unsigned int NumberOfCursors;
58	unsigned int VBlank;
59	unsigned int HTotal;
60	unsigned int DCCEnable;
61	bool_Bool ODMCombineEnabled;
62	} Pipe;
63
64	#define BPP_INVALID0 0
65	#define BPP_BLENDED_PIPE0xffffffff 0xffffffff
66	#define DCN30_MAX_DSC_IMAGE_WIDTH5184 5184
67	#define DCN30_MAX_FMT_420_BUFFER_WIDTH4096 4096
68
69	static void DisplayPipeConfiguration(struct display_mode_lib *mode_lib);
70	static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation(
71	struct display_mode_lib *mode_lib);
72	static unsigned int dscceComputeDelay(
73	unsigned int bpc,
74	double BPP,
75	unsigned int sliceWidth,
76	unsigned int numSlices,
77	enum output_format_class pixelFormat,
78	enum output_encoder_class Output);
79	static unsigned int dscComputeDelay(
80	enum output_format_class pixelFormat,
81	enum output_encoder_class Output);
82	// Super monster function with some 45 argument
83	static bool_Bool CalculatePrefetchSchedule(
84	struct display_mode_lib *mode_lib,
85	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
86	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
87	Pipe *myPipe,
88	unsigned int DSCDelay,
89	double DPPCLKDelaySubtotalPlusCNVCFormater,
90	double DPPCLKDelaySCL,
91	double DPPCLKDelaySCLLBOnly,
92	double DPPCLKDelayCNVCCursor,
93	double DISPCLKDelaySubtotal,
94	unsigned int DPP_RECOUT_WIDTH,
95	enum output_format_class OutputFormat,
96	unsigned int MaxInterDCNTileRepeaters,
97	unsigned int VStartup,
98	unsigned int MaxVStartup,
99	unsigned int GPUVMPageTableLevels,
100	bool_Bool GPUVMEnable,
101	bool_Bool HostVMEnable,
102	unsigned int HostVMMaxNonCachedPageTableLevels,
103	double HostVMMinPageSize,
104	bool_Bool DynamicMetadataEnable,
105	bool_Bool DynamicMetadataVMEnabled,
106	int DynamicMetadataLinesBeforeActiveRequired,
107	unsigned int DynamicMetadataTransmittedBytes,
108	double UrgentLatency,
109	double UrgentExtraLatency,
110	double TCalc,
111	unsigned int PDEAndMetaPTEBytesFrame,
112	unsigned int MetaRowByte,
113	unsigned int PixelPTEBytesPerRow,
114	double PrefetchSourceLinesY,
115	unsigned int SwathWidthY,
116	int BytePerPixelY,
117	double VInitPreFillY,
118	unsigned int MaxNumSwathY,
119	double PrefetchSourceLinesC,
120	unsigned int SwathWidthC,
121	int BytePerPixelC,
122	double VInitPreFillC,
123	unsigned int MaxNumSwathC,
124	long swath_width_luma_ub,
125	long swath_width_chroma_ub,
126	unsigned int SwathHeightY,
127	unsigned int SwathHeightC,
128	double TWait,
129	bool_Bool ProgressiveToInterlaceUnitInOPP,
130	double *DSTXAfterScaler,
131	double *DSTYAfterScaler,
132	double *DestinationLinesForPrefetch,
133	double *PrefetchBandwidth,
134	double *DestinationLinesToRequestVMInVBlank,
135	double *DestinationLinesToRequestRowInVBlank,
136	double *VRatioPrefetchY,
137	double *VRatioPrefetchC,
138	double *RequiredPrefetchPixDataBWLuma,
139	double *RequiredPrefetchPixDataBWChroma,
140	bool_Bool *NotEnoughTimeForDynamicMetadata,
141	double *Tno_bw,
142	double *prefetch_vmrow_bw,
143	double *Tdmdl_vm,
144	double *Tdmdl,
145	unsigned int *VUpdateOffsetPix,
146	double *VUpdateWidthPix,
147	double *VReadyOffsetPix);
148	static double RoundToDFSGranularityUp(double Clock, double VCOSpeed);
149	static double RoundToDFSGranularityDown(double Clock, double VCOSpeed);
150	static void CalculateDCCConfiguration(
151	bool_Bool DCCEnabled,
152	bool_Bool DCCProgrammingAssumesScanDirectionUnknown,
153	enum source_format_class SourcePixelFormat,
154	unsigned int ViewportWidthLuma,
155	unsigned int ViewportWidthChroma,
156	unsigned int ViewportHeightLuma,
157	unsigned int ViewportHeightChroma,
158	double DETBufferSize,
159	unsigned int RequestHeight256ByteLuma,
160	unsigned int RequestHeight256ByteChroma,
161	enum dm_swizzle_mode TilingFormat,
162	unsigned int BytePerPixelY,
163	unsigned int BytePerPixelC,
164	double BytePerPixelDETY,
165	double BytePerPixelDETC,
166	enum scan_direction_class ScanOrientation,
167	unsigned int *MaxUncompressedBlockLuma,
168	unsigned int *MaxUncompressedBlockChroma,
169	unsigned int *MaxCompressedBlockLuma,
170	unsigned int *MaxCompressedBlockChroma,
171	unsigned int *IndependentBlockLuma,
172	unsigned int *IndependentBlockChroma);
173	static double CalculatePrefetchSourceLines(
174	struct display_mode_lib *mode_lib,
175	double VRatio,
176	double vtaps,
177	bool_Bool Interlace,
178	bool_Bool ProgressiveToInterlaceUnitInOPP,
179	unsigned int SwathHeight,
180	unsigned int ViewportYStart,
181	double *VInitPreFill,
182	unsigned int *MaxNumSwath);
183	static unsigned int CalculateVMAndRowBytes(
184	struct display_mode_lib *mode_lib,
185	bool_Bool DCCEnable,
186	unsigned int BlockHeight256Bytes,
187	unsigned int BlockWidth256Bytes,
188	enum source_format_class SourcePixelFormat,
189	unsigned int SurfaceTiling,
190	unsigned int BytePerPixel,
191	enum scan_direction_class ScanDirection,
192	unsigned int SwathWidth,
193	unsigned int ViewportHeight,
194	bool_Bool GPUVMEnable,
195	bool_Bool HostVMEnable,
196	unsigned int HostVMMaxNonCachedPageTableLevels,
197	unsigned int GPUVMMinPageSize,
198	unsigned int HostVMMinPageSize,
199	unsigned int PTEBufferSizeInRequests,
200	unsigned int Pitch,
201	unsigned int DCCMetaPitch,
202	unsigned int *MacroTileWidth,
203	unsigned int *MetaRowByte,
204	unsigned int *PixelPTEBytesPerRow,
205	bool_Bool *PTEBufferSizeNotExceeded,
206	unsigned int *dpte_row_width_ub,
207	unsigned int *dpte_row_height,
208	unsigned int *MetaRequestWidth,
209	unsigned int *MetaRequestHeight,
210	unsigned int *meta_row_width,
211	unsigned int *meta_row_height,
212	unsigned int *vm_group_bytes,
213	unsigned int *dpte_group_bytes,
214	unsigned int *PixelPTEReqWidth,
215	unsigned int *PixelPTEReqHeight,
216	unsigned int *PTERequestSize,
217	unsigned int *DPDE0BytesFrame,
218	unsigned int *MetaPTEBytesFrame);
219	static double CalculateTWait(
220	unsigned int PrefetchMode,
221	double DRAMClockChangeLatency,
222	double UrgentLatency,
223	double SREnterPlusExitTime);
224	static void CalculateRowBandwidth(
225	bool_Bool GPUVMEnable,
226	enum source_format_class SourcePixelFormat,
227	double VRatio,
228	double VRatioChroma,
229	bool_Bool DCCEnable,
230	double LineTime,
231	unsigned int MetaRowByteLuma,
232	unsigned int MetaRowByteChroma,
233	unsigned int meta_row_height_luma,
234	unsigned int meta_row_height_chroma,
235	unsigned int PixelPTEBytesPerRowLuma,
236	unsigned int PixelPTEBytesPerRowChroma,
237	unsigned int dpte_row_height_luma,
238	unsigned int dpte_row_height_chroma,
239	double *meta_row_bw,
240	double *dpte_row_bw);
241	static void CalculateFlipSchedule(
242	struct display_mode_lib *mode_lib,
243	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
244	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
245	double UrgentExtraLatency,
246	double UrgentLatency,
247	unsigned int GPUVMMaxPageTableLevels,
248	bool_Bool HostVMEnable,
249	unsigned int HostVMMaxNonCachedPageTableLevels,
250	bool_Bool GPUVMEnable,
251	double HostVMMinPageSize,
252	double PDEAndMetaPTEBytesPerFrame,
253	double MetaRowBytes,
254	double DPTEBytesPerRow,
255	double BandwidthAvailableForImmediateFlip,
256	unsigned int TotImmediateFlipBytes,
257	enum source_format_class SourcePixelFormat,
258	double LineTime,
259	double VRatio,
260	double VRatioChroma,
261	double Tno_bw,
262	bool_Bool DCCEnable,
263	unsigned int dpte_row_height,
264	unsigned int meta_row_height,
265	unsigned int dpte_row_height_chroma,
266	unsigned int meta_row_height_chroma,
267	double *DestinationLinesToRequestVMInImmediateFlip,
268	double *DestinationLinesToRequestRowInImmediateFlip,
269	double *final_flip_bw,
270	bool_Bool *ImmediateFlipSupportedForPipe);
271	static double CalculateWriteBackDelay(
272	enum source_format_class WritebackPixelFormat,
273	double WritebackHRatio,
274	double WritebackVRatio,
275	unsigned int WritebackVTaps,
276	long WritebackDestinationWidth,
277	long WritebackDestinationHeight,
278	long WritebackSourceHeight,
279	unsigned int HTotal);
280	static void CalculateDynamicMetadataParameters(
281	int MaxInterDCNTileRepeaters,
282	double DPPCLK,
283	double DISPCLK,
284	double DCFClkDeepSleep,
285	double PixelClock,
286	long HTotal,
287	long VBlank,
288	long DynamicMetadataTransmittedBytes,
289	long DynamicMetadataLinesBeforeActiveRequired,
290	int InterlaceEnable,
291	bool_Bool ProgressiveToInterlaceUnitInOPP,
292	double *Tsetup,
293	double *Tdmbf,
294	double *Tdmec,
295	double *Tdmsks);
296	static void CalculateWatermarksAndDRAMSpeedChangeSupport(
297	struct display_mode_lib *mode_lib,
298	unsigned int PrefetchMode,
299	unsigned int NumberOfActivePlanes,
300	unsigned int MaxLineBufferLines,
301	unsigned int LineBufferSize,
302	unsigned int DPPOutputBufferPixels,
303	double DETBufferSizeInKByte,
304	unsigned int WritebackInterfaceBufferSize,
305	double DCFCLK,
306	double ReturnBW,
307	bool_Bool GPUVMEnable,
308	unsigned int dpte_group_bytes[],
309	unsigned int MetaChunkSize,
310	double UrgentLatency,
311	double ExtraLatency,
312	double WritebackLatency,
313	double WritebackChunkSize,
314	double SOCCLK,
315	double DRAMClockChangeLatency,
316	double SRExitTime,
317	double SREnterPlusExitTime,
318	double DCFCLKDeepSleep,
319	unsigned int DPPPerPlane[],
320	bool_Bool DCCEnable[],
321	double DPPCLK[],
322	double DETBufferSizeY[],
323	double DETBufferSizeC[],
324	unsigned int SwathHeightY[],
325	unsigned int SwathHeightC[],
326	unsigned int LBBitPerPixel[],
327	double SwathWidthY[],
328	double SwathWidthC[],
329	double HRatio[],
330	double HRatioChroma[],
331	unsigned int vtaps[],
332	unsigned int VTAPsChroma[],
333	double VRatio[],
334	double VRatioChroma[],
335	unsigned int HTotal[],
336	double PixelClock[],
337	unsigned int BlendingAndTiming[],
338	double BytePerPixelDETY[],
339	double BytePerPixelDETC[],
340	double DSTXAfterScaler[],
341	double DSTYAfterScaler[],
342	bool_Bool WritebackEnable[],
343	enum source_format_class WritebackPixelFormat[],
344	double WritebackDestinationWidth[],
345	double WritebackDestinationHeight[],
346	double WritebackSourceHeight[],
347	enum clock_change_support *DRAMClockChangeSupport,
348	double *UrgentWatermark,
349	double *WritebackUrgentWatermark,
350	double *DRAMClockChangeWatermark,
351	double *WritebackDRAMClockChangeWatermark,
352	double *StutterExitWatermark,
353	double *StutterEnterPlusExitWatermark,
354	double *MinActiveDRAMClockChangeLatencySupported);
355	static void CalculateDCFCLKDeepSleep(
356	struct display_mode_lib *mode_lib,
357	unsigned int NumberOfActivePlanes,
358	int BytePerPixelY[],
359	int BytePerPixelC[],
360	double VRatio[],
361	double VRatioChroma[],
362	double SwathWidthY[],
363	double SwathWidthC[],
364	unsigned int DPPPerPlane[],
365	double HRatio[],
366	double HRatioChroma[],
367	double PixelClock[],
368	double PSCL_THROUGHPUT[],
369	double PSCL_THROUGHPUT_CHROMA[],
370	double DPPCLK[],
371	double ReadBandwidthLuma[],
372	double ReadBandwidthChroma[],
373	int ReturnBusWidth,
374	double *DCFCLKDeepSleep);
375	static void CalculateUrgentBurstFactor(
376	long swath_width_luma_ub,
377	long swath_width_chroma_ub,
378	unsigned int DETBufferSizeInKByte,
379	unsigned int SwathHeightY,
380	unsigned int SwathHeightC,
381	double LineTime,
382	double UrgentLatency,
383	double CursorBufferSize,
384	unsigned int CursorWidth,
385	unsigned int CursorBPP,
386	double VRatio,
387	double VRatioC,
388	double BytePerPixelInDETY,
389	double BytePerPixelInDETC,
390	double DETBufferSizeY,
391	double DETBufferSizeC,
392	double *UrgentBurstFactorCursor,
393	double *UrgentBurstFactorLuma,
394	double *UrgentBurstFactorChroma,
395	bool_Bool *NotEnoughUrgentLatencyHiding);
396
397	static void UseMinimumDCFCLK(
398	struct display_mode_lib *mode_lib,
399	int MaxInterDCNTileRepeaters,
400	int MaxPrefetchMode,
401	double FinalDRAMClockChangeLatency,
402	double SREnterPlusExitTime,
403	int ReturnBusWidth,
404	int RoundTripPingLatencyCycles,
405	int ReorderingBytes,
406	int PixelChunkSizeInKByte,
407	int MetaChunkSize,
408	bool_Bool GPUVMEnable,
409	int GPUVMMaxPageTableLevels,
410	bool_Bool HostVMEnable,
411	int NumberOfActivePlanes,
412	double HostVMMinPageSize,
413	int HostVMMaxNonCachedPageTableLevels,
414	bool_Bool DynamicMetadataVMEnabled,
415	enum immediate_flip_requirement ImmediateFlipRequirement,
416	bool_Bool ProgressiveToInterlaceUnitInOPP,
417	double MaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperation,
418	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
419	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
420	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly,
421	int VTotal[],
422	int VActive[],
423	int DynamicMetadataTransmittedBytes[],
424	int DynamicMetadataLinesBeforeActiveRequired[],
425	bool_Bool Interlace[],
426	double RequiredDPPCLK[][2][DC__NUM_DPP__MAX8],
427	double RequiredDISPCLK[][2],
428	double UrgLatency[],
429	unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX8],
430	double ProjectedDCFCLKDeepSleep[][2],
431	double MaximumVStartup[][2][DC__NUM_DPP__MAX8],
432	double TotalVActivePixelBandwidth[][2],
433	double TotalVActiveCursorBandwidth[][2],
434	double TotalMetaRowBandwidth[][2],
435	double TotalDPTERowBandwidth[][2],
436	unsigned int TotalNumberOfActiveDPP[][2],
437	unsigned int TotalNumberOfDCCActiveDPP[][2],
438	int dpte_group_bytes[],
439	double PrefetchLinesY[][2][DC__NUM_DPP__MAX8],
440	double PrefetchLinesC[][2][DC__NUM_DPP__MAX8],
441	int swath_width_luma_ub_all_states[][2][DC__NUM_DPP__MAX8],
442	int swath_width_chroma_ub_all_states[][2][DC__NUM_DPP__MAX8],
443	int BytePerPixelY[],
444	int BytePerPixelC[],
445	int HTotal[],
446	double PixelClock[],
447	double PDEAndMetaPTEBytesPerFrame[][2][DC__NUM_DPP__MAX8],
448	double DPTEBytesPerRow[][2][DC__NUM_DPP__MAX8],
449	double MetaRowBytes[][2][DC__NUM_DPP__MAX8],
450	bool_Bool DynamicMetadataEnable[],
451	double VActivePixelBandwidth[][2][DC__NUM_DPP__MAX8],
452	double VActiveCursorBandwidth[][2][DC__NUM_DPP__MAX8],
453	double ReadBandwidthLuma[],
454	double ReadBandwidthChroma[],
455	double DCFCLKPerState[],
456	double DCFCLKState[][2]);
457	static void CalculatePixelDeliveryTimes(
458	unsigned int NumberOfActivePlanes,
459	double VRatio[],
460	double VRatioChroma[],
461	double VRatioPrefetchY[],
462	double VRatioPrefetchC[],
463	unsigned int swath_width_luma_ub[],
464	unsigned int swath_width_chroma_ub[],
465	unsigned int DPPPerPlane[],
466	double HRatio[],
467	double HRatioChroma[],
468	double PixelClock[],
469	double PSCL_THROUGHPUT[],
470	double PSCL_THROUGHPUT_CHROMA[],
471	double DPPCLK[],
472	int BytePerPixelC[],
473	enum scan_direction_class SourceScan[],
474	unsigned int NumberOfCursors[],
475	unsigned int CursorWidth[][2],
476	unsigned int CursorBPP[][2],
477	unsigned int BlockWidth256BytesY[],
478	unsigned int BlockHeight256BytesY[],
479	unsigned int BlockWidth256BytesC[],
480	unsigned int BlockHeight256BytesC[],
481	double DisplayPipeLineDeliveryTimeLuma[],
482	double DisplayPipeLineDeliveryTimeChroma[],
483	double DisplayPipeLineDeliveryTimeLumaPrefetch[],
484	double DisplayPipeLineDeliveryTimeChromaPrefetch[],
485	double DisplayPipeRequestDeliveryTimeLuma[],
486	double DisplayPipeRequestDeliveryTimeChroma[],
487	double DisplayPipeRequestDeliveryTimeLumaPrefetch[],
488	double DisplayPipeRequestDeliveryTimeChromaPrefetch[],
489	double CursorRequestDeliveryTime[],
490	double CursorRequestDeliveryTimePrefetch[]);
491
492	static void CalculateMetaAndPTETimes(
493	int NumberOfActivePlanes,
494	bool_Bool GPUVMEnable,
495	int MetaChunkSize,
496	int MinMetaChunkSizeBytes,
497	int HTotal[],
498	double VRatio[],
499	double VRatioChroma[],
500	double DestinationLinesToRequestRowInVBlank[],
501	double DestinationLinesToRequestRowInImmediateFlip[],
502	bool_Bool DCCEnable[],
503	double PixelClock[],
504	int BytePerPixelY[],
505	int BytePerPixelC[],
506	enum scan_direction_class SourceScan[],
507	int dpte_row_height[],
508	int dpte_row_height_chroma[],
509	int meta_row_width[],
510	int meta_row_width_chroma[],
511	int meta_row_height[],
512	int meta_row_height_chroma[],
513	int meta_req_width[],
514	int meta_req_width_chroma[],
515	int meta_req_height[],
516	int meta_req_height_chroma[],
517	int dpte_group_bytes[],
518	int PTERequestSizeY[],
519	int PTERequestSizeC[],
520	int PixelPTEReqWidthY[],
521	int PixelPTEReqHeightY[],
522	int PixelPTEReqWidthC[],
523	int PixelPTEReqHeightC[],
524	int dpte_row_width_luma_ub[],
525	int dpte_row_width_chroma_ub[],
526	double DST_Y_PER_PTE_ROW_NOM_L[],
527	double DST_Y_PER_PTE_ROW_NOM_C[],
528	double DST_Y_PER_META_ROW_NOM_L[],
529	double DST_Y_PER_META_ROW_NOM_C[],
530	double TimePerMetaChunkNominal[],
531	double TimePerChromaMetaChunkNominal[],
532	double TimePerMetaChunkVBlank[],
533	double TimePerChromaMetaChunkVBlank[],
534	double TimePerMetaChunkFlip[],
535	double TimePerChromaMetaChunkFlip[],
536	double time_per_pte_group_nom_luma[],
537	double time_per_pte_group_vblank_luma[],
538	double time_per_pte_group_flip_luma[],
539	double time_per_pte_group_nom_chroma[],
540	double time_per_pte_group_vblank_chroma[],
541	double time_per_pte_group_flip_chroma[]);
542
543	static void CalculateVMGroupAndRequestTimes(
544	unsigned int NumberOfActivePlanes,
545	bool_Bool GPUVMEnable,
546	unsigned int GPUVMMaxPageTableLevels,
547	unsigned int HTotal[],
548	int BytePerPixelC[],
549	double DestinationLinesToRequestVMInVBlank[],
550	double DestinationLinesToRequestVMInImmediateFlip[],
551	bool_Bool DCCEnable[],
552	double PixelClock[],
553	int dpte_row_width_luma_ub[],
554	int dpte_row_width_chroma_ub[],
555	int vm_group_bytes[],
556	unsigned int dpde0_bytes_per_frame_ub_l[],
557	unsigned int dpde0_bytes_per_frame_ub_c[],
558	int meta_pte_bytes_per_frame_ub_l[],
559	int meta_pte_bytes_per_frame_ub_c[],
560	double TimePerVMGroupVBlank[],
561	double TimePerVMGroupFlip[],
562	double TimePerVMRequestVBlank[],
563	double TimePerVMRequestFlip[]);
564
565	static void CalculateStutterEfficiency(
566	int NumberOfActivePlanes,
567	long ROBBufferSizeInKByte,
568	double TotalDataReadBandwidth,
569	double DCFCLK,
570	double ReturnBW,
571	double SRExitTime,
572	bool_Bool SynchronizedVBlank,
573	int DPPPerPlane[],
574	double DETBufferSizeY[],
575	int BytePerPixelY[],
576	double BytePerPixelDETY[],
577	double SwathWidthY[],
578	int SwathHeightY[],
579	int SwathHeightC[],
580	double DCCRateLuma[],
581	double DCCRateChroma[],
582	int HTotal[],
583	int VTotal[],
584	double PixelClock[],
585	double VRatio[],
586	enum scan_direction_class SourceScan[],
587	int BlockHeight256BytesY[],
588	int BlockWidth256BytesY[],
589	int BlockHeight256BytesC[],
590	int BlockWidth256BytesC[],
591	int DCCYMaxUncompressedBlock[],
592	int DCCCMaxUncompressedBlock[],
593	int VActive[],
594	bool_Bool DCCEnable[],
595	bool_Bool WritebackEnable[],
596	double ReadBandwidthPlaneLuma[],
597	double ReadBandwidthPlaneChroma[],
598	double meta_row_bw[],
599	double dpte_row_bw[],
600	double *StutterEfficiencyNotIncludingVBlank,
601	double *StutterEfficiency,
602	double *StutterPeriodOut);
603
604	static void CalculateSwathAndDETConfiguration(
605	bool_Bool ForceSingleDPP,
606	int NumberOfActivePlanes,
607	long DETBufferSizeInKByte,
608	double MaximumSwathWidthLuma[],
609	double MaximumSwathWidthChroma[],
610	enum scan_direction_class SourceScan[],
611	enum source_format_class SourcePixelFormat[],
612	enum dm_swizzle_mode SurfaceTiling[],
613	int ViewportWidth[],
614	int ViewportHeight[],
615	int SurfaceWidthY[],
616	int SurfaceWidthC[],
617	int SurfaceHeightY[],
618	int SurfaceHeightC[],
619	int Read256BytesBlockHeightY[],
620	int Read256BytesBlockHeightC[],
621	int Read256BytesBlockWidthY[],
622	int Read256BytesBlockWidthC[],
623	enum odm_combine_mode ODMCombineEnabled[],
624	int BlendingAndTiming[],
625	int BytePerPixY[],
626	int BytePerPixC[],
627	double BytePerPixDETY[],
628	double BytePerPixDETC[],
629	int HActive[],
630	double HRatio[],
631	double HRatioChroma[],
632	int DPPPerPlane[],
633	int swath_width_luma_ub[],
634	int swath_width_chroma_ub[],
635	double SwathWidth[],
636	double SwathWidthChroma[],
637	int SwathHeightY[],
638	int SwathHeightC[],
639	double DETBufferSizeY[],
640	double DETBufferSizeC[],
641	bool_Bool ViewportSizeSupportPerPlane[],
642	bool_Bool *ViewportSizeSupport);
643	static void CalculateSwathWidth(
644	bool_Bool ForceSingleDPP,
645	int NumberOfActivePlanes,
646	enum source_format_class SourcePixelFormat[],
647	enum scan_direction_class SourceScan[],
648	unsigned int ViewportWidth[],
649	unsigned int ViewportHeight[],
650	unsigned int SurfaceWidthY[],
651	unsigned int SurfaceWidthC[],
652	unsigned int SurfaceHeightY[],
653	unsigned int SurfaceHeightC[],
654	enum odm_combine_mode ODMCombineEnabled[],
655	int BytePerPixY[],
656	int BytePerPixC[],
657	int Read256BytesBlockHeightY[],
658	int Read256BytesBlockHeightC[],
659	int Read256BytesBlockWidthY[],
660	int Read256BytesBlockWidthC[],
661	int BlendingAndTiming[],
662	unsigned int HActive[],
663	double HRatio[],
664	int DPPPerPlane[],
665	double SwathWidthSingleDPPY[],
666	double SwathWidthSingleDPPC[],
667	double SwathWidthY[],
668	double SwathWidthC[],
669	int MaximumSwathHeightY[],
670	int MaximumSwathHeightC[],
671	unsigned int swath_width_luma_ub[],
672	unsigned int swath_width_chroma_ub[]);
673	static double CalculateExtraLatency(
674	long RoundTripPingLatencyCycles,
675	long ReorderingBytes,
676	double DCFCLK,
677	int TotalNumberOfActiveDPP,
678	int PixelChunkSizeInKByte,
679	int TotalNumberOfDCCActiveDPP,
680	int MetaChunkSize,
681	double ReturnBW,
682	bool_Bool GPUVMEnable,
683	bool_Bool HostVMEnable,
684	int NumberOfActivePlanes,
685	int NumberOfDPP[],
686	int dpte_group_bytes[],
687	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
688	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
689	double HostVMMinPageSize,
690	int HostVMMaxNonCachedPageTableLevels);
691	static double CalculateExtraLatencyBytes(
692	long ReorderingBytes,
693	int TotalNumberOfActiveDPP,
694	int PixelChunkSizeInKByte,
695	int TotalNumberOfDCCActiveDPP,
696	int MetaChunkSize,
697	bool_Bool GPUVMEnable,
698	bool_Bool HostVMEnable,
699	int NumberOfActivePlanes,
700	int NumberOfDPP[],
701	int dpte_group_bytes[],
702	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
703	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
704	double HostVMMinPageSize,
705	int HostVMMaxNonCachedPageTableLevels);
706	static double CalculateUrgentLatency(
707	double UrgentLatencyPixelDataOnly,
708	double UrgentLatencyPixelMixedWithVMData,
709	double UrgentLatencyVMDataOnly,
710	bool_Bool DoUrgentLatencyAdjustment,
711	double UrgentLatencyAdjustmentFabricClockComponent,
712	double UrgentLatencyAdjustmentFabricClockReference,
713	double FabricClockSingle);
714
715	static bool_Bool CalculateBytePerPixelAnd256BBlockSizes(
716	enum source_format_class SourcePixelFormat,
717	enum dm_swizzle_mode SurfaceTiling,
718	unsigned int *BytePerPixelY,
719	unsigned int *BytePerPixelC,
720	double *BytePerPixelDETY,
721	double *BytePerPixelDETC,
722	unsigned int *BlockHeight256BytesY,
723	unsigned int *BlockHeight256BytesC,
724	unsigned int *BlockWidth256BytesY,
725	unsigned int *BlockWidth256BytesC);
726
727	void dml30_recalculate(struct display_mode_lib *mode_lib)
728	{
729	ModeSupportAndSystemConfiguration(mode_lib);
730	PixelClockAdjustmentForProgressiveToInterlaceUnit(mode_lib);
731	DisplayPipeConfiguration(mode_lib);
732	DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation(mode_lib);
733	}
734
735	static unsigned int dscceComputeDelay(
736	unsigned int bpc,
737	double BPP,
738	unsigned int sliceWidth,
739	unsigned int numSlices,
740	enum output_format_class pixelFormat,
741	enum output_encoder_class Output)
742	{
743	// valid bpc = source bits per component in the set of {8, 10, 12}
744	// valid bpp = increments of 1/16 of a bit
745	// min = 6/7/8 in N420/N422/444, respectively
746	// max = such that compression is 1:1
747	//valid sliceWidth = number of pixels per slice line, must be less than or equal to 5184/numSlices (or 4096/numSlices in 420 mode)
748	//valid numSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4}
749	//valid pixelFormat = pixel/color format in the set of {:N444_RGB, :S422, :N422, :N420}
750
751	// fixed value
752	unsigned int rcModelSize = 8192;
753
754	// N422/N420 operate at 2 pixels per clock
755	unsigned int pixelsPerClock, lstall, D, initalXmitDelay, w, s, ix, wx, P, l0, a, ax, L,
756	Delay, pixels;
757
758	if (pixelFormat == dm_420)
759	pixelsPerClock = 2;
760	// #all other modes operate at 1 pixel per clock
761	else if (pixelFormat == dm_444)
762	pixelsPerClock = 1;
763	else if (pixelFormat == dm_n422)
764	pixelsPerClock = 2;
765	else
766	pixelsPerClock = 1;
767
768	//initial transmit delay as per PPS
769	initalXmitDelay = dml_round(rcModelSize / 2.0 / BPP / pixelsPerClock);
770
771	//compute ssm delay
772	if (bpc == 8)
773	D = 81;
774	else if (bpc == 10)
775	D = 89;
776	else
777	D = 113;
778
779	//divide by pixel per cycle to compute slice width as seen by DSC
780	w = sliceWidth / pixelsPerClock;
781
782	//422 mode has an additional cycle of delay
783	if (pixelFormat == dm_420 \|\| pixelFormat == dm_444 \|\| pixelFormat == dm_n422)
784	s = 0;
785	else
786	s = 1;
787
788	//main calculation for the dscce
789	ix = initalXmitDelay + 45;
790	wx = (w + 2) / 3;
791	P = 3 * wx - w;
792	l0 = ix / w;
793	a = ix + P * l0;
794	ax = (a + 2) / 3 + D + 6 + 1;
795	L = (ax + wx - 1) / wx;
796	if ((ix % w) == 0 && P != 0)
797	lstall = 1;
798	else
799	lstall = 0;
800	Delay = L * wx * (numSlices - 1) + ax + s + lstall + 22;
801
802	//dsc processes 3 pixel containers per cycle and a container can contain 1 or 2 pixels
803	pixels = Delay * 3 * pixelsPerClock;
804	return pixels;
805	}
806
807	static unsigned int dscComputeDelay(enum output_format_class pixelFormat, enum output_encoder_class Output)
808	{
809	unsigned int Delay = 0;
810
811	if (pixelFormat == dm_420) {
812	// sfr
813	Delay = Delay + 2;
814	// dsccif
815	Delay = Delay + 0;
816	// dscc - input deserializer
817	Delay = Delay + 3;
818	// dscc gets pixels every other cycle
819	Delay = Delay + 2;
820	// dscc - input cdc fifo
821	Delay = Delay + 12;
822	// dscc gets pixels every other cycle
823	Delay = Delay + 13;
824	// dscc - cdc uncertainty
825	Delay = Delay + 2;
826	// dscc - output cdc fifo
827	Delay = Delay + 7;
828	// dscc gets pixels every other cycle
829	Delay = Delay + 3;
830	// dscc - cdc uncertainty
831	Delay = Delay + 2;
832	// dscc - output serializer
833	Delay = Delay + 1;
834	// sft
835	Delay = Delay + 1;
836	} else if (pixelFormat == dm_n422) {
837	// sfr
838	Delay = Delay + 2;
839	// dsccif
840	Delay = Delay + 1;
841	// dscc - input deserializer
842	Delay = Delay + 5;
843	// dscc - input cdc fifo
844	Delay = Delay + 25;
845	// dscc - cdc uncertainty
846	Delay = Delay + 2;
847	// dscc - output cdc fifo
848	Delay = Delay + 10;
849	// dscc - cdc uncertainty
850	Delay = Delay + 2;
851	// dscc - output serializer
852	Delay = Delay + 1;
853	// sft
854	Delay = Delay + 1;
855	}
856	else {
857	// sfr
858	Delay = Delay + 2;
859	// dsccif
860	Delay = Delay + 0;
861	// dscc - input deserializer
862	Delay = Delay + 3;
863	// dscc - input cdc fifo
864	Delay = Delay + 12;
865	// dscc - cdc uncertainty
866	Delay = Delay + 2;
867	// dscc - output cdc fifo
868	Delay = Delay + 7;
869	// dscc - output serializer
870	Delay = Delay + 1;
871	// dscc - cdc uncertainty
872	Delay = Delay + 2;
873	// sft
874	Delay = Delay + 1;
875	}
876
877	return Delay;
878	}
879
880	static bool_Bool CalculatePrefetchSchedule(
881	struct display_mode_lib *mode_lib,
882	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
883	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
884	Pipe *myPipe,
885	unsigned int DSCDelay,
886	double DPPCLKDelaySubtotalPlusCNVCFormater,
887	double DPPCLKDelaySCL,
888	double DPPCLKDelaySCLLBOnly,
889	double DPPCLKDelayCNVCCursor,
890	double DISPCLKDelaySubtotal,
891	unsigned int DPP_RECOUT_WIDTH,
892	enum output_format_class OutputFormat,
893	unsigned int MaxInterDCNTileRepeaters,
894	unsigned int VStartup,
895	unsigned int MaxVStartup,
896	unsigned int GPUVMPageTableLevels,
897	bool_Bool GPUVMEnable,
898	bool_Bool HostVMEnable,
899	unsigned int HostVMMaxNonCachedPageTableLevels,
900	double HostVMMinPageSize,
901	bool_Bool DynamicMetadataEnable,
902	bool_Bool DynamicMetadataVMEnabled,
903	int DynamicMetadataLinesBeforeActiveRequired,
904	unsigned int DynamicMetadataTransmittedBytes,
905	double UrgentLatency,
906	double UrgentExtraLatency,
907	double TCalc,
908	unsigned int PDEAndMetaPTEBytesFrame,
909	unsigned int MetaRowByte,
910	unsigned int PixelPTEBytesPerRow,
911	double PrefetchSourceLinesY,
912	unsigned int SwathWidthY,
913	int BytePerPixelY,
914	double VInitPreFillY,
915	unsigned int MaxNumSwathY,
916	double PrefetchSourceLinesC,
917	unsigned int SwathWidthC,
918	int BytePerPixelC,
919	double VInitPreFillC,
920	unsigned int MaxNumSwathC,
921	long swath_width_luma_ub,
922	long swath_width_chroma_ub,
923	unsigned int SwathHeightY,
924	unsigned int SwathHeightC,
925	double TWait,
926	bool_Bool ProgressiveToInterlaceUnitInOPP,
927	double *DSTXAfterScaler,
928	double *DSTYAfterScaler,
929	double *DestinationLinesForPrefetch,
930	double *PrefetchBandwidth,
931	double *DestinationLinesToRequestVMInVBlank,
932	double *DestinationLinesToRequestRowInVBlank,
933	double *VRatioPrefetchY,
934	double *VRatioPrefetchC,
935	double *RequiredPrefetchPixDataBWLuma,
936	double *RequiredPrefetchPixDataBWChroma,
937	bool_Bool *NotEnoughTimeForDynamicMetadata,
938	double *Tno_bw,
939	double *prefetch_vmrow_bw,
940	double *Tdmdl_vm,
941	double *Tdmdl,
942	unsigned int *VUpdateOffsetPix,
943	double *VUpdateWidthPix,
944	double *VReadyOffsetPix)
945	{
946	bool_Bool MyError = false0;
947	unsigned int DPPCycles = 0, DISPCLKCycles = 0;
948	double DSTTotalPixelsAfterScaler = 0;
949	double LineTime = 0, Tsetup = 0;
950	double dst_y_prefetch_equ = 0;
951	double Tsw_oto = 0;
952	double prefetch_bw_oto = 0;
953	double Tvm_oto = 0;
954	double Tr0_oto = 0;
955	double Tvm_oto_lines = 0;
956	double Tr0_oto_lines = 0;
957	double dst_y_prefetch_oto = 0;
958	double TimeForFetchingMetaPTE = 0;
959	double TimeForFetchingRowInVBlank = 0;
960	double LinesToRequestPrefetchPixelData = 0;
961	double HostVMInefficiencyFactor = 0;
962	unsigned int HostVMDynamicLevelsTrips = 0;
963	double trip_to_mem = 0;
964	double Tvm_trips = 0;
965	double Tr0_trips = 0;
966	double Tvm_trips_rounded = 0;
967	double Tr0_trips_rounded = 0;
968	double Lsw_oto = 0;
969	double Tpre_rounded = 0;
970	double prefetch_bw_equ = 0;
971	double Tvm_equ = 0;
972	double Tr0_equ = 0;
973	double Tdmbf = 0;
974	double Tdmec = 0;
975	double Tdmsks = 0;
976
977	if (GPUVMEnable == true1 && HostVMEnable == true1) {
978	HostVMInefficiencyFactor = PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData / PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly;
979	HostVMDynamicLevelsTrips = HostVMMaxNonCachedPageTableLevels;
980	} else {
981	HostVMInefficiencyFactor = 1;
982	HostVMDynamicLevelsTrips = 0;
983	}
984
985	CalculateDynamicMetadataParameters(
986	MaxInterDCNTileRepeaters,
987	myPipe->DPPCLK,
988	myPipe->DISPCLK,
989	myPipe->DCFCLKDeepSleep,
990	myPipe->PixelClock,
991	myPipe->HTotal,
992	myPipe->VBlank,
993	DynamicMetadataTransmittedBytes,
994	DynamicMetadataLinesBeforeActiveRequired,
995	myPipe->InterlaceEnable,
996	ProgressiveToInterlaceUnitInOPP,
997	&Tsetup,
998	&Tdmbf,
999	&Tdmec,
1000	&Tdmsks);
1001
1002	LineTime = myPipe->HTotal / myPipe->PixelClock;
1003	trip_to_mem = UrgentLatency;
1004	Tvm_trips = UrgentExtraLatency + trip_to_mem * (GPUVMPageTableLevels * (HostVMDynamicLevelsTrips + 1) - 1);
1005
1006	if (DynamicMetadataVMEnabled == true1 && GPUVMEnable == true1) {
1007	*Tdmdl = TWait + Tvm_trips + trip_to_mem;
1008	} else {
1009	*Tdmdl = TWait + UrgentExtraLatency;
1010	}
1011
1012	if (DynamicMetadataEnable == true1) {
1013	if (VStartup * LineTime < Tsetup + *Tdmdl + Tdmbf + Tdmec + Tdmsks) {
1014	*NotEnoughTimeForDynamicMetadata = true1;
1015	} else {
1016	*NotEnoughTimeForDynamicMetadata = false0;
1017	dml_print("DML: Not Enough Time for Dynamic Meta!\n"){do { } while(0); };
1018	dml_print("DML: Tdmbf: %fus - time for dmd transfer from dchub to dio output buffer\n", Tdmbf){do { } while(0); };
1019	dml_print("DML: Tdmec: %fus - time dio takes to transfer dmd\n", Tdmec){do { } while(0); };
1020	dml_print("DML: Tdmsks: %fus - time before active dmd must complete transmission at dio\n", Tdmsks){do { } while(0); };
1021	dml_print("DML: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", *Tdmdl){do { } while(0); };
1022	}
1023	} else {
1024	*NotEnoughTimeForDynamicMetadata = false0;
1025	}
1026
1027	*Tdmdl_vm = (DynamicMetadataEnable == true1 && DynamicMetadataVMEnabled == true1 && GPUVMEnable == true1 ? TWait + Tvm_trips : 0);
1028
1029	if (myPipe->ScalerEnabled)
1030	DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + DPPCLKDelaySCL;
1031	else
1032	DPPCycles = DPPCLKDelaySubtotalPlusCNVCFormater + DPPCLKDelaySCLLBOnly;
1033
1034	DPPCycles = DPPCycles + myPipe->NumberOfCursors * DPPCLKDelayCNVCCursor;
1035
1036	DISPCLKCycles = DISPCLKDelaySubtotal;
1037
1038	if (myPipe->DPPCLK == 0.0 \|\| myPipe->DISPCLK == 0.0)
1039	return true1;
1040
1041	DSTXAfterScaler = DPPCycles myPipe->PixelClock / myPipe->DPPCLK + DISPCLKCycles * myPipe->PixelClock / myPipe->DISPCLK
1042	+ DSCDelay;
1043
1044	DSTXAfterScaler = DSTXAfterScaler + ((myPipe->ODMCombineEnabled)?18:0) + (myPipe->DPPPerPlane - 1) * DPP_RECOUT_WIDTH;
1045
1046	if (OutputFormat == dm_420 \|\| (myPipe->InterlaceEnable && ProgressiveToInterlaceUnitInOPP))
1047	*DSTYAfterScaler = 1;
1048	else
1049	*DSTYAfterScaler = 0;
1050
1051	DSTTotalPixelsAfterScaler = DSTYAfterScaler myPipe->HTotal + *DSTXAfterScaler;
1052	*DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / myPipe->HTotal, 1);
1053	DSTXAfterScaler = DSTTotalPixelsAfterScaler - ((double) (DSTYAfterScaler * myPipe->HTotal));
1054
1055	MyError = false0;
1056
1057
1058	Tr0_trips = trip_to_mem * (HostVMDynamicLevelsTrips + 1);
1059	Tvm_trips_rounded = dml_ceil(4.0 * Tvm_trips / LineTime, 1) / 4 * LineTime;
1060	Tr0_trips_rounded = dml_ceil(4.0 * Tr0_trips / LineTime, 1) / 4 * LineTime;
1061
1062	if (GPUVMEnable) {
1063	if (GPUVMPageTableLevels >= 3) {
1064	Tno_bw = UrgentExtraLatency + trip_to_mem ((GPUVMPageTableLevels - 2) - 1);
1065	} else
1066	*Tno_bw = 0;
1067	} else if (!myPipe->DCCEnable)
1068	*Tno_bw = LineTime;
1069	else
1070	*Tno_bw = LineTime / 4;
1071
1072	dst_y_prefetch_equ = VStartup - (Tsetup + dml_max(TWait + TCalc, *Tdmdl)) / LineTime
1073	- (DSTYAfterScaler + DSTXAfterScaler / myPipe->HTotal);
1074
1075	Lsw_oto = dml_max(PrefetchSourceLinesY, PrefetchSourceLinesC);
1076	Tsw_oto = Lsw_oto * LineTime;
1077
1078	prefetch_bw_oto = (PrefetchSourceLinesY * swath_width_luma_ub * BytePerPixelY + PrefetchSourceLinesC * swath_width_chroma_ub * BytePerPixelC) / Tsw_oto;
1079
1080	if (GPUVMEnable == true1) {
1081	Tvm_oto = dml_max3(Tno_bw + PDEAndMetaPTEBytesFrame HostVMInefficiencyFactor / prefetch_bw_oto,
1082	Tvm_trips,
1083	LineTime / 4.0);
1084	} else
1085	Tvm_oto = LineTime / 4.0;
1086
1087	if ((GPUVMEnable == true1 \|\| myPipe->DCCEnable == true1)) {
1088	Tr0_oto = dml_max3(
1089	(MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / prefetch_bw_oto,
1090	LineTime - Tvm_oto, LineTime / 4);
1091	} else
1092	Tr0_oto = (LineTime - Tvm_oto) / 2.0;
1093
1094	Tvm_oto_lines = dml_ceil(4.0 * Tvm_oto / LineTime, 1) / 4.0;
1095	Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0;
1096	dst_y_prefetch_oto = Tvm_oto_lines + 2 * Tr0_oto_lines + Lsw_oto;
1097
1098	dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;
1099	Tpre_rounded = dst_y_prefetch_equ * LineTime;
1100
1101	dml_print("DML: dst_y_prefetch_oto: %f\n", dst_y_prefetch_oto){do { } while(0); };
1102	dml_print("DML: dst_y_prefetch_equ: %f\n", dst_y_prefetch_equ){do { } while(0); };
1103
1104	dml_print("DML: LineTime: %f\n", LineTime){do { } while(0); };
1105	dml_print("DML: VStartup: %d\n", VStartup){do { } while(0); };
1106	dml_print("DML: Tvstartup: %fus - time between vstartup and first pixel of active\n", VStartup * LineTime){do { } while(0); };
1107	dml_print("DML: Tsetup: %fus - time from vstartup to vready\n", Tsetup){do { } while(0); };
1108	dml_print("DML: TCalc: %fus - time for calculations in dchub starting at vready\n", TCalc){do { } while(0); };
1109	dml_print("DML: TWait: %fus - time for fabric to become ready max(pstate exit,cstate enter/exit, urgent latency) after TCalc\n", TWait){do { } while(0); };
1110	dml_print("DML: Tdmbf: %fus - time for dmd transfer from dchub to dio output buffer\n", Tdmbf){do { } while(0); };
1111	dml_print("DML: Tdmec: %fus - time dio takes to transfer dmd\n", Tdmec){do { } while(0); };
1112	dml_print("DML: Tdmsks: %fus - time before active dmd must complete transmission at dio\n", Tdmsks){do { } while(0); };
1113	dml_print("DML: Tdmdl_vm: %fus - time for vm stages of dmd \n", *Tdmdl_vm){do { } while(0); };
1114	dml_print("DML: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", *Tdmdl){do { } while(0); };
1115	dml_print("DML: dst_x_after_scl: %f pixels - number of pixel clocks pipeline and buffer delay after scaler \n", *DSTXAfterScaler){do { } while(0); };
1116	dml_print("DML: dst_y_after_scl: %d lines - number of lines of pipeline and buffer delay after scaler \n", (int)*DSTYAfterScaler){do { } while(0); };
1117
1118	*PrefetchBandwidth = 0;
1119	*DestinationLinesToRequestVMInVBlank = 0;
1120	*DestinationLinesToRequestRowInVBlank = 0;
1121	*VRatioPrefetchY = 0;
1122	*VRatioPrefetchC = 0;
1123	*RequiredPrefetchPixDataBWLuma = 0;
1124	if (dst_y_prefetch_equ > 1) {
1125	double PrefetchBandwidth1 = 0;
1126	double PrefetchBandwidth2 = 0;
1127	double PrefetchBandwidth3 = 0;
1128	double PrefetchBandwidth4 = 0;
1129
1130	if (Tpre_rounded - *Tno_bw > 0)
1131	PrefetchBandwidth1 = (PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor + 2 * MetaRowByte
1132	+ 2 * PixelPTEBytesPerRow * HostVMInefficiencyFactor
1133	+ PrefetchSourceLinesY * swath_width_luma_ub * BytePerPixelY
1134	+ PrefetchSourceLinesC * swath_width_chroma_ub * BytePerPixelC)
1135	/ (Tpre_rounded - *Tno_bw);
1136	else
1137	PrefetchBandwidth1 = 0;
1138
1139	if (VStartup == MaxVStartup && (PrefetchBandwidth1 > 4 * prefetch_bw_oto) && (Tpre_rounded - Tsw_oto / 4 - 0.75 * LineTime - *Tno_bw) > 0) {
1140	PrefetchBandwidth1 = (PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor + 2 * MetaRowByte + 2 * PixelPTEBytesPerRow * HostVMInefficiencyFactor) / (Tpre_rounded - Tsw_oto / 4 - 0.75 * LineTime - *Tno_bw);
1141	}
1142
1143	if (Tpre_rounded - Tno_bw - 2 Tr0_trips_rounded > 0)
1144	PrefetchBandwidth2 = (PDEAndMetaPTEBytesFrame *
1145	HostVMInefficiencyFactor + PrefetchSourceLinesY *
1146	swath_width_luma_ub * BytePerPixelY +
1147	PrefetchSourceLinesC * swath_width_chroma_ub *
1148	BytePerPixelC) /
1149	(Tpre_rounded - Tno_bw - 2 Tr0_trips_rounded);
1150	else
1151	PrefetchBandwidth2 = 0;
1152
1153	if (Tpre_rounded - Tvm_trips_rounded > 0)
1154	PrefetchBandwidth3 = (2 * MetaRowByte + 2 * PixelPTEBytesPerRow *
1155	HostVMInefficiencyFactor + PrefetchSourceLinesY *
1156	swath_width_luma_ub * BytePerPixelY + PrefetchSourceLinesC *
1157	swath_width_chroma_ub * BytePerPixelC) / (Tpre_rounded -
1158	Tvm_trips_rounded);
1159	else
1160	PrefetchBandwidth3 = 0;
1161
1162	if (VStartup == MaxVStartup && (PrefetchBandwidth3 > 4 * prefetch_bw_oto) && Tpre_rounded - Tsw_oto / 4 - 0.75 * LineTime - Tvm_trips_rounded > 0) {
1163	PrefetchBandwidth3 = (2 * MetaRowByte + 2 * PixelPTEBytesPerRow * HostVMInefficiencyFactor) / (Tpre_rounded - Tsw_oto / 4 - 0.75 * LineTime - Tvm_trips_rounded);
1164	}
1165
1166	if (Tpre_rounded - Tvm_trips_rounded - 2 * Tr0_trips_rounded > 0)
1167	PrefetchBandwidth4 = (PrefetchSourceLinesY * swath_width_luma_ub * BytePerPixelY + PrefetchSourceLinesC * swath_width_chroma_ub * BytePerPixelC)
1168	/ (Tpre_rounded - Tvm_trips_rounded - 2 * Tr0_trips_rounded);
1169	else
1170	PrefetchBandwidth4 = 0;
1171
1172	{
1173	bool_Bool Case1OK;
1174	bool_Bool Case2OK;
1175	bool_Bool Case3OK;
1176
1177	if (PrefetchBandwidth1 > 0) {
1178	if (Tno_bw + PDEAndMetaPTEBytesFrame HostVMInefficiencyFactor / PrefetchBandwidth1
1179	>= Tvm_trips_rounded && (MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / PrefetchBandwidth1 >= Tr0_trips_rounded) {
1180	Case1OK = true1;
1181	} else {
1182	Case1OK = false0;
1183	}
1184	} else {
1185	Case1OK = false0;
1186	}
1187
1188	if (PrefetchBandwidth2 > 0) {
1189	if (Tno_bw + PDEAndMetaPTEBytesFrame HostVMInefficiencyFactor / PrefetchBandwidth2
1190	>= Tvm_trips_rounded && (MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / PrefetchBandwidth2 < Tr0_trips_rounded) {
1191	Case2OK = true1;
1192	} else {
1193	Case2OK = false0;
1194	}
1195	} else {
1196	Case2OK = false0;
1197	}
1198
1199	if (PrefetchBandwidth3 > 0) {
1200	if (Tno_bw + PDEAndMetaPTEBytesFrame HostVMInefficiencyFactor / PrefetchBandwidth3
1201	< Tvm_trips_rounded && (MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / PrefetchBandwidth3 >= Tr0_trips_rounded) {
1202	Case3OK = true1;
1203	} else {
1204	Case3OK = false0;
1205	}
1206	} else {
1207	Case3OK = false0;
1208	}
1209
1210	if (Case1OK) {
1211	prefetch_bw_equ = PrefetchBandwidth1;
1212	} else if (Case2OK) {
1213	prefetch_bw_equ = PrefetchBandwidth2;
1214	} else if (Case3OK) {
1215	prefetch_bw_equ = PrefetchBandwidth3;
1216	} else {
1217	prefetch_bw_equ = PrefetchBandwidth4;
1218	}
1219
1220	dml_print("DML: prefetch_bw_equ: %f\n", prefetch_bw_equ){do { } while(0); };
1221
1222	if (prefetch_bw_equ > 0) {
1223	if (GPUVMEnable == true1) {
1224	Tvm_equ = dml_max3(Tno_bw + PDEAndMetaPTEBytesFrame HostVMInefficiencyFactor / prefetch_bw_equ, Tvm_trips, LineTime / 4);
1225	} else {
1226	Tvm_equ = LineTime / 4;
1227	}
1228
1229	if ((GPUVMEnable == true1 \|\| myPipe->DCCEnable == true1)) {
1230	Tr0_equ = dml_max4(
1231	(MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / prefetch_bw_equ,
1232	Tr0_trips,
1233	(LineTime - Tvm_equ) / 2,
1234	LineTime / 4);
1235	} else {
1236	Tr0_equ = (LineTime - Tvm_equ) / 2;
1237	}
1238	} else {
1239	Tvm_equ = 0;
1240	Tr0_equ = 0;
1241	dml_print("DML: prefetch_bw_equ equals 0! %s:%d\n", __FILE__, __LINE__){do { } while(0); };
1242	}
1243	}
1244
1245	if (dst_y_prefetch_oto < dst_y_prefetch_equ) {
1246	*DestinationLinesForPrefetch = dst_y_prefetch_oto;
1247	TimeForFetchingMetaPTE = Tvm_oto;
1248	TimeForFetchingRowInVBlank = Tr0_oto;
1249	*PrefetchBandwidth = prefetch_bw_oto;
1250	} else {
1251	*DestinationLinesForPrefetch = dst_y_prefetch_equ;
1252	TimeForFetchingMetaPTE = Tvm_equ;
1253	TimeForFetchingRowInVBlank = Tr0_equ;
1254	*PrefetchBandwidth = prefetch_bw_equ;
1255	}
1256
1257	DestinationLinesToRequestVMInVBlank = dml_ceil(4.0 TimeForFetchingMetaPTE / LineTime, 1.0) / 4.0;
1258
1259	DestinationLinesToRequestRowInVBlank = dml_ceil(4.0 TimeForFetchingRowInVBlank / LineTime, 1.0) / 4.0;
1260
1261
1262	LinesToRequestPrefetchPixelData = DestinationLinesForPrefetch - DestinationLinesToRequestVMInVBlank
1263	- 2 * *DestinationLinesToRequestRowInVBlank;
1264
1265	if (LinesToRequestPrefetchPixelData > 0 && prefetch_bw_equ > 0) {
1266
1267	*VRatioPrefetchY = (double) PrefetchSourceLinesY
1268	/ LinesToRequestPrefetchPixelData;
1269	VRatioPrefetchY = dml_max(VRatioPrefetchY, 1.0);
1270	if ((SwathHeightY > 4) && (VInitPreFillY > 3)) {
1271	if (LinesToRequestPrefetchPixelData > (VInitPreFillY - 3.0) / 2.0) {
1272	*VRatioPrefetchY = dml_max((double) PrefetchSourceLinesY / LinesToRequestPrefetchPixelData,
1273	(double) MaxNumSwathY * SwathHeightY / (LinesToRequestPrefetchPixelData - (VInitPreFillY - 3.0) / 2.0));
1274	VRatioPrefetchY = dml_max(VRatioPrefetchY, 1.0);
1275	} else {
1276	MyError = true1;
1277	dml_print("DML: MyErr set %s:%d\n", __FILE__, __LINE__){do { } while(0); };
1278	*VRatioPrefetchY = 0;
1279	}
1280	}
1281
1282	*VRatioPrefetchC = (double) PrefetchSourceLinesC / LinesToRequestPrefetchPixelData;
1283	VRatioPrefetchC = dml_max(VRatioPrefetchC, 1.0);
1284
1285	if ((SwathHeightC > 4)) {
1286	if (LinesToRequestPrefetchPixelData > (VInitPreFillC - 3.0) / 2.0) {
1287	VRatioPrefetchC = dml_max(VRatioPrefetchC,
1288	(double) MaxNumSwathC * SwathHeightC / (LinesToRequestPrefetchPixelData - (VInitPreFillC - 3.0) / 2.0));
1289	VRatioPrefetchC = dml_max(VRatioPrefetchC, 1.0);
1290	} else {
1291	MyError = true1;
1292	dml_print("DML: MyErr set %s:%d\n", __FILE__, __LINE__){do { } while(0); };
1293	*VRatioPrefetchC = 0;
1294	}
1295	}
1296
1297	RequiredPrefetchPixDataBWLuma = (double) PrefetchSourceLinesY / LinesToRequestPrefetchPixelData BytePerPixelY * swath_width_luma_ub / LineTime;
1298	RequiredPrefetchPixDataBWChroma = (double) PrefetchSourceLinesC / LinesToRequestPrefetchPixelData BytePerPixelC * swath_width_chroma_ub / LineTime;
1299	} else {
1300	MyError = true1;
1301	dml_print("DML: MyErr set %s:%d\n", __FILE__, __LINE__){do { } while(0); };
1302	dml_print("DML: LinesToRequestPrefetchPixelData: %f, should be > 0\n", LinesToRequestPrefetchPixelData){do { } while(0); };
1303	*VRatioPrefetchY = 0;
1304	*VRatioPrefetchC = 0;
1305	*RequiredPrefetchPixDataBWLuma = 0;
1306	*RequiredPrefetchPixDataBWChroma = 0;
1307	}
1308
1309	dml_print("DML: Tpre: %fus - sum of tim to request meta pte, 2 x data pte + meta data, swaths\n", (double)LinesToRequestPrefetchPixelData * LineTime + 2.0*TimeForFetchingRowInVBlank + TimeForFetchingMetaPTE){do { } while(0); };
1310	dml_print("DML: Tvm: %fus - time to fetch page tables for meta surface\n", TimeForFetchingMetaPTE){do { } while(0); };
1311	dml_print("DML: Tr0: %fus - time to fetch first row of data pagetables and first row of meta data (done in parallel)\n", TimeForFetchingRowInVBlank){do { } while(0); };
1312	dml_print("DML: Tr1: %fus - time to fetch second row of data pagetables and second row of meta data (done in parallel)\n", TimeForFetchingRowInVBlank){do { } while(0); };
1313	dml_print("DML: Tsw: %fus = time to fetch enough pixel data and cursor data to feed the scalers init position and detile\n", (double)LinesToRequestPrefetchPixelData * LineTime){do { } while(0); };
1314	dml_print("DML: To: %fus - time for propagation from scaler to optc\n", (DSTYAfterScaler + ((DSTXAfterScaler) / (double) myPipe->HTotal)) * LineTime){do { } while(0); };
1315	dml_print("DML: Tvstartup - Tsetup - Tcalc - Twait - Tpre - To > 0\n"){do { } while(0); };
1316	dml_print("DML: Tslack(pre): %fus - time left over in schedule\n", VStartup * LineTime - TimeForFetchingMetaPTE - 2 * TimeForFetchingRowInVBlank - (DSTYAfterScaler + ((DSTXAfterScaler) / (double) myPipe->HTotal)) * LineTime - TWait - TCalc - Tsetup){do { } while(0); };
1317	dml_print("DML: row_bytes = dpte_row_bytes (per_pipe) = PixelPTEBytesPerRow = : %d\n", PixelPTEBytesPerRow){do { } while(0); };
1318
1319	} else {
1320	MyError = true1;
1321	dml_print("DML: MyErr set %s:%d\n", __FILE__, __LINE__){do { } while(0); };
1322	}
1323
1324	{
1325	double prefetch_vm_bw = 0;
1326	double prefetch_row_bw = 0;
1327
1328	if (PDEAndMetaPTEBytesFrame == 0) {
1329	prefetch_vm_bw = 0;
1330	} else if (*DestinationLinesToRequestVMInVBlank > 0) {
1331	prefetch_vm_bw = PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / (DestinationLinesToRequestVMInVBlank LineTime);
1332	} else {
1333	prefetch_vm_bw = 0;
1334	MyError = true1;
1335	dml_print("DML: MyErr set %s:%d\n", __FILE__, __LINE__){do { } while(0); };
1336	}
1337	if (MetaRowByte + PixelPTEBytesPerRow == 0) {
1338	prefetch_row_bw = 0;
1339	} else if (*DestinationLinesToRequestRowInVBlank > 0) {
1340	prefetch_row_bw = (MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / (DestinationLinesToRequestRowInVBlank LineTime);
1341	} else {
1342	prefetch_row_bw = 0;
1343	MyError = true1;
1344	dml_print("DML: MyErr set %s:%d\n", __FILE__, __LINE__){do { } while(0); };
1345	}
1346
1347	*prefetch_vmrow_bw = dml_max(prefetch_vm_bw, prefetch_row_bw);
1348	}
1349
1350	if (MyError) {
1351	*PrefetchBandwidth = 0;
1352	TimeForFetchingMetaPTE = 0;
	Value stored to 'TimeForFetchingMetaPTE' is never read
1353	TimeForFetchingRowInVBlank = 0;
1354	*DestinationLinesToRequestVMInVBlank = 0;
1355	*DestinationLinesToRequestRowInVBlank = 0;
1356	*DestinationLinesForPrefetch = 0;
1357	LinesToRequestPrefetchPixelData = 0;
1358	*VRatioPrefetchY = 0;
1359	*VRatioPrefetchC = 0;
1360	*RequiredPrefetchPixDataBWLuma = 0;
1361	*RequiredPrefetchPixDataBWChroma = 0;
1362	}
1363
1364	return MyError;
1365	}
1366
1367	static double RoundToDFSGranularityUp(double Clock, double VCOSpeed)
1368	{
1369	return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
1370	}
1371
1372	static double RoundToDFSGranularityDown(double Clock, double VCOSpeed)
1373	{
1374	return VCOSpeed * 4 / dml_ceil(VCOSpeed * 4.0 / Clock, 1);
1375	}
1376
1377	static void CalculateDCCConfiguration(
1378	bool_Bool DCCEnabled,
1379	bool_Bool DCCProgrammingAssumesScanDirectionUnknown,
1380	enum source_format_class SourcePixelFormat,
1381	unsigned int SurfaceWidthLuma,
1382	unsigned int SurfaceWidthChroma,
1383	unsigned int SurfaceHeightLuma,
1384	unsigned int SurfaceHeightChroma,
1385	double DETBufferSize,
1386	unsigned int RequestHeight256ByteLuma,
1387	unsigned int RequestHeight256ByteChroma,
1388	enum dm_swizzle_mode TilingFormat,
1389	unsigned int BytePerPixelY,
1390	unsigned int BytePerPixelC,
1391	double BytePerPixelDETY,
1392	double BytePerPixelDETC,
1393	enum scan_direction_class ScanOrientation,
1394	unsigned int *MaxUncompressedBlockLuma,
1395	unsigned int *MaxUncompressedBlockChroma,
1396	unsigned int *MaxCompressedBlockLuma,
1397	unsigned int *MaxCompressedBlockChroma,
1398	unsigned int *IndependentBlockLuma,
1399	unsigned int *IndependentBlockChroma)
1400	{
1401	int yuv420 = 0;
1402	int horz_div_l = 0;
1403	int horz_div_c = 0;
1404	int vert_div_l = 0;
1405	int vert_div_c = 0;
1406
1407	int req128_horz_wc_l = 0;
1408	int req128_horz_wc_c = 0;
1409	int req128_vert_wc_l = 0;
1410	int req128_vert_wc_c = 0;
1411	int segment_order_horz_contiguous_luma = 0;
1412	int segment_order_horz_contiguous_chroma = 0;
1413	int segment_order_vert_contiguous_luma = 0;
1414	int segment_order_vert_contiguous_chroma = 0;
1415
1416	long full_swath_bytes_horz_wc_l = 0;
1417	long full_swath_bytes_horz_wc_c = 0;
1418	long full_swath_bytes_vert_wc_l = 0;
1419	long full_swath_bytes_vert_wc_c = 0;
1420
1421	long swath_buf_size = 0;
1422	double detile_buf_vp_horz_limit = 0;
1423	double detile_buf_vp_vert_limit = 0;
1424
1425	long MAS_vp_horz_limit = 0;
1426	long MAS_vp_vert_limit = 0;
1427	long max_vp_horz_width = 0;
1428	long max_vp_vert_height = 0;
1429	long eff_surf_width_l = 0;
1430	long eff_surf_width_c = 0;
1431	long eff_surf_height_l = 0;
1432	long eff_surf_height_c = 0;
1433
1434	typedef enum {
1435	REQ_256Bytes,
1436	REQ_128BytesNonContiguous,
1437	REQ_128BytesContiguous,
1438	REQ_NA
1439	} RequestType;
1440
1441	RequestType RequestLuma;
1442	RequestType RequestChroma;
1443
1444	yuv420 = ((SourcePixelFormat == dm_420_8 \|\| SourcePixelFormat == dm_420_10 \|\| SourcePixelFormat == dm_420_12) ? 1 : 0);
1445	horz_div_l = 1;
1446	horz_div_c = 1;
1447	vert_div_l = 1;
1448	vert_div_c = 1;
1449
1450	if (BytePerPixelY == 1)
1451	vert_div_l = 0;
1452	if (BytePerPixelC == 1)
1453	vert_div_c = 0;
1454	if (BytePerPixelY == 8
1455	&& (TilingFormat == dm_sw_64kb_s \|\| TilingFormat == dm_sw_64kb_s_t
1456	\|\| TilingFormat == dm_sw_64kb_s_x))
1457	horz_div_l = 0;
1458	if (BytePerPixelC == 8
1459	&& (TilingFormat == dm_sw_64kb_s \|\| TilingFormat == dm_sw_64kb_s_t
1460	\|\| TilingFormat == dm_sw_64kb_s_x))
1461	horz_div_c = 0;
1462
1463	if (BytePerPixelC == 0) {
1464	swath_buf_size = DETBufferSize / 2 - 2 * 256;
1465	detile_buf_vp_horz_limit = (double) swath_buf_size
1466	/ ((double) RequestHeight256ByteLuma * BytePerPixelY
1467	/ (1 + horz_div_l));
1468	detile_buf_vp_vert_limit = (double) swath_buf_size
1469	/ (256.0 / RequestHeight256ByteLuma / (1 + vert_div_l));
1470	} else {
1471	swath_buf_size = DETBufferSize / 2 - 2 * 2 * 256;
1472	detile_buf_vp_horz_limit = (double) swath_buf_size
1473	/ ((double) RequestHeight256ByteLuma * BytePerPixelY
1474	/ (1 + horz_div_l)
1475	+ (double) RequestHeight256ByteChroma
1476	* BytePerPixelC / (1 + horz_div_c)
1477	/ (1 + yuv420));
1478	detile_buf_vp_vert_limit = (double) swath_buf_size
1479	/ (256.0 / RequestHeight256ByteLuma / (1 + vert_div_l)
1480	+ 256.0 / RequestHeight256ByteChroma
1481	/ (1 + vert_div_c) / (1 + yuv420));
1482	}
1483
1484	if (SourcePixelFormat == dm_420_10) {
1485	detile_buf_vp_horz_limit = 1.5 * detile_buf_vp_horz_limit;
1486	detile_buf_vp_vert_limit = 1.5 * detile_buf_vp_vert_limit;
1487	}
1488
1489	detile_buf_vp_horz_limit = dml_floor(detile_buf_vp_horz_limit - 1, 16);
1490	detile_buf_vp_vert_limit = dml_floor(detile_buf_vp_vert_limit - 1, 16);
1491
1492	MAS_vp_horz_limit = 5760;
1493	MAS_vp_vert_limit = (BytePerPixelC > 0 ? 2880 : 5760);
1494	max_vp_horz_width = dml_min((double) MAS_vp_horz_limit, detile_buf_vp_horz_limit);
1495	max_vp_vert_height = dml_min((double) MAS_vp_vert_limit, detile_buf_vp_vert_limit);
1496	eff_surf_width_l =
1497	(SurfaceWidthLuma > max_vp_horz_width ? max_vp_horz_width : SurfaceWidthLuma);
1498	eff_surf_width_c = eff_surf_width_l / (1 + yuv420);
1499	eff_surf_height_l = (
1500	SurfaceHeightLuma > max_vp_vert_height ?
1501	max_vp_vert_height : SurfaceHeightLuma);
1502	eff_surf_height_c = eff_surf_height_l / (1 + yuv420);
1503
1504	full_swath_bytes_horz_wc_l = eff_surf_width_l * RequestHeight256ByteLuma * BytePerPixelY;
1505	full_swath_bytes_vert_wc_l = eff_surf_height_l * 256 / RequestHeight256ByteLuma;
1506	if (BytePerPixelC > 0) {
1507	full_swath_bytes_horz_wc_c = eff_surf_width_c * RequestHeight256ByteChroma
1508	* BytePerPixelC;
1509	full_swath_bytes_vert_wc_c = eff_surf_height_c * 256 / RequestHeight256ByteChroma;
1510	} else {
1511	full_swath_bytes_horz_wc_c = 0;
1512	full_swath_bytes_vert_wc_c = 0;
1513	}
1514
1515	if (SourcePixelFormat == dm_420_10) {
1516	full_swath_bytes_horz_wc_l = dml_ceil(full_swath_bytes_horz_wc_l * 2 / 3, 256);
1517	full_swath_bytes_horz_wc_c = dml_ceil(full_swath_bytes_horz_wc_c * 2 / 3, 256);
1518	full_swath_bytes_vert_wc_l = dml_ceil(full_swath_bytes_vert_wc_l * 2 / 3, 256);
1519	full_swath_bytes_vert_wc_c = dml_ceil(full_swath_bytes_vert_wc_c * 2 / 3, 256);
1520	}
1521
1522	if (2 * full_swath_bytes_horz_wc_l + 2 * full_swath_bytes_horz_wc_c <= DETBufferSize) {
1523	req128_horz_wc_l = 0;
1524	req128_horz_wc_c = 0;
1525	} else if (full_swath_bytes_horz_wc_l < 1.5 * full_swath_bytes_horz_wc_c
1526	&& 2 * full_swath_bytes_horz_wc_l + full_swath_bytes_horz_wc_c
1527	<= DETBufferSize) {
1528	req128_horz_wc_l = 0;
1529	req128_horz_wc_c = 1;
1530	} else if (full_swath_bytes_horz_wc_l >= 1.5 * full_swath_bytes_horz_wc_c
1531	&& full_swath_bytes_horz_wc_l + 2 * full_swath_bytes_horz_wc_c
1532	<= DETBufferSize) {
1533	req128_horz_wc_l = 1;
1534	req128_horz_wc_c = 0;
1535	} else {
1536	req128_horz_wc_l = 1;
1537	req128_horz_wc_c = 1;
1538	}
1539
1540	if (2 * full_swath_bytes_vert_wc_l + 2 * full_swath_bytes_vert_wc_c <= DETBufferSize) {
1541	req128_vert_wc_l = 0;
1542	req128_vert_wc_c = 0;
1543	} else if (full_swath_bytes_vert_wc_l < 1.5 * full_swath_bytes_vert_wc_c
1544	&& 2 * full_swath_bytes_vert_wc_l + full_swath_bytes_vert_wc_c
1545	<= DETBufferSize) {
1546	req128_vert_wc_l = 0;
1547	req128_vert_wc_c = 1;
1548	} else if (full_swath_bytes_vert_wc_l >= 1.5 * full_swath_bytes_vert_wc_c
1549	&& full_swath_bytes_vert_wc_l + 2 * full_swath_bytes_vert_wc_c
1550	<= DETBufferSize) {
1551	req128_vert_wc_l = 1;
1552	req128_vert_wc_c = 0;
1553	} else {
1554	req128_vert_wc_l = 1;
1555	req128_vert_wc_c = 1;
1556	}
1557
1558	if (BytePerPixelY == 2 \|\| (BytePerPixelY == 4 && TilingFormat != dm_sw_64kb_r_x)) {
1559	segment_order_horz_contiguous_luma = 0;
1560	} else {
1561	segment_order_horz_contiguous_luma = 1;
1562	}
1563	if ((BytePerPixelY == 8
1564	&& (TilingFormat == dm_sw_64kb_d \|\| TilingFormat == dm_sw_64kb_d_x
1565	\|\| TilingFormat == dm_sw_64kb_d_t
1566	\|\| TilingFormat == dm_sw_64kb_r_x))
1567	\|\| (BytePerPixelY == 4 && TilingFormat == dm_sw_64kb_r_x)) {
1568	segment_order_vert_contiguous_luma = 0;
1569	} else {
1570	segment_order_vert_contiguous_luma = 1;
1571	}
1572	if (BytePerPixelC == 2 \|\| (BytePerPixelC == 4 && TilingFormat != dm_sw_64kb_r_x)) {
1573	segment_order_horz_contiguous_chroma = 0;
1574	} else {
1575	segment_order_horz_contiguous_chroma = 1;
1576	}
1577	if ((BytePerPixelC == 8
1578	&& (TilingFormat == dm_sw_64kb_d \|\| TilingFormat == dm_sw_64kb_d_x
1579	\|\| TilingFormat == dm_sw_64kb_d_t
1580	\|\| TilingFormat == dm_sw_64kb_r_x))
1581	\|\| (BytePerPixelC == 4 && TilingFormat == dm_sw_64kb_r_x)) {
1582	segment_order_vert_contiguous_chroma = 0;
1583	} else {
1584	segment_order_vert_contiguous_chroma = 1;
1585	}
1586
1587	if (DCCProgrammingAssumesScanDirectionUnknown == true1) {
1588	if (req128_horz_wc_l == 0 && req128_vert_wc_l == 0) {
1589	RequestLuma = REQ_256Bytes;
1590	} else if ((req128_horz_wc_l == 1 && segment_order_horz_contiguous_luma == 0)
1591	\|\| (req128_vert_wc_l == 1 && segment_order_vert_contiguous_luma == 0)) {
1592	RequestLuma = REQ_128BytesNonContiguous;
1593	} else {
1594	RequestLuma = REQ_128BytesContiguous;
1595	}
1596	if (req128_horz_wc_c == 0 && req128_vert_wc_c == 0) {
1597	RequestChroma = REQ_256Bytes;
1598	} else if ((req128_horz_wc_c == 1 && segment_order_horz_contiguous_chroma == 0)
1599	\|\| (req128_vert_wc_c == 1
1600	&& segment_order_vert_contiguous_chroma == 0)) {
1601	RequestChroma = REQ_128BytesNonContiguous;
1602	} else {
1603	RequestChroma = REQ_128BytesContiguous;
1604	}
1605	} else if (ScanOrientation != dm_vert) {
1606	if (req128_horz_wc_l == 0) {
1607	RequestLuma = REQ_256Bytes;
1608	} else if (segment_order_horz_contiguous_luma == 0) {
1609	RequestLuma = REQ_128BytesNonContiguous;
1610	} else {
1611	RequestLuma = REQ_128BytesContiguous;
1612	}
1613	if (req128_horz_wc_c == 0) {
1614	RequestChroma = REQ_256Bytes;
1615	} else if (segment_order_horz_contiguous_chroma == 0) {
1616	RequestChroma = REQ_128BytesNonContiguous;
1617	} else {
1618	RequestChroma = REQ_128BytesContiguous;
1619	}
1620	} else {
1621	if (req128_vert_wc_l == 0) {
1622	RequestLuma = REQ_256Bytes;
1623	} else if (segment_order_vert_contiguous_luma == 0) {
1624	RequestLuma = REQ_128BytesNonContiguous;
1625	} else {
1626	RequestLuma = REQ_128BytesContiguous;
1627	}
1628	if (req128_vert_wc_c == 0) {
1629	RequestChroma = REQ_256Bytes;
1630	} else if (segment_order_vert_contiguous_chroma == 0) {
1631	RequestChroma = REQ_128BytesNonContiguous;
1632	} else {
1633	RequestChroma = REQ_128BytesContiguous;
1634	}
1635	}
1636
1637	if (RequestLuma == REQ_256Bytes) {
1638	*MaxUncompressedBlockLuma = 256;
1639	*MaxCompressedBlockLuma = 256;
1640	*IndependentBlockLuma = 0;
1641	} else if (RequestLuma == REQ_128BytesContiguous) {
1642	*MaxUncompressedBlockLuma = 256;
1643	*MaxCompressedBlockLuma = 128;
1644	*IndependentBlockLuma = 128;
1645	} else {
1646	*MaxUncompressedBlockLuma = 256;
1647	*MaxCompressedBlockLuma = 64;
1648	*IndependentBlockLuma = 64;
1649	}
1650
1651	if (RequestChroma == REQ_256Bytes) {
1652	*MaxUncompressedBlockChroma = 256;
1653	*MaxCompressedBlockChroma = 256;
1654	*IndependentBlockChroma = 0;
1655	} else if (RequestChroma == REQ_128BytesContiguous) {
1656	*MaxUncompressedBlockChroma = 256;
1657	*MaxCompressedBlockChroma = 128;
1658	*IndependentBlockChroma = 128;
1659	} else {
1660	*MaxUncompressedBlockChroma = 256;
1661	*MaxCompressedBlockChroma = 64;
1662	*IndependentBlockChroma = 64;
1663	}
1664
1665	if (DCCEnabled != true1 \|\| BytePerPixelC == 0) {
1666	*MaxUncompressedBlockChroma = 0;
1667	*MaxCompressedBlockChroma = 0;
1668	*IndependentBlockChroma = 0;
1669	}
1670
1671	if (DCCEnabled != true1) {
1672	*MaxUncompressedBlockLuma = 0;
1673	*MaxCompressedBlockLuma = 0;
1674	*IndependentBlockLuma = 0;
1675	}
1676	}
1677
1678
1679	static double CalculatePrefetchSourceLines(
1680	struct display_mode_lib *mode_lib,
1681	double VRatio,
1682	double vtaps,
1683	bool_Bool Interlace,
1684	bool_Bool ProgressiveToInterlaceUnitInOPP,
1685	unsigned int SwathHeight,
1686	unsigned int ViewportYStart,
1687	double *VInitPreFill,
1688	unsigned int *MaxNumSwath)
1689	{
1690	unsigned int MaxPartialSwath = 0;
1691
1692	if (ProgressiveToInterlaceUnitInOPP)
1693	*VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
1694	else
1695	VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace 0.5 * VRatio) / 2.0, 1);
1696
1697	if (!mode_lib->vba.IgnoreViewportPositioning) {
1698
1699	MaxNumSwath = dml_ceil((VInitPreFill - 1.0) / SwathHeight, 1) + 1.0;
1700
1701	if (*VInitPreFill > 1.0)
1702	MaxPartialSwath = (unsigned int) (*VInitPreFill - 2) % SwathHeight;
1703	else
1704	MaxPartialSwath = (unsigned int) (*VInitPreFill + SwathHeight - 2)
1705	% SwathHeight;
1706	MaxPartialSwath = dml_max(1U, MaxPartialSwath);
1707
1708	} else {
1709
1710	if (ViewportYStart != 0)
1711	dml_print({do { } while(0); }
1712	"WARNING DML: using viewport y position of 0 even though actual viewport y position is non-zero in prefetch source lines calculation\n"){do { } while(0); };
1713
1714	MaxNumSwath = dml_ceil(VInitPreFill / SwathHeight, 1);
1715
1716	if (*VInitPreFill > 1.0)
1717	MaxPartialSwath = (unsigned int) (*VInitPreFill - 1) % SwathHeight;
1718	else
1719	MaxPartialSwath = (unsigned int) (*VInitPreFill + SwathHeight - 1)
1720	% SwathHeight;
1721	}
1722
1723	return MaxNumSwath SwathHeight + MaxPartialSwath;
1724	}
1725
1726	static unsigned int CalculateVMAndRowBytes(
1727	struct display_mode_lib *mode_lib,
1728	bool_Bool DCCEnable,
1729	unsigned int BlockHeight256Bytes,
1730	unsigned int BlockWidth256Bytes,
1731	enum source_format_class SourcePixelFormat,
1732	unsigned int SurfaceTiling,
1733	unsigned int BytePerPixel,
1734	enum scan_direction_class ScanDirection,
1735	unsigned int SwathWidth,
1736	unsigned int ViewportHeight,
1737	bool_Bool GPUVMEnable,
1738	bool_Bool HostVMEnable,
1739	unsigned int HostVMMaxNonCachedPageTableLevels,
1740	unsigned int GPUVMMinPageSize,
1741	unsigned int HostVMMinPageSize,
1742	unsigned int PTEBufferSizeInRequests,
1743	unsigned int Pitch,
1744	unsigned int DCCMetaPitch,
1745	unsigned int *MacroTileWidth,
1746	unsigned int *MetaRowByte,
1747	unsigned int *PixelPTEBytesPerRow,
1748	bool_Bool *PTEBufferSizeNotExceeded,
1749	unsigned int *dpte_row_width_ub,
1750	unsigned int *dpte_row_height,
1751	unsigned int *MetaRequestWidth,
1752	unsigned int *MetaRequestHeight,
1753	unsigned int *meta_row_width,
1754	unsigned int *meta_row_height,
1755	unsigned int *vm_group_bytes,
1756	unsigned int *dpte_group_bytes,
1757	unsigned int *PixelPTEReqWidth,
1758	unsigned int *PixelPTEReqHeight,
1759	unsigned int *PTERequestSize,
1760	unsigned int *DPDE0BytesFrame,
1761	unsigned int *MetaPTEBytesFrame)
1762	{
1763	unsigned int MPDEBytesFrame = 0;
1764	unsigned int DCCMetaSurfaceBytes = 0;
1765	unsigned int MacroTileSizeBytes = 0;
1766	unsigned int MacroTileHeight = 0;
1767	unsigned int ExtraDPDEBytesFrame = 0;
1768	unsigned int PDEAndMetaPTEBytesFrame = 0;
1769	unsigned int PixelPTEReqHeightPTEs = 0;
1770	unsigned int HostVMDynamicLevels = 0;
1771
1772	double FractionOfPTEReturnDrop;
1773
1774	if (GPUVMEnable == true1 && HostVMEnable == true1) {
1775	if (HostVMMinPageSize < 2048) {
1776	HostVMDynamicLevels = HostVMMaxNonCachedPageTableLevels;
1777	} else if (HostVMMinPageSize >= 2048 && HostVMMinPageSize < 1048576) {
1778	HostVMDynamicLevels = dml_max(0, (int) HostVMMaxNonCachedPageTableLevels - 1);
1779	} else {
1780	HostVMDynamicLevels = dml_max(0, (int) HostVMMaxNonCachedPageTableLevels - 2);
1781	}
1782	}
1783
1784	MetaRequestHeight = 8 BlockHeight256Bytes;
1785	MetaRequestWidth = 8 BlockWidth256Bytes;
1786	if (ScanDirection != dm_vert) {
1787	meta_row_height = MetaRequestHeight;
1788	meta_row_width = dml_ceil((double) SwathWidth - 1, MetaRequestWidth)
1789	+ *MetaRequestWidth;
1790	MetaRowByte = meta_row_width * MetaRequestHeight BytePerPixel / 256.0;
1791	} else {
1792	meta_row_height = MetaRequestWidth;
1793	meta_row_width = dml_ceil((double) SwathWidth - 1, MetaRequestHeight)
1794	+ *MetaRequestHeight;
1795	MetaRowByte = meta_row_width * MetaRequestWidth BytePerPixel / 256.0;
1796	}
1797	DCCMetaSurfaceBytes = DCCMetaPitch * (dml_ceil(ViewportHeight - 1, 64 * BlockHeight256Bytes)
1798	+ 64 * BlockHeight256Bytes) * BytePerPixel / 256;
1799	if (GPUVMEnable == true1) {
1800	MetaPTEBytesFrame = (dml_ceil((double) (DCCMetaSurfaceBytes - 4.0 1024.0) / (8 * 4.0 * 1024), 1) + 1) * 64;
1801	MPDEBytesFrame = 128 * (mode_lib->vba.GPUVMMaxPageTableLevels - 1);
1802	} else {
1803	*MetaPTEBytesFrame = 0;
1804	MPDEBytesFrame = 0;
1805	}
1806
1807	if (DCCEnable != true1) {
1808	*MetaPTEBytesFrame = 0;
1809	MPDEBytesFrame = 0;
1810	*MetaRowByte = 0;
1811	}
1812
1813	if (SurfaceTiling == dm_sw_linear) {
1814	MacroTileSizeBytes = 256;
1815	MacroTileHeight = BlockHeight256Bytes;
1816	} else {
1817	MacroTileSizeBytes = 65536;
1818	MacroTileHeight = 16 * BlockHeight256Bytes;
1819	}
1820	*MacroTileWidth = MacroTileSizeBytes / BytePerPixel / MacroTileHeight;
1821
1822	if (GPUVMEnable == true1 && mode_lib->vba.GPUVMMaxPageTableLevels > 1) {
1823	if (ScanDirection != dm_vert) {
1824	DPDE0BytesFrame = 64 (dml_ceil(((Pitch * (dml_ceil(ViewportHeight - 1, MacroTileHeight) + MacroTileHeight) * BytePerPixel) - MacroTileSizeBytes) / (8 * 2097152), 1) + 1);
1825	} else {
1826	DPDE0BytesFrame = 64 (dml_ceil(((Pitch * (dml_ceil((double) SwathWidth - 1, MacroTileHeight) + MacroTileHeight) * BytePerPixel) - MacroTileSizeBytes) / (8 * 2097152), 1) + 1);
1827	}
1828	ExtraDPDEBytesFrame = 128 * (mode_lib->vba.GPUVMMaxPageTableLevels - 2);
1829	} else {
1830	*DPDE0BytesFrame = 0;
1831	ExtraDPDEBytesFrame = 0;
1832	}
1833
1834	PDEAndMetaPTEBytesFrame = MetaPTEBytesFrame + MPDEBytesFrame + DPDE0BytesFrame
1835	+ ExtraDPDEBytesFrame;
1836
1837	if (HostVMEnable == true1) {
1838	PDEAndMetaPTEBytesFrame = PDEAndMetaPTEBytesFrame * (1 + 8 * HostVMDynamicLevels);
1839	}
1840
1841	if (SurfaceTiling == dm_sw_linear) {
1842	PixelPTEReqHeightPTEs = 1;
1843	*PixelPTEReqHeight = 1;
1844	*PixelPTEReqWidth = 32768.0 / BytePerPixel;
1845	*PTERequestSize = 64;
1846	FractionOfPTEReturnDrop = 0;
1847	} else if (MacroTileSizeBytes == 4096) {
1848	PixelPTEReqHeightPTEs = 1;
1849	*PixelPTEReqHeight = MacroTileHeight;
1850	PixelPTEReqWidth = 8 *MacroTileWidth;
1851	*PTERequestSize = 64;
1852	if (ScanDirection != dm_vert)
1853	FractionOfPTEReturnDrop = 0;
1854	else
1855	FractionOfPTEReturnDrop = 7 / 8;
1856	} else if (GPUVMMinPageSize == 4 && MacroTileSizeBytes > 4096) {
1857	PixelPTEReqHeightPTEs = 16;
1858	PixelPTEReqHeight = 16 BlockHeight256Bytes;
1859	PixelPTEReqWidth = 16 BlockWidth256Bytes;
1860	*PTERequestSize = 128;
1861	FractionOfPTEReturnDrop = 0;
1862	} else {
1863	PixelPTEReqHeightPTEs = 1;
1864	*PixelPTEReqHeight = MacroTileHeight;
1865	PixelPTEReqWidth = 8 *MacroTileWidth;
1866	*PTERequestSize = 64;
1867	FractionOfPTEReturnDrop = 0;
1868	}
1869
1870	if (SurfaceTiling == dm_sw_linear) {
1871	dpte_row_height = dml_min(128, 1 << (unsigned int) dml_floor(dml_log2(PTEBufferSizeInRequests *PixelPTEReqWidth / Pitch), 1));
1872	dpte_row_width_ub = (dml_ceil(((double) SwathWidth - 1) / PixelPTEReqWidth, 1) + 1) * *PixelPTEReqWidth;
1873	PixelPTEBytesPerRow = dpte_row_width_ub / PixelPTEReqWidth *PTERequestSize;
1874	} else if (ScanDirection != dm_vert) {
1875	dpte_row_height = PixelPTEReqHeight;
1876	dpte_row_width_ub = (dml_ceil((double) (SwathWidth - 1) / PixelPTEReqWidth, 1) + 1) * *PixelPTEReqWidth;
1877	PixelPTEBytesPerRow = dpte_row_width_ub / PixelPTEReqWidth *PTERequestSize;
1878	} else {
1879	dpte_row_height = dml_min(PixelPTEReqWidth, *MacroTileWidth);
1880	dpte_row_width_ub = (dml_ceil((double) (SwathWidth - 1) / PixelPTEReqHeight, 1) + 1) * *PixelPTEReqHeight;
1881	PixelPTEBytesPerRow = dpte_row_width_ub / PixelPTEReqHeight *PTERequestSize;
1882	}
1883	if (PixelPTEBytesPerRow (1 - FractionOfPTEReturnDrop)
1884	<= 64 * PTEBufferSizeInRequests) {
1885	*PTEBufferSizeNotExceeded = true1;
1886	} else {
1887	*PTEBufferSizeNotExceeded = false0;
1888	}
1889
1890	if (GPUVMEnable != true1) {
1891	*PixelPTEBytesPerRow = 0;
1892	*PTEBufferSizeNotExceeded = true1;
1893	}
1894	dml_print("DML: vm_bytes = meta_pte_bytes_per_frame (per_pipe) = MetaPTEBytesFrame = : %i\n", *MetaPTEBytesFrame){do { } while(0); };
1895
1896	if (HostVMEnable == true1) {
1897	PixelPTEBytesPerRow = PixelPTEBytesPerRow * (1 + 8 * HostVMDynamicLevels);
1898	}
1899
1900	if (HostVMEnable == true1) {
1901	*vm_group_bytes = 512;
1902	*dpte_group_bytes = 512;
1903	} else if (GPUVMEnable == true1) {
1904	*vm_group_bytes = 2048;
1905	if (SurfaceTiling != dm_sw_linear && PixelPTEReqHeightPTEs == 1 && ScanDirection == dm_vert) {
1906	*dpte_group_bytes = 512;
1907	} else {
1908	*dpte_group_bytes = 2048;
1909	}
1910	} else {
1911	*vm_group_bytes = 0;
1912	*dpte_group_bytes = 0;
1913	}
1914
1915	return PDEAndMetaPTEBytesFrame;
1916	}
1917
1918	static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation(
1919	struct display_mode_lib *mode_lib)
1920	{
1921	struct vba_vars_st *v = &mode_lib->vba;
1922	unsigned int j, k;
1923	long ReorderBytes = 0;
1924	unsigned int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb];
1925	double MaxTotalRDBandwidth = 0;
1926	double MaxTotalRDBandwidthNoUrgentBurst = 0;
1927	bool_Bool DestinationLineTimesForPrefetchLessThan2 = false0;
1928	bool_Bool VRatioPrefetchMoreThan4 = false0;
1929	double TWait;
1930
1931	v->WritebackDISPCLK = 0.0;
1932	v->DISPCLKWithRamping = 0;
1933	v->DISPCLKWithoutRamping = 0;
1934	v->GlobalDPPCLK = 0.0;
1935	/* DAL custom code: need to update ReturnBW in case min dcfclk is overriden */
1936	v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] = dml_min3(
1937	v->ReturnBusWidth * v->DCFCLK,
1938	v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * v->DRAMChannelWidth,
1939	v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn);
1940	if (v->HostVMEnable != true1) {
1941	v->ReturnBW = v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] * v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly / 100;
1942	} else {
1943	v->ReturnBW = v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] * v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData / 100;
1944	}
1945	/* End DAL custom code */
1946
1947	// DISPCLK and DPPCLK Calculation
1948	//
1949	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
1950	if (v->WritebackEnable[k]) {
1951	v->WritebackDISPCLK = dml_max(v->WritebackDISPCLK,
1952	dml30_CalculateWriteBackDISPCLK(
1953	v->WritebackPixelFormat[k],
1954	v->PixelClock[k],
1955	v->WritebackHRatio[k],
1956	v->WritebackVRatio[k],
1957	v->WritebackHTaps[k],
1958	v->WritebackVTaps[k],
1959	v->WritebackSourceWidth[k],
1960	v->WritebackDestinationWidth[k],
1961	v->HTotal[k],
1962	v->WritebackLineBufferSize));
1963	}
1964	}
1965
1966	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
1967	if (v->HRatio[k] > 1) {
1968	v->PSCL_THROUGHPUT_LUMA[k] = dml_min(v->MaxDCHUBToPSCLThroughput,
1969	v->MaxPSCLToLBThroughput * v->HRatio[k] / dml_ceil(v->htaps[k] / 6.0, 1));
1970	} else {
1971	v->PSCL_THROUGHPUT_LUMA[k] = dml_min(
1972	v->MaxDCHUBToPSCLThroughput,
1973	v->MaxPSCLToLBThroughput);
1974	}
1975
1976	v->DPPCLKUsingSingleDPPLuma = v->PixelClock[k]
1977	* dml_max(v->vtaps[k] / 6.0 * dml_min(1.0, v->HRatio[k]),
1978	dml_max(v->HRatio[k] * v->VRatio[k] / v->PSCL_THROUGHPUT_LUMA[k], 1.0));
1979
1980	if ((v->htaps[k] > 6 \|\| v->vtaps[k] > 6)
1981	&& v->DPPCLKUsingSingleDPPLuma < 2 * v->PixelClock[k]) {
1982	v->DPPCLKUsingSingleDPPLuma = 2 * v->PixelClock[k];
1983	}
1984
1985	if ((v->SourcePixelFormat[k] != dm_420_8
1986	&& v->SourcePixelFormat[k] != dm_420_10
1987	&& v->SourcePixelFormat[k] != dm_420_12
1988	&& v->SourcePixelFormat[k] != dm_rgbe_alpha)) {
1989	v->PSCL_THROUGHPUT_CHROMA[k] = 0.0;
1990	v->DPPCLKUsingSingleDPP[k] = v->DPPCLKUsingSingleDPPLuma;
1991	} else {
1992	if (v->HRatioChroma[k] > 1) {
1993	v->PSCL_THROUGHPUT_CHROMA[k] = dml_min(v->MaxDCHUBToPSCLThroughput,
1994	v->MaxPSCLToLBThroughput * v->HRatioChroma[k] / dml_ceil(v->HTAPsChroma[k] / 6.0, 1.0));
1995	} else {
1996	v->PSCL_THROUGHPUT_CHROMA[k] = dml_min(
1997	v->MaxDCHUBToPSCLThroughput,
1998	v->MaxPSCLToLBThroughput);
1999	}
2000	v->DPPCLKUsingSingleDPPChroma = v->PixelClock[k]
2001	* dml_max3(v->VTAPsChroma[k] / 6.0 * dml_min(1.0, v->HRatioChroma[k]),
2002	v->HRatioChroma[k] * v->VRatioChroma[k] / v->PSCL_THROUGHPUT_CHROMA[k], 1.0);
2003
2004	if ((v->HTAPsChroma[k] > 6 \|\| v->VTAPsChroma[k] > 6)
2005	&& v->DPPCLKUsingSingleDPPChroma
2006	< 2 * v->PixelClock[k]) {
2007	v->DPPCLKUsingSingleDPPChroma = 2
2008	* v->PixelClock[k];
2009	}
2010
2011	v->DPPCLKUsingSingleDPP[k] = dml_max(
2012	v->DPPCLKUsingSingleDPPLuma,
2013	v->DPPCLKUsingSingleDPPChroma);
2014	}
2015	}
2016
2017	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2018	if (v->BlendingAndTiming[k] != k)
2019	continue;
2020	if (v->ODMCombineEnabled[k] == dm_odm_combine_mode_4to1) {
2021	v->DISPCLKWithRamping = dml_max(v->DISPCLKWithRamping,
2022	v->PixelClock[k] / 4 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100)
2023	* (1 + v->DISPCLKRampingMargin / 100));
2024	v->DISPCLKWithoutRamping = dml_max(v->DISPCLKWithoutRamping,
2025	v->PixelClock[k] / 4 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100));
2026	} else if (v->ODMCombineEnabled[k] == dm_odm_combine_mode_2to1) {
2027	v->DISPCLKWithRamping = dml_max(v->DISPCLKWithRamping,
2028	v->PixelClock[k] / 2 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100)
2029	* (1 + v->DISPCLKRampingMargin / 100));
2030	v->DISPCLKWithoutRamping = dml_max(v->DISPCLKWithoutRamping,
2031	v->PixelClock[k] / 2 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100));
2032	} else {
2033	v->DISPCLKWithRamping = dml_max(v->DISPCLKWithRamping,
2034	v->PixelClock[k] * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100)
2035	* (1 + v->DISPCLKRampingMargin / 100));
2036	v->DISPCLKWithoutRamping = dml_max(v->DISPCLKWithoutRamping,
2037	v->PixelClock[k] * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100));
2038	}
2039	}
2040
2041	v->DISPCLKWithRamping = dml_max(
2042	v->DISPCLKWithRamping,
2043	v->WritebackDISPCLK);
2044	v->DISPCLKWithoutRamping = dml_max(
2045	v->DISPCLKWithoutRamping,
2046	v->WritebackDISPCLK);
2047
2048	ASSERT(v->DISPCLKDPPCLKVCOSpeed != 0)do { if (({ static int __warned; int __ret = !!(!(v->DISPCLKDPPCLKVCOSpeed != 0)); if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n" , "!(v->DISPCLKDPPCLKVCOSpeed != 0)", "/usr/src/sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c" , 2048); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do {} while (0); } while (0);
2049	v->DISPCLKWithRampingRoundedToDFSGranularity = RoundToDFSGranularityUp(
2050	v->DISPCLKWithRamping,
2051	v->DISPCLKDPPCLKVCOSpeed);
2052	v->DISPCLKWithoutRampingRoundedToDFSGranularity = RoundToDFSGranularityUp(
2053	v->DISPCLKWithoutRamping,
2054	v->DISPCLKDPPCLKVCOSpeed);
2055	v->MaxDispclkRoundedToDFSGranularity = RoundToDFSGranularityDown(
2056	v->soc.clock_limits[mode_lib->soc.num_states - 1].dispclk_mhz,
2057	v->DISPCLKDPPCLKVCOSpeed);
2058	if (v->DISPCLKWithoutRampingRoundedToDFSGranularity
2059	> v->MaxDispclkRoundedToDFSGranularity) {
2060	v->DISPCLK_calculated =
2061	v->DISPCLKWithoutRampingRoundedToDFSGranularity;
2062	} else if (v->DISPCLKWithRampingRoundedToDFSGranularity
2063	> v->MaxDispclkRoundedToDFSGranularity) {
2064	v->DISPCLK_calculated = v->MaxDispclkRoundedToDFSGranularity;
2065	} else {
2066	v->DISPCLK_calculated =
2067	v->DISPCLKWithRampingRoundedToDFSGranularity;
2068	}
2069	v->DISPCLK = v->DISPCLK_calculated;
2070	DTRACE(" dispclk_mhz (calculated) = %f", v->DISPCLK_calculated){do { } while(0); };
2071
2072	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2073	v->DPPCLK_calculated[k] = v->DPPCLKUsingSingleDPP[k]
2074	/ v->DPPPerPlane[k]
2075	* (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100);
2076	v->GlobalDPPCLK = dml_max(
2077	v->GlobalDPPCLK,
2078	v->DPPCLK_calculated[k]);
2079	}
2080	v->GlobalDPPCLK = RoundToDFSGranularityUp(
2081	v->GlobalDPPCLK,
2082	v->DISPCLKDPPCLKVCOSpeed);
2083	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2084	v->DPPCLK_calculated[k] = v->GlobalDPPCLK / 255
2085	* dml_ceil(
2086	v->DPPCLK_calculated[k] * 255.0
2087	/ v->GlobalDPPCLK,
2088	1);
2089	DTRACE(" dppclk_mhz[%i] (calculated) = %f", k, v->DPPCLK_calculated[k]){do { } while(0); };
2090	v->DPPCLK[k] = v->DPPCLK_calculated[k];
2091	}
2092
2093	// Urgent and B P-State/DRAM Clock Change Watermark
2094	DTRACE(" dcfclk_mhz = %f", v->DCFCLK){do { } while(0); };
2095	DTRACE(" return_bus_bw = %f", v->ReturnBW){do { } while(0); };
2096
2097	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2098	CalculateBytePerPixelAnd256BBlockSizes(
2099	v->SourcePixelFormat[k],
2100	v->SurfaceTiling[k],
2101	&v->BytePerPixelY[k],
2102	&v->BytePerPixelC[k],
2103	&v->BytePerPixelDETY[k],
2104	&v->BytePerPixelDETC[k],
2105	&v->BlockHeight256BytesY[k],
2106	&v->BlockHeight256BytesC[k],
2107	&v->BlockWidth256BytesY[k],
2108	&v->BlockWidth256BytesC[k]);
2109	}
2110
2111	CalculateSwathWidth(
2112	false0,
2113	v->NumberOfActivePlanes,
2114	v->SourcePixelFormat,
2115	v->SourceScan,
2116	v->ViewportWidth,
2117	v->ViewportHeight,
2118	v->SurfaceWidthY,
2119	v->SurfaceWidthC,
2120	v->SurfaceHeightY,
2121	v->SurfaceHeightC,
2122	v->ODMCombineEnabled,
2123	v->BytePerPixelY,
2124	v->BytePerPixelC,
2125	v->BlockHeight256BytesY,
2126	v->BlockHeight256BytesC,
2127	v->BlockWidth256BytesY,
2128	v->BlockWidth256BytesC,
2129	v->BlendingAndTiming,
2130	v->HActive,
2131	v->HRatio,
2132	v->DPPPerPlane,
2133	v->SwathWidthSingleDPPY,
2134	v->SwathWidthSingleDPPC,
2135	v->SwathWidthY,
2136	v->SwathWidthC,
2137	v->dummyinteger3,
2138	v->dummyinteger4,
2139	v->swath_width_luma_ub,
2140	v->swath_width_chroma_ub);
2141
2142
2143	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2144	v->ReadBandwidthPlaneLuma[k] = v->SwathWidthSingleDPPY[k] * v->BytePerPixelY[k] / (v->HTotal[k] / v->PixelClock[k]) * v->VRatio[k];
2145	v->ReadBandwidthPlaneChroma[k] = v->SwathWidthSingleDPPC[k] * v->BytePerPixelC[k] / (v->HTotal[k] / v->PixelClock[k]) * v->VRatioChroma[k];
2146	DTRACE("read_bw[%i] = %fBps", k, v->ReadBandwidthPlaneLuma[k] + v->ReadBandwidthPlaneChroma[k]){do { } while(0); };
2147	}
2148
2149
2150	// DCFCLK Deep Sleep
2151	CalculateDCFCLKDeepSleep(
2152	mode_lib,
2153	v->NumberOfActivePlanes,
2154	v->BytePerPixelY,
2155	v->BytePerPixelC,
2156	v->VRatio,
2157	v->VRatioChroma,
2158	v->SwathWidthY,
2159	v->SwathWidthC,
2160	v->DPPPerPlane,
2161	v->HRatio,
2162	v->HRatioChroma,
2163	v->PixelClock,
2164	v->PSCL_THROUGHPUT_LUMA,
2165	v->PSCL_THROUGHPUT_CHROMA,
2166	v->DPPCLK,
2167	v->ReadBandwidthPlaneLuma,
2168	v->ReadBandwidthPlaneChroma,
2169	v->ReturnBusWidth,
2170	&v->DCFCLKDeepSleep);
2171
2172	// DSCCLK
2173	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2174	if ((v->BlendingAndTiming[k] != k) \|\| !v->DSCEnabled[k]) {
2175	v->DSCCLK_calculated[k] = 0.0;
2176	} else {
2177	if (v->OutputFormat[k] == dm_420)
2178	v->DSCFormatFactor = 2;
2179	else if (v->OutputFormat[k] == dm_444)
2180	v->DSCFormatFactor = 1;
2181	else if (v->OutputFormat[k] == dm_n422)
2182	v->DSCFormatFactor = 2;
2183	else
2184	v->DSCFormatFactor = 1;
2185	if (v->ODMCombineEnabled[k] == dm_odm_combine_mode_4to1)
2186	v->DSCCLK_calculated[k] = v->PixelClockBackEnd[k] / 12
2187	/ v->DSCFormatFactor / (1 - v->DISPCLKDPPCLKDSCCLKDownSpreading / 100);
2188	else if (v->ODMCombineEnabled[k] == dm_odm_combine_mode_2to1)
2189	v->DSCCLK_calculated[k] = v->PixelClockBackEnd[k] / 6
2190	/ v->DSCFormatFactor / (1 - v->DISPCLKDPPCLKDSCCLKDownSpreading / 100);
2191	else
2192	v->DSCCLK_calculated[k] = v->PixelClockBackEnd[k] / 3
2193	/ v->DSCFormatFactor / (1 - v->DISPCLKDPPCLKDSCCLKDownSpreading / 100);
2194	}
2195	}
2196
2197	// DSC Delay
2198	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2199	double BPP = v->OutputBppPerState[k][v->VoltageLevel];
2200
2201	if (v->DSCEnabled[k] && BPP != 0) {
2202	if (v->ODMCombineEnabled[k] == dm_odm_combine_mode_disabled) {
2203	v->DSCDelay[k] = dscceComputeDelay(v->DSCInputBitPerComponent[k],
2204	BPP,
2205	dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1),
2206	v->NumberOfDSCSlices[k],
2207	v->OutputFormat[k],
2208	v->Output[k])
2209	+ dscComputeDelay(v->OutputFormat[k], v->Output[k]);
2210	} else if (v->ODMCombineEnabled[k] == dm_odm_combine_mode_2to1) {
2211	v->DSCDelay[k] = 2 * dscceComputeDelay(v->DSCInputBitPerComponent[k],
2212	BPP,
2213	dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1),
2214	v->NumberOfDSCSlices[k] / 2.0,
2215	v->OutputFormat[k],
2216	v->Output[k])
2217	+ dscComputeDelay(v->OutputFormat[k], v->Output[k]);
2218	} else {
2219	v->DSCDelay[k] = 4 * dscceComputeDelay(v->DSCInputBitPerComponent[k],
2220	BPP,
2221	dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1),
2222	v->NumberOfDSCSlices[k] / 4.0,
2223	v->OutputFormat[k],
2224	v->Output[k])
2225	+ dscComputeDelay(v->OutputFormat[k], v->Output[k]);
2226	}
2227	v->DSCDelay[k] = v->DSCDelay[k] * v->PixelClock[k] / v->PixelClockBackEnd[k];
2228	} else {
2229	v->DSCDelay[k] = 0;
2230	}
2231	}
2232
2233	for (k = 0; k < v->NumberOfActivePlanes; ++k)
2234	for (j = 0; j < v->NumberOfActivePlanes; ++j) // NumberOfPlanes
2235	if (j != k && v->BlendingAndTiming[k] == j
2236	&& v->DSCEnabled[j])
2237	v->DSCDelay[k] = v->DSCDelay[j];
2238
2239	// Prefetch
2240	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2241	unsigned int PDEAndMetaPTEBytesFrameY = 0;
2242	unsigned int PixelPTEBytesPerRowY = 0;
2243	unsigned int MetaRowByteY = 0;
2244	unsigned int MetaRowByteC = 0;
2245	unsigned int PDEAndMetaPTEBytesFrameC = 0;
2246	unsigned int PixelPTEBytesPerRowC = 0;
2247	bool_Bool PTEBufferSizeNotExceededY = 0;
2248	bool_Bool PTEBufferSizeNotExceededC = 0;
2249
2250
2251	if (v->SourcePixelFormat[k] == dm_420_8 \|\| v->SourcePixelFormat[k] == dm_420_10 \|\| v->SourcePixelFormat[k] == dm_420_12 \|\| v->SourcePixelFormat[k] == dm_rgbe_alpha) {
2252	if ((v->SourcePixelFormat[k] == dm_420_10 \|\| v->SourcePixelFormat[k] == dm_420_12) && v->SourceScan[k] != dm_vert) {
2253	v->PTEBufferSizeInRequestsForLuma = (v->PTEBufferSizeInRequestsLuma + v->PTEBufferSizeInRequestsChroma) / 2;
2254	v->PTEBufferSizeInRequestsForChroma = v->PTEBufferSizeInRequestsForLuma;
2255	} else {
2256	v->PTEBufferSizeInRequestsForLuma = v->PTEBufferSizeInRequestsLuma;
2257	v->PTEBufferSizeInRequestsForChroma = v->PTEBufferSizeInRequestsChroma;
2258
2259	}
2260	PDEAndMetaPTEBytesFrameC = CalculateVMAndRowBytes(
2261	mode_lib,
2262	v->DCCEnable[k],
2263	v->BlockHeight256BytesC[k],
2264	v->BlockWidth256BytesC[k],
2265	v->SourcePixelFormat[k],
2266	v->SurfaceTiling[k],
2267	v->BytePerPixelC[k],
2268	v->SourceScan[k],
2269	v->SwathWidthC[k],
2270	v->ViewportHeightChroma[k],
2271	v->GPUVMEnable,
2272	v->HostVMEnable,
2273	v->HostVMMaxNonCachedPageTableLevels,
2274	v->GPUVMMinPageSize,
2275	v->HostVMMinPageSize,
2276	v->PTEBufferSizeInRequestsForChroma,
2277	v->PitchC[k],
2278	v->DCCMetaPitchC[k],
2279	&v->MacroTileWidthC[k],
2280	&MetaRowByteC,
2281	&PixelPTEBytesPerRowC,
2282	&PTEBufferSizeNotExceededC,
2283	&v->dpte_row_width_chroma_ub[k],
2284	&v->dpte_row_height_chroma[k],
2285	&v->meta_req_width_chroma[k],
2286	&v->meta_req_height_chroma[k],
2287	&v->meta_row_width_chroma[k],
2288	&v->meta_row_height_chroma[k],
2289	&v->dummyinteger1,
2290	&v->dummyinteger2,
2291	&v->PixelPTEReqWidthC[k],
2292	&v->PixelPTEReqHeightC[k],
2293	&v->PTERequestSizeC[k],
2294	&v->dpde0_bytes_per_frame_ub_c[k],
2295	&v->meta_pte_bytes_per_frame_ub_c[k]);
2296
2297	v->PrefetchSourceLinesC[k] = CalculatePrefetchSourceLines(
2298	mode_lib,
2299	v->VRatioChroma[k],
2300	v->VTAPsChroma[k],
2301	v->Interlace[k],
2302	v->ProgressiveToInterlaceUnitInOPP,
2303	v->SwathHeightC[k],
2304	v->ViewportYStartC[k],
2305	&v->VInitPreFillC[k],
2306	&v->MaxNumSwathC[k]);
2307	} else {
2308	v->PTEBufferSizeInRequestsForLuma = v->PTEBufferSizeInRequestsLuma + v->PTEBufferSizeInRequestsChroma;
2309	v->PTEBufferSizeInRequestsForChroma = 0;
2310	PixelPTEBytesPerRowC = 0;
2311	PDEAndMetaPTEBytesFrameC = 0;
2312	MetaRowByteC = 0;
2313	v->MaxNumSwathC[k] = 0;
2314	v->PrefetchSourceLinesC[k] = 0;
2315	}
2316
2317	PDEAndMetaPTEBytesFrameY = CalculateVMAndRowBytes(
2318	mode_lib,
2319	v->DCCEnable[k],
2320	v->BlockHeight256BytesY[k],
2321	v->BlockWidth256BytesY[k],
2322	v->SourcePixelFormat[k],
2323	v->SurfaceTiling[k],
2324	v->BytePerPixelY[k],
2325	v->SourceScan[k],
2326	v->SwathWidthY[k],
2327	v->ViewportHeight[k],
2328	v->GPUVMEnable,
2329	v->HostVMEnable,
2330	v->HostVMMaxNonCachedPageTableLevels,
2331	v->GPUVMMinPageSize,
2332	v->HostVMMinPageSize,
2333	v->PTEBufferSizeInRequestsForLuma,
2334	v->PitchY[k],
2335	v->DCCMetaPitchY[k],
2336	&v->MacroTileWidthY[k],
2337	&MetaRowByteY,
2338	&PixelPTEBytesPerRowY,
2339	&PTEBufferSizeNotExceededY,
2340	&v->dpte_row_width_luma_ub[k],
2341	&v->dpte_row_height[k],
2342	&v->meta_req_width[k],
2343	&v->meta_req_height[k],
2344	&v->meta_row_width[k],
2345	&v->meta_row_height[k],
2346	&v->vm_group_bytes[k],
2347	&v->dpte_group_bytes[k],
2348	&v->PixelPTEReqWidthY[k],
2349	&v->PixelPTEReqHeightY[k],
2350	&v->PTERequestSizeY[k],
2351	&v->dpde0_bytes_per_frame_ub_l[k],
2352	&v->meta_pte_bytes_per_frame_ub_l[k]);
2353
2354	v->PrefetchSourceLinesY[k] = CalculatePrefetchSourceLines(
2355	mode_lib,
2356	v->VRatio[k],
2357	v->vtaps[k],
2358	v->Interlace[k],
2359	v->ProgressiveToInterlaceUnitInOPP,
2360	v->SwathHeightY[k],
2361	v->ViewportYStartY[k],
2362	&v->VInitPreFillY[k],
2363	&v->MaxNumSwathY[k]);
2364	v->PixelPTEBytesPerRow[k] = PixelPTEBytesPerRowY + PixelPTEBytesPerRowC;
2365	v->PDEAndMetaPTEBytesFrame[k] = PDEAndMetaPTEBytesFrameY
2366	+ PDEAndMetaPTEBytesFrameC;
2367	v->MetaRowByte[k] = MetaRowByteY + MetaRowByteC;
2368
2369	CalculateRowBandwidth(
2370	v->GPUVMEnable,
2371	v->SourcePixelFormat[k],
2372	v->VRatio[k],
2373	v->VRatioChroma[k],
2374	v->DCCEnable[k],
2375	v->HTotal[k] / v->PixelClock[k],
2376	MetaRowByteY,
2377	MetaRowByteC,
2378	v->meta_row_height[k],
2379	v->meta_row_height_chroma[k],
2380	PixelPTEBytesPerRowY,
2381	PixelPTEBytesPerRowC,
2382	v->dpte_row_height[k],
2383	v->dpte_row_height_chroma[k],
2384	&v->meta_row_bw[k],
2385	&v->dpte_row_bw[k]);
2386	}
2387
2388	v->TotalDCCActiveDPP = 0;
2389	v->TotalActiveDPP = 0;
2390	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2391	v->TotalActiveDPP = v->TotalActiveDPP
2392	+ v->DPPPerPlane[k];
2393	if (v->DCCEnable[k])
2394	v->TotalDCCActiveDPP = v->TotalDCCActiveDPP
2395	+ v->DPPPerPlane[k];
2396	}
2397
2398
2399	ReorderBytes = v->NumberOfChannels * dml_max3(
2400	v->UrgentOutOfOrderReturnPerChannelPixelDataOnly,
2401	v->UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData,
2402	v->UrgentOutOfOrderReturnPerChannelVMDataOnly);
2403
2404	v->UrgentExtraLatency = CalculateExtraLatency(
2405	v->RoundTripPingLatencyCycles,
2406	ReorderBytes,
2407	v->DCFCLK,
2408	v->TotalActiveDPP,
2409	v->PixelChunkSizeInKByte,
2410	v->TotalDCCActiveDPP,
2411	v->MetaChunkSize,
2412	v->ReturnBW,
2413	v->GPUVMEnable,
2414	v->HostVMEnable,
2415	v->NumberOfActivePlanes,
2416	v->DPPPerPlane,
2417	v->dpte_group_bytes,
2418	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
2419	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
2420	v->HostVMMinPageSize,
2421	v->HostVMMaxNonCachedPageTableLevels);
2422
2423	v->TCalc = 24.0 / v->DCFCLKDeepSleep;
2424
2425	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2426	if (v->BlendingAndTiming[k] == k) {
2427	if (v->WritebackEnable[k] == true1) {
2428	v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency +
2429	CalculateWriteBackDelay(v->WritebackPixelFormat[k],
2430	v->WritebackHRatio[k],
2431	v->WritebackVRatio[k],
2432	v->WritebackVTaps[k],
2433	v->WritebackDestinationWidth[k],
2434	v->WritebackDestinationHeight[k],
2435	v->WritebackSourceHeight[k],
2436	v->HTotal[k]) / v->DISPCLK;
2437	} else
2438	v->WritebackDelay[v->VoltageLevel][k] = 0;
2439	for (j = 0; j < v->NumberOfActivePlanes; ++j) {
2440	if (v->BlendingAndTiming[j] == k
2441	&& v->WritebackEnable[j] == true1) {
2442	v->WritebackDelay[v->VoltageLevel][k] = dml_max(v->WritebackDelay[v->VoltageLevel][k],
2443	v->WritebackLatency + CalculateWriteBackDelay(
2444	v->WritebackPixelFormat[j],
2445	v->WritebackHRatio[j],
2446	v->WritebackVRatio[j],
2447	v->WritebackVTaps[j],
2448	v->WritebackDestinationWidth[j],
2449	v->WritebackDestinationHeight[j],
2450	v->WritebackSourceHeight[j],
2451	v->HTotal[k]) / v->DISPCLK);
2452	}
2453	}
2454	}
2455	}
2456
2457	for (k = 0; k < v->NumberOfActivePlanes; ++k)
2458	for (j = 0; j < v->NumberOfActivePlanes; ++j)
2459	if (v->BlendingAndTiming[k] == j)
2460	v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j];
2461
2462	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2463	v->MaxVStartupLines[k] = v->VTotal[k] - v->VActive[k] - dml_max(1.0, dml_ceil((double) v->WritebackDelay[v->VoltageLevel][k] / (v->HTotal[k] / v->PixelClock[k]), 1));
2464	}
2465
2466	v->MaximumMaxVStartupLines = 0;
2467	for (k = 0; k < v->NumberOfActivePlanes; ++k)
2468	v->MaximumMaxVStartupLines = dml_max(v->MaximumMaxVStartupLines, v->MaxVStartupLines[k]);
2469
2470	if (v->DRAMClockChangeLatencyOverride > 0.0) {
2471	v->FinalDRAMClockChangeLatency = v->DRAMClockChangeLatencyOverride;
2472	} else {
2473	v->FinalDRAMClockChangeLatency = v->DRAMClockChangeLatency;
2474	}
2475	v->UrgentLatency = CalculateUrgentLatency(v->UrgentLatencyPixelDataOnly, v->UrgentLatencyPixelMixedWithVMData, v->UrgentLatencyVMDataOnly, v->DoUrgentLatencyAdjustment, v->UrgentLatencyAdjustmentFabricClockComponent, v->UrgentLatencyAdjustmentFabricClockReference, v->FabricClock);
2476
2477
2478	v->FractionOfUrgentBandwidth = 0.0;
2479	v->FractionOfUrgentBandwidthImmediateFlip = 0.0;
2480
2481	v->VStartupLines = 13;
2482
2483	do {
2484	MaxTotalRDBandwidth = 0;
2485	MaxTotalRDBandwidthNoUrgentBurst = 0;
2486	DestinationLineTimesForPrefetchLessThan2 = false0;
2487	VRatioPrefetchMoreThan4 = false0;
2488	TWait = CalculateTWait(
2489	PrefetchMode,
2490	v->FinalDRAMClockChangeLatency,
2491	v->UrgentLatency,
2492	v->SREnterPlusExitTime);
2493
2494	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2495	Pipe myPipe = { 0 };
2496
2497	myPipe.DPPCLK = v->DPPCLK[k];
2498	myPipe.DISPCLK = v->DISPCLK;
2499	myPipe.PixelClock = v->PixelClock[k];
2500	myPipe.DCFCLKDeepSleep = v->DCFCLKDeepSleep;
2501	myPipe.DPPPerPlane = v->DPPPerPlane[k];
2502	myPipe.ScalerEnabled = v->ScalerEnabled[k];
2503	myPipe.SourceScan = v->SourceScan[k];
2504	myPipe.BlockWidth256BytesY = v->BlockWidth256BytesY[k];
2505	myPipe.BlockHeight256BytesY = v->BlockHeight256BytesY[k];
2506	myPipe.BlockWidth256BytesC = v->BlockWidth256BytesC[k];
2507	myPipe.BlockHeight256BytesC = v->BlockHeight256BytesC[k];
2508	myPipe.InterlaceEnable = v->Interlace[k];
2509	myPipe.NumberOfCursors = v->NumberOfCursors[k];
2510	myPipe.VBlank = v->VTotal[k] - v->VActive[k];
2511	myPipe.HTotal = v->HTotal[k];
2512	myPipe.DCCEnable = v->DCCEnable[k];
2513	myPipe.ODMCombineEnabled = !!v->ODMCombineEnabled[k];
2514
2515	v->ErrorResult[k] = CalculatePrefetchSchedule(
2516	mode_lib,
2517	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
2518	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
2519	&myPipe,
2520	v->DSCDelay[k],
2521	v->DPPCLKDelaySubtotal
2522	+ v->DPPCLKDelayCNVCFormater,
2523	v->DPPCLKDelaySCL,
2524	v->DPPCLKDelaySCLLBOnly,
2525	v->DPPCLKDelayCNVCCursor,
2526	v->DISPCLKDelaySubtotal,
2527	(unsigned int) (v->SwathWidthY[k] / v->HRatio[k]),
2528	v->OutputFormat[k],
2529	v->MaxInterDCNTileRepeaters,
2530	dml_min(v->VStartupLines, v->MaxVStartupLines[k]),
2531	v->MaxVStartupLines[k],
2532	v->GPUVMMaxPageTableLevels,
2533	v->GPUVMEnable,
2534	v->HostVMEnable,
2535	v->HostVMMaxNonCachedPageTableLevels,
2536	v->HostVMMinPageSize,
2537	v->DynamicMetadataEnable[k],
2538	v->DynamicMetadataVMEnabled,
2539	v->DynamicMetadataLinesBeforeActiveRequired[k],
2540	v->DynamicMetadataTransmittedBytes[k],
2541	v->UrgentLatency,
2542	v->UrgentExtraLatency,
2543	v->TCalc,
2544	v->PDEAndMetaPTEBytesFrame[k],
2545	v->MetaRowByte[k],
2546	v->PixelPTEBytesPerRow[k],
2547	v->PrefetchSourceLinesY[k],
2548	v->SwathWidthY[k],
2549	v->BytePerPixelY[k],
2550	v->VInitPreFillY[k],
2551	v->MaxNumSwathY[k],
2552	v->PrefetchSourceLinesC[k],
2553	v->SwathWidthC[k],
2554	v->BytePerPixelC[k],
2555	v->VInitPreFillC[k],
2556	v->MaxNumSwathC[k],
2557	v->swath_width_luma_ub[k],
2558	v->swath_width_chroma_ub[k],
2559	v->SwathHeightY[k],
2560	v->SwathHeightC[k],
2561	TWait,
2562	v->ProgressiveToInterlaceUnitInOPP,
2563	&v->DSTXAfterScaler[k],
2564	&v->DSTYAfterScaler[k],
2565	&v->DestinationLinesForPrefetch[k],
2566	&v->PrefetchBandwidth[k],
2567	&v->DestinationLinesToRequestVMInVBlank[k],
2568	&v->DestinationLinesToRequestRowInVBlank[k],
2569	&v->VRatioPrefetchY[k],
2570	&v->VRatioPrefetchC[k],
2571	&v->RequiredPrefetchPixDataBWLuma[k],
2572	&v->RequiredPrefetchPixDataBWChroma[k],
2573	&v->NotEnoughTimeForDynamicMetadata[k],
2574	&v->Tno_bw[k],
2575	&v->prefetch_vmrow_bw[k],
2576	&v->Tdmdl_vm[k],
2577	&v->Tdmdl[k],
2578	&v->VUpdateOffsetPix[k],
2579	&v->VUpdateWidthPix[k],
2580	&v->VReadyOffsetPix[k]);
2581	if (v->BlendingAndTiming[k] == k) {
2582	double TotalRepeaterDelayTime = v->MaxInterDCNTileRepeaters * (2 / v->DPPCLK[k] + 3 / v->DISPCLK);
2583	v->VUpdateWidthPix[k] = (14 / v->DCFCLKDeepSleep + 12 / v->DPPCLK[k] + TotalRepeaterDelayTime) * v->PixelClock[k];
2584	v->VReadyOffsetPix[k] = dml_max(150.0 / v->DPPCLK[k], TotalRepeaterDelayTime + 20 / v->DCFCLKDeepSleep + 10 / v->DPPCLK[k]) * v->PixelClock[k];
2585	v->VUpdateOffsetPix[k] = dml_ceil(v->HTotal[k] / 4.0, 1);
2586	v->VStartup[k] = dml_min(v->VStartupLines, v->MaxVStartupLines[k]);
2587	} else {
2588	int x = v->BlendingAndTiming[k];
2589	double TotalRepeaterDelayTime = v->MaxInterDCNTileRepeaters * (2 / v->DPPCLK[k] + 3 / v->DISPCLK);
2590	v->VUpdateWidthPix[k] = (14 / v->DCFCLKDeepSleep + 12 / v->DPPCLK[k] + TotalRepeaterDelayTime) * v->PixelClock[x];
2591	v->VReadyOffsetPix[k] = dml_max(150.0 / v->DPPCLK[k], TotalRepeaterDelayTime + 20 / v->DCFCLKDeepSleep + 10 / v->DPPCLK[k]) * v->PixelClock[x];
2592	v->VUpdateOffsetPix[k] = dml_ceil(v->HTotal[x] / 4.0, 1);
2593	if (!v->MaxVStartupLines[x])
2594	v->MaxVStartupLines[x] = v->MaxVStartupLines[k];
2595	v->VStartup[k] = dml_min(v->VStartupLines, v->MaxVStartupLines[x]);
2596	}
2597	}
2598
2599	v->NotEnoughUrgentLatencyHiding = false0;
2600	v->NotEnoughUrgentLatencyHidingPre = false0;
2601
2602	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2603	v->cursor_bw[k] = v->NumberOfCursors[k]
2604	* v->CursorWidth[k][0] * v->CursorBPP[k][0]
2605	/ 8.0
2606	/ (v->HTotal[k] / v->PixelClock[k])
2607	* v->VRatio[k];
2608	v->cursor_bw_pre[k] = v->NumberOfCursors[k]
2609	* v->CursorWidth[k][0] * v->CursorBPP[k][0]
2610	/ 8.0
2611	/ (v->HTotal[k] / v->PixelClock[k])
2612	* v->VRatioPrefetchY[k];
2613
2614	CalculateUrgentBurstFactor(
2615	v->swath_width_luma_ub[k],
2616	v->swath_width_chroma_ub[k],
2617	v->DETBufferSizeInKByte,
2618	v->SwathHeightY[k],
2619	v->SwathHeightC[k],
2620	v->HTotal[k] / v->PixelClock[k],
2621	v->UrgentLatency,
2622	v->CursorBufferSize,
2623	v->CursorWidth[k][0],
2624	v->CursorBPP[k][0],
2625	v->VRatio[k],
2626	v->VRatioChroma[k],
2627	v->BytePerPixelDETY[k],
2628	v->BytePerPixelDETC[k],
2629	v->DETBufferSizeY[k],
2630	v->DETBufferSizeC[k],
2631	&v->UrgentBurstFactorCursor[k],
2632	&v->UrgentBurstFactorLuma[k],
2633	&v->UrgentBurstFactorChroma[k],
2634	&v->NoUrgentLatencyHiding[k]);
2635
2636	CalculateUrgentBurstFactor(
2637	v->swath_width_luma_ub[k],
2638	v->swath_width_chroma_ub[k],
2639	v->DETBufferSizeInKByte,
2640	v->SwathHeightY[k],
2641	v->SwathHeightC[k],
2642	v->HTotal[k] / v->PixelClock[k],
2643	v->UrgentLatency,
2644	v->CursorBufferSize,
2645	v->CursorWidth[k][0],
2646	v->CursorBPP[k][0],
2647	v->VRatioPrefetchY[k],
2648	v->VRatioPrefetchC[k],
2649	v->BytePerPixelDETY[k],
2650	v->BytePerPixelDETC[k],
2651	v->DETBufferSizeY[k],
2652	v->DETBufferSizeC[k],
2653	&v->UrgentBurstFactorCursorPre[k],
2654	&v->UrgentBurstFactorLumaPre[k],
2655	&v->UrgentBurstFactorChromaPre[k],
2656	&v->NoUrgentLatencyHidingPre[k]);
2657
2658	MaxTotalRDBandwidth = MaxTotalRDBandwidth +
2659	dml_max3(v->DPPPerPlane[k] * v->prefetch_vmrow_bw[k],
2660	v->ReadBandwidthPlaneLuma[k] *
2661	v->UrgentBurstFactorLuma[k] +
2662	v->ReadBandwidthPlaneChroma[k] *
2663	v->UrgentBurstFactorChroma[k] +
2664	v->cursor_bw[k] *
2665	v->UrgentBurstFactorCursor[k] +
2666	v->DPPPerPlane[k] * (v->meta_row_bw[k] + v->dpte_row_bw[k]),
2667	v->DPPPerPlane[k] * (v->RequiredPrefetchPixDataBWLuma[k] * v->UrgentBurstFactorLumaPre[k] +
2668	v->RequiredPrefetchPixDataBWChroma[k] * v->UrgentBurstFactorChromaPre[k]) + v->cursor_bw_pre[k] *
2669	v->UrgentBurstFactorCursorPre[k]);
2670
2671	MaxTotalRDBandwidthNoUrgentBurst = MaxTotalRDBandwidthNoUrgentBurst +
2672	dml_max3(v->DPPPerPlane[k] * v->prefetch_vmrow_bw[k],
2673	v->ReadBandwidthPlaneLuma[k] +
2674	v->ReadBandwidthPlaneChroma[k] +
2675	v->cursor_bw[k] +
2676	v->DPPPerPlane[k] * (v->meta_row_bw[k] + v->dpte_row_bw[k]),
2677	v->DPPPerPlane[k] * (v->RequiredPrefetchPixDataBWLuma[k] + v->RequiredPrefetchPixDataBWChroma[k]) + v->cursor_bw_pre[k]);
2678
2679	if (v->DestinationLinesForPrefetch[k] < 2)
2680	DestinationLineTimesForPrefetchLessThan2 = true1;
2681	if (v->VRatioPrefetchY[k] > 4 \|\| v->VRatioPrefetchC[k] > 4)
2682	VRatioPrefetchMoreThan4 = true1;
2683	if (v->NoUrgentLatencyHiding[k] == true1)
2684	v->NotEnoughUrgentLatencyHiding = true1;
2685
2686	if (v->NoUrgentLatencyHidingPre[k] == true1)
2687	v->NotEnoughUrgentLatencyHidingPre = true1;
2688	}
2689	v->FractionOfUrgentBandwidth = MaxTotalRDBandwidthNoUrgentBurst / v->ReturnBW;
2690
2691
2692	if (MaxTotalRDBandwidth <= v->ReturnBW && v->NotEnoughUrgentLatencyHiding == 0 && v->NotEnoughUrgentLatencyHidingPre == 0 && !VRatioPrefetchMoreThan4
2693	&& !DestinationLineTimesForPrefetchLessThan2)
2694	v->PrefetchModeSupported = true1;
2695	else {
2696	v->PrefetchModeSupported = false0;
2697	dml_print("DML: CalculatePrefetchSchedule *failed*. Bandwidth violation. Results are NOT valid\n"){do { } while(0); };
2698	dml_print("DML: MaxTotalRDBandwidth:%f AvailReturnBandwidth:%f\n", MaxTotalRDBandwidth, v->ReturnBW){do { } while(0); };
2699	dml_print("DML: VRatioPrefetch %s more than 4\n", (VRatioPrefetchMoreThan4) ? "is" : "is not"){do { } while(0); };
2700	dml_print("DML: DestinationLines for Prefetch %s less than 2\n", (DestinationLineTimesForPrefetchLessThan2) ? "is" : "is not"){do { } while(0); };
2701	}
2702
2703	if (v->PrefetchModeSupported == true1 && v->ImmediateFlipSupport == true1) {
2704	v->BandwidthAvailableForImmediateFlip = v->ReturnBW;
2705	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2706	v->BandwidthAvailableForImmediateFlip =
2707	v->BandwidthAvailableForImmediateFlip
2708	- dml_max(
2709	v->ReadBandwidthPlaneLuma[k] * v->UrgentBurstFactorLuma[k]
2710	+ v->ReadBandwidthPlaneChroma[k] * v->UrgentBurstFactorChroma[k]
2711	+ v->cursor_bw[k] * v->UrgentBurstFactorCursor[k],
2712	v->DPPPerPlane[k] * (v->RequiredPrefetchPixDataBWLuma[k] * v->UrgentBurstFactorLumaPre[k] +
2713	v->RequiredPrefetchPixDataBWChroma[k] * v->UrgentBurstFactorChromaPre[k]) +
2714	v->cursor_bw_pre[k] * v->UrgentBurstFactorCursorPre[k]);
2715	}
2716
2717	v->TotImmediateFlipBytes = 0;
2718	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2719	v->TotImmediateFlipBytes = v->TotImmediateFlipBytes + v->DPPPerPlane[k] * (v->PDEAndMetaPTEBytesFrame[k] + v->MetaRowByte[k] + v->PixelPTEBytesPerRow[k]);
2720	}
2721	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2722	CalculateFlipSchedule(
2723	mode_lib,
2724	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
2725	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
2726	v->UrgentExtraLatency,
2727	v->UrgentLatency,
2728	v->GPUVMMaxPageTableLevels,
2729	v->HostVMEnable,
2730	v->HostVMMaxNonCachedPageTableLevels,
2731	v->GPUVMEnable,
2732	v->HostVMMinPageSize,
2733	v->PDEAndMetaPTEBytesFrame[k],
2734	v->MetaRowByte[k],
2735	v->PixelPTEBytesPerRow[k],
2736	v->BandwidthAvailableForImmediateFlip,
2737	v->TotImmediateFlipBytes,
2738	v->SourcePixelFormat[k],
2739	v->HTotal[k] / v->PixelClock[k],
2740	v->VRatio[k],
2741	v->VRatioChroma[k],
2742	v->Tno_bw[k],
2743	v->DCCEnable[k],
2744	v->dpte_row_height[k],
2745	v->meta_row_height[k],
2746	v->dpte_row_height_chroma[k],
2747	v->meta_row_height_chroma[k],
2748	&v->DestinationLinesToRequestVMInImmediateFlip[k],
2749	&v->DestinationLinesToRequestRowInImmediateFlip[k],
2750	&v->final_flip_bw[k],
2751	&v->ImmediateFlipSupportedForPipe[k]);
2752	}
2753	v->total_dcn_read_bw_with_flip = 0.0;
2754	v->total_dcn_read_bw_with_flip_no_urgent_burst = 0.0;
2755	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2756	v->total_dcn_read_bw_with_flip = v->total_dcn_read_bw_with_flip + dml_max3(
2757	v->DPPPerPlane[k] * v->prefetch_vmrow_bw[k],
2758	v->DPPPerPlane[k] * v->final_flip_bw[k] +
2759	v->ReadBandwidthLuma[k] * v->UrgentBurstFactorLuma[k] +
2760	v->ReadBandwidthChroma[k] * v->UrgentBurstFactorChroma[k] +
2761	v->cursor_bw[k] * v->UrgentBurstFactorCursor[k],
2762	v->DPPPerPlane[k] * (v->final_flip_bw[k] +
2763	v->RequiredPrefetchPixDataBWLuma[k] * v->UrgentBurstFactorLumaPre[k] +
2764	v->RequiredPrefetchPixDataBWChroma[k] * v->UrgentBurstFactorChromaPre[k]) +
2765	v->cursor_bw_pre[k] * v->UrgentBurstFactorCursorPre[k]);
2766	v->total_dcn_read_bw_with_flip_no_urgent_burst =
2767	v->total_dcn_read_bw_with_flip_no_urgent_burst +
2768	dml_max3(v->DPPPerPlane[k] * v->prefetch_vmrow_bw[k],
2769	v->DPPPerPlane[k] * v->final_flip_bw[k] + v->ReadBandwidthPlaneLuma[k] + v->ReadBandwidthPlaneChroma[k] + v->cursor_bw[k],
2770	v->DPPPerPlane[k] * (v->final_flip_bw[k] + v->RequiredPrefetchPixDataBWLuma[k] + v->RequiredPrefetchPixDataBWChroma[k]) + v->cursor_bw_pre[k]);
2771
2772	}
2773	v->FractionOfUrgentBandwidthImmediateFlip = v->total_dcn_read_bw_with_flip_no_urgent_burst / v->ReturnBW;
2774
2775	v->ImmediateFlipSupported = true1;
2776	if (v->total_dcn_read_bw_with_flip > v->ReturnBW) {
2777	v->ImmediateFlipSupported = false0;
2778	v->total_dcn_read_bw_with_flip = MaxTotalRDBandwidth;
2779	}
2780	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2781	if (v->ImmediateFlipSupportedForPipe[k] == false0) {
2782	v->ImmediateFlipSupported = false0;
2783	}
2784	}
2785	} else {
2786	v->ImmediateFlipSupported = false0;
2787	}
2788
2789	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2790	if (v->ErrorResult[k] \|\| v->NotEnoughTimeForDynamicMetadata[k]) {
2791	v->PrefetchModeSupported = false0;
2792	dml_print("DML: CalculatePrefetchSchedule *failed*. Prefetch schedule violation. Results are NOT valid\n"){do { } while(0); };
2793	}
2794	}
2795
2796	v->VStartupLines = v->VStartupLines + 1;
2797	v->PrefetchAndImmediateFlipSupported = (v->PrefetchModeSupported == true1 && ((!v->ImmediateFlipSupport && !v->HostVMEnable && v->ImmediateFlipRequirement != dm_immediate_flip_required) \|\| v->ImmediateFlipSupported)) ? true1 : false0;
2798
2799	} while (!v->PrefetchModeSupported && v->VStartupLines <= v->MaximumMaxVStartupLines);
2800	ASSERT(v->PrefetchModeSupported)do { if (({ static int __warned; int __ret = !!(!(v->PrefetchModeSupported )); if (__ret && !__warned) { printf("WARNING %s failed at %s:%d\n" , "!(v->PrefetchModeSupported)", "/usr/src/sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c" , 2800); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do {} while (0); } while (0);
2801
2802	//Watermarks and NB P-State/DRAM Clock Change Support
2803	{
2804	enum clock_change_support DRAMClockChangeSupport = 0; // dummy
2805	CalculateWatermarksAndDRAMSpeedChangeSupport(
2806	mode_lib,
2807	PrefetchMode,
2808	v->NumberOfActivePlanes,
2809	v->MaxLineBufferLines,
2810	v->LineBufferSize,
2811	v->DPPOutputBufferPixels,
2812	v->DETBufferSizeInKByte,
2813	v->WritebackInterfaceBufferSize,
2814	v->DCFCLK,
2815	v->ReturnBW,
2816	v->GPUVMEnable,
2817	v->dpte_group_bytes,
2818	v->MetaChunkSize,
2819	v->UrgentLatency,
2820	v->UrgentExtraLatency,
2821	v->WritebackLatency,
2822	v->WritebackChunkSize,
2823	v->SOCCLK,
2824	v->FinalDRAMClockChangeLatency,
2825	v->SRExitTime,
2826	v->SREnterPlusExitTime,
2827	v->DCFCLKDeepSleep,
2828	v->DPPPerPlane,
2829	v->DCCEnable,
2830	v->DPPCLK,
2831	v->DETBufferSizeY,
2832	v->DETBufferSizeC,
2833	v->SwathHeightY,
2834	v->SwathHeightC,
2835	v->LBBitPerPixel,
2836	v->SwathWidthY,
2837	v->SwathWidthC,
2838	v->HRatio,
2839	v->HRatioChroma,
2840	v->vtaps,
2841	v->VTAPsChroma,
2842	v->VRatio,
2843	v->VRatioChroma,
2844	v->HTotal,
2845	v->PixelClock,
2846	v->BlendingAndTiming,
2847	v->BytePerPixelDETY,
2848	v->BytePerPixelDETC,
2849	v->DSTXAfterScaler,
2850	v->DSTYAfterScaler,
2851	v->WritebackEnable,
2852	v->WritebackPixelFormat,
2853	v->WritebackDestinationWidth,
2854	v->WritebackDestinationHeight,
2855	v->WritebackSourceHeight,
2856	&DRAMClockChangeSupport,
2857	&v->UrgentWatermark,
2858	&v->WritebackUrgentWatermark,
2859	&v->DRAMClockChangeWatermark,
2860	&v->WritebackDRAMClockChangeWatermark,
2861	&v->StutterExitWatermark,
2862	&v->StutterEnterPlusExitWatermark,
2863	&v->MinActiveDRAMClockChangeLatencySupported);
2864
2865	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2866	if (v->WritebackEnable[k] == true1) {
2867	if (v->BlendingAndTiming[k] == k) {
2868	v->ThisVStartup = v->VStartup[k];
2869	} else {
2870	for (j = 0; j < v->NumberOfActivePlanes; ++j) {
2871	if (v->BlendingAndTiming[k] == j) {
2872	v->ThisVStartup = v->VStartup[j];
2873	}
2874	}
2875	}
2876	v->WritebackAllowDRAMClockChangeEndPosition[k] = dml_max(0,
2877	v->ThisVStartup * v->HTotal[k] / v->PixelClock[k] - v->WritebackDRAMClockChangeWatermark);
2878	} else {
2879	v->WritebackAllowDRAMClockChangeEndPosition[k] = 0;
2880	}
2881	}
2882
2883	}
2884
2885
2886	//Display Pipeline Delivery Time in Prefetch, Groups
2887	CalculatePixelDeliveryTimes(
2888	v->NumberOfActivePlanes,
2889	v->VRatio,
2890	v->VRatioChroma,
2891	v->VRatioPrefetchY,
2892	v->VRatioPrefetchC,
2893	v->swath_width_luma_ub,
2894	v->swath_width_chroma_ub,
2895	v->DPPPerPlane,
2896	v->HRatio,
2897	v->HRatioChroma,
2898	v->PixelClock,
2899	v->PSCL_THROUGHPUT_LUMA,
2900	v->PSCL_THROUGHPUT_CHROMA,
2901	v->DPPCLK,
2902	v->BytePerPixelC,
2903	v->SourceScan,
2904	v->NumberOfCursors,
2905	v->CursorWidth,
2906	v->CursorBPP,
2907	v->BlockWidth256BytesY,
2908	v->BlockHeight256BytesY,
2909	v->BlockWidth256BytesC,
2910	v->BlockHeight256BytesC,
2911	v->DisplayPipeLineDeliveryTimeLuma,
2912	v->DisplayPipeLineDeliveryTimeChroma,
2913	v->DisplayPipeLineDeliveryTimeLumaPrefetch,
2914	v->DisplayPipeLineDeliveryTimeChromaPrefetch,
2915	v->DisplayPipeRequestDeliveryTimeLuma,
2916	v->DisplayPipeRequestDeliveryTimeChroma,
2917	v->DisplayPipeRequestDeliveryTimeLumaPrefetch,
2918	v->DisplayPipeRequestDeliveryTimeChromaPrefetch,
2919	v->CursorRequestDeliveryTime,
2920	v->CursorRequestDeliveryTimePrefetch);
2921
2922	CalculateMetaAndPTETimes(
2923	v->NumberOfActivePlanes,
2924	v->GPUVMEnable,
2925	v->MetaChunkSize,
2926	v->MinMetaChunkSizeBytes,
2927	v->HTotal,
2928	v->VRatio,
2929	v->VRatioChroma,
2930	v->DestinationLinesToRequestRowInVBlank,
2931	v->DestinationLinesToRequestRowInImmediateFlip,
2932	v->DCCEnable,
2933	v->PixelClock,
2934	v->BytePerPixelY,
2935	v->BytePerPixelC,
2936	v->SourceScan,
2937	v->dpte_row_height,
2938	v->dpte_row_height_chroma,
2939	v->meta_row_width,
2940	v->meta_row_width_chroma,
2941	v->meta_row_height,
2942	v->meta_row_height_chroma,
2943	v->meta_req_width,
2944	v->meta_req_width_chroma,
2945	v->meta_req_height,
2946	v->meta_req_height_chroma,
2947	v->dpte_group_bytes,
2948	v->PTERequestSizeY,
2949	v->PTERequestSizeC,
2950	v->PixelPTEReqWidthY,
2951	v->PixelPTEReqHeightY,
2952	v->PixelPTEReqWidthC,
2953	v->PixelPTEReqHeightC,
2954	v->dpte_row_width_luma_ub,
2955	v->dpte_row_width_chroma_ub,
2956	v->DST_Y_PER_PTE_ROW_NOM_L,
2957	v->DST_Y_PER_PTE_ROW_NOM_C,
2958	v->DST_Y_PER_META_ROW_NOM_L,
2959	v->DST_Y_PER_META_ROW_NOM_C,
2960	v->TimePerMetaChunkNominal,
2961	v->TimePerChromaMetaChunkNominal,
2962	v->TimePerMetaChunkVBlank,
2963	v->TimePerChromaMetaChunkVBlank,
2964	v->TimePerMetaChunkFlip,
2965	v->TimePerChromaMetaChunkFlip,
2966	v->time_per_pte_group_nom_luma,
2967	v->time_per_pte_group_vblank_luma,
2968	v->time_per_pte_group_flip_luma,
2969	v->time_per_pte_group_nom_chroma,
2970	v->time_per_pte_group_vblank_chroma,
2971	v->time_per_pte_group_flip_chroma);
2972
2973	CalculateVMGroupAndRequestTimes(
2974	v->NumberOfActivePlanes,
2975	v->GPUVMEnable,
2976	v->GPUVMMaxPageTableLevels,
2977	v->HTotal,
2978	v->BytePerPixelC,
2979	v->DestinationLinesToRequestVMInVBlank,
2980	v->DestinationLinesToRequestVMInImmediateFlip,
2981	v->DCCEnable,
2982	v->PixelClock,
2983	v->dpte_row_width_luma_ub,
2984	v->dpte_row_width_chroma_ub,
2985	v->vm_group_bytes,
2986	v->dpde0_bytes_per_frame_ub_l,
2987	v->dpde0_bytes_per_frame_ub_c,
2988	v->meta_pte_bytes_per_frame_ub_l,
2989	v->meta_pte_bytes_per_frame_ub_c,
2990	v->TimePerVMGroupVBlank,
2991	v->TimePerVMGroupFlip,
2992	v->TimePerVMRequestVBlank,
2993	v->TimePerVMRequestFlip);
2994
2995
2996	// Min TTUVBlank
2997	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
2998	if (PrefetchMode == 0) {
2999	v->AllowDRAMClockChangeDuringVBlank[k] = true1;
3000	v->AllowDRAMSelfRefreshDuringVBlank[k] = true1;
3001	v->MinTTUVBlank[k] = dml_max(
3002	v->DRAMClockChangeWatermark,
3003	dml_max(
3004	v->StutterEnterPlusExitWatermark,
3005	v->UrgentWatermark));
3006	} else if (PrefetchMode == 1) {
3007	v->AllowDRAMClockChangeDuringVBlank[k] = false0;
3008	v->AllowDRAMSelfRefreshDuringVBlank[k] = true1;
3009	v->MinTTUVBlank[k] = dml_max(
3010	v->StutterEnterPlusExitWatermark,
3011	v->UrgentWatermark);
3012	} else {
3013	v->AllowDRAMClockChangeDuringVBlank[k] = false0;
3014	v->AllowDRAMSelfRefreshDuringVBlank[k] = false0;
3015	v->MinTTUVBlank[k] = v->UrgentWatermark;
3016	}
3017	if (!v->DynamicMetadataEnable[k])
3018	v->MinTTUVBlank[k] = v->TCalc
3019	+ v->MinTTUVBlank[k];
3020	}
3021
3022	// DCC Configuration
3023	v->ActiveDPPs = 0;
3024	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
3025	CalculateDCCConfiguration(v->DCCEnable[k], false0, // We should always know the direction DCCProgrammingAssumesScanDirectionUnknown,
3026	v->SourcePixelFormat[k],
3027	v->SurfaceWidthY[k],
3028	v->SurfaceWidthC[k],
3029	v->SurfaceHeightY[k],
3030	v->SurfaceHeightC[k],
3031	v->DETBufferSizeInKByte * 1024,
3032	v->BlockHeight256BytesY[k],
3033	v->BlockHeight256BytesC[k],
3034	v->SurfaceTiling[k],
3035	v->BytePerPixelY[k],
3036	v->BytePerPixelC[k],
3037	v->BytePerPixelDETY[k],
3038	v->BytePerPixelDETC[k],
3039	v->SourceScan[k],
3040	&v->DCCYMaxUncompressedBlock[k],
3041	&v->DCCCMaxUncompressedBlock[k],
3042	&v->DCCYMaxCompressedBlock[k],
3043	&v->DCCCMaxCompressedBlock[k],
3044	&v->DCCYIndependentBlock[k],
3045	&v->DCCCIndependentBlock[k]);
3046	}
3047
3048	{
3049	//Maximum Bandwidth Used
3050	double TotalWRBandwidth = 0;
3051	double MaxPerPlaneVActiveWRBandwidth = 0;
3052	double WRBandwidth = 0;
3053	double MaxUsedBW = 0;
3054	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
3055	if (v->WritebackEnable[k] == true1
3056	&& v->WritebackPixelFormat[k] == dm_444_32) {
3057	WRBandwidth = v->WritebackDestinationWidth[k] * v->WritebackDestinationHeight[k]
3058	/ (v->HTotal[k] * v->WritebackSourceHeight[k] / v->PixelClock[k]) * 4;
3059	} else if (v->WritebackEnable[k] == true1) {
3060	WRBandwidth = v->WritebackDestinationWidth[k] * v->WritebackDestinationHeight[k]
3061	/ (v->HTotal[k] * v->WritebackSourceHeight[k] / v->PixelClock[k]) * 8;
3062	}
3063	TotalWRBandwidth = TotalWRBandwidth + WRBandwidth;
3064	MaxPerPlaneVActiveWRBandwidth = dml_max(MaxPerPlaneVActiveWRBandwidth, WRBandwidth);
3065	}
3066
3067	v->TotalDataReadBandwidth = 0;
3068	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
3069	v->TotalDataReadBandwidth = v->TotalDataReadBandwidth
3070	+ v->ReadBandwidthPlaneLuma[k]
3071	+ v->ReadBandwidthPlaneChroma[k];
3072	}
3073
3074	{
3075	double MaxPerPlaneVActiveRDBandwidth = 0;
3076	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
3077	MaxPerPlaneVActiveRDBandwidth = dml_max(MaxPerPlaneVActiveRDBandwidth,
3078	v->ReadBandwidthPlaneLuma[k] + v->ReadBandwidthPlaneChroma[k]);
3079
3080	}
3081	}
3082
3083	MaxUsedBW = MaxTotalRDBandwidth + TotalWRBandwidth;
3084	}
3085
3086	// VStartup Margin
3087	v->VStartupMargin = 0;
3088	v->FirstMainPlane = true1;
3089	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
3090	if (v->BlendingAndTiming[k] == k) {
3091	double margin = (v->MaxVStartupLines[k] - v->VStartup[k]) * v->HTotal[k]
3092	/ v->PixelClock[k];
3093	if (v->FirstMainPlane == true1) {
3094	v->VStartupMargin = margin;
3095	v->FirstMainPlane = false0;
3096	} else {
3097	v->VStartupMargin = dml_min(v->VStartupMargin, margin);
3098	}
3099	}
3100	}
3101
3102	// Stutter Efficiency
3103	CalculateStutterEfficiency(
3104	v->NumberOfActivePlanes,
3105	v->ROBBufferSizeInKByte,
3106	v->TotalDataReadBandwidth,
3107	v->DCFCLK,
3108	v->ReturnBW,
3109	v->SRExitTime,
3110	v->SynchronizedVBlank,
3111	v->DPPPerPlane,
3112	v->DETBufferSizeY,
3113	v->BytePerPixelY,
3114	v->BytePerPixelDETY,
3115	v->SwathWidthY,
3116	v->SwathHeightY,
3117	v->SwathHeightC,
3118	v->DCCRateLuma,
3119	v->DCCRateChroma,
3120	v->HTotal,
3121	v->VTotal,
3122	v->PixelClock,
3123	v->VRatio,
3124	v->SourceScan,
3125	v->BlockHeight256BytesY,
3126	v->BlockWidth256BytesY,
3127	v->BlockHeight256BytesC,
3128	v->BlockWidth256BytesC,
3129	v->DCCYMaxUncompressedBlock,
3130	v->DCCCMaxUncompressedBlock,
3131	v->VActive,
3132	v->DCCEnable,
3133	v->WritebackEnable,
3134	v->ReadBandwidthPlaneLuma,
3135	v->ReadBandwidthPlaneChroma,
3136	v->meta_row_bw,
3137	v->dpte_row_bw,
3138	&v->StutterEfficiencyNotIncludingVBlank,
3139	&v->StutterEfficiency,
3140	&v->StutterPeriod);
3141	}
3142
3143	static void DisplayPipeConfiguration(struct display_mode_lib *mode_lib)
3144	{
3145	// Display Pipe Configuration
3146	double BytePerPixDETY[DC__NUM_DPP__MAX8] = { 0 };
3147	double BytePerPixDETC[DC__NUM_DPP__MAX8] = { 0 };
3148	int BytePerPixY[DC__NUM_DPP__MAX8] = { 0 };
3149	int BytePerPixC[DC__NUM_DPP__MAX8] = { 0 };
3150	int Read256BytesBlockHeightY[DC__NUM_DPP__MAX8] = { 0 };
3151	int Read256BytesBlockHeightC[DC__NUM_DPP__MAX8] = { 0 };
3152	int Read256BytesBlockWidthY[DC__NUM_DPP__MAX8] = { 0 };
3153	int Read256BytesBlockWidthC[DC__NUM_DPP__MAX8] = { 0 };
3154	double dummy1[DC__NUM_DPP__MAX8] = { 0 };
3155	double dummy2[DC__NUM_DPP__MAX8] = { 0 };
3156	double dummy3[DC__NUM_DPP__MAX8] = { 0 };
3157	double dummy4[DC__NUM_DPP__MAX8] = { 0 };
3158	int dummy5[DC__NUM_DPP__MAX8] = { 0 };
3159	int dummy6[DC__NUM_DPP__MAX8] = { 0 };
3160	bool_Bool dummy7[DC__NUM_DPP__MAX8] = { 0 };
3161	bool_Bool dummysinglestring = 0;
3162	unsigned int k;
3163
3164	for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
3165
3166	CalculateBytePerPixelAnd256BBlockSizes(
3167	mode_lib->vba.SourcePixelFormat[k],
3168	mode_lib->vba.SurfaceTiling[k],
3169	&BytePerPixY[k],
3170	&BytePerPixC[k],
3171	&BytePerPixDETY[k],
3172	&BytePerPixDETC[k],
3173	&Read256BytesBlockHeightY[k],
3174	&Read256BytesBlockHeightC[k],
3175	&Read256BytesBlockWidthY[k],
3176	&Read256BytesBlockWidthC[k]);
3177	}
3178	CalculateSwathAndDETConfiguration(
3179	false0,
3180	mode_lib->vba.NumberOfActivePlanes,
3181	mode_lib->vba.DETBufferSizeInKByte,
3182	dummy1,
3183	dummy2,
3184	mode_lib->vba.SourceScan,
3185	mode_lib->vba.SourcePixelFormat,
3186	mode_lib->vba.SurfaceTiling,
3187	mode_lib->vba.ViewportWidth,
3188	mode_lib->vba.ViewportHeight,
3189	mode_lib->vba.SurfaceWidthY,
3190	mode_lib->vba.SurfaceWidthC,
3191	mode_lib->vba.SurfaceHeightY,
3192	mode_lib->vba.SurfaceHeightC,
3193	Read256BytesBlockHeightY,
3194	Read256BytesBlockHeightC,
3195	Read256BytesBlockWidthY,
3196	Read256BytesBlockWidthC,
3197	mode_lib->vba.ODMCombineEnabled,
3198	mode_lib->vba.BlendingAndTiming,
3199	BytePerPixY,
3200	BytePerPixC,
3201	BytePerPixDETY,
3202	BytePerPixDETC,
3203	mode_lib->vba.HActive,
3204	mode_lib->vba.HRatio,
3205	mode_lib->vba.HRatioChroma,
3206	mode_lib->vba.DPPPerPlane,
3207	dummy5,
3208	dummy6,
3209	dummy3,
3210	dummy4,
3211	mode_lib->vba.SwathHeightY,
3212	mode_lib->vba.SwathHeightC,
3213	mode_lib->vba.DETBufferSizeY,
3214	mode_lib->vba.DETBufferSizeC,
3215	dummy7,
3216	&dummysinglestring);
3217	}
3218
3219	static bool_Bool CalculateBytePerPixelAnd256BBlockSizes(
3220	enum source_format_class SourcePixelFormat,
3221	enum dm_swizzle_mode SurfaceTiling,
3222	unsigned int *BytePerPixelY,
3223	unsigned int *BytePerPixelC,
3224	double *BytePerPixelDETY,
3225	double *BytePerPixelDETC,
3226	unsigned int *BlockHeight256BytesY,
3227	unsigned int *BlockHeight256BytesC,
3228	unsigned int *BlockWidth256BytesY,
3229	unsigned int *BlockWidth256BytesC)
3230	{
3231	if (SourcePixelFormat == dm_444_64) {
3232	*BytePerPixelDETY = 8;
3233	*BytePerPixelDETC = 0;
3234	*BytePerPixelY = 8;
3235	*BytePerPixelC = 0;
3236	} else if (SourcePixelFormat == dm_444_32 \|\| SourcePixelFormat == dm_rgbe) {
3237	*BytePerPixelDETY = 4;
3238	*BytePerPixelDETC = 0;
3239	*BytePerPixelY = 4;
3240	*BytePerPixelC = 0;
3241	} else if (SourcePixelFormat == dm_444_16) {
3242	*BytePerPixelDETY = 2;
3243	*BytePerPixelDETC = 0;
3244	*BytePerPixelY = 2;
3245	*BytePerPixelC = 0;
3246	} else if (SourcePixelFormat == dm_444_8) {
3247	*BytePerPixelDETY = 1;
3248	*BytePerPixelDETC = 0;
3249	*BytePerPixelY = 1;
3250	*BytePerPixelC = 0;
3251	} else if (SourcePixelFormat == dm_rgbe_alpha) {
3252	*BytePerPixelDETY = 4;
3253	*BytePerPixelDETC = 1;
3254	*BytePerPixelY = 4;
3255	*BytePerPixelC = 1;
3256	} else if (SourcePixelFormat == dm_420_8) {
3257	*BytePerPixelDETY = 1;
3258	*BytePerPixelDETC = 2;
3259	*BytePerPixelY = 1;
3260	*BytePerPixelC = 2;
3261	} else if (SourcePixelFormat == dm_420_12) {
3262	*BytePerPixelDETY = 2;
3263	*BytePerPixelDETC = 4;
3264	*BytePerPixelY = 2;
3265	*BytePerPixelC = 4;
3266	} else {
3267	*BytePerPixelDETY = 4.0 / 3;
3268	*BytePerPixelDETC = 8.0 / 3;
3269	*BytePerPixelY = 2;
3270	*BytePerPixelC = 4;
3271	}
3272
3273	if ((SourcePixelFormat == dm_444_64 \|\| SourcePixelFormat == dm_444_32
3274	\|\| SourcePixelFormat == dm_444_16 \|\| SourcePixelFormat == dm_444_8
3275	\|\| SourcePixelFormat == dm_mono_16 \|\| SourcePixelFormat == dm_mono_8
3276	\|\| SourcePixelFormat == dm_rgbe)) {
3277	if (SurfaceTiling == dm_sw_linear) {
3278	*BlockHeight256BytesY = 1;
3279	} else if (SourcePixelFormat == dm_444_64) {
3280	*BlockHeight256BytesY = 4;
3281	} else if (SourcePixelFormat == dm_444_8) {
3282	*BlockHeight256BytesY = 16;
3283	} else {
3284	*BlockHeight256BytesY = 8;
3285	}
3286	BlockWidth256BytesY = 256U / BytePerPixelY / *BlockHeight256BytesY;
3287	*BlockHeight256BytesC = 0;
3288	*BlockWidth256BytesC = 0;
3289	} else {
3290	if (SurfaceTiling == dm_sw_linear) {
3291	*BlockHeight256BytesY = 1;
3292	*BlockHeight256BytesC = 1;
3293	} else if (SourcePixelFormat == dm_rgbe_alpha) {
3294	*BlockHeight256BytesY = 8;
3295	*BlockHeight256BytesC = 16;
3296	} else if (SourcePixelFormat == dm_420_8) {
3297	*BlockHeight256BytesY = 16;
3298	*BlockHeight256BytesC = 8;
3299	} else {
3300	*BlockHeight256BytesY = 8;
3301	*BlockHeight256BytesC = 8;
3302	}
3303	BlockWidth256BytesY = 256U / BytePerPixelY / *BlockHeight256BytesY;
3304	BlockWidth256BytesC = 256U / BytePerPixelC / *BlockHeight256BytesC;
3305	}
3306	return true1;
3307	}
3308
3309	static double CalculateTWait(
3310	unsigned int PrefetchMode,
3311	double DRAMClockChangeLatency,
3312	double UrgentLatency,
3313	double SREnterPlusExitTime)
3314	{
3315	if (PrefetchMode == 0) {
3316	return dml_max(DRAMClockChangeLatency + UrgentLatency,
3317	dml_max(SREnterPlusExitTime, UrgentLatency));
3318	} else if (PrefetchMode == 1) {
3319	return dml_max(SREnterPlusExitTime, UrgentLatency);
3320	} else {
3321	return UrgentLatency;
3322	}
3323	}
3324
3325	double dml30_CalculateWriteBackDISPCLK(
3326	enum source_format_class WritebackPixelFormat,
3327	double PixelClock,
3328	double WritebackHRatio,
3329	double WritebackVRatio,
3330	unsigned int WritebackHTaps,
3331	unsigned int WritebackVTaps,
3332	long WritebackSourceWidth,
3333	long WritebackDestinationWidth,
3334	unsigned int HTotal,
3335	unsigned int WritebackLineBufferSize)
3336	{
3337	double DISPCLK_H = 0, DISPCLK_V = 0, DISPCLK_HB = 0;
3338
3339	DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) / WritebackHRatio;
3340	DISPCLK_V = PixelClock * (WritebackVTaps * dml_ceil(WritebackDestinationWidth / 6.0, 1) + 8.0) / HTotal;
3341	DISPCLK_HB = PixelClock * WritebackVTaps * (WritebackDestinationWidth * WritebackVTaps - WritebackLineBufferSize / 57.0) / 6.0 / WritebackSourceWidth;
3342	return dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB);
3343	}
3344
3345	static double CalculateWriteBackDelay(
3346	enum source_format_class WritebackPixelFormat,
3347	double WritebackHRatio,
3348	double WritebackVRatio,
3349	unsigned int WritebackVTaps,
3350	long WritebackDestinationWidth,
3351	long WritebackDestinationHeight,
3352	long WritebackSourceHeight,
3353	unsigned int HTotal)
3354	{
3355	double CalculateWriteBackDelay = 0;
3356	double Line_length = 0;
3357	double Output_lines_last_notclamped = 0;
3358	double WritebackVInit = 0;
3359
3360	WritebackVInit = (WritebackVRatio + WritebackVTaps + 1) / 2;
3361	Line_length = dml_max((double) WritebackDestinationWidth, dml_ceil(WritebackDestinationWidth / 6.0, 1) * WritebackVTaps);
3362	Output_lines_last_notclamped = WritebackDestinationHeight - 1 - dml_ceil((WritebackSourceHeight - WritebackVInit) / WritebackVRatio, 1);
3363	if (Output_lines_last_notclamped < 0) {
3364	CalculateWriteBackDelay = 0;
3365	} else {
3366	CalculateWriteBackDelay = Output_lines_last_notclamped * Line_length + (HTotal - WritebackDestinationWidth) + 80;
3367	}
3368	return CalculateWriteBackDelay;
3369	}
3370
3371
3372	static void CalculateDynamicMetadataParameters(int MaxInterDCNTileRepeaters, double DPPCLK, double DISPCLK,
3373	double DCFClkDeepSleep, double PixelClock, long HTotal, long VBlank, long DynamicMetadataTransmittedBytes,
3374	long DynamicMetadataLinesBeforeActiveRequired, int InterlaceEnable, bool_Bool ProgressiveToInterlaceUnitInOPP,
3375	double Tsetup, double Tdmbf, double Tdmec, double Tdmsks)
3376	{
3377	double TotalRepeaterDelayTime = 0;
3378	double VUpdateWidthPix = 0;
3379	double VReadyOffsetPix = 0;
3380	double VUpdateOffsetPix = 0;
3381	TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2 / DPPCLK + 3 / DISPCLK);
3382	VUpdateWidthPix = (14 / DCFClkDeepSleep + 12 / DPPCLK + TotalRepeaterDelayTime) * PixelClock;
3383	VReadyOffsetPix = dml_max(150.0 / DPPCLK, TotalRepeaterDelayTime + 20 / DCFClkDeepSleep + 10 / DPPCLK) * PixelClock;
3384	VUpdateOffsetPix = dml_ceil(HTotal / 4.0, 1);
3385	*Tsetup = (VUpdateOffsetPix + VUpdateWidthPix + VReadyOffsetPix) / PixelClock;
3386	*Tdmbf = DynamicMetadataTransmittedBytes / 4.0 / DISPCLK;
3387	*Tdmec = HTotal / PixelClock;
3388	if (DynamicMetadataLinesBeforeActiveRequired == 0) {
3389	Tdmsks = VBlank HTotal / PixelClock / 2.0;
3390	} else {
3391	Tdmsks = DynamicMetadataLinesBeforeActiveRequired HTotal / PixelClock;
3392	}
3393	if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false0) {
3394	Tdmsks = Tdmsks / 2;
3395	}
3396	}
3397
3398	static void CalculateRowBandwidth(
3399	bool_Bool GPUVMEnable,
3400	enum source_format_class SourcePixelFormat,
3401	double VRatio,
3402	double VRatioChroma,
3403	bool_Bool DCCEnable,
3404	double LineTime,
3405	unsigned int MetaRowByteLuma,
3406	unsigned int MetaRowByteChroma,
3407	unsigned int meta_row_height_luma,
3408	unsigned int meta_row_height_chroma,
3409	unsigned int PixelPTEBytesPerRowLuma,
3410	unsigned int PixelPTEBytesPerRowChroma,
3411	unsigned int dpte_row_height_luma,
3412	unsigned int dpte_row_height_chroma,
3413	double *meta_row_bw,
3414	double *dpte_row_bw)
3415	{
3416	if (DCCEnable != true1) {
3417	*meta_row_bw = 0;
3418	} else if (SourcePixelFormat == dm_420_8 \|\| SourcePixelFormat == dm_420_10 \|\| SourcePixelFormat == dm_420_12 \|\| SourcePixelFormat == dm_rgbe_alpha) {
3419	meta_row_bw = VRatio MetaRowByteLuma / (meta_row_height_luma * LineTime)
3420	+ VRatioChroma * MetaRowByteChroma
3421	/ (meta_row_height_chroma * LineTime);
3422	} else {
3423	meta_row_bw = VRatio MetaRowByteLuma / (meta_row_height_luma * LineTime);
3424	}
3425
3426	if (GPUVMEnable != true1) {
3427	*dpte_row_bw = 0;
3428	} else if (SourcePixelFormat == dm_420_8 \|\| SourcePixelFormat == dm_420_10 \|\| SourcePixelFormat == dm_420_12 \|\| SourcePixelFormat == dm_rgbe_alpha) {
3429	dpte_row_bw = VRatio PixelPTEBytesPerRowLuma / (dpte_row_height_luma * LineTime)
3430	+ VRatioChroma * PixelPTEBytesPerRowChroma
3431	/ (dpte_row_height_chroma * LineTime);
3432	} else {
3433	dpte_row_bw = VRatio PixelPTEBytesPerRowLuma / (dpte_row_height_luma * LineTime);
3434	}
3435	}
3436
3437	static void CalculateFlipSchedule(
3438	struct display_mode_lib *mode_lib,
3439	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
3440	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
3441	double UrgentExtraLatency,
3442	double UrgentLatency,
3443	unsigned int GPUVMMaxPageTableLevels,
3444	bool_Bool HostVMEnable,
3445	unsigned int HostVMMaxNonCachedPageTableLevels,
3446	bool_Bool GPUVMEnable,
3447	double HostVMMinPageSize,
3448	double PDEAndMetaPTEBytesPerFrame,
3449	double MetaRowBytes,
3450	double DPTEBytesPerRow,
3451	double BandwidthAvailableForImmediateFlip,
3452	unsigned int TotImmediateFlipBytes,
3453	enum source_format_class SourcePixelFormat,
3454	double LineTime,
3455	double VRatio,
3456	double VRatioChroma,
3457	double Tno_bw,
3458	bool_Bool DCCEnable,
3459	unsigned int dpte_row_height,
3460	unsigned int meta_row_height,
3461	unsigned int dpte_row_height_chroma,
3462	unsigned int meta_row_height_chroma,
3463	double *DestinationLinesToRequestVMInImmediateFlip,
3464	double *DestinationLinesToRequestRowInImmediateFlip,
3465	double *final_flip_bw,
3466	bool_Bool *ImmediateFlipSupportedForPipe)
3467	{
3468	double min_row_time = 0.0;
3469	unsigned int HostVMDynamicLevelsTrips = 0;
3470	double TimeForFetchingMetaPTEImmediateFlip = 0;
3471	double TimeForFetchingRowInVBlankImmediateFlip = 0;
3472	double ImmediateFlipBW = 0;
3473	double HostVMInefficiencyFactor = 0;
3474
3475	if (GPUVMEnable == true1 && HostVMEnable == true1) {
3476	HostVMInefficiencyFactor = PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData / PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly;
3477	HostVMDynamicLevelsTrips = HostVMMaxNonCachedPageTableLevels;
3478	} else {
3479	HostVMInefficiencyFactor = 1;
3480	HostVMDynamicLevelsTrips = 0;
3481	}
3482
3483	if (GPUVMEnable == true1 \|\| DCCEnable == true1) {
3484	ImmediateFlipBW = (PDEAndMetaPTEBytesPerFrame + MetaRowBytes + DPTEBytesPerRow) * BandwidthAvailableForImmediateFlip / TotImmediateFlipBytes;
3485	}
3486
3487	if (GPUVMEnable == true1) {
3488	TimeForFetchingMetaPTEImmediateFlip = dml_max3(Tno_bw + PDEAndMetaPTEBytesPerFrame * HostVMInefficiencyFactor / ImmediateFlipBW,
3489	UrgentExtraLatency + UrgentLatency * (GPUVMMaxPageTableLevels * (HostVMDynamicLevelsTrips + 1) - 1), LineTime / 4.0);
3490	} else {
3491	TimeForFetchingMetaPTEImmediateFlip = 0;
3492	}
3493
3494	DestinationLinesToRequestVMInImmediateFlip = dml_ceil(4.0 (TimeForFetchingMetaPTEImmediateFlip / LineTime), 1) / 4.0;
3495	if ((GPUVMEnable == true1 \|\| DCCEnable == true1)) {
3496	TimeForFetchingRowInVBlankImmediateFlip = dml_max3((MetaRowBytes + DPTEBytesPerRow * HostVMInefficiencyFactor) / ImmediateFlipBW,
3497	UrgentLatency * (HostVMDynamicLevelsTrips + 1), LineTime / 4);
3498	} else {
3499	TimeForFetchingRowInVBlankImmediateFlip = 0;
3500	}
3501
3502	DestinationLinesToRequestRowInImmediateFlip = dml_ceil(4.0 (TimeForFetchingRowInVBlankImmediateFlip / LineTime), 1) / 4.0;
3503
3504	if (GPUVMEnable == true1) {
3505	final_flip_bw = dml_max(PDEAndMetaPTEBytesPerFrame HostVMInefficiencyFactor / (DestinationLinesToRequestVMInImmediateFlip LineTime),
3506	(MetaRowBytes + DPTEBytesPerRow * HostVMInefficiencyFactor) / (DestinationLinesToRequestRowInImmediateFlip LineTime));
3507	} else if ((GPUVMEnable == true1 \|\| DCCEnable == true1)) {
3508	final_flip_bw = (MetaRowBytes + DPTEBytesPerRow HostVMInefficiencyFactor) / (DestinationLinesToRequestRowInImmediateFlip LineTime);
3509	} else {
3510	*final_flip_bw = 0;
3511	}
3512
3513
3514	if (SourcePixelFormat == dm_420_8 \|\| SourcePixelFormat == dm_420_10 \|\| SourcePixelFormat == dm_rgbe_alpha) {
3515	if (GPUVMEnable == true1 && DCCEnable != true1) {
3516	min_row_time = dml_min(dpte_row_height * LineTime / VRatio, dpte_row_height_chroma * LineTime / VRatioChroma);
3517	} else if (GPUVMEnable != true1 && DCCEnable == true1) {
3518	min_row_time = dml_min(meta_row_height * LineTime / VRatio, meta_row_height_chroma * LineTime / VRatioChroma);
3519	} else {
3520	min_row_time = dml_min4(dpte_row_height * LineTime / VRatio, meta_row_height * LineTime / VRatio,
3521	dpte_row_height_chroma * LineTime / VRatioChroma, meta_row_height_chroma * LineTime / VRatioChroma);
3522	}
3523	} else {
3524	if (GPUVMEnable == true1 && DCCEnable != true1) {
3525	min_row_time = dpte_row_height * LineTime / VRatio;
3526	} else if (GPUVMEnable != true1 && DCCEnable == true1) {
3527	min_row_time = meta_row_height * LineTime / VRatio;
3528	} else {
3529	min_row_time = dml_min(dpte_row_height * LineTime / VRatio, meta_row_height * LineTime / VRatio);
3530	}
3531	}
3532
3533	if (DestinationLinesToRequestVMInImmediateFlip >= 32 \|\| DestinationLinesToRequestRowInImmediateFlip >= 16
3534	\|\| TimeForFetchingMetaPTEImmediateFlip + 2 * TimeForFetchingRowInVBlankImmediateFlip > min_row_time) {
3535	*ImmediateFlipSupportedForPipe = false0;
3536	} else {
3537	*ImmediateFlipSupportedForPipe = true1;
3538	}
3539	}
3540
3541	static double TruncToValidBPP(
3542	double LinkBitRate,
3543	int Lanes,
3544	long HTotal,
3545	long HActive,
3546	double PixelClock,
3547	double DesiredBPP,
3548	bool_Bool DSCEnable,
3549	enum output_encoder_class Output,
3550	enum output_format_class Format,
3551	unsigned int DSCInputBitPerComponent,
3552	int DSCSlices,
3553	int AudioRate,
3554	int AudioLayout,
3555	enum odm_combine_mode ODMCombine)
3556	{
3557	double MaxLinkBPP = 0;
3558	int MinDSCBPP = 0;
3559	double MaxDSCBPP = 0;
3560	int NonDSCBPP0 = 0;
3561	int NonDSCBPP1 = 0;
3562	int NonDSCBPP2 = 0;
3563
3564	if (Format == dm_420) {
3565	NonDSCBPP0 = 12;
3566	NonDSCBPP1 = 15;
3567	NonDSCBPP2 = 18;
3568	MinDSCBPP = 6;
3569	MaxDSCBPP = 1.5 * DSCInputBitPerComponent - 1.0 / 16;
3570	} else if (Format == dm_444) {
3571	NonDSCBPP0 = 24;
3572	NonDSCBPP1 = 30;
3573	NonDSCBPP2 = 36;
3574	MinDSCBPP = 8;
3575	MaxDSCBPP = 3 * DSCInputBitPerComponent - 1.0 / 16;
3576	} else {
3577	if (Output == dm_hdmi) {
3578	NonDSCBPP0 = 24;
3579	NonDSCBPP1 = 24;
3580	NonDSCBPP2 = 24;
3581	}
3582	else {
3583	NonDSCBPP0 = 16;
3584	NonDSCBPP1 = 20;
3585	NonDSCBPP2 = 24;
3586	}
3587
3588	if (Format == dm_n422) {
3589	MinDSCBPP = 7;
3590	MaxDSCBPP = 2 * DSCInputBitPerComponent - 1.0 / 16.0;
3591	}
3592	else {
3593	MinDSCBPP = 8;
3594	MaxDSCBPP = 3 * DSCInputBitPerComponent - 1.0 / 16.0;
3595	}
3596	}
3597
3598	if (DSCEnable && Output == dm_dp) {
3599	MaxLinkBPP = LinkBitRate / 10 * 8 * Lanes / PixelClock * (1 - 2.4 / 100);
3600	} else {
3601	MaxLinkBPP = LinkBitRate / 10 * 8 * Lanes / PixelClock;
3602	}
3603
3604	if (ODMCombine == dm_odm_combine_mode_4to1 && MaxLinkBPP > 16) {
3605	MaxLinkBPP = 16;
3606	} else if (ODMCombine == dm_odm_combine_mode_2to1 && MaxLinkBPP > 32) {
3607	MaxLinkBPP = 32;
3608	}
3609
3610
3611	if (DesiredBPP == 0) {
3612	if (DSCEnable) {
3613	if (MaxLinkBPP < MinDSCBPP) {
3614	return BPP_INVALID0;
3615	} else if (MaxLinkBPP >= MaxDSCBPP) {
3616	return MaxDSCBPP;
3617	} else {
3618	return dml_floor(16.0 * MaxLinkBPP, 1.0) / 16.0;
3619	}
3620	} else {
3621	if (MaxLinkBPP >= NonDSCBPP2) {
3622	return NonDSCBPP2;
3623	} else if (MaxLinkBPP >= NonDSCBPP1) {
3624	return NonDSCBPP1;
3625	} else if (MaxLinkBPP >= NonDSCBPP0) {
3626	return NonDSCBPP0;
3627	} else {
3628	return BPP_INVALID0;
3629	}
3630	}
3631	} else {
3632	if (!((DSCEnable == false0 && (DesiredBPP == NonDSCBPP2 \|\| DesiredBPP == NonDSCBPP1 \|\| DesiredBPP == NonDSCBPP0)) \|\|
3633	(DSCEnable && DesiredBPP >= MinDSCBPP && DesiredBPP <= MaxDSCBPP))) {
3634	return BPP_INVALID0;
3635	} else {
3636	return DesiredBPP;
3637	}
3638	}
3639	return BPP_INVALID0;
3640	}
3641
3642	void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
3643	{
3644	struct vba_vars_st *v = &mode_lib->vba;
3645	int MinPrefetchMode = 0;
3646	int MaxPrefetchMode = 2;
3647	int i;
3648	unsigned int j, k, m;
3649	bool_Bool EnoughWritebackUnits = true1;
3650	bool_Bool WritebackModeSupport = true1;
3651	bool_Bool ViewportExceedsSurface = false0;
3652	double MaxTotalVActiveRDBandwidth = 0;
3653	long ReorderingBytes = 0;
3654	bool_Bool NotUrgentLatencyHiding[DC__NUM_DPP__MAX8] = { 0 };
3655
3656	/MODE SUPPORT, VOLTAGE STATE AND SOC CONFIGURATION/
3657
3658	/Scale Ratio, taps Support Check/
3659
3660	v->ScaleRatioAndTapsSupport = true1;
3661	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3662	if (v->ScalerEnabled[k] == false0
3663	&& ((v->SourcePixelFormat[k] != dm_444_64
3664	&& v->SourcePixelFormat[k] != dm_444_32
3665	&& v->SourcePixelFormat[k] != dm_444_16
3666	&& v->SourcePixelFormat[k] != dm_mono_16
3667	&& v->SourcePixelFormat[k] != dm_mono_8
3668	&& v->SourcePixelFormat[k] != dm_rgbe
3669	&& v->SourcePixelFormat[k] != dm_rgbe_alpha)
3670	\|\| v->HRatio[k] != 1.0
3671	\|\| v->htaps[k] != 1.0
3672	\|\| v->VRatio[k] != 1.0
3673	\|\| v->vtaps[k] != 1.0)) {
3674	v->ScaleRatioAndTapsSupport = false0;
3675	} else if (v->vtaps[k] < 1.0 \|\| v->vtaps[k] > 8.0
3676	\|\| v->htaps[k] < 1.0 \|\| v->htaps[k] > 8.0
3677	\|\| (v->htaps[k] > 1.0
3678	&& (v->htaps[k] % 2) == 1)
3679	\|\| v->HRatio[k] > v->MaxHSCLRatio
3680	\|\| v->VRatio[k] > v->MaxVSCLRatio
3681	\|\| v->HRatio[k] > v->htaps[k]
3682	\|\| v->VRatio[k] > v->vtaps[k]
3683	\|\| (v->SourcePixelFormat[k] != dm_444_64
3684	&& v->SourcePixelFormat[k] != dm_444_32
3685	&& v->SourcePixelFormat[k] != dm_444_16
3686	&& v->SourcePixelFormat[k] != dm_mono_16
3687	&& v->SourcePixelFormat[k] != dm_mono_8
3688	&& v->SourcePixelFormat[k] != dm_rgbe
3689	&& (v->VTAPsChroma[k] < 1
3690	\|\| v->VTAPsChroma[k] > 8
3691	\|\| v->HTAPsChroma[k] < 1
3692	\|\| v->HTAPsChroma[k] > 8
3693	\|\| (v->HTAPsChroma[k] > 1 && v->HTAPsChroma[k] % 2 == 1)
3694	\|\| v->HRatioChroma[k] > v->MaxHSCLRatio
3695	\|\| v->VRatioChroma[k] > v->MaxVSCLRatio
3696	\|\| v->HRatioChroma[k] > v->HTAPsChroma[k]
3697	\|\| v->VRatioChroma[k] > v->VTAPsChroma[k]))) {
3698	v->ScaleRatioAndTapsSupport = false0;
3699	}
3700	}
3701	/Source Format, Pixel Format and Scan Support Check/
3702
3703	v->SourceFormatPixelAndScanSupport = true1;
3704	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3705	if ((v->SurfaceTiling[k] == dm_sw_linear && (!(v->SourceScan[k] != dm_vert) \|\| v->DCCEnable[k] == true1))
3706	\|\| ((v->SurfaceTiling[k] == dm_sw_64kb_d \|\| v->SurfaceTiling[k] == dm_sw_64kb_d_t \|\| v->SurfaceTiling[k] == dm_sw_64kb_d_x)
3707	&& !(v->SourcePixelFormat[k] == dm_444_64))) {
3708	v->SourceFormatPixelAndScanSupport = false0;
3709	}
3710	}
3711	/Bandwidth Support Check/
3712
3713	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3714	CalculateBytePerPixelAnd256BBlockSizes(
3715	v->SourcePixelFormat[k],
3716	v->SurfaceTiling[k],
3717	&v->BytePerPixelY[k],
3718	&v->BytePerPixelC[k],
3719	&v->BytePerPixelInDETY[k],
3720	&v->BytePerPixelInDETC[k],
3721	&v->Read256BlockHeightY[k],
3722	&v->Read256BlockHeightC[k],
3723	&v->Read256BlockWidthY[k],
3724	&v->Read256BlockWidthC[k]);
3725	}
3726	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3727	if (v->SourceScan[k] != dm_vert) {
3728	v->SwathWidthYSingleDPP[k] = v->ViewportWidth[k];
3729	v->SwathWidthCSingleDPP[k] = v->ViewportWidthChroma[k];
3730	} else {
3731	v->SwathWidthYSingleDPP[k] = v->ViewportHeight[k];
3732	v->SwathWidthCSingleDPP[k] = v->ViewportHeightChroma[k];
3733	}
3734	}
3735	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3736	v->ReadBandwidthLuma[k] = v->SwathWidthYSingleDPP[k] * dml_ceil(v->BytePerPixelInDETY[k], 1.0) / (v->HTotal[k] / v->PixelClock[k]) * v->VRatio[k];
3737	v->ReadBandwidthChroma[k] = v->SwathWidthYSingleDPP[k] / 2 * dml_ceil(v->BytePerPixelInDETC[k], 2.0) / (v->HTotal[k] / v->PixelClock[k]) * v->VRatio[k] / 2.0;
3738	}
3739	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3740	if (v->WritebackEnable[k] == true1
3741	&& v->WritebackPixelFormat[k] == dm_444_64) {
3742	v->WriteBandwidth[k] = v->WritebackDestinationWidth[k]
3743	* v->WritebackDestinationHeight[k]
3744	/ (v->WritebackSourceHeight[k]
3745	* v->HTotal[k]
3746	/ v->PixelClock[k]) * 8.0;
3747	} else if (v->WritebackEnable[k] == true1) {
3748	v->WriteBandwidth[k] = v->WritebackDestinationWidth[k]
3749	* v->WritebackDestinationHeight[k]
3750	/ (v->WritebackSourceHeight[k]
3751	* v->HTotal[k]
3752	/ v->PixelClock[k]) * 4.0;
3753	} else {
3754	v->WriteBandwidth[k] = 0.0;
3755	}
3756	}
3757
3758	/Writeback Latency support check/
3759
3760	v->WritebackLatencySupport = true1;
3761	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3762	if (v->WritebackEnable[k] == true1) {
3763	if (v->WritebackConfiguration == dm_whole_buffer_for_single_stream_no_interleave \|\|
3764	v->WritebackConfiguration == dm_whole_buffer_for_single_stream_interleave) {
3765	if (v->WriteBandwidth[k]
3766	> 2.0 * v->WritebackInterfaceBufferSize * 1024
3767	/ v->WritebackLatency) {
3768	v->WritebackLatencySupport = false0;
3769	}
3770	} else {
3771	if (v->WriteBandwidth[k]
3772	> v->WritebackInterfaceBufferSize * 1024
3773	/ v->WritebackLatency) {
3774	v->WritebackLatencySupport = false0;
3775	}
3776	}
3777	}
3778	}
3779
3780	/Writeback Mode Support Check/
3781
3782	v->TotalNumberOfActiveWriteback = 0;
3783	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3784	if (v->WritebackEnable[k] == true1) {
3785	v->TotalNumberOfActiveWriteback =
3786	v->TotalNumberOfActiveWriteback + 1;
3787	}
3788	}
3789
3790	if (v->TotalNumberOfActiveWriteback > v->MaxNumWriteback) {
3791	EnoughWritebackUnits = false0;
3792	}
3793	if (!v->WritebackSupportInterleaveAndUsingWholeBufferForASingleStream
3794	&& (v->WritebackConfiguration == dm_whole_buffer_for_single_stream_no_interleave
3795	\|\| v->WritebackConfiguration == dm_whole_buffer_for_single_stream_interleave)) {
3796
3797	WritebackModeSupport = false0;
3798	}
3799	if (v->WritebackConfiguration == dm_whole_buffer_for_single_stream_no_interleave && v->TotalNumberOfActiveWriteback > 1) {
3800	WritebackModeSupport = false0;
3801	}
3802
3803	/Writeback Scale Ratio and Taps Support Check/
3804
3805	v->WritebackScaleRatioAndTapsSupport = true1;
3806	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3807	if (v->WritebackEnable[k] == true1) {
3808	if (v->WritebackHRatio[k] > v->WritebackMaxHSCLRatio
3809	\|\| v->WritebackVRatio[k]
3810	> v->WritebackMaxVSCLRatio
3811	\|\| v->WritebackHRatio[k]
3812	< v->WritebackMinHSCLRatio
3813	\|\| v->WritebackVRatio[k]
3814	< v->WritebackMinVSCLRatio
3815	\|\| v->WritebackHTaps[k]
3816	> v->WritebackMaxHSCLTaps
3817	\|\| v->WritebackVTaps[k]
3818	> v->WritebackMaxVSCLTaps
3819	\|\| v->WritebackHRatio[k]
3820	> v->WritebackHTaps[k]
3821	\|\| v->WritebackVRatio[k]
3822	> v->WritebackVTaps[k]
3823	\|\| (v->WritebackHTaps[k] > 2.0
3824	&& ((v->WritebackHTaps[k] % 2)
3825	== 1))) {
3826	v->WritebackScaleRatioAndTapsSupport = false0;
3827	}
3828	if (2.0 * v->WritebackDestinationWidth[k] * (v->WritebackVTaps[k] - 1) * 57 > v->WritebackLineBufferSize) {
3829	v->WritebackScaleRatioAndTapsSupport = false0;
3830	}
3831	}
3832	}
3833	/Maximum DISPCLK/DPPCLK Support check/
3834
3835	v->WritebackRequiredDISPCLK = 0.0;
3836	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3837	if (v->WritebackEnable[k] == true1) {
3838	v->WritebackRequiredDISPCLK = dml_max(v->WritebackRequiredDISPCLK,
3839	dml30_CalculateWriteBackDISPCLK(
3840	v->WritebackPixelFormat[k],
3841	v->PixelClock[k],
3842	v->WritebackHRatio[k],
3843	v->WritebackVRatio[k],
3844	v->WritebackHTaps[k],
3845	v->WritebackVTaps[k],
3846	v->WritebackSourceWidth[k],
3847	v->WritebackDestinationWidth[k],
3848	v->HTotal[k],
3849	v->WritebackLineBufferSize));
3850	}
3851	}
3852	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3853	if (v->HRatio[k] > 1.0) {
3854	v->PSCL_FACTOR[k] = dml_min(v->MaxDCHUBToPSCLThroughput, v->MaxPSCLToLBThroughput * v->HRatio[k] / dml_ceil(v->htaps[k] / 6.0, 1.0));
3855	} else {
3856	v->PSCL_FACTOR[k] = dml_min(v->MaxDCHUBToPSCLThroughput, v->MaxPSCLToLBThroughput);
3857	}
3858	if (v->BytePerPixelC[k] == 0.0) {
3859	v->PSCL_FACTOR_CHROMA[k] = 0.0;
3860	v->MinDPPCLKUsingSingleDPP[k] = v->PixelClock[k]
3861	* dml_max3(v->vtaps[k] / 6.0 * dml_min(1.0, v->HRatio[k]), v->HRatio[k] * v->VRatio[k] / v->PSCL_FACTOR[k], 1.0);
3862	if ((v->htaps[k] > 6.0 \|\| v->vtaps[k] > 6.0) && v->MinDPPCLKUsingSingleDPP[k] < 2.0 * v->PixelClock[k]) {
3863	v->MinDPPCLKUsingSingleDPP[k] = 2.0 * v->PixelClock[k];
3864	}
3865	} else {
3866	if (v->HRatioChroma[k] > 1.0) {
3867	v->PSCL_FACTOR_CHROMA[k] = dml_min(v->MaxDCHUBToPSCLThroughput,
3868	v->MaxPSCLToLBThroughput * v->HRatioChroma[k] / dml_ceil(v->HTAPsChroma[k] / 6.0, 1.0));
3869	} else {
3870	v->PSCL_FACTOR_CHROMA[k] = dml_min(v->MaxDCHUBToPSCLThroughput, v->MaxPSCLToLBThroughput);
3871	}
3872	v->MinDPPCLKUsingSingleDPP[k] = v->PixelClock[k] * dml_max5(v->vtaps[k] / 6.0 * dml_min(1.0, v->HRatio[k]),
3873	v->HRatio[k] * v->VRatio[k] / v->PSCL_FACTOR[k],
3874	v->VTAPsChroma[k] / 6.0 * dml_min(1.0, v->HRatioChroma[k]),
3875	v->HRatioChroma[k] * v->VRatioChroma[k] / v->PSCL_FACTOR_CHROMA[k],
3876	1.0);
3877	if ((v->htaps[k] > 6.0 \|\| v->vtaps[k] > 6.0 \|\| v->HTAPsChroma[k] > 6.0 \|\| v->VTAPsChroma[k] > 6.0)
3878	&& v->MinDPPCLKUsingSingleDPP[k] < 2.0 * v->PixelClock[k]) {
3879	v->MinDPPCLKUsingSingleDPP[k] = 2.0 * v->PixelClock[k];
3880	}
3881	}
3882	}
3883	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3884	int MaximumSwathWidthSupportLuma = 0;
3885	int MaximumSwathWidthSupportChroma = 0;
3886
3887	if (v->SurfaceTiling[k] == dm_sw_linear) {
3888	MaximumSwathWidthSupportLuma = 8192.0;
3889	} else if (v->SourceScan[k] == dm_vert && v->BytePerPixelC[k] > 0) {
3890	MaximumSwathWidthSupportLuma = 2880.0;
3891	} else {
3892	MaximumSwathWidthSupportLuma = 5760.0;
3893	}
3894
3895	if (v->SourcePixelFormat[k] == dm_420_8 \|\| v->SourcePixelFormat[k] == dm_420_10 \|\| v->SourcePixelFormat[k] == dm_420_12) {
3896	MaximumSwathWidthSupportChroma = MaximumSwathWidthSupportLuma / 2.0;
3897	} else {
3898	MaximumSwathWidthSupportChroma = MaximumSwathWidthSupportLuma;
3899	}
3900	v->MaximumSwathWidthInLineBufferLuma = v->LineBufferSize * dml_max(v->HRatio[k], 1.0) / v->LBBitPerPixel[k]
3901	/ (v->vtaps[k] + dml_max(dml_ceil(v->VRatio[k], 1.0) - 2, 0.0));
3902	if (v->BytePerPixelC[k] == 0.0) {
3903	v->MaximumSwathWidthInLineBufferChroma = 0;
3904	} else {
3905	v->MaximumSwathWidthInLineBufferChroma = v->LineBufferSize * dml_max(v->HRatioChroma[k], 1.0) / v->LBBitPerPixel[k]
3906	/ (v->VTAPsChroma[k] + dml_max(dml_ceil(v->VRatioChroma[k], 1.0) - 2, 0.0));
3907	}
3908	v->MaximumSwathWidthLuma[k] = dml_min(MaximumSwathWidthSupportLuma, v->MaximumSwathWidthInLineBufferLuma);
3909	v->MaximumSwathWidthChroma[k] = dml_min(MaximumSwathWidthSupportChroma, v->MaximumSwathWidthInLineBufferChroma);
3910	}
3911
3912	CalculateSwathAndDETConfiguration(
3913	true1,
3914	v->NumberOfActivePlanes,
3915	v->DETBufferSizeInKByte,
3916	v->MaximumSwathWidthLuma,
3917	v->MaximumSwathWidthChroma,
3918	v->SourceScan,
3919	v->SourcePixelFormat,
3920	v->SurfaceTiling,
3921	v->ViewportWidth,
3922	v->ViewportHeight,
3923	v->SurfaceWidthY,
3924	v->SurfaceWidthC,
3925	v->SurfaceHeightY,
3926	v->SurfaceHeightC,
3927	v->Read256BlockHeightY,
3928	v->Read256BlockHeightC,
3929	v->Read256BlockWidthY,
3930	v->Read256BlockWidthC,
3931	v->odm_combine_dummy,
3932	v->BlendingAndTiming,
3933	v->BytePerPixelY,
3934	v->BytePerPixelC,
3935	v->BytePerPixelInDETY,
3936	v->BytePerPixelInDETC,
3937	v->HActive,
3938	v->HRatio,
3939	v->HRatioChroma,
3940	v->DPPPerPlane,
3941	v->swath_width_luma_ub,
3942	v->swath_width_chroma_ub,
3943	v->SwathWidthY,
3944	v->SwathWidthC,
3945	v->SwathHeightY,
3946	v->SwathHeightC,
3947	v->DETBufferSizeY,
3948	v->DETBufferSizeC,
3949	v->SingleDPPViewportSizeSupportPerPlane,
3950	&v->ViewportSizeSupport[0][0]);
3951
3952	for (i = 0; i < v->soc.num_states; i++) {
3953	for (j = 0; j < 2; j++) {
3954	v->MaxDispclkRoundedDownToDFSGranularity = RoundToDFSGranularityDown(v->MaxDispclk[i], v->DISPCLKDPPCLKVCOSpeed);
3955	v->MaxDppclkRoundedDownToDFSGranularity = RoundToDFSGranularityDown(v->MaxDppclk[i], v->DISPCLKDPPCLKVCOSpeed);
3956	v->RequiredDISPCLK[i][j] = 0.0;
3957	v->DISPCLK_DPPCLK_Support[i][j] = true1;
3958	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
3959	v->PlaneRequiredDISPCLKWithoutODMCombine = v->PixelClock[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0)
3960	* (1.0 + v->DISPCLKRampingMargin / 100.0);
3961	if ((v->PlaneRequiredDISPCLKWithoutODMCombine >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1]
3962	&& v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) {
3963	v->PlaneRequiredDISPCLKWithoutODMCombine = v->PixelClock[k] * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0);
3964	}
3965	v->PlaneRequiredDISPCLKWithODMCombine2To1 = v->PixelClock[k] / 2 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0)
3966	* (1 + v->DISPCLKRampingMargin / 100.0);
3967	if ((v->PlaneRequiredDISPCLKWithODMCombine2To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1]
3968	&& v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) {
3969	v->PlaneRequiredDISPCLKWithODMCombine2To1 = v->PixelClock[k] / 2 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0);
3970	}
3971	v->PlaneRequiredDISPCLKWithODMCombine4To1 = v->PixelClock[k] / 4 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0)
3972	* (1 + v->DISPCLKRampingMargin / 100.0);
3973	if ((v->PlaneRequiredDISPCLKWithODMCombine4To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1]
3974	&& v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) {
3975	v->PlaneRequiredDISPCLKWithODMCombine4To1 = v->PixelClock[k] / 4 * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0);
3976	}
3977
3978	if (v->ODMCombinePolicy == dm_odm_combine_policy_none) {
3979	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled;
3980	v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithoutODMCombine;
3981	} else if (v->ODMCombinePolicy == dm_odm_combine_policy_2to1) {
3982	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1;
3983	v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine2To1;
3984	} else if (v->ODMCombinePolicy == dm_odm_combine_policy_4to1
3985	\|\| v->PlaneRequiredDISPCLKWithODMCombine2To1 > v->MaxDispclkRoundedDownToDFSGranularity) {
3986	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_4to1;
3987	v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine4To1;
3988	} else if (v->PlaneRequiredDISPCLKWithoutODMCombine > v->MaxDispclkRoundedDownToDFSGranularity) {
3989	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1;
3990	v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine2To1;
3991	} else {
3992	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled;
3993	v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithoutODMCombine;
3994	}
3995	if (v->DSCEnabled[k] && v->HActive[k] > DCN30_MAX_DSC_IMAGE_WIDTH5184
3996	&& v->ODMCombineEnablePerState[i][k] != dm_odm_combine_mode_4to1) {
3997	if (v->HActive[k] / 2 > DCN30_MAX_DSC_IMAGE_WIDTH5184) {
3998	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_4to1;
3999	v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine4To1;
4000	} else {
4001	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1;
4002	v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine2To1;
4003	}
4004	}
4005	if (v->OutputFormat[k] == dm_420 && v->HActive[k] > DCN30_MAX_FMT_420_BUFFER_WIDTH4096
4006	&& v->ODMCombineEnablePerState[i][k] != dm_odm_combine_mode_4to1) {
4007	if (v->HActive[k] / 2 > DCN30_MAX_FMT_420_BUFFER_WIDTH4096) {
4008	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_4to1;
4009	v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine4To1;
4010	} else {
4011	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1;
4012	v->PlaneRequiredDISPCLK = v->PlaneRequiredDISPCLKWithODMCombine2To1;
4013	}
4014	}
4015	if (v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_4to1) {
4016	v->MPCCombine[i][j][k] = false0;
4017	v->NoOfDPP[i][j][k] = 4;
4018	v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) / 4;
4019	} else if (v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_2to1) {
4020	v->MPCCombine[i][j][k] = false0;
4021	v->NoOfDPP[i][j][k] = 2;
4022	v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) / 2;
4023	} else if ((v->WhenToDoMPCCombine == dm_mpc_never
4024	\|\| (v->MinDPPCLKUsingSingleDPP[k] * (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) <= v->MaxDppclkRoundedDownToDFSGranularity
4025	&& v->SingleDPPViewportSizeSupportPerPlane[k] == true1))) {
4026	v->MPCCombine[i][j][k] = false0;
4027	v->NoOfDPP[i][j][k] = 1;
4028	v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0);
4029	} else {
4030	v->MPCCombine[i][j][k] = true1;
4031	v->NoOfDPP[i][j][k] = 2;
4032	v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) / 2.0;
4033	}
4034	v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->PlaneRequiredDISPCLK);
4035	if ((v->MinDPPCLKUsingSingleDPP[k] / v->NoOfDPP[i][j][k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0)
4036	> v->MaxDppclkRoundedDownToDFSGranularity) \|\| (v->PlaneRequiredDISPCLK > v->MaxDispclkRoundedDownToDFSGranularity)) {
4037	v->DISPCLK_DPPCLK_Support[i][j] = false0;
4038	}
4039	}
4040	v->TotalNumberOfActiveDPP[i][j] = 0;
4041	v->TotalNumberOfSingleDPPPlanes[i][j] = 0;
4042	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4043	v->TotalNumberOfActiveDPP[i][j] = v->TotalNumberOfActiveDPP[i][j] + v->NoOfDPP[i][j][k];
4044	if (v->NoOfDPP[i][j][k] == 1)
4045	v->TotalNumberOfSingleDPPPlanes[i][j] = v->TotalNumberOfSingleDPPPlanes[i][j] + 1;
4046	}
4047	if (j == 1 && v->WhenToDoMPCCombine != dm_mpc_never) {
4048	while (!(v->TotalNumberOfActiveDPP[i][j] >= v->MaxNumDPP \|\| v->TotalNumberOfSingleDPPPlanes[i][j] == 0)) {
4049	double BWOfNonSplitPlaneOfMaximumBandwidth = 0;
4050	unsigned int NumberOfNonSplitPlaneOfMaximumBandwidth = 0;
4051	BWOfNonSplitPlaneOfMaximumBandwidth = 0;
4052	NumberOfNonSplitPlaneOfMaximumBandwidth = 0;
4053	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4054	if (v->ReadBandwidthLuma[k] + v->ReadBandwidthChroma[k] > BWOfNonSplitPlaneOfMaximumBandwidth
4055	&& v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_disabled && v->MPCCombine[i][j][k] == false0) {
4056	BWOfNonSplitPlaneOfMaximumBandwidth = v->ReadBandwidthLuma[k] + v->ReadBandwidthChroma[k];
4057	NumberOfNonSplitPlaneOfMaximumBandwidth = k;
4058	}
4059	}
4060	v->MPCCombine[i][j][NumberOfNonSplitPlaneOfMaximumBandwidth] = true1;
4061	v->NoOfDPP[i][j][NumberOfNonSplitPlaneOfMaximumBandwidth] = 2;
4062	v->RequiredDPPCLK[i][j][NumberOfNonSplitPlaneOfMaximumBandwidth] = v->MinDPPCLKUsingSingleDPP[NumberOfNonSplitPlaneOfMaximumBandwidth]
4063	* (1 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100) / 2;
4064	v->TotalNumberOfActiveDPP[i][j] = v->TotalNumberOfActiveDPP[i][j] + 1;
4065	v->TotalNumberOfSingleDPPPlanes[i][j] = v->TotalNumberOfSingleDPPPlanes[i][j] + 1;
4066	}
4067	}
4068	if (v->TotalNumberOfActiveDPP[i][j] > v->MaxNumDPP) {
4069	v->RequiredDISPCLK[i][j] = 0.0;
4070	v->DISPCLK_DPPCLK_Support[i][j] = true1;
4071	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4072	v->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled;
4073	if (v->SingleDPPViewportSizeSupportPerPlane[k] == false0 && v->WhenToDoMPCCombine != dm_mpc_never) {
4074	v->MPCCombine[i][j][k] = true1;
4075	v->NoOfDPP[i][j][k] = 2;
4076	v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0) / 2.0;
4077	} else {
4078	v->MPCCombine[i][j][k] = false0;
4079	v->NoOfDPP[i][j][k] = 1;
4080	v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0);
4081	}
4082	if (!(v->MaxDispclk[i] == v->MaxDispclk[v->soc.num_states - 1] && v->MaxDppclk[i] == v->MaxDppclk[v->soc.num_states - 1])) {
4083	v->PlaneRequiredDISPCLK = v->PixelClock[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0)
4084	* (1.0 + v->DISPCLKRampingMargin / 100.0);
4085	} else {
4086	v->PlaneRequiredDISPCLK = v->PixelClock[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0);
4087	}
4088	v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->PlaneRequiredDISPCLK);
4089	if ((v->MinDPPCLKUsingSingleDPP[k] / v->NoOfDPP[i][j][k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpreading / 100.0)
4090	> v->MaxDppclkRoundedDownToDFSGranularity) \|\| (v->PlaneRequiredDISPCLK > v->MaxDispclkRoundedDownToDFSGranularity)) {
4091	v->DISPCLK_DPPCLK_Support[i][j] = false0;
4092	}
4093	}
4094	v->TotalNumberOfActiveDPP[i][j] = 0.0;
4095	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4096	v->TotalNumberOfActiveDPP[i][j] = v->TotalNumberOfActiveDPP[i][j] + v->NoOfDPP[i][j][k];
4097	}
4098	}
4099	v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->WritebackRequiredDISPCLK);
4100	if (v->MaxDispclkRoundedDownToDFSGranularity < v->WritebackRequiredDISPCLK) {
4101	v->DISPCLK_DPPCLK_Support[i][j] = false0;
4102	}
4103	}
4104	}
4105
4106	/Total Available Pipes Support Check/
4107
4108	for (i = 0; i < v->soc.num_states; i++) {
4109	for (j = 0; j < 2; j++) {
4110	if (v->TotalNumberOfActiveDPP[i][j] <= v->MaxNumDPP) {
4111	v->TotalAvailablePipesSupport[i][j] = true1;
4112	} else {
4113	v->TotalAvailablePipesSupport[i][j] = false0;
4114	}
4115	}
4116	}
4117	/Display IO and DSC Support Check/
4118
4119	v->NonsupportedDSCInputBPC = false0;
4120	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4121	if (!(v->DSCInputBitPerComponent[k] == 12.0
4122	\|\| v->DSCInputBitPerComponent[k] == 10.0
4123	\|\| v->DSCInputBitPerComponent[k] == 8.0)) {
4124	v->NonsupportedDSCInputBPC = true1;
4125	}
4126	}
4127
4128	/Number Of DSC Slices/
4129	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4130	if (v->BlendingAndTiming[k] == k) {
4131	if (v->PixelClockBackEnd[k] > 3200) {
4132	v->NumberOfDSCSlices[k] = dml_ceil(v->PixelClockBackEnd[k] / 400.0, 4.0);
4133	} else if (v->PixelClockBackEnd[k] > 1360) {
4134	v->NumberOfDSCSlices[k] = 8;
4135	} else if (v->PixelClockBackEnd[k] > 680) {
4136	v->NumberOfDSCSlices[k] = 4;
4137	} else if (v->PixelClockBackEnd[k] > 340) {
4138	v->NumberOfDSCSlices[k] = 2;
4139	} else {
4140	v->NumberOfDSCSlices[k] = 1;
4141	}
4142	} else {
4143	v->NumberOfDSCSlices[k] = 0;
4144	}
4145	}
4146
4147	for (i = 0; i < v->soc.num_states; i++) {
4148	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4149	v->RequiresDSC[i][k] = false0;
4150	v->RequiresFEC[i][k] = false0;
4151	if (v->BlendingAndTiming[k] == k) {
4152	if (v->Output[k] == dm_hdmi) {
4153	v->RequiresDSC[i][k] = false0;
4154	v->RequiresFEC[i][k] = false0;
4155	v->OutputBppPerState[i][k] = TruncToValidBPP(
4156	dml_min(600.0, v->PHYCLKPerState[i]) * 10,
4157	3,
4158	v->HTotal[k],
4159	v->HActive[k],
4160	v->PixelClockBackEnd[k],
4161	v->ForcedOutputLinkBPP[k],
4162	false0,
4163	v->Output[k],
4164	v->OutputFormat[k],
4165	v->DSCInputBitPerComponent[k],
4166	v->NumberOfDSCSlices[k],
4167	v->AudioSampleRate[k],
4168	v->AudioSampleLayout[k],
4169	v->ODMCombineEnablePerState[i][k]);
4170	} else if (v->Output[k] == dm_dp \|\| v->Output[k] == dm_edp) {
4171	if (v->DSCEnable[k] == true1) {
4172	v->RequiresDSC[i][k] = true1;
4173	v->LinkDSCEnable = true1;
4174	if (v->Output[k] == dm_dp) {
4175	v->RequiresFEC[i][k] = true1;
4176	} else {
4177	v->RequiresFEC[i][k] = false0;
4178	}
4179	} else {
4180	v->RequiresDSC[i][k] = false0;
4181	v->LinkDSCEnable = false0;
4182	v->RequiresFEC[i][k] = false0;
4183	}
4184
4185	v->Outbpp = BPP_INVALID0;
4186	if (v->PHYCLKPerState[i] >= 270.0) {
4187	v->Outbpp = TruncToValidBPP(
4188	(1.0 - v->Downspreading / 100.0) * 2700,
4189	v->OutputLinkDPLanes[k],
4190	v->HTotal[k],
4191	v->HActive[k],
4192	v->PixelClockBackEnd[k],
4193	v->ForcedOutputLinkBPP[k],
4194	v->LinkDSCEnable,
4195	v->Output[k],
4196	v->OutputFormat[k],
4197	v->DSCInputBitPerComponent[k],
4198	v->NumberOfDSCSlices[k],
4199	v->AudioSampleRate[k],
4200	v->AudioSampleLayout[k],
4201	v->ODMCombineEnablePerState[i][k]);
4202	v->OutputBppPerState[i][k] = v->Outbpp;
4203	// TODO: Need some other way to handle this nonsense
4204	// v->OutputTypeAndRatePerState[i][k] = v->Output[k] & " HBR"
4205	}
4206	if (v->Outbpp == BPP_INVALID0 && v->PHYCLKPerState[i] >= 540.0) {
4207	v->Outbpp = TruncToValidBPP(
4208	(1.0 - v->Downspreading / 100.0) * 5400,
4209	v->OutputLinkDPLanes[k],
4210	v->HTotal[k],
4211	v->HActive[k],
4212	v->PixelClockBackEnd[k],
4213	v->ForcedOutputLinkBPP[k],
4214	v->LinkDSCEnable,
4215	v->Output[k],
4216	v->OutputFormat[k],
4217	v->DSCInputBitPerComponent[k],
4218	v->NumberOfDSCSlices[k],
4219	v->AudioSampleRate[k],
4220	v->AudioSampleLayout[k],
4221	v->ODMCombineEnablePerState[i][k]);
4222	v->OutputBppPerState[i][k] = v->Outbpp;
4223	// TODO: Need some other way to handle this nonsense
4224	// v->OutputTypeAndRatePerState[i][k] = v->Output[k] & " HBR2"
4225	}
4226	if (v->Outbpp == BPP_INVALID0 && v->PHYCLKPerState[i] >= 810.0) {
4227	v->Outbpp = TruncToValidBPP(
4228	(1.0 - v->Downspreading / 100.0) * 8100,
4229	v->OutputLinkDPLanes[k],
4230	v->HTotal[k],
4231	v->HActive[k],
4232	v->PixelClockBackEnd[k],
4233	v->ForcedOutputLinkBPP[k],
4234	v->LinkDSCEnable,
4235	v->Output[k],
4236	v->OutputFormat[k],
4237	v->DSCInputBitPerComponent[k],
4238	v->NumberOfDSCSlices[k],
4239	v->AudioSampleRate[k],
4240	v->AudioSampleLayout[k],
4241	v->ODMCombineEnablePerState[i][k]);
4242	if (v->Outbpp == BPP_INVALID0 && v->ForcedOutputLinkBPP[k] == 0) {
4243	//if (v->Outbpp == BPP_INVALID && v->DSCEnabled[k] == dm_dsc_enable_only_if_necessary && v->ForcedOutputLinkBPP[k] == 0) {
4244	v->RequiresDSC[i][k] = true1;
4245	v->LinkDSCEnable = true1;
4246	if (v->Output[k] == dm_dp) {
4247	v->RequiresFEC[i][k] = true1;
4248	}
4249	v->Outbpp = TruncToValidBPP(
4250	(1.0 - v->Downspreading / 100.0) * 8100,
4251	v->OutputLinkDPLanes[k],
4252	v->HTotal[k],
4253	v->HActive[k],
4254	v->PixelClockBackEnd[k],
4255	v->ForcedOutputLinkBPP[k],
4256	v->LinkDSCEnable,
4257	v->Output[k],
4258	v->OutputFormat[k],
4259	v->DSCInputBitPerComponent[k],
4260	v->NumberOfDSCSlices[k],
4261	v->AudioSampleRate[k],
4262	v->AudioSampleLayout[k],
4263	v->ODMCombineEnablePerState[i][k]);
4264	}
4265	v->OutputBppPerState[i][k] = v->Outbpp;
4266	// TODO: Need some other way to handle this nonsense
4267	// v->OutputTypeAndRatePerState[i][k] = v->Output[k] & " HBR3"
4268	}
4269	}
4270	} else {
4271	v->OutputBppPerState[i][k] = 0;
4272	}
4273	}
4274	}
4275	for (i = 0; i < v->soc.num_states; i++) {
4276	v->DIOSupport[i] = true1;
4277	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4278	if (v->BlendingAndTiming[k] == k && (v->Output[k] == dm_dp \|\| v->Output[k] == dm_edp \|\| v->Output[k] == dm_hdmi)
4279	&& (v->OutputBppPerState[i][k] == 0
4280	\|\| (v->OutputFormat[k] == dm_420 && v->Interlace[k] == true1 && v->ProgressiveToInterlaceUnitInOPP == true1))) {
4281	v->DIOSupport[i] = false0;
4282	}
4283	}
4284	}
4285
4286	for (i = 0; i < v->soc.num_states; ++i) {
4287	v->ODMCombine4To1SupportCheckOK[i] = true1;
4288	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4289	if (v->BlendingAndTiming[k] == k && v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_4to1
4290	&& (v->ODMCombine4To1Supported == false0 \|\| v->Output[k] == dm_dp \|\| v->Output[k] == dm_edp \|\| v->Output[k] == dm_hdmi)) {
4291	v->ODMCombine4To1SupportCheckOK[i] = false0;
4292	}
4293	}
4294	}
4295
4296	/* Skip dscclk validation: as long as dispclk is supported, dscclk is also implicitly supported */
4297
4298	for (i = 0; i < v->soc.num_states; i++) {
4299	v->NotEnoughDSCUnits[i] = false0;
4300	v->TotalDSCUnitsRequired = 0.0;
4301	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4302	if (v->RequiresDSC[i][k] == true1) {
4303	if (v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_4to1) {
4304	v->TotalDSCUnitsRequired = v->TotalDSCUnitsRequired + 4.0;
4305	} else if (v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_2to1) {
4306	v->TotalDSCUnitsRequired = v->TotalDSCUnitsRequired + 2.0;
4307	} else {
4308	v->TotalDSCUnitsRequired = v->TotalDSCUnitsRequired + 1.0;
4309	}
4310	}
4311	}
4312	if (v->TotalDSCUnitsRequired > v->NumberOfDSC) {
4313	v->NotEnoughDSCUnits[i] = true1;
4314	}
4315	}
4316	/DSC Delay per state/
4317
4318	for (i = 0; i < v->soc.num_states; i++) {
4319	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4320	if (v->OutputBppPerState[i][k] == BPP_INVALID0) {
4321	v->BPP = 0.0;
4322	} else {
4323	v->BPP = v->OutputBppPerState[i][k];
4324	}
4325	if (v->RequiresDSC[i][k] == true1 && v->BPP != 0.0) {
4326	if (v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_disabled) {
4327	v->DSCDelayPerState[i][k] = dscceComputeDelay(
4328	v->DSCInputBitPerComponent[k],
4329	v->BPP,
4330	dml_ceil(1.0 * v->HActive[k] / v->NumberOfDSCSlices[k], 1.0),
4331	v->NumberOfDSCSlices[k],
4332	v->OutputFormat[k],
4333	v->Output[k]) + dscComputeDelay(v->OutputFormat[k], v->Output[k]);
4334	} else if (v->ODMCombineEnablePerState[i][k] == dm_odm_combine_mode_2to1) {
4335	v->DSCDelayPerState[i][k] = 2.0
4336	* dscceComputeDelay(
4337	v->DSCInputBitPerComponent[k],
4338	v->BPP,
4339	dml_ceil(1.0 * v->HActive[k] / v->NumberOfDSCSlices[k], 1.0),
4340	v->NumberOfDSCSlices[k] / 2,
4341	v->OutputFormat[k],
4342	v->Output[k]) + dscComputeDelay(v->OutputFormat[k], v->Output[k]);
4343	} else {
4344	v->DSCDelayPerState[i][k] = 4.0
4345	* (dscceComputeDelay(
4346	v->DSCInputBitPerComponent[k],
4347	v->BPP,
4348	dml_ceil(1.0 * v->HActive[k] / v->NumberOfDSCSlices[k], 1.0),
4349	v->NumberOfDSCSlices[k] / 4,
4350	v->OutputFormat[k],
4351	v->Output[k]) + dscComputeDelay(v->OutputFormat[k], v->Output[k]));
4352	}
4353	v->DSCDelayPerState[i][k] = v->DSCDelayPerState[i][k] * v->PixelClock[k] / v->PixelClockBackEnd[k];
4354	} else {
4355	v->DSCDelayPerState[i][k] = 0.0;
4356	}
4357	}
4358	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4359	for (m = 0; m <= v->NumberOfActivePlanes - 1; m++) {
4360	if (v->BlendingAndTiming[k] == m && v->RequiresDSC[i][m] == true1) {
4361	v->DSCDelayPerState[i][k] = v->DSCDelayPerState[i][m];
4362	}
4363	}
4364	}
4365	}
4366
4367	//Calculate Swath, DET Configuration, DCFCLKDeepSleep
4368	//
4369	for (i = 0; i < mode_lib->soc.num_states; ++i) {
4370	for (j = 0; j <= 1; ++j) {
4371	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4372	v->RequiredDPPCLKThisState[k] = v->RequiredDPPCLK[i][j][k];
4373	v->NoOfDPPThisState[k] = v->NoOfDPP[i][j][k];
4374	v->ODMCombineEnableThisState[k] = v->ODMCombineEnablePerState[i][k];
4375	}
4376
4377	CalculateSwathAndDETConfiguration(
4378	false0,
4379	v->NumberOfActivePlanes,
4380	v->DETBufferSizeInKByte,
4381	v->MaximumSwathWidthLuma,
4382	v->MaximumSwathWidthChroma,
4383	v->SourceScan,
4384	v->SourcePixelFormat,
4385	v->SurfaceTiling,
4386	v->ViewportWidth,
4387	v->ViewportHeight,
4388	v->SurfaceWidthY,
4389	v->SurfaceWidthC,
4390	v->SurfaceHeightY,
4391	v->SurfaceHeightC,
4392	v->Read256BlockHeightY,
4393	v->Read256BlockHeightC,
4394	v->Read256BlockWidthY,
4395	v->Read256BlockWidthC,
4396	v->ODMCombineEnableThisState,
4397	v->BlendingAndTiming,
4398	v->BytePerPixelY,
4399	v->BytePerPixelC,
4400	v->BytePerPixelInDETY,
4401	v->BytePerPixelInDETC,
4402	v->HActive,
4403	v->HRatio,
4404	v->HRatioChroma,
4405	v->NoOfDPPThisState,
4406	v->swath_width_luma_ub_this_state,
4407	v->swath_width_chroma_ub_this_state,
4408	v->SwathWidthYThisState,
4409	v->SwathWidthCThisState,
4410	v->SwathHeightYThisState,
4411	v->SwathHeightCThisState,
4412	v->DETBufferSizeYThisState,
4413	v->DETBufferSizeCThisState,
4414	v->dummystring,
4415	&v->ViewportSizeSupport[i][j]);
4416
4417	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4418	v->swath_width_luma_ub_all_states[i][j][k] = v->swath_width_luma_ub_this_state[k];
4419	v->swath_width_chroma_ub_all_states[i][j][k] = v->swath_width_chroma_ub_this_state[k];
4420	v->SwathWidthYAllStates[i][j][k] = v->SwathWidthYThisState[k];
4421	v->SwathWidthCAllStates[i][j][k] = v->SwathWidthCThisState[k];
4422	v->SwathHeightYAllStates[i][j][k] = v->SwathHeightYThisState[k];
4423	v->SwathHeightCAllStates[i][j][k] = v->SwathHeightCThisState[k];
4424	v->DETBufferSizeYAllStates[i][j][k] = v->DETBufferSizeYThisState[k];
4425	v->DETBufferSizeCAllStates[i][j][k] = v->DETBufferSizeCThisState[k];
4426	}
4427
4428	}
4429	}
4430	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4431	v->cursor_bw[k] = v->NumberOfCursors[k] * v->CursorWidth[k][0] * v->CursorBPP[k][0] / 8.0 / (v->HTotal[k] / v->PixelClock[k]) * v->VRatio[k];
4432	}
4433
4434	for (i = 0; i < v->soc.num_states; i++) {
4435	for (j = 0; j < 2; j++) {
4436	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4437	v->swath_width_luma_ub_this_state[k] = v->swath_width_luma_ub_all_states[i][j][k];
4438	v->swath_width_chroma_ub_this_state[k] = v->swath_width_chroma_ub_all_states[i][j][k];
4439	v->SwathWidthYThisState[k] = v->SwathWidthYAllStates[i][j][k];
4440	v->SwathWidthCThisState[k] = v->SwathWidthCAllStates[i][j][k];
4441	v->SwathHeightYThisState[k] = v->SwathHeightYAllStates[i][j][k];
4442	v->SwathHeightCThisState[k] = v->SwathHeightCAllStates[i][j][k];
4443	v->DETBufferSizeYThisState[k] = v->DETBufferSizeYAllStates[i][j][k];
4444	v->DETBufferSizeCThisState[k] = v->DETBufferSizeCAllStates[i][j][k];
4445	}
4446
4447	v->TotalNumberOfDCCActiveDPP[i][j] = 0;
4448	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4449	if (v->DCCEnable[k] == true1) {
4450	v->TotalNumberOfDCCActiveDPP[i][j] = v->TotalNumberOfDCCActiveDPP[i][j] + v->NoOfDPP[i][j][k];
4451	}
4452	}
4453
4454	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4455	if (v->SourcePixelFormat[k] == dm_420_8 \|\| v->SourcePixelFormat[k] == dm_420_10 \|\| v->SourcePixelFormat[k] == dm_420_12
4456	\|\| v->SourcePixelFormat[k] == dm_rgbe_alpha) {
4457
4458	if ((v->SourcePixelFormat[k] == dm_420_10 \|\| v->SourcePixelFormat[k] == dm_420_12) && v->SourceScan[k] != dm_vert) {
4459	v->PTEBufferSizeInRequestsForLuma = (v->PTEBufferSizeInRequestsLuma + v->PTEBufferSizeInRequestsChroma) / 2;
4460	v->PTEBufferSizeInRequestsForChroma = v->PTEBufferSizeInRequestsForLuma;
4461	} else {
4462	v->PTEBufferSizeInRequestsForLuma = v->PTEBufferSizeInRequestsLuma;
4463	v->PTEBufferSizeInRequestsForChroma = v->PTEBufferSizeInRequestsChroma;
4464	}
4465
4466	v->PDEAndMetaPTEBytesPerFrameC = CalculateVMAndRowBytes(
4467	mode_lib,
4468	v->DCCEnable[k],
4469	v->Read256BlockHeightC[k],
4470	v->Read256BlockWidthY[k],
4471	v->SourcePixelFormat[k],
4472	v->SurfaceTiling[k],
4473	v->BytePerPixelC[k],
4474	v->SourceScan[k],
4475	v->SwathWidthCThisState[k],
4476	v->ViewportHeightChroma[k],
4477	v->GPUVMEnable,
4478	v->HostVMEnable,
4479	v->HostVMMaxNonCachedPageTableLevels,
4480	v->GPUVMMinPageSize,
4481	v->HostVMMinPageSize,
4482	v->PTEBufferSizeInRequestsForChroma,
4483	v->PitchC[k],
4484	0.0,
4485	&v->MacroTileWidthC[k],
4486	&v->MetaRowBytesC,
4487	&v->DPTEBytesPerRowC,
4488	&v->PTEBufferSizeNotExceededC[i][j][k],
4489	&v->dummyinteger7,
4490	&v->dpte_row_height_chroma[k],
4491	&v->dummyinteger28,
4492	&v->dummyinteger26,
4493	&v->dummyinteger23,
4494	&v->meta_row_height_chroma[k],
4495	&v->dummyinteger8,
4496	&v->dummyinteger9,
4497	&v->dummyinteger19,
4498	&v->dummyinteger20,
4499	&v->dummyinteger17,
4500	&v->dummyinteger10,
4501	&v->dummyinteger11);
4502
4503	v->PrefetchLinesC[i][j][k] = CalculatePrefetchSourceLines(
4504	mode_lib,
4505	v->VRatioChroma[k],
4506	v->VTAPsChroma[k],
4507	v->Interlace[k],
4508	v->ProgressiveToInterlaceUnitInOPP,
4509	v->SwathHeightCThisState[k],
4510	v->ViewportYStartC[k],
4511	&v->PrefillC[k],
4512	&v->MaxNumSwC[k]);
4513	} else {
4514	v->PTEBufferSizeInRequestsForLuma = v->PTEBufferSizeInRequestsLuma + v->PTEBufferSizeInRequestsChroma;
4515	v->PTEBufferSizeInRequestsForChroma = 0;
4516	v->PDEAndMetaPTEBytesPerFrameC = 0.0;
4517	v->MetaRowBytesC = 0.0;
4518	v->DPTEBytesPerRowC = 0.0;
4519	v->PrefetchLinesC[i][j][k] = 0.0;
4520	v->PTEBufferSizeNotExceededC[i][j][k] = true1;
4521	}
4522	v->PDEAndMetaPTEBytesPerFrameY = CalculateVMAndRowBytes(
4523	mode_lib,
4524	v->DCCEnable[k],
4525	v->Read256BlockHeightY[k],
4526	v->Read256BlockWidthY[k],
4527	v->SourcePixelFormat[k],
4528	v->SurfaceTiling[k],
4529	v->BytePerPixelY[k],
4530	v->SourceScan[k],
4531	v->SwathWidthYThisState[k],
4532	v->ViewportHeight[k],
4533	v->GPUVMEnable,
4534	v->HostVMEnable,
4535	v->HostVMMaxNonCachedPageTableLevels,
4536	v->GPUVMMinPageSize,
4537	v->HostVMMinPageSize,
4538	v->PTEBufferSizeInRequestsForLuma,
4539	v->PitchY[k],
4540	v->DCCMetaPitchY[k],
4541	&v->MacroTileWidthY[k],
4542	&v->MetaRowBytesY,
4543	&v->DPTEBytesPerRowY,
4544	&v->PTEBufferSizeNotExceededY[i][j][k],
4545	v->dummyinteger4,
4546	&v->dpte_row_height[k],
4547	&v->dummyinteger29,
4548	&v->dummyinteger27,
4549	&v->dummyinteger24,
4550	&v->meta_row_height[k],
4551	&v->dummyinteger25,
4552	&v->dpte_group_bytes[k],
4553	&v->dummyinteger21,
4554	&v->dummyinteger22,
4555	&v->dummyinteger18,
4556	&v->dummyinteger5,
4557	&v->dummyinteger6);
4558	v->PrefetchLinesY[i][j][k] = CalculatePrefetchSourceLines(
4559	mode_lib,
4560	v->VRatio[k],
4561	v->vtaps[k],
4562	v->Interlace[k],
4563	v->ProgressiveToInterlaceUnitInOPP,
4564	v->SwathHeightYThisState[k],
4565	v->ViewportYStartY[k],
4566	&v->PrefillY[k],
4567	&v->MaxNumSwY[k]);
4568	v->PDEAndMetaPTEBytesPerFrame[i][j][k] = v->PDEAndMetaPTEBytesPerFrameY + v->PDEAndMetaPTEBytesPerFrameC;
4569	v->MetaRowBytes[i][j][k] = v->MetaRowBytesY + v->MetaRowBytesC;
4570	v->DPTEBytesPerRow[i][j][k] = v->DPTEBytesPerRowY + v->DPTEBytesPerRowC;
4571
4572	CalculateRowBandwidth(
4573	v->GPUVMEnable,
4574	v->SourcePixelFormat[k],
4575	v->VRatio[k],
4576	v->VRatioChroma[k],
4577	v->DCCEnable[k],
4578	v->HTotal[k] / v->PixelClock[k],
4579	v->MetaRowBytesY,
4580	v->MetaRowBytesC,
4581	v->meta_row_height[k],
4582	v->meta_row_height_chroma[k],
4583	v->DPTEBytesPerRowY,
4584	v->DPTEBytesPerRowC,
4585	v->dpte_row_height[k],
4586	v->dpte_row_height_chroma[k],
4587	&v->meta_row_bandwidth[i][j][k],
4588	&v->dpte_row_bandwidth[i][j][k]);
4589	}
4590	v->UrgLatency[i] = CalculateUrgentLatency(
4591	v->UrgentLatencyPixelDataOnly,
4592	v->UrgentLatencyPixelMixedWithVMData,
4593	v->UrgentLatencyVMDataOnly,
4594	v->DoUrgentLatencyAdjustment,
4595	v->UrgentLatencyAdjustmentFabricClockComponent,
4596	v->UrgentLatencyAdjustmentFabricClockReference,
4597	v->FabricClockPerState[i]);
4598
4599	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4600	CalculateUrgentBurstFactor(
4601	v->swath_width_luma_ub_this_state[k],
4602	v->swath_width_chroma_ub_this_state[k],
4603	v->DETBufferSizeInKByte,
4604	v->SwathHeightYThisState[k],
4605	v->SwathHeightCThisState[k],
4606	v->HTotal[k] / v->PixelClock[k],
4607	v->UrgLatency[i],
4608	v->CursorBufferSize,
4609	v->CursorWidth[k][0],
4610	v->CursorBPP[k][0],
4611	v->VRatio[k],
4612	v->VRatioChroma[k],
4613	v->BytePerPixelInDETY[k],
4614	v->BytePerPixelInDETC[k],
4615	v->DETBufferSizeYThisState[k],
4616	v->DETBufferSizeCThisState[k],
4617	&v->UrgentBurstFactorCursor[k],
4618	&v->UrgentBurstFactorLuma[k],
4619	&v->UrgentBurstFactorChroma[k],
4620	&NotUrgentLatencyHiding[k]);
4621	}
4622
4623	v->NotUrgentLatencyHiding[i][j] = false0;
4624	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4625	if (NotUrgentLatencyHiding[k]) {
4626	v->NotUrgentLatencyHiding[i][j] = true1;
4627	}
4628	}
4629
4630	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4631	v->VActivePixelBandwidth[i][j][k] = v->ReadBandwidthLuma[k] * v->UrgentBurstFactorLuma[k]
4632	+ v->ReadBandwidthChroma[k] * v->UrgentBurstFactorChroma[k];
4633	v->VActiveCursorBandwidth[i][j][k] = v->cursor_bw[k] * v->UrgentBurstFactorCursor[k];
4634	}
4635
4636	v->TotalVActivePixelBandwidth[i][j] = 0;
4637	v->TotalVActiveCursorBandwidth[i][j] = 0;
4638	v->TotalMetaRowBandwidth[i][j] = 0;
4639	v->TotalDPTERowBandwidth[i][j] = 0;
4640	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4641	v->TotalVActivePixelBandwidth[i][j] = v->TotalVActivePixelBandwidth[i][j] + v->VActivePixelBandwidth[i][j][k];
4642	v->TotalVActiveCursorBandwidth[i][j] = v->TotalVActiveCursorBandwidth[i][j] + v->VActiveCursorBandwidth[i][j][k];
4643	v->TotalMetaRowBandwidth[i][j] = v->TotalMetaRowBandwidth[i][j] + v->NoOfDPP[i][j][k] * v->meta_row_bandwidth[i][j][k];
4644	v->TotalDPTERowBandwidth[i][j] = v->TotalDPTERowBandwidth[i][j] + v->NoOfDPP[i][j][k] * v->dpte_row_bandwidth[i][j][k];
4645	}
4646
4647	CalculateDCFCLKDeepSleep(
4648	mode_lib,
4649	v->NumberOfActivePlanes,
4650	v->BytePerPixelY,
4651	v->BytePerPixelC,
4652	v->VRatio,
4653	v->VRatioChroma,
4654	v->SwathWidthYThisState,
4655	v->SwathWidthCThisState,
4656	v->NoOfDPPThisState,
4657	v->HRatio,
4658	v->HRatioChroma,
4659	v->PixelClock,
4660	v->PSCL_FACTOR,
4661	v->PSCL_FACTOR_CHROMA,
4662	v->RequiredDPPCLKThisState,
4663	v->ReadBandwidthLuma,
4664	v->ReadBandwidthChroma,
4665	v->ReturnBusWidth,
4666	&v->ProjectedDCFCLKDeepSleep[i][j]);
4667	}
4668	}
4669
4670	//Calculate Return BW
4671
4672	for (i = 0; i < mode_lib->soc.num_states; ++i) {
4673	for (j = 0; j <= 1; ++j) {
4674	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4675	if (v->BlendingAndTiming[k] == k) {
4676	if (v->WritebackEnable[k] == true1) {
4677	v->WritebackDelayTime[k] = v->WritebackLatency
4678	+ CalculateWriteBackDelay(
4679	v->WritebackPixelFormat[k],
4680	v->WritebackHRatio[k],
4681	v->WritebackVRatio[k],
4682	v->WritebackVTaps[k],
4683	v->WritebackDestinationWidth[k],
4684	v->WritebackDestinationHeight[k],
4685	v->WritebackSourceHeight[k],
4686	v->HTotal[k]) / v->RequiredDISPCLK[i][j];
4687	} else {
4688	v->WritebackDelayTime[k] = 0.0;
4689	}
4690	for (m = 0; m <= v->NumberOfActivePlanes - 1; m++) {
4691	if (v->BlendingAndTiming[m] == k && v->WritebackEnable[m] == true1) {
4692	v->WritebackDelayTime[k] = dml_max(
4693	v->WritebackDelayTime[k],
4694	v->WritebackLatency
4695	+ CalculateWriteBackDelay(
4696	v->WritebackPixelFormat[m],
4697	v->WritebackHRatio[m],
4698	v->WritebackVRatio[m],
4699	v->WritebackVTaps[m],
4700	v->WritebackDestinationWidth[m],
4701	v->WritebackDestinationHeight[m],
4702	v->WritebackSourceHeight[m],
4703	v->HTotal[m]) / v->RequiredDISPCLK[i][j]);
4704	}
4705	}
4706	}
4707	}
4708	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4709	for (m = 0; m <= v->NumberOfActivePlanes - 1; m++) {
4710	if (v->BlendingAndTiming[k] == m) {
4711	v->WritebackDelayTime[k] = v->WritebackDelayTime[m];
4712	}
4713	}
4714	}
4715	v->MaxMaxVStartup[i][j] = 0;
4716	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4717	v->MaximumVStartup[i][j][k] = v->VTotal[k] - v->VActive[k]
4718	- dml_max(1.0, dml_ceil(1.0 * v->WritebackDelayTime[k] / (v->HTotal[k] / v->PixelClock[k]), 1.0));
4719	v->MaxMaxVStartup[i][j] = dml_max(v->MaxMaxVStartup[i][j], v->MaximumVStartup[i][j][k]);
4720	}
4721	}
4722	}
4723
4724	ReorderingBytes = v->NumberOfChannels
4725	* dml_max3(
4726	v->UrgentOutOfOrderReturnPerChannelPixelDataOnly,
4727	v->UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData,
4728	v->UrgentOutOfOrderReturnPerChannelVMDataOnly);
4729	v->FinalDRAMClockChangeLatency = (v->DRAMClockChangeLatencyOverride > 0 ? v->DRAMClockChangeLatencyOverride : v->DRAMClockChangeLatency);
4730
4731	for (i = 0; i < mode_lib->soc.num_states; ++i) {
4732	for (j = 0; j <= 1; ++j) {
4733	v->DCFCLKState[i][j] = v->DCFCLKPerState[i];
4734	}
4735	}
4736
4737	if (v->UseMinimumRequiredDCFCLK == true1) {
4738	UseMinimumDCFCLK(
4739	mode_lib,
4740	v->MaxInterDCNTileRepeaters,
4741	MaxPrefetchMode,
4742	v->FinalDRAMClockChangeLatency,
4743	v->SREnterPlusExitTime,
4744	v->ReturnBusWidth,
4745	v->RoundTripPingLatencyCycles,
4746	ReorderingBytes,
4747	v->PixelChunkSizeInKByte,
4748	v->MetaChunkSize,
4749	v->GPUVMEnable,
4750	v->GPUVMMaxPageTableLevels,
4751	v->HostVMEnable,
4752	v->NumberOfActivePlanes,
4753	v->HostVMMinPageSize,
4754	v->HostVMMaxNonCachedPageTableLevels,
4755	v->DynamicMetadataVMEnabled,
4756	v->ImmediateFlipRequirement,
4757	v->ProgressiveToInterlaceUnitInOPP,
4758	v->MaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperation,
4759	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
4760	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
4761	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly,
4762	v->VTotal,
4763	v->VActive,
4764	v->DynamicMetadataTransmittedBytes,
4765	v->DynamicMetadataLinesBeforeActiveRequired,
4766	v->Interlace,
4767	v->RequiredDPPCLK,
4768	v->RequiredDISPCLK,
4769	v->UrgLatency,
4770	v->NoOfDPP,
4771	v->ProjectedDCFCLKDeepSleep,
4772	v->MaximumVStartup,
4773	v->TotalVActivePixelBandwidth,
4774	v->TotalVActiveCursorBandwidth,
4775	v->TotalMetaRowBandwidth,
4776	v->TotalDPTERowBandwidth,
4777	v->TotalNumberOfActiveDPP,
4778	v->TotalNumberOfDCCActiveDPP,
4779	v->dpte_group_bytes,
4780	v->PrefetchLinesY,
4781	v->PrefetchLinesC,
4782	v->swath_width_luma_ub_all_states,
4783	v->swath_width_chroma_ub_all_states,
4784	v->BytePerPixelY,
4785	v->BytePerPixelC,
4786	v->HTotal,
4787	v->PixelClock,
4788	v->PDEAndMetaPTEBytesPerFrame,
4789	v->DPTEBytesPerRow,
4790	v->MetaRowBytes,
4791	v->DynamicMetadataEnable,
4792	v->VActivePixelBandwidth,
4793	v->VActiveCursorBandwidth,
4794	v->ReadBandwidthLuma,
4795	v->ReadBandwidthChroma,
4796	v->DCFCLKPerState,
4797	v->DCFCLKState);
4798
4799	if (v->ClampMinDCFCLK) {
4800	/* Clamp calculated values to actual minimum */
4801	for (i = 0; i < mode_lib->soc.num_states; ++i) {
4802	for (j = 0; j <= 1; ++j) {
4803	if (v->DCFCLKState[i][j] < mode_lib->soc.min_dcfclk) {
4804	v->DCFCLKState[i][j] = mode_lib->soc.min_dcfclk;
4805	}
4806	}
4807	}
4808	}
4809	}
4810
4811	for (i = 0; i < mode_lib->soc.num_states; ++i) {
4812	for (j = 0; j <= 1; ++j) {
4813	v->IdealSDPPortBandwidthPerState[i][j] = dml_min3(
4814	v->ReturnBusWidth * v->DCFCLKState[i][j],
4815	v->DRAMSpeedPerState[i] * v->NumberOfChannels * v->DRAMChannelWidth,
4816	v->FabricClockPerState[i] * v->FabricDatapathToDCNDataReturn);
4817	if (v->HostVMEnable != true1) {
4818	v->ReturnBWPerState[i][j] = v->IdealSDPPortBandwidthPerState[i][j] * v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly
4819	/ 100;
4820	} else {
4821	v->ReturnBWPerState[i][j] = v->IdealSDPPortBandwidthPerState[i][j]
4822	* v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData / 100;
4823	}
4824	}
4825	}
4826
4827	//Re-ordering Buffer Support Check
4828
4829	for (i = 0; i < mode_lib->soc.num_states; ++i) {
4830	for (j = 0; j <= 1; ++j) {
4831	if ((v->ROBBufferSizeInKByte - v->PixelChunkSizeInKByte) * 1024 / v->ReturnBWPerState[i][j]
4832	> (v->RoundTripPingLatencyCycles + 32) / v->DCFCLKState[i][j] + ReorderingBytes / v->ReturnBWPerState[i][j]) {
4833	v->ROBSupport[i][j] = true1;
4834	} else {
4835	v->ROBSupport[i][j] = false0;
4836	}
4837	}
4838	}
4839
4840	//Vertical Active BW support check
4841
4842	MaxTotalVActiveRDBandwidth = 0;
4843	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4844	MaxTotalVActiveRDBandwidth = MaxTotalVActiveRDBandwidth + v->ReadBandwidthLuma[k] + v->ReadBandwidthChroma[k];
4845	}
4846
4847	for (i = 0; i < mode_lib->soc.num_states; ++i) {
4848	for (j = 0; j <= 1; ++j) {
4849	v->MaxTotalVerticalActiveAvailableBandwidth[i][j] = dml_min(
4850	v->IdealSDPPortBandwidthPerState[i][j] * v->MaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperation / 100,
4851	v->DRAMSpeedPerState[i] * v->NumberOfChannels * v->DRAMChannelWidth * v->MaxAveragePercentOfIdealDRAMBWDisplayCanUseInNormalSystemOperation
4852	/ 100);
4853	if (MaxTotalVActiveRDBandwidth <= v->MaxTotalVerticalActiveAvailableBandwidth[i][j]) {
4854	v->TotalVerticalActiveBandwidthSupport[i][j] = true1;
4855	} else {
4856	v->TotalVerticalActiveBandwidthSupport[i][j] = false0;
4857	}
4858	}
4859	}
4860
4861	//Prefetch Check
4862
4863	for (i = 0; i < mode_lib->soc.num_states; ++i) {
4864	for (j = 0; j <= 1; ++j) {
4865	int NextPrefetchModeState = MinPrefetchMode;
4866
4867	v->TimeCalc = 24 / v->ProjectedDCFCLKDeepSleep[i][j];
4868
4869	v->BandwidthWithoutPrefetchSupported[i][j] = true1;
4870	if (v->TotalVActivePixelBandwidth[i][j] + v->TotalVActiveCursorBandwidth[i][j] + v->TotalMetaRowBandwidth[i][j] + v->TotalDPTERowBandwidth[i][j]
4871	> v->ReturnBWPerState[i][j] \|\| v->NotUrgentLatencyHiding[i][j]) {
4872	v->BandwidthWithoutPrefetchSupported[i][j] = false0;
4873	}
4874
4875	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
4876	v->NoOfDPPThisState[k] = v->NoOfDPP[i][j][k];
4877	v->swath_width_luma_ub_this_state[k] = v->swath_width_luma_ub_all_states[i][j][k];
4878	v->swath_width_chroma_ub_this_state[k] = v->swath_width_chroma_ub_all_states[i][j][k];
4879	v->SwathWidthYThisState[k] = v->SwathWidthYAllStates[i][j][k];
4880	v->SwathWidthCThisState[k] = v->SwathWidthCAllStates[i][j][k];
4881	v->SwathHeightYThisState[k] = v->SwathHeightYAllStates[i][j][k];
4882	v->SwathHeightCThisState[k] = v->SwathHeightCAllStates[i][j][k];
4883	v->DETBufferSizeYThisState[k] = v->DETBufferSizeYAllStates[i][j][k];
4884	v->DETBufferSizeCThisState[k] = v->DETBufferSizeCAllStates[i][j][k];
4885	v->ODMCombineEnabled[k] = v->ODMCombineEnablePerState[i][k];
4886	}
4887
4888	v->ExtraLatency = CalculateExtraLatency(
4889	v->RoundTripPingLatencyCycles,
4890	ReorderingBytes,
4891	v->DCFCLKState[i][j],
4892	v->TotalNumberOfActiveDPP[i][j],
4893	v->PixelChunkSizeInKByte,
4894	v->TotalNumberOfDCCActiveDPP[i][j],
4895	v->MetaChunkSize,
4896	v->ReturnBWPerState[i][j],
4897	v->GPUVMEnable,
4898	v->HostVMEnable,
4899	v->NumberOfActivePlanes,
4900	v->NoOfDPPThisState,
4901	v->dpte_group_bytes,
4902	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
4903	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
4904	v->HostVMMinPageSize,
4905	v->HostVMMaxNonCachedPageTableLevels);
4906
4907	v->NextMaxVStartup = v->MaxMaxVStartup[i][j];
4908	do {
4909	v->PrefetchModePerState[i][j] = NextPrefetchModeState;
4910	v->MaxVStartup = v->NextMaxVStartup;
4911
4912	v->TWait = CalculateTWait(v->PrefetchModePerState[i][j], v->FinalDRAMClockChangeLatency, v->UrgLatency[i], v->SREnterPlusExitTime);
4913
4914	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
4915	Pipe myPipe = { 0 };
4916
4917	myPipe.DPPCLK = v->RequiredDPPCLK[i][j][k];
4918	myPipe.DISPCLK = v->RequiredDISPCLK[i][j];
4919	myPipe.PixelClock = v->PixelClock[k];
4920	myPipe.DCFCLKDeepSleep = v->ProjectedDCFCLKDeepSleep[i][j];
4921	myPipe.DPPPerPlane = v->NoOfDPP[i][j][k];
4922	myPipe.ScalerEnabled = v->ScalerEnabled[k];
4923	myPipe.SourceScan = v->SourceScan[k];
4924	myPipe.BlockWidth256BytesY = v->Read256BlockWidthY[k];
4925	myPipe.BlockHeight256BytesY = v->Read256BlockHeightY[k];
4926	myPipe.BlockWidth256BytesC = v->Read256BlockWidthC[k];
4927	myPipe.BlockHeight256BytesC = v->Read256BlockHeightC[k];
4928	myPipe.InterlaceEnable = v->Interlace[k];
4929	myPipe.NumberOfCursors = v->NumberOfCursors[k];
4930	myPipe.VBlank = v->VTotal[k] - v->VActive[k];
4931	myPipe.HTotal = v->HTotal[k];
4932	myPipe.DCCEnable = v->DCCEnable[k];
4933	myPipe.ODMCombineEnabled = !!v->ODMCombineEnabled[k];
4934
4935	v->NoTimeForPrefetch[i][j][k] = CalculatePrefetchSchedule(
4936	mode_lib,
4937	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
4938	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
4939	&myPipe,
4940	v->DSCDelayPerState[i][k],
4941	v->DPPCLKDelaySubtotal + v->DPPCLKDelayCNVCFormater,
4942	v->DPPCLKDelaySCL,
4943	v->DPPCLKDelaySCLLBOnly,
4944	v->DPPCLKDelayCNVCCursor,
4945	v->DISPCLKDelaySubtotal,
4946	v->SwathWidthYThisState[k] / v->HRatio[k],
4947	v->OutputFormat[k],
4948	v->MaxInterDCNTileRepeaters,
4949	dml_min(v->MaxVStartup, v->MaximumVStartup[i][j][k]),
4950	v->MaximumVStartup[i][j][k],
4951	v->GPUVMMaxPageTableLevels,
4952	v->GPUVMEnable,
4953	v->HostVMEnable,
4954	v->HostVMMaxNonCachedPageTableLevels,
4955	v->HostVMMinPageSize,
4956	v->DynamicMetadataEnable[k],
4957	v->DynamicMetadataVMEnabled,
4958	v->DynamicMetadataLinesBeforeActiveRequired[k],
4959	v->DynamicMetadataTransmittedBytes[k],
4960	v->UrgLatency[i],
4961	v->ExtraLatency,
4962	v->TimeCalc,
4963	v->PDEAndMetaPTEBytesPerFrame[i][j][k],
4964	v->MetaRowBytes[i][j][k],
4965	v->DPTEBytesPerRow[i][j][k],
4966	v->PrefetchLinesY[i][j][k],
4967	v->SwathWidthYThisState[k],
4968	v->BytePerPixelY[k],
4969	v->PrefillY[k],
4970	v->MaxNumSwY[k],
4971	v->PrefetchLinesC[i][j][k],
4972	v->SwathWidthCThisState[k],
4973	v->BytePerPixelC[k],
4974	v->PrefillC[k],
4975	v->MaxNumSwC[k],
4976	v->swath_width_luma_ub_this_state[k],
4977	v->swath_width_chroma_ub_this_state[k],
4978	v->SwathHeightYThisState[k],
4979	v->SwathHeightCThisState[k],
4980	v->TWait,
4981	v->ProgressiveToInterlaceUnitInOPP,
4982	&v->DSTXAfterScaler[k],
4983	&v->DSTYAfterScaler[k],
4984	&v->LineTimesForPrefetch[k],
4985	&v->PrefetchBW[k],
4986	&v->LinesForMetaPTE[k],
4987	&v->LinesForMetaAndDPTERow[k],
4988	&v->VRatioPreY[i][j][k],
4989	&v->VRatioPreC[i][j][k],
4990	&v->RequiredPrefetchPixelDataBWLuma[i][j][k],
4991	&v->RequiredPrefetchPixelDataBWChroma[i][j][k],
4992	&v->NoTimeForDynamicMetadata[i][j][k],
4993	&v->Tno_bw[k],
4994	&v->prefetch_vmrow_bw[k],
4995	&v->Tdmdl_vm[k],
4996	&v->Tdmdl[k],
4997	&v->VUpdateOffsetPix[k],
4998	&v->VUpdateWidthPix[k],
4999	&v->VReadyOffsetPix[k]);
5000	}
5001
5002	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5003	CalculateUrgentBurstFactor(
5004	v->swath_width_luma_ub_this_state[k],
5005	v->swath_width_chroma_ub_this_state[k],
5006	v->DETBufferSizeInKByte,
5007	v->SwathHeightYThisState[k],
5008	v->SwathHeightCThisState[k],
5009	v->HTotal[k] / v->PixelClock[k],
5010	v->UrgentLatency,
5011	v->CursorBufferSize,
5012	v->CursorWidth[k][0],
5013	v->CursorBPP[k][0],
5014	v->VRatioPreY[i][j][k],
5015	v->VRatioPreC[i][j][k],
5016	v->BytePerPixelInDETY[k],
5017	v->BytePerPixelInDETC[k],
5018	v->DETBufferSizeYThisState[k],
5019	v->DETBufferSizeCThisState[k],
5020	&v->UrgentBurstFactorCursorPre[k],
5021	&v->UrgentBurstFactorLumaPre[k],
5022	&v->UrgentBurstFactorChroma[k],
5023	&v->NoUrgentLatencyHidingPre[k]);
5024	}
5025
5026	v->MaximumReadBandwidthWithPrefetch = 0.0;
5027	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5028	v->cursor_bw_pre[k] = v->NumberOfCursors[k] * v->CursorWidth[k][0] * v->CursorBPP[k][0] / 8.0 / (v->HTotal[k] / v->PixelClock[k])
5029	* v->VRatioPreY[i][j][k];
5030
5031	v->MaximumReadBandwidthWithPrefetch = v->MaximumReadBandwidthWithPrefetch
5032	+ dml_max4(
5033	v->VActivePixelBandwidth[i][j][k],
5034	v->VActiveCursorBandwidth[i][j][k]
5035	+ v->NoOfDPP[i][j][k] * (v->meta_row_bandwidth[i][j][k] + v->dpte_row_bandwidth[i][j][k]),
5036	v->NoOfDPP[i][j][k] * v->prefetch_vmrow_bw[k],
5037	v->NoOfDPP[i][j][k]
5038	* (v->RequiredPrefetchPixelDataBWLuma[i][j][k] * v->UrgentBurstFactorLumaPre[k]
5039	+ v->RequiredPrefetchPixelDataBWChroma[i][j][k]
5040	* v->UrgentBurstFactorChromaPre[k])
5041	+ v->cursor_bw_pre[k] * v->UrgentBurstFactorCursorPre[k]);
5042	}
5043
5044	v->NotEnoughUrgentLatencyHidingPre = false0;
5045	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5046	if (v->NoUrgentLatencyHidingPre[k] == true1) {
5047	v->NotEnoughUrgentLatencyHidingPre = true1;
5048	}
5049	}
5050
5051	v->PrefetchSupported[i][j] = true1;
5052	if (v->BandwidthWithoutPrefetchSupported[i][j] == false0 \|\| v->MaximumReadBandwidthWithPrefetch > v->ReturnBWPerState[i][j]
5053	\|\| v->NotEnoughUrgentLatencyHidingPre == 1) {
5054	v->PrefetchSupported[i][j] = false0;
5055	}
5056	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5057	if (v->LineTimesForPrefetch[k] < 2.0 \|\| v->LinesForMetaPTE[k] >= 32.0 \|\| v->LinesForMetaAndDPTERow[k] >= 16.0
5058	\|\| v->NoTimeForPrefetch[i][j][k] == true1) {
5059	v->PrefetchSupported[i][j] = false0;
5060	}
5061	}
5062
5063	v->DynamicMetadataSupported[i][j] = true1;
5064	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
5065	if (v->NoTimeForDynamicMetadata[i][j][k] == true1) {
5066	v->DynamicMetadataSupported[i][j] = false0;
5067	}
5068	}
5069
5070	v->VRatioInPrefetchSupported[i][j] = true1;
5071	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5072	if (v->VRatioPreY[i][j][k] > 4.0 \|\| v->VRatioPreC[i][j][k] > 4.0 \|\| v->NoTimeForPrefetch[i][j][k] == true1) {
5073	v->VRatioInPrefetchSupported[i][j] = false0;
5074	}
5075	}
5076	v->AnyLinesForVMOrRowTooLarge = false0;
5077	for (k = 0; k < v->NumberOfActivePlanes; ++k) {
5078	if (v->LinesForMetaAndDPTERow[k] >= 16 \|\| v->LinesForMetaPTE[k] >= 32) {
5079	v->AnyLinesForVMOrRowTooLarge = true1;
5080	}
5081	}
5082
5083	if (v->PrefetchSupported[i][j] == true1 && v->VRatioInPrefetchSupported[i][j] == true1) {
5084	v->BandwidthAvailableForImmediateFlip = v->ReturnBWPerState[i][j];
5085	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5086	v->BandwidthAvailableForImmediateFlip = v->BandwidthAvailableForImmediateFlip
5087	- dml_max(
5088	v->VActivePixelBandwidth[i][j][k] + v->VActiveCursorBandwidth[i][j][k],
5089	v->NoOfDPP[i][j][k]
5090	* (v->RequiredPrefetchPixelDataBWLuma[i][j][k] * v->UrgentBurstFactorLumaPre[k]
5091	+ v->RequiredPrefetchPixelDataBWChroma[i][j][k]
5092	* v->UrgentBurstFactorChromaPre[k])
5093	+ v->cursor_bw_pre[k] * v->UrgentBurstFactorCursorPre[k]);
5094	}
5095	v->TotImmediateFlipBytes = 0.0;
5096	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5097	v->TotImmediateFlipBytes = v->TotImmediateFlipBytes + v->NoOfDPP[i][j][k] * v->PDEAndMetaPTEBytesPerFrame[i][j][k]
5098	+ v->MetaRowBytes[i][j][k] + v->DPTEBytesPerRow[i][j][k];
5099	}
5100
5101	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5102	CalculateFlipSchedule(
5103	mode_lib,
5104	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
5105	v->PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
5106	v->ExtraLatency,
5107	v->UrgLatency[i],
5108	v->GPUVMMaxPageTableLevels,
5109	v->HostVMEnable,
5110	v->HostVMMaxNonCachedPageTableLevels,
5111	v->GPUVMEnable,
5112	v->HostVMMinPageSize,
5113	v->PDEAndMetaPTEBytesPerFrame[i][j][k],
5114	v->MetaRowBytes[i][j][k],
5115	v->DPTEBytesPerRow[i][j][k],
5116	v->BandwidthAvailableForImmediateFlip,
5117	v->TotImmediateFlipBytes,
5118	v->SourcePixelFormat[k],
5119	v->HTotal[k] / v->PixelClock[k],
5120	v->VRatio[k],
5121	v->VRatioChroma[k],
5122	v->Tno_bw[k],
5123	v->DCCEnable[k],
5124	v->dpte_row_height[k],
5125	v->meta_row_height[k],
5126	v->dpte_row_height_chroma[k],
5127	v->meta_row_height_chroma[k],
5128	&v->DestinationLinesToRequestVMInImmediateFlip[k],
5129	&v->DestinationLinesToRequestRowInImmediateFlip[k],
5130	&v->final_flip_bw[k],
5131	&v->ImmediateFlipSupportedForPipe[k]);
5132	}
5133	v->total_dcn_read_bw_with_flip = 0.0;
5134	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5135	v->total_dcn_read_bw_with_flip = v->total_dcn_read_bw_with_flip
5136	+ dml_max3(
5137	v->NoOfDPP[i][j][k] * v->prefetch_vmrow_bw[k],
5138	v->NoOfDPP[i][j][k] * v->final_flip_bw[k] + v->VActivePixelBandwidth[i][j][k]
5139	+ v->VActiveCursorBandwidth[i][j][k],
5140	v->NoOfDPP[i][j][k]
5141	* (v->final_flip_bw[k]
5142	+ v->RequiredPrefetchPixelDataBWLuma[i][j][k]
5143	* v->UrgentBurstFactorLumaPre[k]
5144	+ v->RequiredPrefetchPixelDataBWChroma[i][j][k]
5145	* v->UrgentBurstFactorChromaPre[k])
5146	+ v->cursor_bw_pre[k] * v->UrgentBurstFactorCursorPre[k]);
5147	}
5148	v->ImmediateFlipSupportedForState[i][j] = true1;
5149	if (v->total_dcn_read_bw_with_flip > v->ReturnBWPerState[i][j]) {
5150	v->ImmediateFlipSupportedForState[i][j] = false0;
5151	}
5152	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5153	if (v->ImmediateFlipSupportedForPipe[k] == false0) {
5154	v->ImmediateFlipSupportedForState[i][j] = false0;
5155	}
5156	}
5157	} else {
5158	v->ImmediateFlipSupportedForState[i][j] = false0;
5159	}
5160	if (v->MaxVStartup <= 13 \|\| v->AnyLinesForVMOrRowTooLarge == false0) {
5161	v->NextMaxVStartup = v->MaxMaxVStartup[i][j];
5162	NextPrefetchModeState = NextPrefetchModeState + 1;
5163	} else {
5164	v->NextMaxVStartup = v->NextMaxVStartup - 1;
5165	}
5166	} while (!((v->PrefetchSupported[i][j] == true1 && v->DynamicMetadataSupported[i][j] == true1 && v->VRatioInPrefetchSupported[i][j] == true1
5167	&& ((v->HostVMEnable == false0 && v->ImmediateFlipRequirement != dm_immediate_flip_required)
5168	\|\| v->ImmediateFlipSupportedForState[i][j] == true1))
5169	\|\| (v->NextMaxVStartup == v->MaxMaxVStartup[i][j] && NextPrefetchModeState > MaxPrefetchMode)));
5170
5171	CalculateWatermarksAndDRAMSpeedChangeSupport(
5172	mode_lib,
5173	v->PrefetchModePerState[i][j],
5174	v->NumberOfActivePlanes,
5175	v->MaxLineBufferLines,
5176	v->LineBufferSize,
5177	v->DPPOutputBufferPixels,
5178	v->DETBufferSizeInKByte,
5179	v->WritebackInterfaceBufferSize,
5180	v->DCFCLKState[i][j],
5181	v->ReturnBWPerState[i][j],
5182	v->GPUVMEnable,
5183	v->dpte_group_bytes,
5184	v->MetaChunkSize,
5185	v->UrgLatency[i],
5186	v->ExtraLatency,
5187	v->WritebackLatency,
5188	v->WritebackChunkSize,
5189	v->SOCCLKPerState[i],
5190	v->FinalDRAMClockChangeLatency,
5191	v->SRExitTime,
5192	v->SREnterPlusExitTime,
5193	v->ProjectedDCFCLKDeepSleep[i][j],
5194	v->NoOfDPPThisState,
5195	v->DCCEnable,
5196	v->RequiredDPPCLKThisState,
5197	v->DETBufferSizeYThisState,
5198	v->DETBufferSizeCThisState,
5199	v->SwathHeightYThisState,
5200	v->SwathHeightCThisState,
5201	v->LBBitPerPixel,
5202	v->SwathWidthYThisState,
5203	v->SwathWidthCThisState,
5204	v->HRatio,
5205	v->HRatioChroma,
5206	v->vtaps,
5207	v->VTAPsChroma,
5208	v->VRatio,
5209	v->VRatioChroma,
5210	v->HTotal,
5211	v->PixelClock,
5212	v->BlendingAndTiming,
5213	v->BytePerPixelInDETY,
5214	v->BytePerPixelInDETC,
5215	v->DSTXAfterScaler,
5216	v->DSTYAfterScaler,
5217	v->WritebackEnable,
5218	v->WritebackPixelFormat,
5219	v->WritebackDestinationWidth,
5220	v->WritebackDestinationHeight,
5221	v->WritebackSourceHeight,
5222	&v->DRAMClockChangeSupport[i][j],
5223	&v->UrgentWatermark,
5224	&v->WritebackUrgentWatermark,
5225	&v->DRAMClockChangeWatermark,
5226	&v->WritebackDRAMClockChangeWatermark,
5227	&v->StutterExitWatermark,
5228	&v->StutterEnterPlusExitWatermark,
5229	&v->MinActiveDRAMClockChangeLatencySupported);
5230	}
5231	}
5232
5233	/PTE Buffer Size Check/
5234
5235	for (i = 0; i < v->soc.num_states; i++) {
5236	for (j = 0; j < 2; j++) {
5237	v->PTEBufferSizeNotExceeded[i][j] = true1;
5238	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5239	if (v->PTEBufferSizeNotExceededY[i][j][k] == false0 \|\| v->PTEBufferSizeNotExceededC[i][j][k] == false0) {
5240	v->PTEBufferSizeNotExceeded[i][j] = false0;
5241	}
5242	}
5243	}
5244	}
5245	/Cursor Support Check/
5246
5247	v->CursorSupport = true1;
5248	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5249	if (v->CursorWidth[k][0] > 0.0) {
5250	if (v->CursorBPP[k][0] == 64 && v->Cursor64BppSupport == false0) {
5251	v->CursorSupport = false0;
5252	}
5253	}
5254	}
5255	/Valid Pitch Check/
5256
5257	v->PitchSupport = true1;
5258	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5259	v->AlignedYPitch[k] = dml_ceil(dml_max(v->PitchY[k], v->SurfaceWidthY[k]), v->MacroTileWidthY[k]);
5260	if (v->DCCEnable[k] == true1) {
5261	v->AlignedDCCMetaPitchY[k] = dml_ceil(dml_max(v->DCCMetaPitchY[k], v->SurfaceWidthY[k]), 64.0 * v->Read256BlockWidthY[k]);
5262	} else {
5263	v->AlignedDCCMetaPitchY[k] = v->DCCMetaPitchY[k];
5264	}
5265	if (v->SourcePixelFormat[k] != dm_444_64 && v->SourcePixelFormat[k] != dm_444_32 && v->SourcePixelFormat[k] != dm_444_16 && v->SourcePixelFormat[k] != dm_mono_16
5266	&& v->SourcePixelFormat[k] != dm_rgbe && v->SourcePixelFormat[k] != dm_mono_8) {
5267	v->AlignedCPitch[k] = dml_ceil(dml_max(v->PitchC[k], v->SurfaceWidthC[k]), v->MacroTileWidthC[k]);
5268	if (v->DCCEnable[k] == true1) {
5269	v->AlignedDCCMetaPitchC[k] = dml_ceil(dml_max(v->DCCMetaPitchC[k], v->SurfaceWidthC[k]), 64.0 * v->Read256BlockWidthC[k]);
5270	} else {
5271	v->AlignedDCCMetaPitchC[k] = v->DCCMetaPitchC[k];
5272	}
5273	} else {
5274	v->AlignedCPitch[k] = v->PitchC[k];
5275	v->AlignedDCCMetaPitchC[k] = v->DCCMetaPitchC[k];
5276	}
5277	if (v->AlignedYPitch[k] > v->PitchY[k] \|\| v->AlignedCPitch[k] > v->PitchC[k] \|\| v->AlignedDCCMetaPitchY[k] > v->DCCMetaPitchY[k]
5278	\|\| v->AlignedDCCMetaPitchC[k] > v->DCCMetaPitchC[k]) {
5279	v->PitchSupport = false0;
5280	}
5281	}
5282
5283	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5284	if (v->ViewportWidth[k] > v->SurfaceWidthY[k] \|\| v->ViewportHeight[k] > v->SurfaceHeightY[k])
5285	ViewportExceedsSurface = true1;
5286
5287	if (v->SourcePixelFormat[k] != dm_444_64 && v->SourcePixelFormat[k] != dm_444_32 && v->SourcePixelFormat[k] != dm_444_16
5288	&& v->SourcePixelFormat[k] != dm_444_8 && v->SourcePixelFormat[k] != dm_rgbe) {
5289	if (v->ViewportWidthChroma[k] > v->SurfaceWidthC[k] \|\| v->ViewportHeightChroma[k] > v->SurfaceHeightC[k]) {
5290	ViewportExceedsSurface = true1;
5291	}
5292	}
5293	}
5294	/Mode Support, Voltage State and SOC Configuration/
5295
5296	for (i = v->soc.num_states - 1; i >= 0; i--) {
5297	for (j = 0; j < 2; j++) {
5298	if (v->ScaleRatioAndTapsSupport == 1 && v->SourceFormatPixelAndScanSupport == 1 && v->ViewportSizeSupport[i][j] == 1
5299	&& v->DIOSupport[i] == 1 && v->ODMCombine4To1SupportCheckOK[i] == 1
5300	&& v->NotEnoughDSCUnits[i] == 0
5301	&& v->DTBCLKRequiredMoreThanSupported[i] == 0
5302	&& v->ROBSupport[i][j] == 1 && v->DISPCLK_DPPCLK_Support[i][j] == 1 && v->TotalAvailablePipesSupport[i][j] == 1
5303	&& EnoughWritebackUnits == 1 && WritebackModeSupport == 1
5304	&& v->WritebackLatencySupport == 1 && v->WritebackScaleRatioAndTapsSupport == 1 && v->CursorSupport == 1 && v->PitchSupport == 1
5305	&& ViewportExceedsSurface == 0 && v->PrefetchSupported[i][j] == 1 && v->DynamicMetadataSupported[i][j] == 1
5306	&& v->TotalVerticalActiveBandwidthSupport[i][j] == 1 && v->VRatioInPrefetchSupported[i][j] == 1
5307	&& v->PTEBufferSizeNotExceeded[i][j] == 1 && v->NonsupportedDSCInputBPC == 0
5308	&& ((v->HostVMEnable == 0 && v->ImmediateFlipRequirement != dm_immediate_flip_required)
5309	\|\| v->ImmediateFlipSupportedForState[i][j] == true1)) {
5310	v->ModeSupport[i][j] = true1;
5311	} else {
5312	v->ModeSupport[i][j] = false0;
5313	}
5314	}
5315	}
5316	{
5317	unsigned int MaximumMPCCombine = 0;
5318	for (i = v->soc.num_states; i >= 0; i--) {
5319	if (i == v->soc.num_states \|\| v->ModeSupport[i][0] == true1 \|\| v->ModeSupport[i][1] == true1) {
5320	v->VoltageLevel = i;
5321	v->ModeIsSupported = v->ModeSupport[i][0] == true1 \|\| v->ModeSupport[i][1] == true1;
5322	if (v->ModeSupport[i][1] == true1) {
5323	MaximumMPCCombine = 1;
5324	} else {
5325	MaximumMPCCombine = 0;
5326	}
5327	}
5328	}
5329	v->ImmediateFlipSupport = v->ImmediateFlipSupportedForState[v->VoltageLevel][MaximumMPCCombine];
5330	for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) {
5331	v->MPCCombineEnable[k] = v->MPCCombine[v->VoltageLevel][MaximumMPCCombine][k];
5332	v->DPPPerPlane[k] = v->NoOfDPP[v->VoltageLevel][MaximumMPCCombine][k];
5333	}
5334	v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine];
5335	v->DRAMSpeed = v->DRAMSpeedPerState[v->VoltageLevel];
5336	v->FabricClock = v->FabricClockPerState[v->VoltageLevel];
5337	v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel];
5338	v->ReturnBW = v->ReturnBWPerState[v->VoltageLevel][MaximumMPCCombine];
5339	v->maxMpcComb = MaximumMPCCombine;
5340	}
5341	}
5342
5343	static void CalculateWatermarksAndDRAMSpeedChangeSupport(
5344	struct display_mode_lib *mode_lib,
5345	unsigned int PrefetchMode,
5346	unsigned int NumberOfActivePlanes,
5347	unsigned int MaxLineBufferLines,
5348	unsigned int LineBufferSize,
5349	unsigned int DPPOutputBufferPixels,
5350	double DETBufferSizeInKByte,
5351	unsigned int WritebackInterfaceBufferSize,
5352	double DCFCLK,
5353	double ReturnBW,
5354	bool_Bool GPUVMEnable,
5355	unsigned int dpte_group_bytes[],
5356	unsigned int MetaChunkSize,
5357	double UrgentLatency,
5358	double ExtraLatency,
5359	double WritebackLatency,
5360	double WritebackChunkSize,
5361	double SOCCLK,
5362	double DRAMClockChangeLatency,
5363	double SRExitTime,
5364	double SREnterPlusExitTime,
5365	double DCFCLKDeepSleep,
5366	unsigned int DPPPerPlane[],
5367	bool_Bool DCCEnable[],
5368	double DPPCLK[],
5369	double DETBufferSizeY[],
5370	double DETBufferSizeC[],
5371	unsigned int SwathHeightY[],
5372	unsigned int SwathHeightC[],
5373	unsigned int LBBitPerPixel[],
5374	double SwathWidthY[],
5375	double SwathWidthC[],
5376	double HRatio[],
5377	double HRatioChroma[],
5378	unsigned int vtaps[],
5379	unsigned int VTAPsChroma[],
5380	double VRatio[],
5381	double VRatioChroma[],
5382	unsigned int HTotal[],
5383	double PixelClock[],
5384	unsigned int BlendingAndTiming[],
5385	double BytePerPixelDETY[],
5386	double BytePerPixelDETC[],
5387	double DSTXAfterScaler[],
5388	double DSTYAfterScaler[],
5389	bool_Bool WritebackEnable[],
5390	enum source_format_class WritebackPixelFormat[],
5391	double WritebackDestinationWidth[],
5392	double WritebackDestinationHeight[],
5393	double WritebackSourceHeight[],
5394	enum clock_change_support *DRAMClockChangeSupport,
5395	double *UrgentWatermark,
5396	double *WritebackUrgentWatermark,
5397	double *DRAMClockChangeWatermark,
5398	double *WritebackDRAMClockChangeWatermark,
5399	double *StutterExitWatermark,
5400	double *StutterEnterPlusExitWatermark,
5401	double *MinActiveDRAMClockChangeLatencySupported)
5402	{
5403	double EffectiveLBLatencyHidingY = 0;
5404	double EffectiveLBLatencyHidingC = 0;
5405	double LinesInDETY[DC__NUM_DPP__MAX8] = { 0 };
5406	double LinesInDETC = 0;
5407	unsigned int LinesInDETYRoundedDownToSwath[DC__NUM_DPP__MAX8] = { 0 };
5408	unsigned int LinesInDETCRoundedDownToSwath = 0;
5409	double FullDETBufferingTimeY[DC__NUM_DPP__MAX8] = { 0 };
5410	double FullDETBufferingTimeC = 0;
5411	double ActiveDRAMClockChangeLatencyMarginY = 0;
5412	double ActiveDRAMClockChangeLatencyMarginC = 0;
5413	double WritebackDRAMClockChangeLatencyMargin = 0;
5414	double PlaneWithMinActiveDRAMClockChangeMargin = 0;
5415	double SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank = 0;
5416	double FullDETBufferingTimeYStutterCriticalPlane = 0;
5417	double TimeToFinishSwathTransferStutterCriticalPlane = 0;
5418	double WritebackDRAMClockChangeLatencyHiding = 0;
5419	unsigned int k, j;
5420
5421	mode_lib->vba.TotalActiveDPP = 0;
5422	mode_lib->vba.TotalDCCActiveDPP = 0;
5423	for (k = 0; k < NumberOfActivePlanes; ++k) {
5424	mode_lib->vba.TotalActiveDPP = mode_lib->vba.TotalActiveDPP + DPPPerPlane[k];
5425	if (DCCEnable[k] == true1) {
5426	mode_lib->vba.TotalDCCActiveDPP = mode_lib->vba.TotalDCCActiveDPP + DPPPerPlane[k];
5427	}
5428	}
5429
5430	*UrgentWatermark = UrgentLatency + ExtraLatency;
5431
5432	DRAMClockChangeWatermark = DRAMClockChangeLatency + UrgentWatermark;
5433
5434	mode_lib->vba.TotalActiveWriteback = 0;
5435	for (k = 0; k < NumberOfActivePlanes; ++k) {
5436	if (WritebackEnable[k] == true1) {
5437	mode_lib->vba.TotalActiveWriteback = mode_lib->vba.TotalActiveWriteback + 1;
5438	}
5439	}
5440
5441	if (mode_lib->vba.TotalActiveWriteback <= 1) {
5442	*WritebackUrgentWatermark = WritebackLatency;
5443	} else {
5444	WritebackUrgentWatermark = WritebackLatency + WritebackChunkSize 1024.0 / 32.0 / SOCCLK;
5445	}
5446
5447	if (mode_lib->vba.TotalActiveWriteback <= 1) {
5448	*WritebackDRAMClockChangeWatermark = DRAMClockChangeLatency + WritebackLatency;
5449	} else {
5450	WritebackDRAMClockChangeWatermark = DRAMClockChangeLatency + WritebackLatency + WritebackChunkSize 1024.0 / 32.0 / SOCCLK;
5451	}
5452
5453	for (k = 0; k < NumberOfActivePlanes; ++k) {
5454
5455	mode_lib->vba.LBLatencyHidingSourceLinesY = dml_min((double) MaxLineBufferLines, dml_floor(LineBufferSize / LBBitPerPixel[k] / (SwathWidthY[k] / dml_max(HRatio[k], 1.0)), 1)) - (vtaps[k] - 1);
5456
5457	mode_lib->vba.LBLatencyHidingSourceLinesC = dml_min((double) MaxLineBufferLines, dml_floor(LineBufferSize / LBBitPerPixel[k] / (SwathWidthC[k] / dml_max(HRatioChroma[k], 1.0)), 1)) - (VTAPsChroma[k] - 1);
5458
5459	EffectiveLBLatencyHidingY = mode_lib->vba.LBLatencyHidingSourceLinesY / VRatio[k] * (HTotal[k] / PixelClock[k]);
5460
5461	EffectiveLBLatencyHidingC = mode_lib->vba.LBLatencyHidingSourceLinesC / VRatioChroma[k] * (HTotal[k] / PixelClock[k]);
5462
5463	LinesInDETY[k] = (double) DETBufferSizeY[k] / BytePerPixelDETY[k] / SwathWidthY[k];
5464	LinesInDETYRoundedDownToSwath[k] = dml_floor(LinesInDETY[k], SwathHeightY[k]);
5465	FullDETBufferingTimeY[k] = LinesInDETYRoundedDownToSwath[k] * (HTotal[k] / PixelClock[k]) / VRatio[k];
5466	if (BytePerPixelDETC[k] > 0) {
5467	LinesInDETC = mode_lib->vba.DETBufferSizeC[k] / BytePerPixelDETC[k] / SwathWidthC[k];
5468	LinesInDETCRoundedDownToSwath = dml_floor(LinesInDETC, SwathHeightC[k]);
5469	FullDETBufferingTimeC = LinesInDETCRoundedDownToSwath * (HTotal[k] / PixelClock[k]) / VRatioChroma[k];
5470	} else {
5471	LinesInDETC = 0;
5472	FullDETBufferingTimeC = 999999;
5473	}
5474
5475	ActiveDRAMClockChangeLatencyMarginY = EffectiveLBLatencyHidingY + FullDETBufferingTimeY[k] - UrgentWatermark - (HTotal[k] / PixelClock[k]) (DSTXAfterScaler[k] / HTotal[k] + DSTYAfterScaler[k]) - *DRAMClockChangeWatermark;
5476
5477	if (NumberOfActivePlanes > 1) {
5478	ActiveDRAMClockChangeLatencyMarginY = ActiveDRAMClockChangeLatencyMarginY - (1 - 1.0 / NumberOfActivePlanes) * SwathHeightY[k] * HTotal[k] / PixelClock[k] / VRatio[k];
5479	}
5480
5481	if (BytePerPixelDETC[k] > 0) {
5482	ActiveDRAMClockChangeLatencyMarginC = EffectiveLBLatencyHidingC + FullDETBufferingTimeC - UrgentWatermark - (HTotal[k] / PixelClock[k]) (DSTXAfterScaler[k] / HTotal[k] + DSTYAfterScaler[k]) - *DRAMClockChangeWatermark;
5483
5484	if (NumberOfActivePlanes > 1) {
5485	ActiveDRAMClockChangeLatencyMarginC = ActiveDRAMClockChangeLatencyMarginC - (1 - 1.0 / NumberOfActivePlanes) * SwathHeightC[k] * HTotal[k] / PixelClock[k] / VRatioChroma[k];
5486	}
5487	mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] = dml_min(ActiveDRAMClockChangeLatencyMarginY, ActiveDRAMClockChangeLatencyMarginC);
5488	} else {
5489	mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] = ActiveDRAMClockChangeLatencyMarginY;
5490	}
5491
5492	if (WritebackEnable[k] == true1) {
5493
5494	WritebackDRAMClockChangeLatencyHiding = WritebackInterfaceBufferSize * 1024 / (WritebackDestinationWidth[k] * WritebackDestinationHeight[k] / (WritebackSourceHeight[k] * HTotal[k] / PixelClock[k]) * 4);
5495	if (WritebackPixelFormat[k] == dm_444_64) {
5496	WritebackDRAMClockChangeLatencyHiding = WritebackDRAMClockChangeLatencyHiding / 2;
5497	}
5498	if (mode_lib->vba.WritebackConfiguration == dm_whole_buffer_for_single_stream_interleave) {
5499	WritebackDRAMClockChangeLatencyHiding = WritebackDRAMClockChangeLatencyHiding * 2;
5500	}
5501	WritebackDRAMClockChangeLatencyMargin = WritebackDRAMClockChangeLatencyHiding - mode_lib->vba.WritebackDRAMClockChangeWatermark;
5502	mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] = dml_min(mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k], WritebackDRAMClockChangeLatencyMargin);
5503	}
5504	}
5505
5506	mode_lib->vba.MinActiveDRAMClockChangeMargin = 999999;
5507	PlaneWithMinActiveDRAMClockChangeMargin = 0;
5508	for (k = 0; k < NumberOfActivePlanes; ++k) {
5509	if (mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] < mode_lib->vba.MinActiveDRAMClockChangeMargin) {
5510	mode_lib->vba.MinActiveDRAMClockChangeMargin = mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k];
5511	if (BlendingAndTiming[k] == k) {
5512	PlaneWithMinActiveDRAMClockChangeMargin = k;
5513	} else {
5514	for (j = 0; j < NumberOfActivePlanes; ++j) {
5515	if (BlendingAndTiming[k] == j) {
5516	PlaneWithMinActiveDRAMClockChangeMargin = j;
5517	}
5518	}
5519	}
5520	}
5521	}
5522
5523	*MinActiveDRAMClockChangeLatencySupported = mode_lib->vba.MinActiveDRAMClockChangeMargin + DRAMClockChangeLatency;
5524
5525	SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank = 999999;
5526	for (k = 0; k < NumberOfActivePlanes; ++k) {
5527	if (!((k == PlaneWithMinActiveDRAMClockChangeMargin) && (BlendingAndTiming[k] == k)) && !(BlendingAndTiming[k] == PlaneWithMinActiveDRAMClockChangeMargin) && mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k] < SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank) {
5528	SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank = mode_lib->vba.ActiveDRAMClockChangeLatencyMargin[k];
5529	}
5530	}
5531
5532	mode_lib->vba.TotalNumberOfActiveOTG = 0;
5533	for (k = 0; k < NumberOfActivePlanes; ++k) {
5534	if (BlendingAndTiming[k] == k) {
5535	mode_lib->vba.TotalNumberOfActiveOTG = mode_lib->vba.TotalNumberOfActiveOTG + 1;
5536	}
5537	}
5538
5539	if (mode_lib->vba.MinActiveDRAMClockChangeMargin > 0 && PrefetchMode == 0) {
5540	*DRAMClockChangeSupport = dm_dram_clock_change_vactive;
5541	} else if (((mode_lib->vba.SynchronizedVBlank == true1 \|\| mode_lib->vba.TotalNumberOfActiveOTG == 1 \|\| SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank > 0) && PrefetchMode == 0)) {
5542	*DRAMClockChangeSupport = dm_dram_clock_change_vblank;
5543	} else {
5544	*DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
5545	}
5546
5547	FullDETBufferingTimeYStutterCriticalPlane = FullDETBufferingTimeY[0];
5548	for (k = 0; k < NumberOfActivePlanes; ++k) {
5549	if (FullDETBufferingTimeY[k] <= FullDETBufferingTimeYStutterCriticalPlane) {
5550	FullDETBufferingTimeYStutterCriticalPlane = FullDETBufferingTimeY[k];
5551	TimeToFinishSwathTransferStutterCriticalPlane = (SwathHeightY[k] - (LinesInDETY[k] - LinesInDETYRoundedDownToSwath[k])) * (HTotal[k] / PixelClock[k]) / VRatio[k];
5552	}
5553	}
5554
5555	*StutterExitWatermark = SRExitTime + ExtraLatency + 10 / DCFCLKDeepSleep;
5556	*StutterEnterPlusExitWatermark = dml_max(SREnterPlusExitTime + ExtraLatency + 10 / DCFCLKDeepSleep, TimeToFinishSwathTransferStutterCriticalPlane);
5557
5558	}
5559
5560	static void CalculateDCFCLKDeepSleep(
5561	struct display_mode_lib *mode_lib,
5562	unsigned int NumberOfActivePlanes,
5563	int BytePerPixelY[],
5564	int BytePerPixelC[],
5565	double VRatio[],
5566	double VRatioChroma[],
5567	double SwathWidthY[],
5568	double SwathWidthC[],
5569	unsigned int DPPPerPlane[],
5570	double HRatio[],
5571	double HRatioChroma[],
5572	double PixelClock[],
5573	double PSCL_THROUGHPUT[],
5574	double PSCL_THROUGHPUT_CHROMA[],
5575	double DPPCLK[],
5576	double ReadBandwidthLuma[],
5577	double ReadBandwidthChroma[],
5578	int ReturnBusWidth,
5579	double *DCFCLKDeepSleep)
5580	{
5581	double DisplayPipeLineDeliveryTimeLuma = 0;
5582	double DisplayPipeLineDeliveryTimeChroma = 0;
5583	unsigned int k;
5584	double ReadBandwidth = 0.0;
5585
5586	//double DCFCLKDeepSleepPerPlane[DC__NUM_DPP__MAX];
5587	for (k = 0; k < NumberOfActivePlanes; ++k) {
5588
5589	if (VRatio[k] <= 1) {
5590	DisplayPipeLineDeliveryTimeLuma = SwathWidthY[k] * DPPPerPlane[k] / HRatio[k] / PixelClock[k];
5591	} else {
5592	DisplayPipeLineDeliveryTimeLuma = SwathWidthY[k] / PSCL_THROUGHPUT[k] / DPPCLK[k];
5593	}
5594	if (BytePerPixelC[k] == 0) {
5595	DisplayPipeLineDeliveryTimeChroma = 0;
5596	} else {
5597	if (VRatioChroma[k] <= 1) {
5598	DisplayPipeLineDeliveryTimeChroma = SwathWidthC[k] * DPPPerPlane[k] / HRatioChroma[k] / PixelClock[k];
5599	} else {
5600	DisplayPipeLineDeliveryTimeChroma = SwathWidthC[k] / PSCL_THROUGHPUT_CHROMA[k] / DPPCLK[k];
5601	}
5602	}
5603
5604	if (BytePerPixelC[k] > 0) {
5605	mode_lib->vba.DCFCLKDeepSleepPerPlane[k] = dml_max(1.1 * SwathWidthY[k] * BytePerPixelY[k] / 32.0 / DisplayPipeLineDeliveryTimeLuma, 1.1 * SwathWidthC[k] * BytePerPixelC[k] / 32.0 / DisplayPipeLineDeliveryTimeChroma);
5606	} else {
5607	mode_lib->vba.DCFCLKDeepSleepPerPlane[k] = 1.1 * SwathWidthY[k] * BytePerPixelY[k] / 64.0 / DisplayPipeLineDeliveryTimeLuma;
5608	}
5609	mode_lib->vba.DCFCLKDeepSleepPerPlane[k] = dml_max(mode_lib->vba.DCFCLKDeepSleepPerPlane[k], PixelClock[k] / 16);
5610
5611	}
5612
5613	for (k = 0; k < NumberOfActivePlanes; ++k) {
5614	ReadBandwidth = ReadBandwidth + ReadBandwidthLuma[k] + ReadBandwidthChroma[k];
5615	}
5616
5617	*DCFCLKDeepSleep = dml_max(8.0, ReadBandwidth / ReturnBusWidth);
5618
5619	for (k = 0; k < NumberOfActivePlanes; ++k) {
5620	DCFCLKDeepSleep = dml_max(DCFCLKDeepSleep, mode_lib->vba.DCFCLKDeepSleepPerPlane[k]);
5621	}
5622	}
5623
5624	static void CalculateUrgentBurstFactor(
5625	long swath_width_luma_ub,
5626	long swath_width_chroma_ub,
5627	unsigned int DETBufferSizeInKByte,
5628	unsigned int SwathHeightY,
5629	unsigned int SwathHeightC,
5630	double LineTime,
5631	double UrgentLatency,
5632	double CursorBufferSize,
5633	unsigned int CursorWidth,
5634	unsigned int CursorBPP,
5635	double VRatio,
5636	double VRatioC,
5637	double BytePerPixelInDETY,
5638	double BytePerPixelInDETC,
5639	double DETBufferSizeY,
5640	double DETBufferSizeC,
5641	double *UrgentBurstFactorCursor,
5642	double *UrgentBurstFactorLuma,
5643	double *UrgentBurstFactorChroma,
5644	bool_Bool *NotEnoughUrgentLatencyHiding)
5645	{
5646	double LinesInDETLuma = 0;
5647	double LinesInDETChroma = 0;
5648	unsigned int LinesInCursorBuffer = 0;
5649	double CursorBufferSizeInTime = 0;
5650	double DETBufferSizeInTimeLuma = 0;
5651	double DETBufferSizeInTimeChroma = 0;
5652
5653	*NotEnoughUrgentLatencyHiding = 0;
5654
5655	if (CursorWidth > 0) {
5656	LinesInCursorBuffer = 1 << (unsigned int) dml_floor(dml_log2(CursorBufferSize * 1024.0 / (CursorWidth * CursorBPP / 8.0)), 1.0);
5657	if (VRatio > 0) {
5658	CursorBufferSizeInTime = LinesInCursorBuffer * LineTime / VRatio;
5659	if (CursorBufferSizeInTime - UrgentLatency <= 0) {
5660	*NotEnoughUrgentLatencyHiding = 1;
5661	*UrgentBurstFactorCursor = 0;
5662	} else {
5663	*UrgentBurstFactorCursor = CursorBufferSizeInTime / (CursorBufferSizeInTime - UrgentLatency);
5664	}
5665	} else {
5666	*UrgentBurstFactorCursor = 1;
5667	}
5668	}
5669
5670	LinesInDETLuma = DETBufferSizeY / BytePerPixelInDETY / swath_width_luma_ub;
5671	if (VRatio > 0) {
5672	DETBufferSizeInTimeLuma = dml_floor(LinesInDETLuma, SwathHeightY) * LineTime / VRatio;
5673	if (DETBufferSizeInTimeLuma - UrgentLatency <= 0) {
5674	*NotEnoughUrgentLatencyHiding = 1;
5675	*UrgentBurstFactorLuma = 0;
5676	} else {
5677	*UrgentBurstFactorLuma = DETBufferSizeInTimeLuma / (DETBufferSizeInTimeLuma - UrgentLatency);
5678	}
5679	} else {
5680	*UrgentBurstFactorLuma = 1;
5681	}
5682
5683	if (BytePerPixelInDETC > 0) {
5684	LinesInDETChroma = DETBufferSizeC / BytePerPixelInDETC / swath_width_chroma_ub;
5685	if (VRatio > 0) {
5686	DETBufferSizeInTimeChroma = dml_floor(LinesInDETChroma, SwathHeightC) * LineTime / VRatio;
5687	if (DETBufferSizeInTimeChroma - UrgentLatency <= 0) {
5688	*NotEnoughUrgentLatencyHiding = 1;
5689	*UrgentBurstFactorChroma = 0;
5690	} else {
5691	*UrgentBurstFactorChroma = DETBufferSizeInTimeChroma / (DETBufferSizeInTimeChroma - UrgentLatency);
5692	}
5693	} else {
5694	*UrgentBurstFactorChroma = 1;
5695	}
5696	}
5697	}
5698
5699	static void CalculatePixelDeliveryTimes(
5700	unsigned int NumberOfActivePlanes,
5701	double VRatio[],
5702	double VRatioChroma[],
5703	double VRatioPrefetchY[],
5704	double VRatioPrefetchC[],
5705	unsigned int swath_width_luma_ub[],
5706	unsigned int swath_width_chroma_ub[],
5707	unsigned int DPPPerPlane[],
5708	double HRatio[],
5709	double HRatioChroma[],
5710	double PixelClock[],
5711	double PSCL_THROUGHPUT[],
5712	double PSCL_THROUGHPUT_CHROMA[],
5713	double DPPCLK[],
5714	int BytePerPixelC[],
5715	enum scan_direction_class SourceScan[],
5716	unsigned int NumberOfCursors[],
5717	unsigned int CursorWidth[][2],
5718	unsigned int CursorBPP[][2],
5719	unsigned int BlockWidth256BytesY[],
5720	unsigned int BlockHeight256BytesY[],
5721	unsigned int BlockWidth256BytesC[],
5722	unsigned int BlockHeight256BytesC[],
5723	double DisplayPipeLineDeliveryTimeLuma[],
5724	double DisplayPipeLineDeliveryTimeChroma[],
5725	double DisplayPipeLineDeliveryTimeLumaPrefetch[],
5726	double DisplayPipeLineDeliveryTimeChromaPrefetch[],
5727	double DisplayPipeRequestDeliveryTimeLuma[],
5728	double DisplayPipeRequestDeliveryTimeChroma[],
5729	double DisplayPipeRequestDeliveryTimeLumaPrefetch[],
5730	double DisplayPipeRequestDeliveryTimeChromaPrefetch[],
5731	double CursorRequestDeliveryTime[],
5732	double CursorRequestDeliveryTimePrefetch[])
5733	{
5734	double req_per_swath_ub = 0;
5735	unsigned int k;
5736
5737	for (k = 0; k < NumberOfActivePlanes; ++k) {
5738	if (VRatio[k] <= 1) {
5739	DisplayPipeLineDeliveryTimeLuma[k] = swath_width_luma_ub[k] * DPPPerPlane[k] / HRatio[k] / PixelClock[k];
5740	} else {
5741	DisplayPipeLineDeliveryTimeLuma[k] = swath_width_luma_ub[k] / PSCL_THROUGHPUT[k] / DPPCLK[k];
5742	}
5743
5744	if (BytePerPixelC[k] == 0) {
5745	DisplayPipeLineDeliveryTimeChroma[k] = 0;
5746	} else {
5747	if (VRatioChroma[k] <= 1) {
5748	DisplayPipeLineDeliveryTimeChroma[k] = swath_width_chroma_ub[k] * DPPPerPlane[k] / HRatioChroma[k] / PixelClock[k];
5749	} else {
5750	DisplayPipeLineDeliveryTimeChroma[k] = swath_width_chroma_ub[k] / PSCL_THROUGHPUT_CHROMA[k] / DPPCLK[k];
5751	}
5752	}
5753
5754	if (VRatioPrefetchY[k] <= 1) {
5755	DisplayPipeLineDeliveryTimeLumaPrefetch[k] = swath_width_luma_ub[k] * DPPPerPlane[k] / HRatio[k] / PixelClock[k];
5756	} else {
5757	DisplayPipeLineDeliveryTimeLumaPrefetch[k] = swath_width_luma_ub[k] / PSCL_THROUGHPUT[k] / DPPCLK[k];
5758	}
5759
5760	if (BytePerPixelC[k] == 0) {
5761	DisplayPipeLineDeliveryTimeChromaPrefetch[k] = 0;
5762	} else {
5763	if (VRatioPrefetchC[k] <= 1) {
5764	DisplayPipeLineDeliveryTimeChromaPrefetch[k] = swath_width_chroma_ub[k] * DPPPerPlane[k] / HRatioChroma[k] / PixelClock[k];
5765	} else {
5766	DisplayPipeLineDeliveryTimeChromaPrefetch[k] = swath_width_chroma_ub[k] / PSCL_THROUGHPUT_CHROMA[k] / DPPCLK[k];
5767	}
5768	}
5769	}
5770
5771	for (k = 0; k < NumberOfActivePlanes; ++k) {
5772	if (SourceScan[k] != dm_vert) {
5773	req_per_swath_ub = swath_width_luma_ub[k] / BlockWidth256BytesY[k];
5774	} else {
5775	req_per_swath_ub = swath_width_luma_ub[k] / BlockHeight256BytesY[k];
5776	}
5777	DisplayPipeRequestDeliveryTimeLuma[k] = DisplayPipeLineDeliveryTimeLuma[k] / req_per_swath_ub;
5778	DisplayPipeRequestDeliveryTimeLumaPrefetch[k] = DisplayPipeLineDeliveryTimeLumaPrefetch[k] / req_per_swath_ub;
5779	if (BytePerPixelC[k] == 0) {
5780	DisplayPipeRequestDeliveryTimeChroma[k] = 0;
5781	DisplayPipeRequestDeliveryTimeChromaPrefetch[k] = 0;
5782	} else {
5783	if (SourceScan[k] != dm_vert) {
5784	req_per_swath_ub = swath_width_chroma_ub[k] / BlockWidth256BytesC[k];
5785	} else {
5786	req_per_swath_ub = swath_width_chroma_ub[k] / BlockHeight256BytesC[k];
5787	}
5788	DisplayPipeRequestDeliveryTimeChroma[k] = DisplayPipeLineDeliveryTimeChroma[k] / req_per_swath_ub;
5789	DisplayPipeRequestDeliveryTimeChromaPrefetch[k] = DisplayPipeLineDeliveryTimeChromaPrefetch[k] / req_per_swath_ub;
5790	}
5791	}
5792
5793	for (k = 0; k < NumberOfActivePlanes; ++k) {
5794	int cursor_req_per_width = 0;
5795	cursor_req_per_width = dml_ceil(CursorWidth[k][0] * CursorBPP[k][0] / 256 / 8, 1);
5796	if (NumberOfCursors[k] > 0) {
5797	if (VRatio[k] <= 1) {
5798	CursorRequestDeliveryTime[k] = CursorWidth[k][0] / HRatio[k] / PixelClock[k] / cursor_req_per_width;
5799	} else {
5800	CursorRequestDeliveryTime[k] = CursorWidth[k][0] / PSCL_THROUGHPUT[k] / DPPCLK[k] / cursor_req_per_width;
5801	}
5802	if (VRatioPrefetchY[k] <= 1) {
5803	CursorRequestDeliveryTimePrefetch[k] = CursorWidth[k][0] / HRatio[k] / PixelClock[k] / cursor_req_per_width;
5804	} else {
5805	CursorRequestDeliveryTimePrefetch[k] = CursorWidth[k][0] / PSCL_THROUGHPUT[k] / DPPCLK[k] / cursor_req_per_width;
5806	}
5807	} else {
5808	CursorRequestDeliveryTime[k] = 0;
5809	CursorRequestDeliveryTimePrefetch[k] = 0;
5810	}
5811	}
5812	}
5813
5814	static void CalculateMetaAndPTETimes(
5815	int NumberOfActivePlanes,
5816	bool_Bool GPUVMEnable,
5817	int MetaChunkSize,
5818	int MinMetaChunkSizeBytes,
5819	int HTotal[],
5820	double VRatio[],
5821	double VRatioChroma[],
5822	double DestinationLinesToRequestRowInVBlank[],
5823	double DestinationLinesToRequestRowInImmediateFlip[],
5824	bool_Bool DCCEnable[],
5825	double PixelClock[],
5826	int BytePerPixelY[],
5827	int BytePerPixelC[],
5828	enum scan_direction_class SourceScan[],
5829	int dpte_row_height[],
5830	int dpte_row_height_chroma[],
5831	int meta_row_width[],
5832	int meta_row_width_chroma[],
5833	int meta_row_height[],
5834	int meta_row_height_chroma[],
5835	int meta_req_width[],
5836	int meta_req_width_chroma[],
5837	int meta_req_height[],
5838	int meta_req_height_chroma[],
5839	int dpte_group_bytes[],
5840	int PTERequestSizeY[],
5841	int PTERequestSizeC[],
5842	int PixelPTEReqWidthY[],
5843	int PixelPTEReqHeightY[],
5844	int PixelPTEReqWidthC[],
5845	int PixelPTEReqHeightC[],
5846	int dpte_row_width_luma_ub[],
5847	int dpte_row_width_chroma_ub[],
5848	double DST_Y_PER_PTE_ROW_NOM_L[],
5849	double DST_Y_PER_PTE_ROW_NOM_C[],
5850	double DST_Y_PER_META_ROW_NOM_L[],
5851	double DST_Y_PER_META_ROW_NOM_C[],
5852	double TimePerMetaChunkNominal[],
5853	double TimePerChromaMetaChunkNominal[],
5854	double TimePerMetaChunkVBlank[],
5855	double TimePerChromaMetaChunkVBlank[],
5856	double TimePerMetaChunkFlip[],
5857	double TimePerChromaMetaChunkFlip[],
5858	double time_per_pte_group_nom_luma[],
5859	double time_per_pte_group_vblank_luma[],
5860	double time_per_pte_group_flip_luma[],
5861	double time_per_pte_group_nom_chroma[],
5862	double time_per_pte_group_vblank_chroma[],
5863	double time_per_pte_group_flip_chroma[])
5864	{
5865	unsigned int meta_chunk_width = 0;
5866	unsigned int min_meta_chunk_width = 0;
5867	unsigned int meta_chunk_per_row_int = 0;
5868	unsigned int meta_row_remainder = 0;
5869	unsigned int meta_chunk_threshold = 0;
5870	unsigned int meta_chunks_per_row_ub = 0;
5871	unsigned int meta_chunk_width_chroma = 0;
5872	unsigned int min_meta_chunk_width_chroma = 0;
5873	unsigned int meta_chunk_per_row_int_chroma = 0;
5874	unsigned int meta_row_remainder_chroma = 0;
5875	unsigned int meta_chunk_threshold_chroma = 0;
5876	unsigned int meta_chunks_per_row_ub_chroma = 0;
5877	unsigned int dpte_group_width_luma = 0;
5878	unsigned int dpte_groups_per_row_luma_ub = 0;
5879	unsigned int dpte_group_width_chroma = 0;
5880	unsigned int dpte_groups_per_row_chroma_ub = 0;
5881	unsigned int k;
5882
5883	for (k = 0; k < NumberOfActivePlanes; ++k) {
5884	DST_Y_PER_PTE_ROW_NOM_L[k] = dpte_row_height[k] / VRatio[k];
5885	if (BytePerPixelC[k] == 0) {
5886	DST_Y_PER_PTE_ROW_NOM_C[k] = 0;
5887	} else {
5888	DST_Y_PER_PTE_ROW_NOM_C[k] = dpte_row_height_chroma[k] / VRatioChroma[k];
5889	}
5890	DST_Y_PER_META_ROW_NOM_L[k] = meta_row_height[k] / VRatio[k];
5891	if (BytePerPixelC[k] == 0) {
5892	DST_Y_PER_META_ROW_NOM_C[k] = 0;
5893	} else {
5894	DST_Y_PER_META_ROW_NOM_C[k] = meta_row_height_chroma[k] / VRatioChroma[k];
5895	}
5896	}
5897
5898	for (k = 0; k < NumberOfActivePlanes; ++k) {
5899	if (DCCEnable[k] == true1) {
5900	meta_chunk_width = MetaChunkSize * 1024 * 256 / BytePerPixelY[k] / meta_row_height[k];
5901	min_meta_chunk_width = MinMetaChunkSizeBytes * 256 / BytePerPixelY[k] / meta_row_height[k];
5902	meta_chunk_per_row_int = meta_row_width[k] / meta_chunk_width;
5903	meta_row_remainder = meta_row_width[k] % meta_chunk_width;
5904	if (SourceScan[k] != dm_vert) {
5905	meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width[k];
5906	} else {
5907	meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height[k];
5908	}
5909	if (meta_row_remainder <= meta_chunk_threshold) {
5910	meta_chunks_per_row_ub = meta_chunk_per_row_int + 1;
5911	} else {
5912	meta_chunks_per_row_ub = meta_chunk_per_row_int + 2;
5913	}
5914	TimePerMetaChunkNominal[k] = meta_row_height[k] / VRatio[k] * HTotal[k] / PixelClock[k] / meta_chunks_per_row_ub;
5915	TimePerMetaChunkVBlank[k] = DestinationLinesToRequestRowInVBlank[k] * HTotal[k] / PixelClock[k] / meta_chunks_per_row_ub;
5916	TimePerMetaChunkFlip[k] = DestinationLinesToRequestRowInImmediateFlip[k] * HTotal[k] / PixelClock[k] / meta_chunks_per_row_ub;
5917	if (BytePerPixelC[k] == 0) {
5918	TimePerChromaMetaChunkNominal[k] = 0;
5919	TimePerChromaMetaChunkVBlank[k] = 0;
5920	TimePerChromaMetaChunkFlip[k] = 0;
5921	} else {
5922	meta_chunk_width_chroma = MetaChunkSize * 1024 * 256 / BytePerPixelC[k] / meta_row_height_chroma[k];
5923	min_meta_chunk_width_chroma = MinMetaChunkSizeBytes * 256 / BytePerPixelC[k] / meta_row_height_chroma[k];
5924	meta_chunk_per_row_int_chroma = (double) meta_row_width_chroma[k] / meta_chunk_width_chroma;
5925	meta_row_remainder_chroma = meta_row_width_chroma[k] % meta_chunk_width_chroma;
5926	if (SourceScan[k] != dm_vert) {
5927	meta_chunk_threshold_chroma = 2 * min_meta_chunk_width_chroma - meta_req_width_chroma[k];
5928	} else {
5929	meta_chunk_threshold_chroma = 2 * min_meta_chunk_width_chroma - meta_req_height_chroma[k];
5930	}
5931	if (meta_row_remainder_chroma <= meta_chunk_threshold_chroma) {
5932	meta_chunks_per_row_ub_chroma = meta_chunk_per_row_int_chroma + 1;
5933	} else {
5934	meta_chunks_per_row_ub_chroma = meta_chunk_per_row_int_chroma + 2;
5935	}
5936	TimePerChromaMetaChunkNominal[k] = meta_row_height_chroma[k] / VRatioChroma[k] * HTotal[k] / PixelClock[k] / meta_chunks_per_row_ub_chroma;
5937	TimePerChromaMetaChunkVBlank[k] = DestinationLinesToRequestRowInVBlank[k] * HTotal[k] / PixelClock[k] / meta_chunks_per_row_ub_chroma;
5938	TimePerChromaMetaChunkFlip[k] = DestinationLinesToRequestRowInImmediateFlip[k] * HTotal[k] / PixelClock[k] / meta_chunks_per_row_ub_chroma;
5939	}
5940	} else {
5941	TimePerMetaChunkNominal[k] = 0;
5942	TimePerMetaChunkVBlank[k] = 0;
5943	TimePerMetaChunkFlip[k] = 0;
5944	TimePerChromaMetaChunkNominal[k] = 0;
5945	TimePerChromaMetaChunkVBlank[k] = 0;
5946	TimePerChromaMetaChunkFlip[k] = 0;
5947	}
5948	}
5949
5950	for (k = 0; k < NumberOfActivePlanes; ++k) {
5951	if (GPUVMEnable == true1) {
5952	if (SourceScan[k] != dm_vert) {
5953	dpte_group_width_luma = dpte_group_bytes[k] / PTERequestSizeY[k] * PixelPTEReqWidthY[k];
5954	} else {
5955	dpte_group_width_luma = dpte_group_bytes[k] / PTERequestSizeY[k] * PixelPTEReqHeightY[k];
5956	}
5957	dpte_groups_per_row_luma_ub = dml_ceil(1.0 * dpte_row_width_luma_ub[k] / dpte_group_width_luma, 1);
5958	time_per_pte_group_nom_luma[k] = DST_Y_PER_PTE_ROW_NOM_L[k] * HTotal[k] / PixelClock[k] / dpte_groups_per_row_luma_ub;
5959	time_per_pte_group_vblank_luma[k] = DestinationLinesToRequestRowInVBlank[k] * HTotal[k] / PixelClock[k] / dpte_groups_per_row_luma_ub;
5960	time_per_pte_group_flip_luma[k] = DestinationLinesToRequestRowInImmediateFlip[k] * HTotal[k] / PixelClock[k] / dpte_groups_per_row_luma_ub;
5961	if (BytePerPixelC[k] == 0) {
5962	time_per_pte_group_nom_chroma[k] = 0;
5963	time_per_pte_group_vblank_chroma[k] = 0;
5964	time_per_pte_group_flip_chroma[k] = 0;
5965	} else {
5966	if (SourceScan[k] != dm_vert) {
5967	dpte_group_width_chroma = dpte_group_bytes[k] / PTERequestSizeC[k] * PixelPTEReqWidthC[k];
5968	} else {
5969	dpte_group_width_chroma = dpte_group_bytes[k] / PTERequestSizeC[k] * PixelPTEReqHeightC[k];
5970	}
5971	dpte_groups_per_row_chroma_ub = dml_ceil(1.0 * dpte_row_width_chroma_ub[k] / dpte_group_width_chroma, 1);
5972	time_per_pte_group_nom_chroma[k] = DST_Y_PER_PTE_ROW_NOM_C[k] * HTotal[k] / PixelClock[k] / dpte_groups_per_row_chroma_ub;
5973	time_per_pte_group_vblank_chroma[k] = DestinationLinesToRequestRowInVBlank[k] * HTotal[k] / PixelClock[k] / dpte_groups_per_row_chroma_ub;
5974	time_per_pte_group_flip_chroma[k] = DestinationLinesToRequestRowInImmediateFlip[k] * HTotal[k] / PixelClock[k] / dpte_groups_per_row_chroma_ub;
5975	}
5976	} else {
5977	time_per_pte_group_nom_luma[k] = 0;
5978	time_per_pte_group_vblank_luma[k] = 0;
5979	time_per_pte_group_flip_luma[k] = 0;
5980	time_per_pte_group_nom_chroma[k] = 0;
5981	time_per_pte_group_vblank_chroma[k] = 0;
5982	time_per_pte_group_flip_chroma[k] = 0;
5983	}
5984	}
5985	}
5986
5987	static void CalculateVMGroupAndRequestTimes(
5988	unsigned int NumberOfActivePlanes,
5989	bool_Bool GPUVMEnable,
5990	unsigned int GPUVMMaxPageTableLevels,
5991	unsigned int HTotal[],
5992	int BytePerPixelC[],
5993	double DestinationLinesToRequestVMInVBlank[],
5994	double DestinationLinesToRequestVMInImmediateFlip[],
5995	bool_Bool DCCEnable[],
5996	double PixelClock[],
5997	int dpte_row_width_luma_ub[],
5998	int dpte_row_width_chroma_ub[],
5999	int vm_group_bytes[],
6000	unsigned int dpde0_bytes_per_frame_ub_l[],
6001	unsigned int dpde0_bytes_per_frame_ub_c[],
6002	int meta_pte_bytes_per_frame_ub_l[],
6003	int meta_pte_bytes_per_frame_ub_c[],
6004	double TimePerVMGroupVBlank[],
6005	double TimePerVMGroupFlip[],
6006	double TimePerVMRequestVBlank[],
6007	double TimePerVMRequestFlip[])
6008	{
6009	int num_group_per_lower_vm_stage = 0;
6010	int num_req_per_lower_vm_stage = 0;
6011	unsigned int k;
6012
6013	for (k = 0; k < NumberOfActivePlanes; ++k) {
6014	if (GPUVMEnable == true1 && (DCCEnable[k] == true1 \|\| GPUVMMaxPageTableLevels > 1)) {
6015	if (DCCEnable[k] == false0) {
6016	if (BytePerPixelC[k] > 0) {
6017	num_group_per_lower_vm_stage = dml_ceil((double) (dpde0_bytes_per_frame_ub_l[k])
6018	/ (double) (vm_group_bytes[k]), 1) + dml_ceil((double) (dpde0_bytes_per_frame_ub_c[k])
6019	/ (double) (vm_group_bytes[k]), 1);
6020	} else {
6021	num_group_per_lower_vm_stage = dml_ceil((double) (dpde0_bytes_per_frame_ub_l[k])
6022	/ (double) (vm_group_bytes[k]), 1);
6023	}
6024	} else {
6025	if (GPUVMMaxPageTableLevels == 1) {
6026	if (BytePerPixelC[k] > 0) {
6027	num_group_per_lower_vm_stage = dml_ceil((double) (meta_pte_bytes_per_frame_ub_l[k])
6028	/ (double) (vm_group_bytes[k]), 1) + dml_ceil((double) (meta_pte_bytes_per_frame_ub_c[k])
6029	/ (double) (vm_group_bytes[k]), 1);
6030	} else {
6031	num_group_per_lower_vm_stage = dml_ceil((double) (meta_pte_bytes_per_frame_ub_l[k])
6032	/ (double) (vm_group_bytes[k]), 1);
6033	}
6034	} else {
6035	if (BytePerPixelC[k] > 0) {
6036	num_group_per_lower_vm_stage = 2 + dml_ceil((double) (dpde0_bytes_per_frame_ub_l[k]) / (double) (vm_group_bytes[k]), 1)
6037	+ dml_ceil((double) (dpde0_bytes_per_frame_ub_c[k]) / (double) (vm_group_bytes[k]), 1)
6038	+ dml_ceil((double) (meta_pte_bytes_per_frame_ub_l[k]) / (double) (vm_group_bytes[k]), 1)
6039	+ dml_ceil((double) (meta_pte_bytes_per_frame_ub_c[k]) / (double) (vm_group_bytes[k]), 1);
6040	} else {
6041	num_group_per_lower_vm_stage = 1 + dml_ceil((double) (dpde0_bytes_per_frame_ub_l[k]) / (double) (vm_group_bytes[k]), 1)
6042	+ dml_ceil((double) (meta_pte_bytes_per_frame_ub_l[k]) / (double) (vm_group_bytes[k]), 1);
6043	}
6044	}
6045	}
6046
6047	if (DCCEnable[k] == false0) {
6048	if (BytePerPixelC[k] > 0) {
6049	num_req_per_lower_vm_stage = dpde0_bytes_per_frame_ub_l[k] / 64 + dpde0_bytes_per_frame_ub_c[k] / 64;
6050	} else {
6051	num_req_per_lower_vm_stage = dpde0_bytes_per_frame_ub_l[k] / 64;
6052	}
6053	} else {
6054	if (GPUVMMaxPageTableLevels == 1) {
6055	if (BytePerPixelC[k] > 0) {
6056	num_req_per_lower_vm_stage = meta_pte_bytes_per_frame_ub_l[k] / 64
6057	+ meta_pte_bytes_per_frame_ub_c[k] / 64;
6058	} else {
6059	num_req_per_lower_vm_stage = meta_pte_bytes_per_frame_ub_l[k] / 64;
6060	}
6061	} else {
6062	if (BytePerPixelC[k] > 0) {
6063	num_req_per_lower_vm_stage = dpde0_bytes_per_frame_ub_l[k] / 64
6064	+ dpde0_bytes_per_frame_ub_c[k] / 64 + meta_pte_bytes_per_frame_ub_l[k]
6065	/ 64 + meta_pte_bytes_per_frame_ub_c[k] / 64;
6066	} else {
6067	num_req_per_lower_vm_stage = dpde0_bytes_per_frame_ub_l[k] / 64
6068	+ meta_pte_bytes_per_frame_ub_l[k] / 64;
6069	}
6070	}
6071	}
6072
6073	TimePerVMGroupVBlank[k] = DestinationLinesToRequestVMInVBlank[k] * HTotal[k] / PixelClock[k]
6074	/ num_group_per_lower_vm_stage;
6075	TimePerVMGroupFlip[k] = DestinationLinesToRequestVMInImmediateFlip[k] * HTotal[k] / PixelClock[k]
6076	/ num_group_per_lower_vm_stage;
6077	TimePerVMRequestVBlank[k] = DestinationLinesToRequestVMInVBlank[k] * HTotal[k] / PixelClock[k]
6078	/ num_req_per_lower_vm_stage;
6079	TimePerVMRequestFlip[k] = DestinationLinesToRequestVMInImmediateFlip[k] * HTotal[k] / PixelClock[k]
6080	/ num_req_per_lower_vm_stage;
6081
6082	if (GPUVMMaxPageTableLevels > 2) {
6083	TimePerVMGroupVBlank[k] = TimePerVMGroupVBlank[k] / 2;
6084	TimePerVMGroupFlip[k] = TimePerVMGroupFlip[k] / 2;
6085	TimePerVMRequestVBlank[k] = TimePerVMRequestVBlank[k] / 2;
6086	TimePerVMRequestFlip[k] = TimePerVMRequestFlip[k] / 2;
6087	}
6088
6089	} else {
6090	TimePerVMGroupVBlank[k] = 0;
6091	TimePerVMGroupFlip[k] = 0;
6092	TimePerVMRequestVBlank[k] = 0;
6093	TimePerVMRequestFlip[k] = 0;
6094	}
6095	}
6096	}
6097
6098	static void CalculateStutterEfficiency(
6099	int NumberOfActivePlanes,
6100	long ROBBufferSizeInKByte,
6101	double TotalDataReadBandwidth,
6102	double DCFCLK,
6103	double ReturnBW,
6104	double SRExitTime,
6105	bool_Bool SynchronizedVBlank,
6106	int DPPPerPlane[],
6107	double DETBufferSizeY[],
6108	int BytePerPixelY[],
6109	double BytePerPixelDETY[],
6110	double SwathWidthY[],
6111	int SwathHeightY[],
6112	int SwathHeightC[],
6113	double DCCRateLuma[],
6114	double DCCRateChroma[],
6115	int HTotal[],
6116	int VTotal[],
6117	double PixelClock[],
6118	double VRatio[],
6119	enum scan_direction_class SourceScan[],
6120	int BlockHeight256BytesY[],
6121	int BlockWidth256BytesY[],
6122	int BlockHeight256BytesC[],
6123	int BlockWidth256BytesC[],
6124	int DCCYMaxUncompressedBlock[],
6125	int DCCCMaxUncompressedBlock[],
6126	int VActive[],
6127	bool_Bool DCCEnable[],
6128	bool_Bool WritebackEnable[],
6129	double ReadBandwidthPlaneLuma[],
6130	double ReadBandwidthPlaneChroma[],
6131	double meta_row_bw[],
6132	double dpte_row_bw[],
6133	double *StutterEfficiencyNotIncludingVBlank,
6134	double *StutterEfficiency,
6135	double *StutterPeriodOut)
6136	{
6137	double FullDETBufferingTimeY[DC__NUM_DPP__MAX8] = { 0 };
6138	double FrameTimeForMinFullDETBufferingTime = 0;
6139	double StutterPeriod = 0;
6140	double AverageReadBandwidth = 0;
6141	double TotalRowReadBandwidth = 0;
6142	double AverageDCCCompressionRate = 0;
6143	double PartOfBurstThatFitsInROB = 0;
6144	double StutterBurstTime = 0;
6145	int TotalActiveWriteback = 0;
6146	double VBlankTime = 0;
6147	double SmallestVBlank = 0;
6148	int BytePerPixelYCriticalPlane = 0;
6149	double SwathWidthYCriticalPlane = 0;
6150	double LinesInDETY[DC__NUM_DPP__MAX8] = { 0 };
6151	double LinesInDETYRoundedDownToSwath[DC__NUM_DPP__MAX8] = { 0 };
6152	double LinesToFinishSwathTransferStutterCriticalPlane = 0;
6153	double MaximumEffectiveCompressionLuma = 0;
6154	double MaximumEffectiveCompressionChroma = 0;
6155	unsigned int k;
6156
6157	for (k = 0; k < NumberOfActivePlanes; ++k) {
6158	LinesInDETY[k] = DETBufferSizeY[k] / BytePerPixelDETY[k] / SwathWidthY[k];
6159	LinesInDETYRoundedDownToSwath[k] = dml_floor(LinesInDETY[k], SwathHeightY[k]);
6160	FullDETBufferingTimeY[k] = LinesInDETYRoundedDownToSwath[k] * (HTotal[k] / PixelClock[k]) / VRatio[k];
6161	}
6162
6163	StutterPeriod = FullDETBufferingTimeY[0];
6164	FrameTimeForMinFullDETBufferingTime = VTotal[0] * HTotal[0] / PixelClock[0];
6165	BytePerPixelYCriticalPlane = BytePerPixelY[0];
6166	SwathWidthYCriticalPlane = SwathWidthY[0];
6167	LinesToFinishSwathTransferStutterCriticalPlane = SwathHeightY[0]
6168	- (LinesInDETY[0] - LinesInDETYRoundedDownToSwath[0]);
6169
6170	for (k = 0; k < NumberOfActivePlanes; ++k) {
6171	if (FullDETBufferingTimeY[k] < StutterPeriod) {
6172	StutterPeriod = FullDETBufferingTimeY[k];
6173	FrameTimeForMinFullDETBufferingTime = VTotal[k] * HTotal[k] / PixelClock[k];
6174	BytePerPixelYCriticalPlane = BytePerPixelY[k];
6175	SwathWidthYCriticalPlane = SwathWidthY[k];
6176	LinesToFinishSwathTransferStutterCriticalPlane = SwathHeightY[k]
6177	- (LinesInDETY[k] - LinesInDETYRoundedDownToSwath[k]);
6178	}
6179	}
6180
6181	AverageReadBandwidth = 0;
6182	TotalRowReadBandwidth = 0;
6183	for (k = 0; k < NumberOfActivePlanes; ++k) {
6184	if (DCCEnable[k] == true1) {
6185	if ((SourceScan[k] == dm_vert && BlockWidth256BytesY[k] > SwathHeightY[k])
6186	\|\| (SourceScan[k] != dm_vert
6187	&& BlockHeight256BytesY[k] > SwathHeightY[k])
6188	\|\| DCCYMaxUncompressedBlock[k] < 256) {
6189	MaximumEffectiveCompressionLuma = 2;
6190	} else {
6191	MaximumEffectiveCompressionLuma = 4;
6192	}
6193	AverageReadBandwidth = AverageReadBandwidth + ReadBandwidthPlaneLuma[k] / dml_min(DCCRateLuma[k], MaximumEffectiveCompressionLuma);
6194
6195	if (ReadBandwidthPlaneChroma[k] > 0) {
6196	if ((SourceScan[k] == dm_vert && BlockWidth256BytesC[k] > SwathHeightC[k])
6197	\|\| (SourceScan[k] != dm_vert && BlockHeight256BytesC[k] > SwathHeightC[k])
6198	\|\| DCCCMaxUncompressedBlock[k] < 256) {
6199	MaximumEffectiveCompressionChroma = 2;
6200	} else {
6201	MaximumEffectiveCompressionChroma = 4;
6202	}
6203	AverageReadBandwidth = AverageReadBandwidth + ReadBandwidthPlaneChroma[k] / dml_min(DCCRateChroma[k], MaximumEffectiveCompressionChroma);
6204	}
6205	} else {
6206	AverageReadBandwidth = AverageReadBandwidth + ReadBandwidthPlaneLuma[k] + ReadBandwidthPlaneChroma[k];
6207	}
6208	TotalRowReadBandwidth = TotalRowReadBandwidth + DPPPerPlane[k] * (meta_row_bw[k] + dpte_row_bw[k]);
6209	}
6210
6211	AverageDCCCompressionRate = TotalDataReadBandwidth / AverageReadBandwidth;
6212	PartOfBurstThatFitsInROB = dml_min(StutterPeriod * TotalDataReadBandwidth, ROBBufferSizeInKByte * 1024 * AverageDCCCompressionRate);
6213	StutterBurstTime = PartOfBurstThatFitsInROB / AverageDCCCompressionRate / ReturnBW + (StutterPeriod * TotalDataReadBandwidth
6214	- PartOfBurstThatFitsInROB) / (DCFCLK * 64) + StutterPeriod * TotalRowReadBandwidth / ReturnBW;
6215	StutterBurstTime = dml_max(StutterBurstTime, LinesToFinishSwathTransferStutterCriticalPlane * BytePerPixelYCriticalPlane * SwathWidthYCriticalPlane / ReturnBW);
6216
6217	TotalActiveWriteback = 0;
6218	for (k = 0; k < NumberOfActivePlanes; ++k) {
6219	if (WritebackEnable[k] == true1) {
6220	TotalActiveWriteback = TotalActiveWriteback + 1;
6221	}
6222	}
6223
6224	if (TotalActiveWriteback == 0) {
6225	*StutterEfficiencyNotIncludingVBlank = (1
6226	- (SRExitTime + StutterBurstTime) / StutterPeriod) * 100;
6227	} else {
6228	*StutterEfficiencyNotIncludingVBlank = 0;
6229	}
6230
6231	if (SynchronizedVBlank == true1 \|\| NumberOfActivePlanes == 1) {
6232	SmallestVBlank = (VTotal[0] - VActive[0]) * HTotal[0] / PixelClock[0];
6233	} else {
6234	SmallestVBlank = 0;
6235	}
6236	for (k = 0; k < NumberOfActivePlanes; ++k) {
6237	if (SynchronizedVBlank == true1 \|\| NumberOfActivePlanes == 1) {
6238	VBlankTime = (VTotal[k] - VActive[k]) * HTotal[k] / PixelClock[k];
6239	} else {
6240	VBlankTime = 0;
6241	}
6242	SmallestVBlank = dml_min(SmallestVBlank, VBlankTime);
6243	}
6244
6245	StutterEfficiency = (StutterEfficiencyNotIncludingVBlank / 100.0 * (FrameTimeForMinFullDETBufferingTime - SmallestVBlank) + SmallestVBlank) / FrameTimeForMinFullDETBufferingTime * 100;
6246
6247	if (StutterPeriodOut)
6248	*StutterPeriodOut = StutterPeriod;
6249	}
6250
6251	static void CalculateSwathAndDETConfiguration(
6252	bool_Bool ForceSingleDPP,
6253	int NumberOfActivePlanes,
6254	long DETBufferSizeInKByte,
6255	double MaximumSwathWidthLuma[],
6256	double MaximumSwathWidthChroma[],
6257	enum scan_direction_class SourceScan[],
6258	enum source_format_class SourcePixelFormat[],
6259	enum dm_swizzle_mode SurfaceTiling[],
6260	int ViewportWidth[],
6261	int ViewportHeight[],
6262	int SurfaceWidthY[],
6263	int SurfaceWidthC[],
6264	int SurfaceHeightY[],
6265	int SurfaceHeightC[],
6266	int Read256BytesBlockHeightY[],
6267	int Read256BytesBlockHeightC[],
6268	int Read256BytesBlockWidthY[],
6269	int Read256BytesBlockWidthC[],
6270	enum odm_combine_mode ODMCombineEnabled[],
6271	int BlendingAndTiming[],
6272	int BytePerPixY[],
6273	int BytePerPixC[],
6274	double BytePerPixDETY[],
6275	double BytePerPixDETC[],
6276	int HActive[],
6277	double HRatio[],
6278	double HRatioChroma[],
6279	int DPPPerPlane[],
6280	int swath_width_luma_ub[],
6281	int swath_width_chroma_ub[],
6282	double SwathWidth[],
6283	double SwathWidthChroma[],
6284	int SwathHeightY[],
6285	int SwathHeightC[],
6286	double DETBufferSizeY[],
6287	double DETBufferSizeC[],
6288	bool_Bool ViewportSizeSupportPerPlane[],
6289	bool_Bool *ViewportSizeSupport)
6290	{
6291	int MaximumSwathHeightY[DC__NUM_DPP__MAX8] = { 0 };
6292	int MaximumSwathHeightC[DC__NUM_DPP__MAX8] = { 0 };
6293	int MinimumSwathHeightY = 0;
6294	int MinimumSwathHeightC = 0;
6295	long RoundedUpMaxSwathSizeBytesY = 0;
6296	long RoundedUpMaxSwathSizeBytesC = 0;
6297	long RoundedUpMinSwathSizeBytesY = 0;
6298	long RoundedUpMinSwathSizeBytesC = 0;
6299	long RoundedUpSwathSizeBytesY = 0;
6300	long RoundedUpSwathSizeBytesC = 0;
6301	double SwathWidthSingleDPP[DC__NUM_DPP__MAX8] = { 0 };
6302	double SwathWidthSingleDPPChroma[DC__NUM_DPP__MAX8] = { 0 };
6303	int k;
6304
6305	CalculateSwathWidth(
6306	ForceSingleDPP,
6307	NumberOfActivePlanes,
6308	SourcePixelFormat,
6309	SourceScan,
6310	ViewportWidth,
6311	ViewportHeight,
6312	SurfaceWidthY,
6313	SurfaceWidthC,
6314	SurfaceHeightY,
6315	SurfaceHeightC,
6316	ODMCombineEnabled,
6317	BytePerPixY,
6318	BytePerPixC,
6319	Read256BytesBlockHeightY,
6320	Read256BytesBlockHeightC,
6321	Read256BytesBlockWidthY,
6322	Read256BytesBlockWidthC,
6323	BlendingAndTiming,
6324	HActive,
6325	HRatio,
6326	DPPPerPlane,
6327	SwathWidthSingleDPP,
6328	SwathWidthSingleDPPChroma,
6329	SwathWidth,
6330	SwathWidthChroma,
6331	MaximumSwathHeightY,
6332	MaximumSwathHeightC,
6333	swath_width_luma_ub,
6334	swath_width_chroma_ub);
6335
6336	*ViewportSizeSupport = true1;
6337	for (k = 0; k < NumberOfActivePlanes; ++k) {
6338	if ((SourcePixelFormat[k] == dm_444_64 \|\| SourcePixelFormat[k] == dm_444_32
6339	\|\| SourcePixelFormat[k] == dm_444_16
6340	\|\| SourcePixelFormat[k] == dm_mono_16
6341	\|\| SourcePixelFormat[k] == dm_mono_8
6342	\|\| SourcePixelFormat[k] == dm_rgbe)) {
6343	if (SurfaceTiling[k] == dm_sw_linear
6344	\|\| (SourcePixelFormat[k] == dm_444_64
6345	&& (SurfaceTiling[k] == dm_sw_64kb_s \|\| SurfaceTiling[k] == dm_sw_64kb_s_t \|\| SurfaceTiling[k] == dm_sw_64kb_s_x)
6346	&& SourceScan[k] != dm_vert)) {
6347	MinimumSwathHeightY = MaximumSwathHeightY[k];
6348	} else if (SourcePixelFormat[k] == dm_444_8 && SourceScan[k] == dm_vert) {
6349	MinimumSwathHeightY = MaximumSwathHeightY[k];
6350	} else {
6351	MinimumSwathHeightY = MaximumSwathHeightY[k] / 2;
6352	}
6353	MinimumSwathHeightC = MaximumSwathHeightC[k];
6354	} else {
6355	if (SurfaceTiling[k] == dm_sw_linear) {
6356	MinimumSwathHeightY = MaximumSwathHeightY[k];
6357	MinimumSwathHeightC = MaximumSwathHeightC[k];
6358	} else if (SourcePixelFormat[k] == dm_rgbe_alpha
6359	&& SourceScan[k] == dm_vert) {
6360	MinimumSwathHeightY = MaximumSwathHeightY[k] / 2;
6361	MinimumSwathHeightC = MaximumSwathHeightC[k];
6362	} else if (SourcePixelFormat[k] == dm_rgbe_alpha) {
6363	MinimumSwathHeightY = MaximumSwathHeightY[k] / 2;
6364	MinimumSwathHeightC = MaximumSwathHeightC[k] / 2;
6365	} else if (SourcePixelFormat[k] == dm_420_8 && SourceScan[k] == dm_vert) {
6366	MinimumSwathHeightY = MaximumSwathHeightY[k];
6367	MinimumSwathHeightC = MaximumSwathHeightC[k] / 2;
6368	} else {
6369	MinimumSwathHeightC = MaximumSwathHeightC[k] / 2;
6370	MinimumSwathHeightY = MaximumSwathHeightY[k] / 2;
6371	}
6372	}
6373
6374	RoundedUpMaxSwathSizeBytesY = swath_width_luma_ub[k] * BytePerPixDETY[k]
6375	* MaximumSwathHeightY[k];
6376	RoundedUpMinSwathSizeBytesY = swath_width_luma_ub[k] * BytePerPixDETY[k]
6377	* MinimumSwathHeightY;
6378	if (SourcePixelFormat[k] == dm_420_10) {
6379	RoundedUpMaxSwathSizeBytesY = dml_ceil((double) RoundedUpMaxSwathSizeBytesY, 256);
6380	RoundedUpMinSwathSizeBytesY = dml_ceil((double) RoundedUpMinSwathSizeBytesY, 256);
6381	}
6382	RoundedUpMaxSwathSizeBytesC = swath_width_chroma_ub[k] * BytePerPixDETC[k]
6383	* MaximumSwathHeightC[k];
6384	RoundedUpMinSwathSizeBytesC = swath_width_chroma_ub[k] * BytePerPixDETC[k]
6385	* MinimumSwathHeightC;
6386	if (SourcePixelFormat[k] == dm_420_10) {
6387	RoundedUpMaxSwathSizeBytesC = dml_ceil(RoundedUpMaxSwathSizeBytesC, 256);
6388	RoundedUpMinSwathSizeBytesC = dml_ceil(RoundedUpMinSwathSizeBytesC, 256);
6389	}
6390
6391	if (RoundedUpMaxSwathSizeBytesY + RoundedUpMaxSwathSizeBytesC
6392	<= DETBufferSizeInKByte * 1024 / 2) {
6393	SwathHeightY[k] = MaximumSwathHeightY[k];
6394	SwathHeightC[k] = MaximumSwathHeightC[k];
6395	RoundedUpSwathSizeBytesY = RoundedUpMaxSwathSizeBytesY;
6396	RoundedUpSwathSizeBytesC = RoundedUpMaxSwathSizeBytesC;
6397	} else if (RoundedUpMaxSwathSizeBytesY >= 1.5 * RoundedUpMaxSwathSizeBytesC
6398	&& RoundedUpMinSwathSizeBytesY + RoundedUpMaxSwathSizeBytesC
6399	<= DETBufferSizeInKByte * 1024 / 2) {
6400	SwathHeightY[k] = MinimumSwathHeightY;
6401	SwathHeightC[k] = MaximumSwathHeightC[k];
6402	RoundedUpSwathSizeBytesY = RoundedUpMinSwathSizeBytesY;
6403	RoundedUpSwathSizeBytesC = RoundedUpMaxSwathSizeBytesC;
6404	} else if (RoundedUpMaxSwathSizeBytesY < 1.5 * RoundedUpMaxSwathSizeBytesC
6405	&& RoundedUpMaxSwathSizeBytesY + RoundedUpMinSwathSizeBytesC
6406	<= DETBufferSizeInKByte * 1024 / 2) {
6407	SwathHeightY[k] = MaximumSwathHeightY[k];
6408	SwathHeightC[k] = MinimumSwathHeightC;
6409	RoundedUpSwathSizeBytesY = RoundedUpMaxSwathSizeBytesY;
6410	RoundedUpSwathSizeBytesC = RoundedUpMinSwathSizeBytesC;
6411	} else {
6412	SwathHeightY[k] = MinimumSwathHeightY;
6413	SwathHeightC[k] = MinimumSwathHeightC;
6414	RoundedUpSwathSizeBytesY = RoundedUpMinSwathSizeBytesY;
6415	RoundedUpSwathSizeBytesC = RoundedUpMinSwathSizeBytesC;
6416	}
6417
6418	if (SwathHeightC[k] == 0) {
6419	DETBufferSizeY[k] = DETBufferSizeInKByte * 1024;
6420	DETBufferSizeC[k] = 0;
6421	} else if (RoundedUpSwathSizeBytesY <= 1.5 * RoundedUpSwathSizeBytesC) {
6422	DETBufferSizeY[k] = DETBufferSizeInKByte * 1024 / 2;
6423	DETBufferSizeC[k] = DETBufferSizeInKByte * 1024 / 2;
6424	} else {
6425	DETBufferSizeY[k] = DETBufferSizeInKByte * 1024 * 2 / 3;
6426	DETBufferSizeC[k] = DETBufferSizeInKByte * 1024 / 3;
6427	}
6428
6429	if (RoundedUpMinSwathSizeBytesY + RoundedUpMinSwathSizeBytesC
6430	> DETBufferSizeInKByte * 1024 / 2
6431	\|\| SwathWidth[k] > MaximumSwathWidthLuma[k]
6432	\|\| (SwathHeightC[k] > 0
6433	&& SwathWidthChroma[k] > MaximumSwathWidthChroma[k])) {
6434	*ViewportSizeSupport = false0;
6435	ViewportSizeSupportPerPlane[k] = false0;
6436	} else {
6437	ViewportSizeSupportPerPlane[k] = true1;
6438	}
6439	}
6440	}
6441
6442	static void CalculateSwathWidth(
6443	bool_Bool ForceSingleDPP,
6444	int NumberOfActivePlanes,
6445	enum source_format_class SourcePixelFormat[],
6446	enum scan_direction_class SourceScan[],
6447	unsigned int ViewportWidth[],
6448	unsigned int ViewportHeight[],
6449	unsigned int SurfaceWidthY[],
6450	unsigned int SurfaceWidthC[],
6451	unsigned int SurfaceHeightY[],
6452	unsigned int SurfaceHeightC[],
6453	enum odm_combine_mode ODMCombineEnabled[],
6454	int BytePerPixY[],
6455	int BytePerPixC[],
6456	int Read256BytesBlockHeightY[],
6457	int Read256BytesBlockHeightC[],
6458	int Read256BytesBlockWidthY[],
6459	int Read256BytesBlockWidthC[],
6460	int BlendingAndTiming[],
6461	unsigned int HActive[],
6462	double HRatio[],
6463	int DPPPerPlane[],
6464	double SwathWidthSingleDPPY[],
6465	double SwathWidthSingleDPPC[],
6466	double SwathWidthY[],
6467	double SwathWidthC[],
6468	int MaximumSwathHeightY[],
6469	int MaximumSwathHeightC[],
6470	unsigned int swath_width_luma_ub[],
6471	unsigned int swath_width_chroma_ub[])
6472	{
6473	unsigned int k, j;
6474	long surface_width_ub_l;
6475	long surface_height_ub_l;
6476	long surface_width_ub_c;
6477	long surface_height_ub_c;
6478
6479	for (k = 0; k < NumberOfActivePlanes; ++k) {
6480	enum odm_combine_mode MainPlaneODMCombine = 0;
6481	surface_width_ub_l = dml_ceil(SurfaceWidthY[k], Read256BytesBlockWidthY[k]);
6482	surface_height_ub_l = dml_ceil(SurfaceHeightY[k], Read256BytesBlockHeightY[k]);
6483	surface_width_ub_c = dml_ceil(SurfaceWidthC[k], Read256BytesBlockWidthC[k]);
6484	surface_height_ub_c = dml_ceil(SurfaceHeightC[k], Read256BytesBlockHeightC[k]);
6485
6486	if (SourceScan[k] != dm_vert) {
6487	SwathWidthSingleDPPY[k] = ViewportWidth[k];
6488	} else {
6489	SwathWidthSingleDPPY[k] = ViewportHeight[k];
6490	}
6491
6492	MainPlaneODMCombine = ODMCombineEnabled[k];
6493	for (j = 0; j < NumberOfActivePlanes; ++j) {
6494	if (BlendingAndTiming[k] == j) {
6495	MainPlaneODMCombine = ODMCombineEnabled[j];
6496	}
6497	}
6498
6499	if (MainPlaneODMCombine == dm_odm_combine_mode_4to1) {
6500	SwathWidthY[k] = dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 4.0 * HRatio[k]));
6501	} else if (MainPlaneODMCombine == dm_odm_combine_mode_2to1) {
6502	SwathWidthY[k] = dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 2.0 * HRatio[k]));
6503	} else if (DPPPerPlane[k] == 2) {
6504	SwathWidthY[k] = SwathWidthSingleDPPY[k] / 2;
6505	} else {
6506	SwathWidthY[k] = SwathWidthSingleDPPY[k];
6507	}
6508
6509	if (SourcePixelFormat[k] == dm_420_8 \|\| SourcePixelFormat[k] == dm_420_10 \|\| SourcePixelFormat[k] == dm_420_12) {
6510	SwathWidthC[k] = SwathWidthY[k] / 2;
6511	SwathWidthSingleDPPC[k] = SwathWidthSingleDPPY[k] / 2;
6512	} else {
6513	SwathWidthC[k] = SwathWidthY[k];
6514	SwathWidthSingleDPPC[k] = SwathWidthSingleDPPY[k];
6515	}
6516
6517	if (ForceSingleDPP == true1) {
6518	SwathWidthY[k] = SwathWidthSingleDPPY[k];
6519	SwathWidthC[k] = SwathWidthSingleDPPC[k];
6520	}
6521
6522	surface_width_ub_l = dml_ceil(SurfaceWidthY[k], Read256BytesBlockWidthY[k]);
6523	surface_height_ub_l = dml_ceil(SurfaceHeightY[k], Read256BytesBlockHeightY[k]);
6524	surface_width_ub_c = dml_ceil(SurfaceWidthC[k], Read256BytesBlockWidthC[k]);
6525	surface_height_ub_c = dml_ceil(SurfaceHeightC[k], Read256BytesBlockHeightC[k]);
6526
6527	if (SourceScan[k] != dm_vert) {
6528	MaximumSwathHeightY[k] = Read256BytesBlockHeightY[k];
6529	MaximumSwathHeightC[k] = Read256BytesBlockHeightC[k];
6530	swath_width_luma_ub[k] = dml_min(surface_width_ub_l, (long) dml_ceil(SwathWidthY[k] - 1,
6531	Read256BytesBlockWidthY[k]) + Read256BytesBlockWidthY[k]);
6532	if (BytePerPixC[k] > 0) {
6533	swath_width_chroma_ub[k] = dml_min(surface_width_ub_c, (long) dml_ceil(SwathWidthC[k] - 1,
6534	Read256BytesBlockWidthC[k]) + Read256BytesBlockWidthC[k]);
6535	} else {
6536	swath_width_chroma_ub[k] = 0;
6537	}
6538	} else {
6539	MaximumSwathHeightY[k] = Read256BytesBlockWidthY[k];
6540	MaximumSwathHeightC[k] = Read256BytesBlockWidthC[k];
6541	swath_width_luma_ub[k] = dml_min(surface_height_ub_l, (long) dml_ceil(SwathWidthY[k] - 1,
6542	Read256BytesBlockHeightY[k]) + Read256BytesBlockHeightY[k]);
6543	if (BytePerPixC[k] > 0) {
6544	swath_width_chroma_ub[k] = dml_min(surface_height_ub_c, (long) dml_ceil(SwathWidthC[k] - 1,
6545	Read256BytesBlockHeightC[k]) + Read256BytesBlockHeightC[k]);
6546	} else {
6547	swath_width_chroma_ub[k] = 0;
6548	}
6549	}
6550	}
6551	}
6552
6553	static double CalculateExtraLatency(
6554	long RoundTripPingLatencyCycles,
6555	long ReorderingBytes,
6556	double DCFCLK,
6557	int TotalNumberOfActiveDPP,
6558	int PixelChunkSizeInKByte,
6559	int TotalNumberOfDCCActiveDPP,
6560	int MetaChunkSize,
6561	double ReturnBW,
6562	bool_Bool GPUVMEnable,
6563	bool_Bool HostVMEnable,
6564	int NumberOfActivePlanes,
6565	int NumberOfDPP[],
6566	int dpte_group_bytes[],
6567	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
6568	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
6569	double HostVMMinPageSize,
6570	int HostVMMaxNonCachedPageTableLevels)
6571	{
6572	double ExtraLatencyBytes = 0;
6573	ExtraLatencyBytes = CalculateExtraLatencyBytes(
6574	ReorderingBytes,
6575	TotalNumberOfActiveDPP,
6576	PixelChunkSizeInKByte,
6577	TotalNumberOfDCCActiveDPP,
6578	MetaChunkSize,
6579	GPUVMEnable,
6580	HostVMEnable,
6581	NumberOfActivePlanes,
6582	NumberOfDPP,
6583	dpte_group_bytes,
6584	PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
6585	PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
6586	HostVMMinPageSize,
6587	HostVMMaxNonCachedPageTableLevels);
6588
6589	return (RoundTripPingLatencyCycles + 32) / DCFCLK + ExtraLatencyBytes / ReturnBW;
6590	}
6591
6592	static double CalculateExtraLatencyBytes(
6593	long ReorderingBytes,
6594	int TotalNumberOfActiveDPP,
6595	int PixelChunkSizeInKByte,
6596	int TotalNumberOfDCCActiveDPP,
6597	int MetaChunkSize,
6598	bool_Bool GPUVMEnable,
6599	bool_Bool HostVMEnable,
6600	int NumberOfActivePlanes,
6601	int NumberOfDPP[],
6602	int dpte_group_bytes[],
6603	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
6604	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
6605	double HostVMMinPageSize,
6606	int HostVMMaxNonCachedPageTableLevels)
6607	{
6608	double ret = 0;
6609	double HostVMInefficiencyFactor = 0;
6610	int HostVMDynamicLevels = 0;
6611	unsigned int k;
6612
6613	if (GPUVMEnable == true1 && HostVMEnable == true1) {
6614	HostVMInefficiencyFactor = PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData / PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly;
6615	if (HostVMMinPageSize < 2048) {
6616	HostVMDynamicLevels = HostVMMaxNonCachedPageTableLevels;
6617	} else if (HostVMMinPageSize >= 2048 && HostVMMinPageSize < 1048576) {
6618	HostVMDynamicLevels = dml_max(0, (int) HostVMMaxNonCachedPageTableLevels - 1);
6619	} else {
6620	HostVMDynamicLevels = dml_max(0, (int) HostVMMaxNonCachedPageTableLevels - 2);
6621	}
6622	} else {
6623	HostVMInefficiencyFactor = 1;
6624	HostVMDynamicLevels = 0;
6625	}
6626
6627	ret = ReorderingBytes + (TotalNumberOfActiveDPP * PixelChunkSizeInKByte + TotalNumberOfDCCActiveDPP * MetaChunkSize) * 1024.0;
6628
6629	if (GPUVMEnable == true1) {
6630	for (k = 0; k < NumberOfActivePlanes; ++k) {
6631	ret = ret + NumberOfDPP[k] * dpte_group_bytes[k] * (1 + 8 * HostVMDynamicLevels) * HostVMInefficiencyFactor;
6632	}
6633	}
6634	return ret;
6635	}
6636
6637
6638	static double CalculateUrgentLatency(
6639	double UrgentLatencyPixelDataOnly,
6640	double UrgentLatencyPixelMixedWithVMData,
6641	double UrgentLatencyVMDataOnly,
6642	bool_Bool DoUrgentLatencyAdjustment,
6643	double UrgentLatencyAdjustmentFabricClockComponent,
6644	double UrgentLatencyAdjustmentFabricClockReference,
6645	double FabricClock)
6646	{
6647	double ret;
6648
6649	ret = dml_max3(UrgentLatencyPixelDataOnly, UrgentLatencyPixelMixedWithVMData, UrgentLatencyVMDataOnly);
6650	if (DoUrgentLatencyAdjustment == true1) {
6651	ret = ret + UrgentLatencyAdjustmentFabricClockComponent * (UrgentLatencyAdjustmentFabricClockReference / FabricClock - 1);
6652	}
6653	return ret;
6654	}
6655
6656
6657	static void UseMinimumDCFCLK(
6658	struct display_mode_lib *mode_lib,
6659	int MaxInterDCNTileRepeaters,
6660	int MaxPrefetchMode,
6661	double FinalDRAMClockChangeLatency,
6662	double SREnterPlusExitTime,
6663	int ReturnBusWidth,
6664	int RoundTripPingLatencyCycles,
6665	int ReorderingBytes,
6666	int PixelChunkSizeInKByte,
6667	int MetaChunkSize,
6668	bool_Bool GPUVMEnable,
6669	int GPUVMMaxPageTableLevels,
6670	bool_Bool HostVMEnable,
6671	int NumberOfActivePlanes,
6672	double HostVMMinPageSize,
6673	int HostVMMaxNonCachedPageTableLevels,
6674	bool_Bool DynamicMetadataVMEnabled,
6675	enum immediate_flip_requirement ImmediateFlipRequirement,
6676	bool_Bool ProgressiveToInterlaceUnitInOPP,
6677	double MaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperation,
6678	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData,
6679	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
6680	double PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly,
6681	int VTotal[],
6682	int VActive[],
6683	int DynamicMetadataTransmittedBytes[],
6684	int DynamicMetadataLinesBeforeActiveRequired[],
6685	bool_Bool Interlace[],
6686	double RequiredDPPCLK[][2][DC__NUM_DPP__MAX8],
6687	double RequiredDISPCLK[][2],
6688	double UrgLatency[],
6689	unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX8],
6690	double ProjectedDCFCLKDeepSleep[][2],
6691	double MaximumVStartup[][2][DC__NUM_DPP__MAX8],
6692	double TotalVActivePixelBandwidth[][2],
6693	double TotalVActiveCursorBandwidth[][2],
6694	double TotalMetaRowBandwidth[][2],
6695	double TotalDPTERowBandwidth[][2],
6696	unsigned int TotalNumberOfActiveDPP[][2],
6697	unsigned int TotalNumberOfDCCActiveDPP[][2],
6698	int dpte_group_bytes[],
6699	double PrefetchLinesY[][2][DC__NUM_DPP__MAX8],
6700	double PrefetchLinesC[][2][DC__NUM_DPP__MAX8],
6701	int swath_width_luma_ub_all_states[][2][DC__NUM_DPP__MAX8],
6702	int swath_width_chroma_ub_all_states[][2][DC__NUM_DPP__MAX8],
6703	int BytePerPixelY[],
6704	int BytePerPixelC[],
6705	int HTotal[],
6706	double PixelClock[],
6707	double PDEAndMetaPTEBytesPerFrame[][2][DC__NUM_DPP__MAX8],
6708	double DPTEBytesPerRow[][2][DC__NUM_DPP__MAX8],
6709	double MetaRowBytes[][2][DC__NUM_DPP__MAX8],
6710	bool_Bool DynamicMetadataEnable[],
6711	double VActivePixelBandwidth[][2][DC__NUM_DPP__MAX8],
6712	double VActiveCursorBandwidth[][2][DC__NUM_DPP__MAX8],
6713	double ReadBandwidthLuma[],
6714	double ReadBandwidthChroma[],
6715	double DCFCLKPerState[],
6716	double DCFCLKState[][2])
6717	{
6718	double NormalEfficiency = 0;
6719	double PTEEfficiency = 0;
6720	double TotalMaxPrefetchFlipDPTERowBandwidth[DC__VOLTAGE_STATES9][2] = { { 0 } };
6721	unsigned int i, j, k;
6722
6723	NormalEfficiency = (HostVMEnable == true1 ? PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData
6724	: PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly) / 100.0;
6725	PTEEfficiency = (HostVMEnable == true1 ? PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly
6726	/ PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData : 1.0);
6727	for (i = 0; i < mode_lib->soc.num_states; ++i) {
6728	for (j = 0; j <= 1; ++j) {
6729	double PixelDCFCLKCyclesRequiredInPrefetch[DC__NUM_DPP__MAX8] = { 0 };
6730	double PrefetchPixelLinesTime[DC__NUM_DPP__MAX8] = { 0 };
6731	double DCFCLKRequiredForPeakBandwidthPerPlane[DC__NUM_DPP__MAX8] = { 0 };
6732	double DynamicMetadataVMExtraLatency[DC__NUM_DPP__MAX8] = { 0 };
6733	double MinimumTWait = 0;
6734	double NonDPTEBandwidth = 0;
6735	double DPTEBandwidth = 0;
6736	double DCFCLKRequiredForAverageBandwidth = 0;
6737	double ExtraLatencyBytes = 0;
6738	double ExtraLatencyCycles = 0;
6739	double DCFCLKRequiredForPeakBandwidth = 0;
6740	int NoOfDPPState[DC__NUM_DPP__MAX8] = { 0 };
6741	double MinimumTvmPlus2Tr0 = 0;
6742
6743	TotalMaxPrefetchFlipDPTERowBandwidth[i][j] = 0;
6744	for (k = 0; k < NumberOfActivePlanes; ++k) {
6745	TotalMaxPrefetchFlipDPTERowBandwidth[i][j] = TotalMaxPrefetchFlipDPTERowBandwidth[i][j]
6746	+ NoOfDPP[i][j][k] * DPTEBytesPerRow[i][j][k] / (15.75 * HTotal[k] / PixelClock[k]);
6747	}
6748
6749	for (k = 0; k <= NumberOfActivePlanes - 1; ++k) {
6750	NoOfDPPState[k] = NoOfDPP[i][j][k];
6751	}
6752
6753	MinimumTWait = CalculateTWait(MaxPrefetchMode, FinalDRAMClockChangeLatency, UrgLatency[i], SREnterPlusExitTime);
6754	NonDPTEBandwidth = TotalVActivePixelBandwidth[i][j] + TotalVActiveCursorBandwidth[i][j] + TotalMetaRowBandwidth[i][j];
6755	DPTEBandwidth = (HostVMEnable == true1 \|\| ImmediateFlipRequirement == dm_immediate_flip_required) ?
6756	TotalMaxPrefetchFlipDPTERowBandwidth[i][j] : TotalDPTERowBandwidth[i][j];
6757	DCFCLKRequiredForAverageBandwidth = dml_max3(ProjectedDCFCLKDeepSleep[i][j],
6758	(NonDPTEBandwidth + TotalDPTERowBandwidth[i][j]) / ReturnBusWidth / (MaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperation / 100),
6759	(NonDPTEBandwidth + DPTEBandwidth / PTEEfficiency) / NormalEfficiency / ReturnBusWidth);
6760
6761	ExtraLatencyBytes = CalculateExtraLatencyBytes(ReorderingBytes, TotalNumberOfActiveDPP[i][j], PixelChunkSizeInKByte, TotalNumberOfDCCActiveDPP[i][j],
6762	MetaChunkSize, GPUVMEnable, HostVMEnable, NumberOfActivePlanes, NoOfDPPState, dpte_group_bytes,
6763	PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelMixedWithVMData, PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyVMDataOnly,
6764	HostVMMinPageSize, HostVMMaxNonCachedPageTableLevels);
6765	ExtraLatencyCycles = RoundTripPingLatencyCycles + 32 + ExtraLatencyBytes / NormalEfficiency / ReturnBusWidth;
6766	for (k = 0; k < NumberOfActivePlanes; ++k) {
6767	double DCFCLKCyclesRequiredInPrefetch = { 0 };
6768	double ExpectedPrefetchBWAcceleration = { 0 };
6769	double PrefetchTime = { 0 };
6770
6771	PixelDCFCLKCyclesRequiredInPrefetch[k] = (PrefetchLinesY[i][j][k] * swath_width_luma_ub_all_states[i][j][k] * BytePerPixelY[k]
6772	+ PrefetchLinesC[i][j][k] * swath_width_chroma_ub_all_states[i][j][k] * BytePerPixelC[k]) / NormalEfficiency / ReturnBusWidth;
6773	DCFCLKCyclesRequiredInPrefetch = 2 * ExtraLatencyCycles / NoOfDPPState[k] + PDEAndMetaPTEBytesPerFrame[i][j][k] / PTEEfficiency
6774	/ NormalEfficiency / ReturnBusWidth * (GPUVMMaxPageTableLevels > 2 ? 1 : 0) + 2 * DPTEBytesPerRow[i][j][k] / PTEEfficiency
6775	/ NormalEfficiency / ReturnBusWidth + 2 * MetaRowBytes[i][j][k] / NormalEfficiency / ReturnBusWidth + PixelDCFCLKCyclesRequiredInPrefetch[k];
6776	PrefetchPixelLinesTime[k] = dml_max(PrefetchLinesY[i][j][k], PrefetchLinesC[i][j][k]) * HTotal[k] / PixelClock[k];
6777	ExpectedPrefetchBWAcceleration = (VActivePixelBandwidth[i][j][k] + VActiveCursorBandwidth[i][j][k]) / (ReadBandwidthLuma[k] + ReadBandwidthChroma[k]);
6778	DynamicMetadataVMExtraLatency[k] = (GPUVMEnable == true1 && DynamicMetadataEnable[k] == true1 && DynamicMetadataVMEnabled == true1) ?
6779	UrgLatency[i] * GPUVMMaxPageTableLevels * (HostVMEnable == true1 ? HostVMMaxNonCachedPageTableLevels + 1 : 1) : 0;
6780	PrefetchTime = (MaximumVStartup[i][j][k] - 1) * HTotal[k] / PixelClock[k] - MinimumTWait - UrgLatency[i] * ((GPUVMMaxPageTableLevels <= 2 ? GPUVMMaxPageTableLevels
6781	: GPUVMMaxPageTableLevels - 2) * (HostVMEnable == true1 ? HostVMMaxNonCachedPageTableLevels + 1 : 1) - 1) - DynamicMetadataVMExtraLatency[k];
6782
6783	if (PrefetchTime > 0) {
6784	double ExpectedVRatioPrefetch = { 0 };
6785	ExpectedVRatioPrefetch = PrefetchPixelLinesTime[k] / (PrefetchTime * PixelDCFCLKCyclesRequiredInPrefetch[k] / DCFCLKCyclesRequiredInPrefetch);
6786	DCFCLKRequiredForPeakBandwidthPerPlane[k] = NoOfDPPState[k] * PixelDCFCLKCyclesRequiredInPrefetch[k] / PrefetchPixelLinesTime[k]
6787	* dml_max(1.0, ExpectedVRatioPrefetch) * dml_max(1.0, ExpectedVRatioPrefetch / 4) * ExpectedPrefetchBWAcceleration;
6788	if (HostVMEnable == true1 \|\| ImmediateFlipRequirement == dm_immediate_flip_required) {
6789	DCFCLKRequiredForPeakBandwidthPerPlane[k] = DCFCLKRequiredForPeakBandwidthPerPlane[k]
6790	+ NoOfDPPState[k] * DPTEBandwidth / PTEEfficiency / NormalEfficiency / ReturnBusWidth;
6791	}
6792	} else {
6793	DCFCLKRequiredForPeakBandwidthPerPlane[k] = DCFCLKPerState[i];
6794	}
6795	if (DynamicMetadataEnable[k] == true1) {
6796	double TsetupPipe = { 0 };
6797	double TdmbfPipe = { 0 };
6798	double TdmsksPipe = { 0 };
6799	double TdmecPipe = { 0 };
6800	double AllowedTimeForUrgentExtraLatency = { 0 };
6801
6802	CalculateDynamicMetadataParameters(
6803	MaxInterDCNTileRepeaters,
6804	RequiredDPPCLK[i][j][k],
6805	RequiredDISPCLK[i][j],
6806	ProjectedDCFCLKDeepSleep[i][j],
6807	PixelClock[k],
6808	HTotal[k],
6809	VTotal[k] - VActive[k],
6810	DynamicMetadataTransmittedBytes[k],
6811	DynamicMetadataLinesBeforeActiveRequired[k],
6812	Interlace[k],
6813	ProgressiveToInterlaceUnitInOPP,
6814	&TsetupPipe,
6815	&TdmbfPipe,
6816	&TdmecPipe,
6817	&TdmsksPipe);
6818	AllowedTimeForUrgentExtraLatency = MaximumVStartup[i][j][k] * HTotal[k] / PixelClock[k] - MinimumTWait - TsetupPipe
6819	- TdmbfPipe - TdmecPipe - TdmsksPipe - DynamicMetadataVMExtraLatency[k];
6820	if (AllowedTimeForUrgentExtraLatency > 0) {
6821	DCFCLKRequiredForPeakBandwidthPerPlane[k] = dml_max(DCFCLKRequiredForPeakBandwidthPerPlane[k],
6822	ExtraLatencyCycles / AllowedTimeForUrgentExtraLatency);
6823	} else {
6824	DCFCLKRequiredForPeakBandwidthPerPlane[k] = DCFCLKPerState[i];
6825	}
6826	}
6827	}
6828	DCFCLKRequiredForPeakBandwidth = 0;
6829	for (k = 0; k <= NumberOfActivePlanes - 1; ++k) {
6830	DCFCLKRequiredForPeakBandwidth = DCFCLKRequiredForPeakBandwidth + DCFCLKRequiredForPeakBandwidthPerPlane[k];
6831	}
6832	MinimumTvmPlus2Tr0 = UrgLatency[i] * (GPUVMEnable == true1 ? (HostVMEnable == true1 ?
6833	(GPUVMMaxPageTableLevels + 2) * (HostVMMaxNonCachedPageTableLevels + 1) - 1 : GPUVMMaxPageTableLevels + 1) : 0);
6834	for (k = 0; k < NumberOfActivePlanes; ++k) {
6835	double MaximumTvmPlus2Tr0PlusTsw = { 0 };
6836	MaximumTvmPlus2Tr0PlusTsw = (MaximumVStartup[i][j][k] - 2) * HTotal[k] / PixelClock[k] - MinimumTWait - DynamicMetadataVMExtraLatency[k];
6837	if (MaximumTvmPlus2Tr0PlusTsw <= MinimumTvmPlus2Tr0 + PrefetchPixelLinesTime[k] / 4) {
6838	DCFCLKRequiredForPeakBandwidth = DCFCLKPerState[i];
6839	} else {
6840	DCFCLKRequiredForPeakBandwidth = dml_max3(DCFCLKRequiredForPeakBandwidth, 2 * ExtraLatencyCycles
6841	/ (MaximumTvmPlus2Tr0PlusTsw - MinimumTvmPlus2Tr0 - PrefetchPixelLinesTime[k] / 4),
6842	(2 * ExtraLatencyCycles + PixelDCFCLKCyclesRequiredInPrefetch[k]) / (MaximumTvmPlus2Tr0PlusTsw - MinimumTvmPlus2Tr0));
6843	}
6844	}
6845	DCFCLKState[i][j] = dml_min(DCFCLKPerState[i], 1.05 * (1 + mode_lib->vba.PercentMarginOverMinimumRequiredDCFCLK / 100)
6846	* dml_max(DCFCLKRequiredForAverageBandwidth, DCFCLKRequiredForPeakBandwidth));
6847	}
6848	}
6849	}
6850
6851	#endif /* CONFIG_DRM_AMD_DC_DCN3_0 */