Bug Summary

File:dev/mii/xmphy.c
Warning:line 254, column 2
Value stored to 'bmcr' is never read

Annotated Source Code

Press '?' to see keyboard shortcuts

clang -cc1 -cc1 -triple amd64-unknown-openbsd7.0 -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name xmphy.c -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/lib/clang/13.0.0 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -D CONFIG_DRM_AMD_DC_DCN3_0 -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /usr/obj/sys/arch/amd64/compile/GENERIC.MP/scan-build/2022-01-12-131800-47421-1 -x c /usr/src/sys/dev/mii/xmphy.c
1/* $OpenBSD: xmphy.c,v 1.23 2015/07/19 06:28:12 yuo Exp $ */
2
3/*
4 * Copyright (c) 2000
5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Bill Paul.
18 * 4. Neither the name of the author nor the names of any co-contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 * THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * $FreeBSD: src/sys/dev/mii/xmphy.c,v 1.1 2000/04/22 01:58:18 wpaul Exp $
35 */
36
37/*
38 * driver for the XaQti XMAC II's internal PHY. This is sort of
39 * like a 10/100 PHY, except the only thing we're really autoselecting
40 * here is full/half duplex. Speed is always 1000mbps.
41 */
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/device.h>
46#include <sys/socket.h>
47#include <sys/errno.h>
48
49#include <net/if.h>
50#include <net/if_var.h>
51#include <net/if_media.h>
52
53#include <dev/mii/mii.h>
54#include <dev/mii/miivar.h>
55#include <dev/mii/miidevs.h>
56
57#include <dev/mii/xmphyreg.h>
58
59int xmphy_probe(struct device *, void *, void *);
60void xmphy_attach(struct device *, struct device *, void *);
61
62struct cfattach xmphy_ca = {
63 sizeof(struct mii_softc), xmphy_probe, xmphy_attach, mii_phy_detach
64};
65
66struct cfdriver xmphy_cd = {
67 NULL((void *)0), "xmphy", DV_DULL
68};
69
70int xmphy_service(struct mii_softc *, struct mii_data *, int);
71void xmphy_status(struct mii_softc *);
72
73int xmphy_mii_phy_auto(struct mii_softc *);
74
75const struct mii_phy_funcs xmphy_funcs = {
76 xmphy_service, xmphy_status, mii_phy_reset,
77};
78
79static const struct mii_phydesc xmphys[] = {
80 { MII_OUI_xxXAQTI0x350700, MII_MODEL_XAQTI_XMACII0x0000,
81 MII_STR_XAQTI_XMACII"XMAC II Gigabit PHY" },
82
83 { MII_OUI_JATO0x00e083, MII_MODEL_JATO_BASEX0x0000,
84 MII_STR_JATO_BASEX"Jato 1000baseX PHY" },
85
86 { 0, 0,
87 NULL((void *)0) },
88};
89
90int xmphy_probe(struct device *parent, void *match, void *aux)
91{
92 struct mii_attach_args *ma = aux;
93
94 if (mii_phy_match(ma, xmphys) != NULL((void *)0))
95 return (10);
96
97 return (0);
98}
99
100void
101xmphy_attach(struct device *parent, struct device *self, void *aux)
102{
103 struct mii_softc *sc = (struct mii_softc *)self;
104 struct mii_attach_args *ma = aux;
105 struct mii_data *mii = ma->mii_data;
106 const struct mii_phydesc *mpd;
107
108 mpd = mii_phy_match(ma, xmphys);
109 printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)((ma->mii_id2) & 0x000f));
110
111 sc->mii_inst = mii->mii_instance;
112 sc->mii_phy = ma->mii_phyno;
113 sc->mii_funcs = &xmphy_funcs;
114 sc->mii_pdata = mii;
115 sc->mii_flags = ma->mii_flags;
116 sc->mii_anegticks = MII_ANEGTICKS5;
117
118 sc->mii_flags |= MIIF_NOISOLATE0x0002;
119
120#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL((void *)0))
121
122 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst)((0x0000000000000100ULL) | (2ULL) | (0) | ((uint64_t)(sc->
mii_inst) << 56)),
123 BMCR_ISO0x0400);
124
125 PHY_RESET(sc)(*(sc)->mii_funcs->pf_reset)((sc));
126
127 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, sc->mii_inst)((0x0000000000000100ULL) | (11) | (0) | ((uint64_t)(sc->mii_inst
) << 56)),
128 BMCR_FDX0x0100);
129 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst)((0x0000000000000100ULL) | (11) | (0x0000010000000000ULL) | (
(uint64_t)(sc->mii_inst) << 56)), 0);
130 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst)((0x0000000000000100ULL) | (0ULL) | (0) | ((uint64_t)(sc->
mii_inst) << 56)), 0);
131
132#undef ADD
133}
134
135int
136xmphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
137{
138 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
139 int reg;
140
141 if ((sc->mii_dev.dv_flags & DVF_ACTIVE0x0001) == 0)
142 return (ENXIO6);
143
144 switch (cmd) {
145 case MII_POLLSTAT3:
146 /*
147 * If we're not polling our PHY instance, just return.
148 */
149 if (IFM_INST(ife->ifm_media)(((ife->ifm_media) & 0xff00000000000000ULL) >> 56
) != sc->mii_inst)
150 return (0);
151 break;
152
153 case MII_MEDIACHG2:
154 /*
155 * If the media indicates a different PHY instance,
156 * isolate ourselves.
157 */
158 if (IFM_INST(ife->ifm_media)(((ife->ifm_media) & 0xff00000000000000ULL) >> 56
) != sc->mii_inst) {
159 reg = PHY_READ(sc, MII_BMCR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x00));
160 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x00), (reg | 0x0400));
161 return (0);
162 }
163
164 /*
165 * If the interface is not up, don't do anything.
166 */
167 if ((mii->mii_ifp->if_flags & IFF_UP0x1) == 0)
168 break;
169
170 switch (IFM_SUBTYPE(ife->ifm_media)((ife->ifm_media) & 0x00000000000000ffULL)) {
171 case IFM_AUTO0ULL:
172 (void) xmphy_mii_phy_auto(sc);
173 break;
174 case IFM_1000_SX11:
175 PHY_RESET(sc)(*(sc)->mii_funcs->pf_reset)((sc));
176 if ((ife->ifm_media & IFM_GMASK0x00ffff0000000000ULL) == IFM_FDX0x0000010000000000ULL) {
177 PHY_WRITE(sc, MII_ANAR, ANAR_10_FD)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x04), (0x0040));
178 PHY_WRITE(sc, MII_BMCR, BMCR_FDX)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x00), (0x0100));
179 } else {
180 PHY_WRITE(sc, MII_ANAR, ANAR_10)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x04), (0x0020));
181 PHY_WRITE(sc, MII_BMCR, 0)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x00), (0));
182 }
183 break;
184 default:
185 return (EINVAL22);
186 }
187 break;
188
189 case MII_TICK1:
190 /*
191 * If we're not currently selected, just return.
192 */
193 if (IFM_INST(ife->ifm_media)(((ife->ifm_media) & 0xff00000000000000ULL) >> 56
) != sc->mii_inst)
194 return (0);
195
196 /*
197 * Is the interface even up?
198 */
199 if ((mii->mii_ifp->if_flags & IFF_UP0x1) == 0)
200 return (0);
201
202 /*
203 * Only used for autonegotiation.
204 */
205 if (IFM_SUBTYPE(ife->ifm_media)((ife->ifm_media) & 0x00000000000000ffULL) != IFM_AUTO0ULL)
206 break;
207
208 /*
209 * Check to see if we have link. If we do, we don't
210 * need to restart the autonegotiation process. Read
211 * the BMSR twice in case it's latched.
212 */
213 reg = PHY_READ(sc, MII_BMSR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x01)) | PHY_READ(sc, MII_BMSR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x01));
214 if (reg & BMSR_LINK0x0004) {
215 sc->mii_ticks = 0;
216 break;
217 }
218
219 /*
220 * Only retry autonegotiation every mii_anegticks seconds.
221 */
222 if (++sc->mii_ticks <= sc->mii_anegticks)
223 break;
224
225 sc->mii_ticks = 0;
226 PHY_RESET(sc)(*(sc)->mii_funcs->pf_reset)((sc));
227
228 xmphy_mii_phy_auto(sc);
229 break;
230 }
231
232 /* Update the media status. */
233 mii_phy_status(sc);
234
235 /* Callback if something changed. */
236 mii_phy_update(sc, cmd);
237 return (0);
238}
239
240void
241xmphy_status(struct mii_softc *sc)
242{
243 struct mii_data *mii = sc->mii_pdata;
244 int bmsr, bmcr, anlpar;
245
246 mii->mii_media_status = IFM_AVALID0x0000000000000001ULL;
247 mii->mii_media_active = IFM_ETHER0x0000000000000100ULL;
248
249 bmsr = PHY_READ(sc, MII_BMSR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x01)) | PHY_READ(sc, MII_BMSR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x01));
250 if (bmsr & BMSR_LINK0x0004)
251 mii->mii_media_status |= IFM_ACTIVE0x0000000000000002ULL;
252
253 /* Do dummy read of extended status register. */
254 bmcr = PHY_READ(sc, MII_EXTSR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x0f));
Value stored to 'bmcr' is never read
255
256 bmcr = PHY_READ(sc, MII_BMCR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x00));
257
258 if (bmcr & BMCR_LOOP0x4000)
259 mii->mii_media_active |= IFM_LOOP0x0000800000000000ULL;
260
261
262 if (bmcr & BMCR_AUTOEN0x1000) {
263 if ((bmsr & BMSR_ACOMP0x0020) == 0) {
264 if (bmsr & BMSR_LINK0x0004) {
265 mii->mii_media_active |= IFM_1000_SX11|IFM_HDX0x0000020000000000ULL;
266 return;
267 }
268 /* Erg, still trying, I guess... */
269 mii->mii_media_active |= IFM_NONE2ULL;
270 return;
271 }
272
273 mii->mii_media_active |= IFM_1000_SX11;
274 anlpar = PHY_READ(sc, MII_ANAR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x04)) & PHY_READ(sc, MII_ANLPAR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x05));
275 if (anlpar & ANLPAR_10_FD0x0040)
276 mii->mii_media_active |= IFM_FDX0x0000010000000000ULL;
277 else
278 mii->mii_media_active |= IFM_HDX0x0000020000000000ULL;
279 return;
280 }
281
282 mii->mii_media_active |= IFM_1000_SX11;
283 if (bmcr & BMCR_FDX0x0100)
284 mii->mii_media_active |= IFM_FDX0x0000010000000000ULL;
285 else
286 mii->mii_media_active |= IFM_HDX0x0000020000000000ULL;
287
288 return;
289}
290
291
292int
293xmphy_mii_phy_auto(struct mii_softc *sc)
294{
295 int anar = 0;
296
297 anar = PHY_READ(sc, MII_ANAR)(*(sc)->mii_pdata->mii_readreg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x04));
298 anar |= ANAR_10_FD0x0040|ANAR_100x0020;
299 PHY_WRITE(sc, MII_ANAR, anar)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x04), (anar));
300 DELAY(1000)(*delay_func)(1000);
301 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG)(*(sc)->mii_pdata->mii_writereg)((sc)->mii_dev.dv_parent
, (sc)->mii_phy, (0x00), (0x1000 | 0x0200));
302
303 return (EJUSTRETURN-2);
304}