Bug Summary

File:dev/pci/drm/drm_self_refresh_helper.c
Warning:line 85, column 3
Value stored to 'ret' is never read

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.0 -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name drm_self_refresh_helper.c -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/lib/clang/13.0.0 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -D CONFIG_DRM_AMD_DC_DCN3_0 -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /usr/obj/sys/arch/amd64/compile/GENERIC.MP/scan-build/2022-01-12-131800-47421-1 -x c /usr/src/sys/dev/pci/drm/drm_self_refresh_helper.c
1// SPDX-License-Identifier: MIT
2/*
3 * Copyright (C) 2019 Google, Inc.
4 *
5 * Authors:
6 * Sean Paul <seanpaul@chromium.org>
7 */
8#include <linux/average.h>
9#include <linux/bitops.h>
10#include <linux/slab.h>
11#include <linux/workqueue.h>
12
13#include <drm/drm_atomic.h>
14#include <drm/drm_atomic_helper.h>
15#include <drm/drm_connector.h>
16#include <drm/drm_crtc.h>
17#include <drm/drm_device.h>
18#include <drm/drm_mode_config.h>
19#include <drm/drm_modeset_lock.h>
20#include <drm/drm_print.h>
21#include <drm/drm_self_refresh_helper.h>
22
23/**
24 * DOC: overview
25 *
26 * This helper library provides an easy way for drivers to leverage the atomic
27 * framework to implement panel self refresh (SR) support. Drivers are
28 * responsible for initializing and cleaning up the SR helpers on load/unload
29 * (see &drm_self_refresh_helper_init/&drm_self_refresh_helper_cleanup).
30 * The connector is responsible for setting
31 * &drm_connector_state.self_refresh_aware to true at runtime if it is SR-aware
32 * (meaning it knows how to initiate self refresh on the panel).
33 *
34 * Once a crtc has enabled SR using &drm_self_refresh_helper_init, the
35 * helpers will monitor activity and call back into the driver to enable/disable
36 * SR as appropriate. The best way to think about this is that it's a DPMS
37 * on/off request with &drm_crtc_state.self_refresh_active set in crtc state
38 * that tells you to disable/enable SR on the panel instead of power-cycling it.
39 *
40 * During SR, drivers may choose to fully disable their crtc/encoder/bridge
41 * hardware (in which case no driver changes are necessary), or they can inspect
42 * &drm_crtc_state.self_refresh_active if they want to enter low power mode
43 * without full disable (in case full disable/enable is too slow).
44 *
45 * SR will be deactivated if there are any atomic updates affecting the
46 * pipe that is in SR mode. If a crtc is driving multiple connectors, all
47 * connectors must be SR aware and all will enter/exit SR mode at the same time.
48 *
49 * If the crtc and connector are SR aware, but the panel connected does not
50 * support it (or is otherwise unable to enter SR), the driver should fail
51 * atomic_check when &drm_crtc_state.self_refresh_active is true.
52 */
53
54#define SELF_REFRESH_AVG_SEED_MS200 200
55
56DECLARE_EWMA(psr_time, 4, 4)struct ewma_psr_time { u_long value; }; static inline void ewma_psr_time_init
(struct ewma_psr_time *p) { p->value = 0; } static inline void
ewma_psr_time_add(struct ewma_psr_time *p, u_long value) { u_long
shift = fls(4) - 1; if (p->value == 0) p->value = (value
<< (4)); else p->value = ((((p->value << shift
) - p->value) + (value << (4))) >> shift); } static
inline u_long ewma_psr_time_read(struct ewma_psr_time *p) { return
(p->value >> (4)); }
57
58struct drm_self_refresh_data {
59 struct drm_crtc *crtc;
60 struct delayed_work entry_work;
61
62 struct rwlock avg_mutex;
63 struct ewma_psr_time entry_avg_ms;
64 struct ewma_psr_time exit_avg_ms;
65};
66
67static void drm_self_refresh_helper_entry_work(struct work_struct *work)
68{
69 struct drm_self_refresh_data *sr_data = container_of(({ const __typeof( ((struct drm_self_refresh_data *)0)->entry_work
) *__mptr = (to_delayed_work(work)); (struct drm_self_refresh_data
*)( (char *)__mptr - __builtin_offsetof(struct drm_self_refresh_data
, entry_work) );})
70 to_delayed_work(work),({ const __typeof( ((struct drm_self_refresh_data *)0)->entry_work
) *__mptr = (to_delayed_work(work)); (struct drm_self_refresh_data
*)( (char *)__mptr - __builtin_offsetof(struct drm_self_refresh_data
, entry_work) );})
71 struct drm_self_refresh_data, entry_work)({ const __typeof( ((struct drm_self_refresh_data *)0)->entry_work
) *__mptr = (to_delayed_work(work)); (struct drm_self_refresh_data
*)( (char *)__mptr - __builtin_offsetof(struct drm_self_refresh_data
, entry_work) );})
;
72 struct drm_crtc *crtc = sr_data->crtc;
73 struct drm_device *dev = crtc->dev;
74 struct drm_modeset_acquire_ctx ctx;
75 struct drm_atomic_state *state;
76 struct drm_connector *conn;
77 struct drm_connector_state *conn_state;
78 struct drm_crtc_state *crtc_state;
79 int i, ret = 0;
80
81 drm_modeset_acquire_init(&ctx, 0);
82
83 state = drm_atomic_state_alloc(dev);
84 if (!state) {
85 ret = -ENOMEM12;
Value stored to 'ret' is never read
86 goto out_drop_locks;
87 }
88
89retry:
90 state->acquire_ctx = &ctx;
91
92 crtc_state = drm_atomic_get_crtc_state(state, crtc);
93 if (IS_ERR(crtc_state)) {
94 ret = PTR_ERR(crtc_state);
95 goto out;
96 }
97
98 if (!crtc_state->enable)
99 goto out;
100
101 ret = drm_atomic_add_affected_connectors(state, crtc);
102 if (ret)
103 goto out;
104
105 for_each_new_connector_in_state(state, conn, conn_state, i)for ((i) = 0; (i) < (state)->num_connector; (i)++) if (
!((state)->connectors[i].ptr && ((conn) = (state)->
connectors[i].ptr, (void)(conn) , (conn_state) = (state)->
connectors[i].new_state, (void)(conn_state) , 1))) {} else
{
106 if (!conn_state->self_refresh_aware)
107 goto out;
108 }
109
110 crtc_state->active = false0;
111 crtc_state->self_refresh_active = true1;
112
113 ret = drm_atomic_commit(state);
114 if (ret)
115 goto out;
116
117out:
118 if (ret == -EDEADLK11) {
119 drm_atomic_state_clear(state);
120 ret = drm_modeset_backoff(&ctx);
121 if (!ret)
122 goto retry;
123 }
124
125 drm_atomic_state_put(state);
126
127out_drop_locks:
128 drm_modeset_drop_locks(&ctx);
129 drm_modeset_acquire_fini(&ctx);
130}
131
132/**
133 * drm_self_refresh_helper_update_avg_times - Updates a crtc's SR time averages
134 * @state: the state which has just been applied to hardware
135 * @commit_time_ms: the amount of time in ms that this commit took to complete
136 * @new_self_refresh_mask: bitmask of crtc's that have self_refresh_active in
137 * new state
138 *
139 * Called after &drm_mode_config_funcs.atomic_commit_tail, this function will
140 * update the average entry/exit self refresh times on self refresh transitions.
141 * These averages will be used when calculating how long to delay before
142 * entering self refresh mode after activity.
143 */
144void
145drm_self_refresh_helper_update_avg_times(struct drm_atomic_state *state,
146 unsigned int commit_time_ms,
147 unsigned int new_self_refresh_mask)
148{
149 struct drm_crtc *crtc;
150 struct drm_crtc_state *old_crtc_state;
151 int i;
152
153 for_each_old_crtc_in_state(state, crtc, old_crtc_state, i)for ((i) = 0; (i) < (state)->dev->mode_config.num_crtc
; (i)++) if (!((state)->crtcs[i].ptr && ((crtc) = (
state)->crtcs[i].ptr, (old_crtc_state) = (state)->crtcs
[i].old_state, 1))) {} else
{
154 bool_Bool new_self_refresh_active = new_self_refresh_mask & BIT(i)(1UL << (i));
155 struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
156 struct ewma_psr_time *time;
157
158 if (old_crtc_state->self_refresh_active ==
159 new_self_refresh_active)
160 continue;
161
162 if (new_self_refresh_active)
163 time = &sr_data->entry_avg_ms;
164 else
165 time = &sr_data->exit_avg_ms;
166
167 mutex_lock(&sr_data->avg_mutex)rw_enter_write(&sr_data->avg_mutex);
168 ewma_psr_time_add(time, commit_time_ms);
169 mutex_unlock(&sr_data->avg_mutex)rw_exit_write(&sr_data->avg_mutex);
170 }
171}
172EXPORT_SYMBOL(drm_self_refresh_helper_update_avg_times);
173
174/**
175 * drm_self_refresh_helper_alter_state - Alters the atomic state for SR exit
176 * @state: the state currently being checked
177 *
178 * Called at the end of atomic check. This function checks the state for flags
179 * incompatible with self refresh exit and changes them. This is a bit
180 * disingenuous since userspace is expecting one thing and we're giving it
181 * another. However in order to keep self refresh entirely hidden from
182 * userspace, this is required.
183 *
184 * At the end, we queue up the self refresh entry work so we can enter PSR after
185 * the desired delay.
186 */
187void drm_self_refresh_helper_alter_state(struct drm_atomic_state *state)
188{
189 struct drm_crtc *crtc;
190 struct drm_crtc_state *crtc_state;
191 int i;
192
193 if (state->async_update || !state->allow_modeset) {
194 for_each_old_crtc_in_state(state, crtc, crtc_state, i)for ((i) = 0; (i) < (state)->dev->mode_config.num_crtc
; (i)++) if (!((state)->crtcs[i].ptr && ((crtc) = (
state)->crtcs[i].ptr, (crtc_state) = (state)->crtcs[i].
old_state, 1))) {} else
{
195 if (crtc_state->self_refresh_active) {
196 state->async_update = false0;
197 state->allow_modeset = true1;
198 break;
199 }
200 }
201 }
202
203 for_each_new_crtc_in_state(state, crtc, crtc_state, i)for ((i) = 0; (i) < (state)->dev->mode_config.num_crtc
; (i)++) if (!((state)->crtcs[i].ptr && ((crtc) = (
state)->crtcs[i].ptr, (void)(crtc) , (crtc_state) = (state
)->crtcs[i].new_state, (void)(crtc_state) , 1))) {} else
{
204 struct drm_self_refresh_data *sr_data;
205 unsigned int delay;
206
207 /* Don't trigger the entry timer when we're already in SR */
208 if (crtc_state->self_refresh_active)
209 continue;
210
211 sr_data = crtc->self_refresh_data;
212 if (!sr_data)
213 continue;
214
215 mutex_lock(&sr_data->avg_mutex)rw_enter_write(&sr_data->avg_mutex);
216 delay = (ewma_psr_time_read(&sr_data->entry_avg_ms) +
217 ewma_psr_time_read(&sr_data->exit_avg_ms)) * 2;
218 mutex_unlock(&sr_data->avg_mutex)rw_exit_write(&sr_data->avg_mutex);
219
220 mod_delayed_work(system_wq, &sr_data->entry_work,
221 msecs_to_jiffies(delay)(((uint64_t)(delay)) * hz / 1000));
222 }
223}
224EXPORT_SYMBOL(drm_self_refresh_helper_alter_state);
225
226/**
227 * drm_self_refresh_helper_init - Initializes self refresh helpers for a crtc
228 * @crtc: the crtc which supports self refresh supported displays
229 *
230 * Returns zero if successful or -errno on failure
231 */
232int drm_self_refresh_helper_init(struct drm_crtc *crtc)
233{
234 struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
235
236 /* Helper is already initialized */
237 if (WARN_ON(sr_data)({ int __ret = !!(sr_data); if (__ret) printf("WARNING %s failed at %s:%d\n"
, "sr_data", "/usr/src/sys/dev/pci/drm/drm_self_refresh_helper.c"
, 237); __builtin_expect(!!(__ret), 0); })
)
238 return -EINVAL22;
239
240 sr_data = kzalloc(sizeof(*sr_data), GFP_KERNEL(0x0001 | 0x0004));
241 if (!sr_data)
242 return -ENOMEM12;
243
244 INIT_DELAYED_WORK(&sr_data->entry_work,
245 drm_self_refresh_helper_entry_work);
246 sr_data->crtc = crtc;
247 rw_init(&sr_data->avg_mutex, "sravg")_rw_init_flags(&sr_data->avg_mutex, "sravg", 0, ((void
*)0))
;
248 ewma_psr_time_init(&sr_data->entry_avg_ms);
249 ewma_psr_time_init(&sr_data->exit_avg_ms);
250
251 /*
252 * Seed the averages so they're non-zero (and sufficiently large
253 * for even poorly performing panels). As time goes on, this will be
254 * averaged out and the values will trend to their true value.
255 */
256 ewma_psr_time_add(&sr_data->entry_avg_ms, SELF_REFRESH_AVG_SEED_MS200);
257 ewma_psr_time_add(&sr_data->exit_avg_ms, SELF_REFRESH_AVG_SEED_MS200);
258
259 crtc->self_refresh_data = sr_data;
260 return 0;
261}
262EXPORT_SYMBOL(drm_self_refresh_helper_init);
263
264/**
265 * drm_self_refresh_helper_cleanup - Cleans up self refresh helpers for a crtc
266 * @crtc: the crtc to cleanup
267 */
268void drm_self_refresh_helper_cleanup(struct drm_crtc *crtc)
269{
270 struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
271
272 /* Helper is already uninitialized */
273 if (!sr_data)
274 return;
275
276 crtc->self_refresh_data = NULL((void *)0);
277
278 cancel_delayed_work_sync(&sr_data->entry_work);
279 kfree(sr_data);
280}
281EXPORT_SYMBOL(drm_self_refresh_helper_cleanup);