Bug Summary

File:dev/pci/drm/i915/gt/intel_ring.h
Warning:line 92, column 15
Value stored to 'head' during its initialization is never read

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.0 -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name i915_gem_context.c -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/lib/clang/13.0.0 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -D CONFIG_DRM_AMD_DC_DCN3_0 -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /usr/obj/sys/arch/amd64/compile/GENERIC.MP/scan-build/2022-01-12-131800-47421-1 -x c /usr/src/sys/dev/pci/drm/i915/gem/i915_gem_context.c
1/*
2 * SPDX-License-Identifier: MIT
3 *
4 * Copyright © 2019 Intel Corporation
5 */
6
7#ifndef INTEL_RING_H
8#define INTEL_RING_H
9
10#include "i915_gem.h" /* GEM_BUG_ON */
11#include "i915_request.h"
12#include "intel_ring_types.h"
13
14struct intel_engine_cs;
15
16struct intel_ring *
17intel_engine_create_ring(struct intel_engine_cs *engine, int size);
18
19u32 *intel_ring_begin(struct i915_request *rq, unsigned int num_dwords);
20int intel_ring_cacheline_align(struct i915_request *rq);
21
22unsigned int intel_ring_update_space(struct intel_ring *ring);
23
24void __intel_ring_pin(struct intel_ring *ring);
25int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww);
26void intel_ring_unpin(struct intel_ring *ring);
27void intel_ring_reset(struct intel_ring *ring, u32 tail);
28
29void intel_ring_free(struct kref *ref);
30
31static inline struct intel_ring *intel_ring_get(struct intel_ring *ring)
32{
33 kref_get(&ring->ref);
34 return ring;
35}
36
37static inline void intel_ring_put(struct intel_ring *ring)
38{
39 kref_put(&ring->ref, intel_ring_free);
40}
41
42static inline void intel_ring_advance(struct i915_request *rq, u32 *cs)
43{
44 /* Dummy function.
45 *
46 * This serves as a placeholder in the code so that the reader
47 * can compare against the preceding intel_ring_begin() and
48 * check that the number of dwords emitted matches the space
49 * reserved for the command packet (i.e. the value passed to
50 * intel_ring_begin()).
51 */
52 GEM_BUG_ON((rq->ring->vaddr + rq->ring->emit) != cs)((void)0);
53}
54
55static inline u32 intel_ring_wrap(const struct intel_ring *ring, u32 pos)
56{
57 return pos & (ring->size - 1);
58}
59
60static inline int intel_ring_direction(const struct intel_ring *ring,
61 u32 next, u32 prev)
62{
63 typecheck(typeof(ring->size), next)1;
64 typecheck(typeof(ring->size), prev)1;
65 return (next - prev) << ring->wrap;
66}
67
68static inline bool_Bool
69intel_ring_offset_valid(const struct intel_ring *ring,
70 unsigned int pos)
71{
72 if (pos & -ring->size) /* must be strictly within the ring */
73 return false0;
74
75 if (!IS_ALIGNED(pos, 8)(((pos) & ((8) - 1)) == 0)) /* must be qword aligned */
76 return false0;
77
78 return true1;
79}
80
81static inline u32 intel_ring_offset(const struct i915_request *rq, void *addr)
82{
83 /* Don't write ring->size (equivalent to 0) as that hangs some GPUs. */
84 u32 offset = addr - rq->ring->vaddr;
85 GEM_BUG_ON(offset > rq->ring->size)((void)0);
86 return intel_ring_wrap(rq->ring, offset);
87}
88
89static inline void
90assert_ring_tail_valid(const struct intel_ring *ring, unsigned int tail)
91{
92 unsigned int head = READ_ONCE(ring->head)({ typeof(ring->head) __tmp = *(volatile typeof(ring->head
) *)&(ring->head); membar_datadep_consumer(); __tmp; }
)
;
Value stored to 'head' during its initialization is never read
93
94 GEM_BUG_ON(!intel_ring_offset_valid(ring, tail))((void)0);
95
96 /*
97 * "Ring Buffer Use"
98 * Gen2 BSpec "1. Programming Environment" / 1.4.4.6
99 * Gen3 BSpec "1c Memory Interface Functions" / 2.3.4.5
100 * Gen4+ BSpec "1c Memory Interface and Command Stream" / 5.3.4.5
101 * "If the Ring Buffer Head Pointer and the Tail Pointer are on the
102 * same cacheline, the Head Pointer must not be greater than the Tail
103 * Pointer."
104 *
105 * We use ring->head as the last known location of the actual RING_HEAD,
106 * it may have advanced but in the worst case it is equally the same
107 * as ring->head and so we should never program RING_TAIL to advance
108 * into the same cacheline as ring->head.
109 */
110#define cacheline(a) round_down(a, CACHELINE_BYTES)(((a) / (64)) * (64))
111 GEM_BUG_ON(cacheline(tail) == cacheline(head) && tail < head)((void)0);
112#undef cacheline
113}
114
115static inline unsigned int
116intel_ring_set_tail(struct intel_ring *ring, unsigned int tail)
117{
118 /* Whilst writes to the tail are strictly order, there is no
119 * serialisation between readers and the writers. The tail may be
120 * read by i915_request_retire() just as it is being updated
121 * by execlists, as although the breadcrumb is complete, the context
122 * switch hasn't been seen.
123 */
124 assert_ring_tail_valid(ring, tail);
125 ring->tail = tail;
126 return tail;
127}
128
129static inline unsigned int
130__intel_ring_space(unsigned int head, unsigned int tail, unsigned int size)
131{
132 /*
133 * "If the Ring Buffer Head Pointer and the Tail Pointer are on the
134 * same cacheline, the Head Pointer must not be greater than the Tail
135 * Pointer."
136 */
137 GEM_BUG_ON(!is_power_of_2(size))((void)0);
138 return (head - tail - CACHELINE_BYTES64) & (size - 1);
139}
140
141#endif /* INTEL_RING_H */