Bug Summary

File:dev/pci/drm/amd/display/dc/dml/display_mode_lib.c
Warning:line 143, column 3
Value stored to 'scale_ratio_depth' is never read

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.0 -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name display_mode_lib.c -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/lib/clang/13.0.0 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -D CONFIG_DRM_AMD_DC_DCN3_0 -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /usr/obj/sys/arch/amd64/compile/GENERIC.MP/scan-build/2022-01-12-131800-47421-1 -x c /usr/src/sys/dev/pci/drm/amd/display/dc/dml/display_mode_lib.c
1/*
2 * Copyright 2017 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include "display_mode_lib.h"
27#include "dc_features.h"
28#include "dcn20/display_mode_vba_20.h"
29#include "dcn20/display_rq_dlg_calc_20.h"
30#include "dcn20/display_mode_vba_20v2.h"
31#include "dcn20/display_rq_dlg_calc_20v2.h"
32#include "dcn21/display_mode_vba_21.h"
33#include "dcn21/display_rq_dlg_calc_21.h"
34#ifdef CONFIG_DRM_AMD_DC_DCN3_01
35#include "dcn30/display_mode_vba_30.h"
36#include "dcn30/display_rq_dlg_calc_30.h"
37#include "dml_logger.h"
38#endif
39
40const struct dml_funcs dml20_funcs = {
41 .validate = dml20_ModeSupportAndSystemConfigurationFull,
42 .recalculate = dml20_recalculate,
43 .rq_dlg_get_dlg_reg = dml20_rq_dlg_get_dlg_reg,
44 .rq_dlg_get_rq_reg = dml20_rq_dlg_get_rq_reg
45};
46
47const struct dml_funcs dml20v2_funcs = {
48 .validate = dml20v2_ModeSupportAndSystemConfigurationFull,
49 .recalculate = dml20v2_recalculate,
50 .rq_dlg_get_dlg_reg = dml20v2_rq_dlg_get_dlg_reg,
51 .rq_dlg_get_rq_reg = dml20v2_rq_dlg_get_rq_reg
52};
53
54const struct dml_funcs dml21_funcs = {
55 .validate = dml21_ModeSupportAndSystemConfigurationFull,
56 .recalculate = dml21_recalculate,
57 .rq_dlg_get_dlg_reg = dml21_rq_dlg_get_dlg_reg,
58 .rq_dlg_get_rq_reg = dml21_rq_dlg_get_rq_reg
59};
60
61#if defined(CONFIG_DRM_AMD_DC_DCN3_01)
62const struct dml_funcs dml30_funcs = {
63 .validate = dml30_ModeSupportAndSystemConfigurationFull,
64 .recalculate = dml30_recalculate,
65 .rq_dlg_get_dlg_reg = dml30_rq_dlg_get_dlg_reg,
66 .rq_dlg_get_rq_reg = dml30_rq_dlg_get_rq_reg
67};
68#endif
69void dml_init_instance(struct display_mode_lib *lib,
70 const struct _vcs_dpi_soc_bounding_box_st *soc_bb,
71 const struct _vcs_dpi_ip_params_st *ip_params,
72 enum dml_project project)
73{
74 lib->soc = *soc_bb;
75 lib->ip = *ip_params;
76 lib->project = project;
77 switch (project) {
78 case DML_PROJECT_NAVI10:
79 lib->funcs = dml20_funcs;
80 break;
81 case DML_PROJECT_NAVI10v2:
82 lib->funcs = dml20v2_funcs;
83 break;
84 case DML_PROJECT_DCN21:
85 lib->funcs = dml21_funcs;
86 break;
87#if defined(CONFIG_DRM_AMD_DC_DCN3_01)
88 case DML_PROJECT_DCN30:
89 lib->funcs = dml30_funcs;
90 break;
91#endif
92
93 default:
94 break;
95 }
96}
97
98const char *dml_get_status_message(enum dm_validation_status status)
99{
100 switch (status) {
101 case DML_VALIDATION_OK: return "Validation OK";
102 case DML_FAIL_SCALE_RATIO_TAP: return "Scale ratio/tap";
103 case DML_FAIL_SOURCE_PIXEL_FORMAT: return "Source pixel format";
104 case DML_FAIL_VIEWPORT_SIZE: return "Viewport size";
105 case DML_FAIL_TOTAL_V_ACTIVE_BW: return "Total vertical active bandwidth";
106 case DML_FAIL_DIO_SUPPORT: return "DIO support";
107 case DML_FAIL_NOT_ENOUGH_DSC: return "Not enough DSC Units";
108 case DML_FAIL_DSC_CLK_REQUIRED: return "DSC clock required";
109 case DML_FAIL_URGENT_LATENCY: return "Urgent latency";
110 case DML_FAIL_REORDERING_BUFFER: return "Re-ordering buffer";
111 case DML_FAIL_DISPCLK_DPPCLK: return "Dispclk and Dppclk";
112 case DML_FAIL_TOTAL_AVAILABLE_PIPES: return "Total available pipes";
113 case DML_FAIL_NUM_OTG: return "Number of OTG";
114 case DML_FAIL_WRITEBACK_MODE: return "Writeback mode";
115 case DML_FAIL_WRITEBACK_LATENCY: return "Writeback latency";
116 case DML_FAIL_WRITEBACK_SCALE_RATIO_TAP: return "Writeback scale ratio/tap";
117 case DML_FAIL_CURSOR_SUPPORT: return "Cursor support";
118 case DML_FAIL_PITCH_SUPPORT: return "Pitch support";
119 case DML_FAIL_PTE_BUFFER_SIZE: return "PTE buffer size";
120 case DML_FAIL_DSC_INPUT_BPC: return "DSC input bpc";
121 case DML_FAIL_PREFETCH_SUPPORT: return "Prefetch support";
122 case DML_FAIL_V_RATIO_PREFETCH: return "Vertical ratio prefetch";
123 default: return "Unknown Status";
124 }
125}
126#if defined(CONFIG_DRM_AMD_DC_DCN3_01)
127void dml_log_pipe_params(
128 struct display_mode_lib *mode_lib,
129 display_e2e_pipe_params_st *pipes,
130 int pipe_cnt)
131{
132 display_pipe_source_params_st *pipe_src;
133 display_pipe_dest_params_st *pipe_dest;
134 scaler_ratio_depth_st *scale_ratio_depth;
135 scaler_taps_st *scale_taps;
136 display_output_params_st *dout;
137 display_clocks_and_cfg_st *clks_cfg;
138 int i;
139
140 for (i = 0; i < pipe_cnt; i++) {
141 pipe_src = &(pipes[i].pipe.src);
142 pipe_dest = &(pipes[i].pipe.dest);
143 scale_ratio_depth = &(pipes[i].pipe.scale_ratio_depth);
Value stored to 'scale_ratio_depth' is never read
144 scale_taps = &(pipes[i].pipe.scale_taps);
145 dout = &(pipes[i].dout);
146 clks_cfg = &(pipes[i].clks_cfg);
147
148 dml_print("DML PARAMS: =====================================\n"){do { } while(0); };
149 dml_print("DML PARAMS: PIPE [%d] SOURCE PARAMS:\n", i){do { } while(0); };
150 dml_print("DML PARAMS: source_format = %d\n", pipe_src->source_format){do { } while(0); };
151 dml_print("DML PARAMS: dcc = %d\n", pipe_src->dcc){do { } while(0); };
152 dml_print("DML PARAMS: dcc_rate = %d\n", pipe_src->dcc_rate){do { } while(0); };
153 dml_print("DML PARAMS: dcc_use_global = %d\n", pipe_src->dcc_use_global){do { } while(0); };
154 dml_print("DML PARAMS: vm = %d\n", pipe_src->vm){do { } while(0); };
155 dml_print("DML PARAMS: gpuvm = %d\n", pipe_src->gpuvm){do { } while(0); };
156 dml_print("DML PARAMS: hostvm = %d\n", pipe_src->hostvm){do { } while(0); };
157 dml_print("DML PARAMS: gpuvm_levels_force_en = %d\n", pipe_src->gpuvm_levels_force_en){do { } while(0); };
158 dml_print("DML PARAMS: gpuvm_levels_force = %d\n", pipe_src->gpuvm_levels_force){do { } while(0); };
159 dml_print("DML PARAMS: source_scan = %d\n", pipe_src->source_scan){do { } while(0); };
160 dml_print("DML PARAMS: sw_mode = %d\n", pipe_src->sw_mode){do { } while(0); };
161 dml_print("DML PARAMS: macro_tile_size = %d\n", pipe_src->macro_tile_size){do { } while(0); };
162 dml_print("DML PARAMS: viewport_width = %d\n", pipe_src->viewport_width){do { } while(0); };
163 dml_print("DML PARAMS: viewport_height = %d\n", pipe_src->viewport_height){do { } while(0); };
164 dml_print("DML PARAMS: viewport_y_y = %d\n", pipe_src->viewport_y_y){do { } while(0); };
165 dml_print("DML PARAMS: viewport_y_c = %d\n", pipe_src->viewport_y_c){do { } while(0); };
166 dml_print("DML PARAMS: viewport_width_c = %d\n", pipe_src->viewport_width_c){do { } while(0); };
167 dml_print("DML PARAMS: viewport_height_c = %d\n", pipe_src->viewport_height_c){do { } while(0); };
168 dml_print("DML PARAMS: data_pitch = %d\n", pipe_src->data_pitch){do { } while(0); };
169 dml_print("DML PARAMS: data_pitch_c = %d\n", pipe_src->data_pitch_c){do { } while(0); };
170 dml_print("DML PARAMS: meta_pitch = %d\n", pipe_src->meta_pitch){do { } while(0); };
171 dml_print("DML PARAMS: meta_pitch_c = %d\n", pipe_src->meta_pitch_c){do { } while(0); };
172 dml_print("DML PARAMS: cur0_src_width = %d\n", pipe_src->cur0_src_width){do { } while(0); };
173 dml_print("DML PARAMS: cur0_bpp = %d\n", pipe_src->cur0_bpp){do { } while(0); };
174 dml_print("DML PARAMS: cur1_src_width = %d\n", pipe_src->cur1_src_width){do { } while(0); };
175 dml_print("DML PARAMS: cur1_bpp = %d\n", pipe_src->cur1_bpp){do { } while(0); };
176 dml_print("DML PARAMS: num_cursors = %d\n", pipe_src->num_cursors){do { } while(0); };
177 dml_print("DML PARAMS: is_hsplit = %d\n", pipe_src->is_hsplit){do { } while(0); };
178 dml_print("DML PARAMS: hsplit_grp = %d\n", pipe_src->hsplit_grp){do { } while(0); };
179 dml_print("DML PARAMS: dynamic_metadata_enable = %d\n", pipe_src->dynamic_metadata_enable){do { } while(0); };
180 dml_print("DML PARAMS: dmdata_lines_before_active = %d\n", pipe_src->dynamic_metadata_lines_before_active){do { } while(0); };
181 dml_print("DML PARAMS: dmdata_xmit_bytes = %d\n", pipe_src->dynamic_metadata_xmit_bytes){do { } while(0); };
182 dml_print("DML PARAMS: immediate_flip = %d\n", pipe_src->immediate_flip){do { } while(0); };
183 dml_print("DML PARAMS: v_total_min = %d\n", pipe_src->v_total_min){do { } while(0); };
184 dml_print("DML PARAMS: v_total_max = %d\n", pipe_src->v_total_max){do { } while(0); };
185 dml_print("DML PARAMS: =====================================\n"){do { } while(0); };
186
187 dml_print("DML PARAMS: PIPE [%d] DESTINATION PARAMS:\n", i){do { } while(0); };
188 dml_print("DML PARAMS: recout_width = %d\n", pipe_dest->recout_width){do { } while(0); };
189 dml_print("DML PARAMS: recout_height = %d\n", pipe_dest->recout_height){do { } while(0); };
190 dml_print("DML PARAMS: full_recout_width = %d\n", pipe_dest->full_recout_width){do { } while(0); };
191 dml_print("DML PARAMS: full_recout_height = %d\n", pipe_dest->full_recout_height){do { } while(0); };
192 dml_print("DML PARAMS: hblank_start = %d\n", pipe_dest->hblank_start){do { } while(0); };
193 dml_print("DML PARAMS: hblank_end = %d\n", pipe_dest->hblank_end){do { } while(0); };
194 dml_print("DML PARAMS: vblank_start = %d\n", pipe_dest->vblank_start){do { } while(0); };
195 dml_print("DML PARAMS: vblank_end = %d\n", pipe_dest->vblank_end){do { } while(0); };
196 dml_print("DML PARAMS: htotal = %d\n", pipe_dest->htotal){do { } while(0); };
197 dml_print("DML PARAMS: vtotal = %d\n", pipe_dest->vtotal){do { } while(0); };
198 dml_print("DML PARAMS: vactive = %d\n", pipe_dest->vactive){do { } while(0); };
199 dml_print("DML PARAMS: hactive = %d\n", pipe_dest->hactive){do { } while(0); };
200 dml_print("DML PARAMS: vstartup_start = %d\n", pipe_dest->vstartup_start){do { } while(0); };
201 dml_print("DML PARAMS: vupdate_offset = %d\n", pipe_dest->vupdate_offset){do { } while(0); };
202 dml_print("DML PARAMS: vupdate_width = %d\n", pipe_dest->vupdate_width){do { } while(0); };
203 dml_print("DML PARAMS: vready_offset = %d\n", pipe_dest->vready_offset){do { } while(0); };
204 dml_print("DML PARAMS: interlaced = %d\n", pipe_dest->interlaced){do { } while(0); };
205 dml_print("DML PARAMS: pixel_rate_mhz = %3.2f\n", pipe_dest->pixel_rate_mhz){do { } while(0); };
206 dml_print("DML PARAMS: sync_vblank_all_planes = %d\n", pipe_dest->synchronized_vblank_all_planes){do { } while(0); };
207 dml_print("DML PARAMS: otg_inst = %d\n", pipe_dest->otg_inst){do { } while(0); };
208 dml_print("DML PARAMS: odm_combine = %d\n", pipe_dest->odm_combine){do { } while(0); };
209 dml_print("DML PARAMS: use_maximum_vstartup = %d\n", pipe_dest->use_maximum_vstartup){do { } while(0); };
210 dml_print("DML PARAMS: vtotal_max = %d\n", pipe_dest->vtotal_max){do { } while(0); };
211 dml_print("DML PARAMS: vtotal_min = %d\n", pipe_dest->vtotal_min){do { } while(0); };
212 dml_print("DML PARAMS: =====================================\n"){do { } while(0); };
213
214 dml_print("DML PARAMS: PIPE [%d] SCALER PARAMS:\n", i){do { } while(0); };
215 dml_print("DML PARAMS: hscl_ratio = %3.4f\n", scale_ratio_depth->hscl_ratio){do { } while(0); };
216 dml_print("DML PARAMS: vscl_ratio = %3.4f\n", scale_ratio_depth->vscl_ratio){do { } while(0); };
217 dml_print("DML PARAMS: hscl_ratio_c = %3.4f\n", scale_ratio_depth->hscl_ratio_c){do { } while(0); };
218 dml_print("DML PARAMS: vscl_ratio_c = %3.4f\n", scale_ratio_depth->vscl_ratio_c){do { } while(0); };
219 dml_print("DML PARAMS: vinit = %3.4f\n", scale_ratio_depth->vinit){do { } while(0); };
220 dml_print("DML PARAMS: vinit_c = %3.4f\n", scale_ratio_depth->vinit_c){do { } while(0); };
221 dml_print("DML PARAMS: vinit_bot = %3.4f\n", scale_ratio_depth->vinit_bot){do { } while(0); };
222 dml_print("DML PARAMS: vinit_bot_c = %3.4f\n", scale_ratio_depth->vinit_bot_c){do { } while(0); };
223 dml_print("DML PARAMS: lb_depth = %d\n", scale_ratio_depth->lb_depth){do { } while(0); };
224 dml_print("DML PARAMS: scl_enable = %d\n", scale_ratio_depth->scl_enable){do { } while(0); };
225 dml_print("DML PARAMS: htaps = %d\n", scale_taps->htaps){do { } while(0); };
226 dml_print("DML PARAMS: vtaps = %d\n", scale_taps->vtaps){do { } while(0); };
227 dml_print("DML PARAMS: htaps_c = %d\n", scale_taps->htaps_c){do { } while(0); };
228 dml_print("DML PARAMS: vtaps_c = %d\n", scale_taps->vtaps_c){do { } while(0); };
229 dml_print("DML PARAMS: =====================================\n"){do { } while(0); };
230
231 dml_print("DML PARAMS: PIPE [%d] DISPLAY OUTPUT PARAMS:\n", i){do { } while(0); };
232 dml_print("DML PARAMS: output_type = %d\n", dout->output_type){do { } while(0); };
233 dml_print("DML PARAMS: output_format = %d\n", dout->output_format){do { } while(0); };
234 dml_print("DML PARAMS: output_bpc = %d\n", dout->output_bpc){do { } while(0); };
235 dml_print("DML PARAMS: output_bpp = %3.4f\n", dout->output_bpp){do { } while(0); };
236 dml_print("DML PARAMS: dp_lanes = %d\n", dout->dp_lanes){do { } while(0); };
237 dml_print("DML PARAMS: dsc_enable = %d\n", dout->dsc_enable){do { } while(0); };
238 dml_print("DML PARAMS: dsc_slices = %d\n", dout->dsc_slices){do { } while(0); };
239 dml_print("DML PARAMS: wb_enable = %d\n", dout->wb_enable){do { } while(0); };
240 dml_print("DML PARAMS: num_active_wb = %d\n", dout->num_active_wb){do { } while(0); };
241 dml_print("DML PARAMS: =====================================\n"){do { } while(0); };
242
243 dml_print("DML PARAMS: PIPE [%d] CLOCK CONFIG PARAMS:\n", i){do { } while(0); };
244 dml_print("DML PARAMS: voltage = %d\n", clks_cfg->voltage){do { } while(0); };
245 dml_print("DML PARAMS: dppclk_mhz = %3.2f\n", clks_cfg->dppclk_mhz){do { } while(0); };
246 dml_print("DML PARAMS: refclk_mhz = %3.2f\n", clks_cfg->refclk_mhz){do { } while(0); };
247 dml_print("DML PARAMS: dispclk_mhz = %3.2f\n", clks_cfg->dispclk_mhz){do { } while(0); };
248 dml_print("DML PARAMS: dcfclk_mhz = %3.2f\n", clks_cfg->dcfclk_mhz){do { } while(0); };
249 dml_print("DML PARAMS: socclk_mhz = %3.2f\n", clks_cfg->socclk_mhz){do { } while(0); };
250 dml_print("DML PARAMS: =====================================\n"){do { } while(0); };
251 }
252}
253
254void dml_log_mode_support_params(struct display_mode_lib *mode_lib)
255{
256 int i;
257
258 for (i = mode_lib->vba.soc.num_states; i >= 0; i--) {
259 dml_print("DML SUPPORT: ===============================================\n"){do { } while(0); };
260 dml_print("DML SUPPORT: Voltage State %d\n", i){do { } while(0); };
261 dml_print("DML SUPPORT: Mode Supported : %s\n", mode_lib->vba.ModeSupport[i][0] ? "Supported" : "NOT Supported"){do { } while(0); };
262 dml_print("DML SUPPORT: Mode Supported (pipe split) : %s\n", mode_lib->vba.ModeSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
263 dml_print("DML SUPPORT: Scale Ratio And Taps : %s\n", mode_lib->vba.ScaleRatioAndTapsSupport ? "Supported" : "NOT Supported"){do { } while(0); };
264 dml_print("DML SUPPORT: Source Format Pixel And Scan : %s\n", mode_lib->vba.SourceFormatPixelAndScanSupport ? "Supported" : "NOT Supported"){do { } while(0); };
265 dml_print("DML SUPPORT: Viewport Size : [%s, %s]\n", mode_lib->vba.ViewportSizeSupport[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.ViewportSizeSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
266 dml_print("DML SUPPORT: DIO Support : %s\n", mode_lib->vba.DIOSupport[i] ? "Supported" : "NOT Supported"){do { } while(0); };
267 dml_print("DML SUPPORT: ODM Combine 4To1 Support Check : %s\n", mode_lib->vba.ODMCombine4To1SupportCheckOK[i] ? "Supported" : "NOT Supported"){do { } while(0); };
268 dml_print("DML SUPPORT: DSC Units : %s\n", mode_lib->vba.NotEnoughDSCUnits[i] ? "Not Supported" : "Supported"){do { } while(0); };
269 dml_print("DML SUPPORT: DSCCLK Required : %s\n", mode_lib->vba.DSCCLKRequiredMoreThanSupported[i] ? "Not Supported" : "Supported"){do { } while(0); };
270 dml_print("DML SUPPORT: DTBCLK Required : %s\n", mode_lib->vba.DTBCLKRequiredMoreThanSupported[i] ? "Not Supported" : "Supported"){do { } while(0); };
271 dml_print("DML SUPPORT: Re-ordering Buffer : [%s, %s]\n", mode_lib->vba.ROBSupport[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.ROBSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
272 dml_print("DML SUPPORT: DISPCLK and DPPCLK : [%s, %s]\n", mode_lib->vba.DISPCLK_DPPCLK_Support[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.DISPCLK_DPPCLK_Support[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
273 dml_print("DML SUPPORT: Total Available Pipes : [%s, %s]\n", mode_lib->vba.TotalAvailablePipesSupport[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.TotalAvailablePipesSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
274 dml_print("DML SUPPORT: Writeback Latency : %s\n", mode_lib->vba.WritebackLatencySupport ? "Supported" : "NOT Supported"){do { } while(0); };
275 dml_print("DML SUPPORT: Writeback Scale Ratio And Taps : %s\n", mode_lib->vba.WritebackScaleRatioAndTapsSupport ? "Supported" : "NOT Supported"){do { } while(0); };
276 dml_print("DML SUPPORT: Cursor : %s\n", mode_lib->vba.CursorSupport ? "Supported" : "NOT Supported"){do { } while(0); };
277 dml_print("DML SUPPORT: Pitch : %s\n", mode_lib->vba.PitchSupport ? "Supported" : "NOT Supported"){do { } while(0); };
278 dml_print("DML SUPPORT: Prefetch : [%s, %s]\n", mode_lib->vba.PrefetchSupported[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.PrefetchSupported[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
279 dml_print("DML SUPPORT: Dynamic Metadata : [%s, %s]\n", mode_lib->vba.DynamicMetadataSupported[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.DynamicMetadataSupported[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
280 dml_print("DML SUPPORT: Total Vertical Active Bandwidth : [%s, %s]\n", mode_lib->vba.TotalVerticalActiveBandwidthSupport[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.TotalVerticalActiveBandwidthSupport[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
281 dml_print("DML SUPPORT: VRatio In Prefetch : [%s, %s]\n", mode_lib->vba.VRatioInPrefetchSupported[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.VRatioInPrefetchSupported[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
282 dml_print("DML SUPPORT: PTE Buffer Size Not Exceeded : [%s, %s]\n", mode_lib->vba.PTEBufferSizeNotExceeded[i][0] ? "Supported" : "NOT Supported", mode_lib->vba.PTEBufferSizeNotExceeded[i][1] ? "Supported" : "NOT Supported"){do { } while(0); };
283 dml_print("DML SUPPORT: DSC Input BPC : %s\n", mode_lib->vba.NonsupportedDSCInputBPC ? "Not Supported" : "Supported"){do { } while(0); };
284 dml_print("DML SUPPORT: HostVMEnable : %d\n", mode_lib->vba.HostVMEnable){do { } while(0); };
285 dml_print("DML SUPPORT: ImmediateFlipSupportedForState : [%d, %d]\n", mode_lib->vba.ImmediateFlipSupportedForState[i][0], mode_lib->vba.ImmediateFlipSupportedForState[i][1]){do { } while(0); };
286 }
287}
288#endif