File: | dev/pci/drm/radeon/atom.c |
Warning: | line 931, column 2 Value stored to 'dst' is never read |
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1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | * Author: Stanislaw Skowronek |
23 | */ |
24 | |
25 | #include <linux/module.h> |
26 | #include <linux/sched.h> |
27 | #include <linux/slab.h> |
28 | |
29 | #include <asm/unaligned.h> |
30 | |
31 | #include <drm/drm_device.h> |
32 | #include <drm/drm_util.h> |
33 | |
34 | #define ATOM_DEBUG |
35 | |
36 | #include "atom.h" |
37 | #include "atom-names.h" |
38 | #include "atom-bits.h" |
39 | #include "radeon.h" |
40 | |
41 | #define ATOM_COND_ABOVE0 0 |
42 | #define ATOM_COND_ABOVEOREQUAL1 1 |
43 | #define ATOM_COND_ALWAYS2 2 |
44 | #define ATOM_COND_BELOW3 3 |
45 | #define ATOM_COND_BELOWOREQUAL4 4 |
46 | #define ATOM_COND_EQUAL5 5 |
47 | #define ATOM_COND_NOTEQUAL6 6 |
48 | |
49 | #define ATOM_PORT_ATI0 0 |
50 | #define ATOM_PORT_PCI1 1 |
51 | #define ATOM_PORT_SYSIO2 2 |
52 | |
53 | #define ATOM_UNIT_MICROSEC0 0 |
54 | #define ATOM_UNIT_MILLISEC1 1 |
55 | |
56 | #define PLL_INDEX2 2 |
57 | #define PLL_DATA3 3 |
58 | |
59 | typedef struct { |
60 | struct atom_context *ctx; |
61 | uint32_t *ps, *ws; |
62 | int ps_shift; |
63 | uint16_t start; |
64 | unsigned last_jump; |
65 | unsigned long last_jump_jiffies; |
66 | bool_Bool abort; |
67 | } atom_exec_context; |
68 | |
69 | int atom_debug = 0; |
70 | static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params); |
71 | int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params); |
72 | |
73 | static uint32_t atom_arg_mask[8] = { |
74 | 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000, |
75 | 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000 |
76 | }; |
77 | static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 }; |
78 | |
79 | static int atom_dst_to_src[8][4] = { |
80 | /* translate destination alignment field to the source alignment encoding */ |
81 | {0, 0, 0, 0}, |
82 | {1, 2, 3, 0}, |
83 | {1, 2, 3, 0}, |
84 | {1, 2, 3, 0}, |
85 | {4, 5, 6, 7}, |
86 | {4, 5, 6, 7}, |
87 | {4, 5, 6, 7}, |
88 | {4, 5, 6, 7}, |
89 | }; |
90 | static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 }; |
91 | |
92 | static int debug_depth = 0; |
93 | #ifdef ATOM_DEBUG |
94 | static void debug_print_spaces(int n) |
95 | { |
96 | while (n--) |
97 | printk(" "); |
98 | } |
99 | |
100 | #ifdef DEBUG |
101 | #undef DEBUG |
102 | #endif |
103 | |
104 | #define DEBUG(...)do if (atom_debug) { printk("\0017" ...); } while (0) do if (atom_debug) { printk(KERN_DEBUG"\0017" __VA_ARGS__); } while (0) |
105 | #define SDEBUG(...)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(...); } while (0) do if (atom_debug) { printk(KERN_DEBUG"\0017"); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0) |
106 | #else |
107 | #define DEBUG(...)do if (atom_debug) { printk("\0017" ...); } while (0) do { } while (0) |
108 | #define SDEBUG(...)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(...); } while (0) do { } while (0) |
109 | #endif |
110 | |
111 | static uint32_t atom_iio_execute(struct atom_context *ctx, int base, |
112 | uint32_t index, uint32_t data) |
113 | { |
114 | struct radeon_device *rdev = ctx->card->dev->dev_private; |
115 | uint32_t temp = 0xCDCDCDCD; |
116 | |
117 | while (1) |
118 | switch (CU8(base)get_u8(ctx->bios, (base))) { |
119 | case ATOM_IIO_NOP0: |
120 | base++; |
121 | break; |
122 | case ATOM_IIO_READ2: |
123 | temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1)get_u16(ctx->bios, (base + 1))); |
124 | base += 3; |
125 | break; |
126 | case ATOM_IIO_WRITE3: |
127 | if (rdev->family == CHIP_RV515) |
128 | (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1)get_u16(ctx->bios, (base + 1))); |
129 | ctx->card->ioreg_write(ctx->card, CU16(base + 1)get_u16(ctx->bios, (base + 1)), temp); |
130 | base += 3; |
131 | break; |
132 | case ATOM_IIO_CLEAR4: |
133 | temp &= |
134 | ~((0xFFFFFFFF >> (32 - CU8(base + 1)get_u8(ctx->bios, (base + 1)))) << |
135 | CU8(base + 2)get_u8(ctx->bios, (base + 2))); |
136 | base += 3; |
137 | break; |
138 | case ATOM_IIO_SET5: |
139 | temp |= |
140 | (0xFFFFFFFF >> (32 - CU8(base + 1)get_u8(ctx->bios, (base + 1)))) << CU8(base +get_u8(ctx->bios, (base + 2)) |
141 | 2)get_u8(ctx->bios, (base + 2)); |
142 | base += 3; |
143 | break; |
144 | case ATOM_IIO_MOVE_INDEX6: |
145 | temp &= |
146 | ~((0xFFFFFFFF >> (32 - CU8(base + 1)get_u8(ctx->bios, (base + 1)))) << |
147 | CU8(base + 3)get_u8(ctx->bios, (base + 3))); |
148 | temp |= |
149 | ((index >> CU8(base + 2)get_u8(ctx->bios, (base + 2))) & |
150 | (0xFFFFFFFF >> (32 - CU8(base + 1)get_u8(ctx->bios, (base + 1))))) << CU8(base +get_u8(ctx->bios, (base + 3)) |
151 | 3)get_u8(ctx->bios, (base + 3)); |
152 | base += 4; |
153 | break; |
154 | case ATOM_IIO_MOVE_DATA8: |
155 | temp &= |
156 | ~((0xFFFFFFFF >> (32 - CU8(base + 1)get_u8(ctx->bios, (base + 1)))) << |
157 | CU8(base + 3)get_u8(ctx->bios, (base + 3))); |
158 | temp |= |
159 | ((data >> CU8(base + 2)get_u8(ctx->bios, (base + 2))) & |
160 | (0xFFFFFFFF >> (32 - CU8(base + 1)get_u8(ctx->bios, (base + 1))))) << CU8(base +get_u8(ctx->bios, (base + 3)) |
161 | 3)get_u8(ctx->bios, (base + 3)); |
162 | base += 4; |
163 | break; |
164 | case ATOM_IIO_MOVE_ATTR7: |
165 | temp &= |
166 | ~((0xFFFFFFFF >> (32 - CU8(base + 1)get_u8(ctx->bios, (base + 1)))) << |
167 | CU8(base + 3)get_u8(ctx->bios, (base + 3))); |
168 | temp |= |
169 | ((ctx-> |
170 | io_attr >> CU8(base + 2)get_u8(ctx->bios, (base + 2))) & (0xFFFFFFFF >> (32 - |
171 | CU8get_u8(ctx->bios, (base + 1)) |
172 | (baseget_u8(ctx->bios, (base + 1)) |
173 | +get_u8(ctx->bios, (base + 1)) |
174 | 1)get_u8(ctx->bios, (base + 1))))) |
175 | << CU8(base + 3)get_u8(ctx->bios, (base + 3)); |
176 | base += 4; |
177 | break; |
178 | case ATOM_IIO_END9: |
179 | return temp; |
180 | default: |
181 | pr_info("Unknown IIO opcode\n")do { } while(0); |
182 | return 0; |
183 | } |
184 | } |
185 | |
186 | static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr, |
187 | int *ptr, uint32_t *saved, int print) |
188 | { |
189 | uint32_t idx, val = 0xCDCDCDCD, align, arg; |
190 | struct atom_context *gctx = ctx->ctx; |
191 | arg = attr & 7; |
192 | align = (attr >> 3) & 7; |
193 | switch (arg) { |
194 | case ATOM_ARG_REG0: |
195 | idx = U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)); |
196 | (*ptr) += 2; |
197 | if (print) |
198 | DEBUG("REG[0x%04X]", idx)do if (atom_debug) { printk("\0017" "REG[0x%04X]", idx); } while (0); |
199 | idx += gctx->reg_block; |
200 | switch (gctx->io_mode) { |
201 | case ATOM_IO_MM0: |
202 | val = gctx->card->reg_read(gctx->card, idx); |
203 | break; |
204 | case ATOM_IO_PCI1: |
205 | pr_info("PCI registers are not implemented\n")do { } while(0); |
206 | return 0; |
207 | case ATOM_IO_SYSIO2: |
208 | pr_info("SYSIO registers are not implemented\n")do { } while(0); |
209 | return 0; |
210 | default: |
211 | if (!(gctx->io_mode & 0x80)) { |
212 | pr_info("Bad IO mode\n")do { } while(0); |
213 | return 0; |
214 | } |
215 | if (!gctx->iio[gctx->io_mode & 0x7F]) { |
216 | pr_info("Undefined indirect IO read method %d\n",do { } while(0) |
217 | gctx->io_mode & 0x7F)do { } while(0); |
218 | return 0; |
219 | } |
220 | val = |
221 | atom_iio_execute(gctx, |
222 | gctx->iio[gctx->io_mode & 0x7F], |
223 | idx, 0); |
224 | } |
225 | break; |
226 | case ATOM_ARG_PS1: |
227 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
228 | (*ptr)++; |
229 | /* get_unaligned_le32 avoids unaligned accesses from atombios |
230 | * tables, noticed on a DEC Alpha. */ |
231 | val = get_unaligned_le32((u32 *)&ctx->ps[idx])((__uint32_t)(*(__uint32_t *)((u32 *)&ctx->ps[idx]))); |
232 | if (print) |
233 | DEBUG("PS[0x%02X,0x%04X]", idx, val)do if (atom_debug) { printk("\0017" "PS[0x%02X,0x%04X]", idx, val); } while (0); |
234 | break; |
235 | case ATOM_ARG_WS2: |
236 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
237 | (*ptr)++; |
238 | if (print) |
239 | DEBUG("WS[0x%02X]", idx)do if (atom_debug) { printk("\0017" "WS[0x%02X]", idx); } while (0); |
240 | switch (idx) { |
241 | case ATOM_WS_QUOTIENT0x40: |
242 | val = gctx->divmul[0]; |
243 | break; |
244 | case ATOM_WS_REMAINDER0x41: |
245 | val = gctx->divmul[1]; |
246 | break; |
247 | case ATOM_WS_DATAPTR0x42: |
248 | val = gctx->data_block; |
249 | break; |
250 | case ATOM_WS_SHIFT0x43: |
251 | val = gctx->shift; |
252 | break; |
253 | case ATOM_WS_OR_MASK0x44: |
254 | val = 1 << gctx->shift; |
255 | break; |
256 | case ATOM_WS_AND_MASK0x45: |
257 | val = ~(1 << gctx->shift); |
258 | break; |
259 | case ATOM_WS_FB_WINDOW0x46: |
260 | val = gctx->fb_base; |
261 | break; |
262 | case ATOM_WS_ATTRIBUTES0x47: |
263 | val = gctx->io_attr; |
264 | break; |
265 | case ATOM_WS_REGPTR0x48: |
266 | val = gctx->reg_block; |
267 | break; |
268 | default: |
269 | val = ctx->ws[idx]; |
270 | } |
271 | break; |
272 | case ATOM_ARG_ID4: |
273 | idx = U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)); |
274 | (*ptr) += 2; |
275 | if (print) { |
276 | if (gctx->data_block) |
277 | DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block)do if (atom_debug) { printk("\0017" "ID[0x%04X+%04X]", idx, gctx ->data_block); } while (0); |
278 | else |
279 | DEBUG("ID[0x%04X]", idx)do if (atom_debug) { printk("\0017" "ID[0x%04X]", idx); } while (0); |
280 | } |
281 | val = U32(idx + gctx->data_block)get_u32(ctx->ctx->bios, (idx + gctx->data_block)); |
282 | break; |
283 | case ATOM_ARG_FB3: |
284 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
285 | (*ptr)++; |
286 | if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { |
287 | DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",__drm_err("ATOM: fb read beyond scratch region: %d vs. %d\n", gctx->fb_base + (idx * 4), gctx->scratch_size_bytes) |
288 | gctx->fb_base + (idx * 4), gctx->scratch_size_bytes)__drm_err("ATOM: fb read beyond scratch region: %d vs. %d\n", gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); |
289 | val = 0; |
290 | } else |
291 | val = gctx->scratch[(gctx->fb_base / 4) + idx]; |
292 | if (print) |
293 | DEBUG("FB[0x%02X]", idx)do if (atom_debug) { printk("\0017" "FB[0x%02X]", idx); } while (0); |
294 | break; |
295 | case ATOM_ARG_IMM5: |
296 | switch (align) { |
297 | case ATOM_SRC_DWORD0: |
298 | val = U32(*ptr)get_u32(ctx->ctx->bios, (*ptr)); |
299 | (*ptr) += 4; |
300 | if (print) |
301 | DEBUG("IMM 0x%08X\n", val)do if (atom_debug) { printk("\0017" "IMM 0x%08X\n", val); } while (0); |
302 | return val; |
303 | case ATOM_SRC_WORD01: |
304 | case ATOM_SRC_WORD82: |
305 | case ATOM_SRC_WORD163: |
306 | val = U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)); |
307 | (*ptr) += 2; |
308 | if (print) |
309 | DEBUG("IMM 0x%04X\n", val)do if (atom_debug) { printk("\0017" "IMM 0x%04X\n", val); } while (0); |
310 | return val; |
311 | case ATOM_SRC_BYTE04: |
312 | case ATOM_SRC_BYTE85: |
313 | case ATOM_SRC_BYTE166: |
314 | case ATOM_SRC_BYTE247: |
315 | val = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
316 | (*ptr)++; |
317 | if (print) |
318 | DEBUG("IMM 0x%02X\n", val)do if (atom_debug) { printk("\0017" "IMM 0x%02X\n", val); } while (0); |
319 | return val; |
320 | } |
321 | return 0; |
322 | case ATOM_ARG_PLL6: |
323 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
324 | (*ptr)++; |
325 | if (print) |
326 | DEBUG("PLL[0x%02X]", idx)do if (atom_debug) { printk("\0017" "PLL[0x%02X]", idx); } while (0); |
327 | val = gctx->card->pll_read(gctx->card, idx); |
328 | break; |
329 | case ATOM_ARG_MC7: |
330 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
331 | (*ptr)++; |
332 | if (print) |
333 | DEBUG("MC[0x%02X]", idx)do if (atom_debug) { printk("\0017" "MC[0x%02X]", idx); } while (0); |
334 | val = gctx->card->mc_read(gctx->card, idx); |
335 | break; |
336 | } |
337 | if (saved) |
338 | *saved = val; |
339 | val &= atom_arg_mask[align]; |
340 | val >>= atom_arg_shift[align]; |
341 | if (print) |
342 | switch (align) { |
343 | case ATOM_SRC_DWORD0: |
344 | DEBUG(".[31:0] -> 0x%08X\n", val)do if (atom_debug) { printk("\0017" ".[31:0] -> 0x%08X\n", val); } while (0); |
345 | break; |
346 | case ATOM_SRC_WORD01: |
347 | DEBUG(".[15:0] -> 0x%04X\n", val)do if (atom_debug) { printk("\0017" ".[15:0] -> 0x%04X\n", val); } while (0); |
348 | break; |
349 | case ATOM_SRC_WORD82: |
350 | DEBUG(".[23:8] -> 0x%04X\n", val)do if (atom_debug) { printk("\0017" ".[23:8] -> 0x%04X\n", val); } while (0); |
351 | break; |
352 | case ATOM_SRC_WORD163: |
353 | DEBUG(".[31:16] -> 0x%04X\n", val)do if (atom_debug) { printk("\0017" ".[31:16] -> 0x%04X\n" , val); } while (0); |
354 | break; |
355 | case ATOM_SRC_BYTE04: |
356 | DEBUG(".[7:0] -> 0x%02X\n", val)do if (atom_debug) { printk("\0017" ".[7:0] -> 0x%02X\n", val ); } while (0); |
357 | break; |
358 | case ATOM_SRC_BYTE85: |
359 | DEBUG(".[15:8] -> 0x%02X\n", val)do if (atom_debug) { printk("\0017" ".[15:8] -> 0x%02X\n", val); } while (0); |
360 | break; |
361 | case ATOM_SRC_BYTE166: |
362 | DEBUG(".[23:16] -> 0x%02X\n", val)do if (atom_debug) { printk("\0017" ".[23:16] -> 0x%02X\n" , val); } while (0); |
363 | break; |
364 | case ATOM_SRC_BYTE247: |
365 | DEBUG(".[31:24] -> 0x%02X\n", val)do if (atom_debug) { printk("\0017" ".[31:24] -> 0x%02X\n" , val); } while (0); |
366 | break; |
367 | } |
368 | return val; |
369 | } |
370 | |
371 | static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr) |
372 | { |
373 | uint32_t align = (attr >> 3) & 7, arg = attr & 7; |
374 | switch (arg) { |
375 | case ATOM_ARG_REG0: |
376 | case ATOM_ARG_ID4: |
377 | (*ptr) += 2; |
378 | break; |
379 | case ATOM_ARG_PLL6: |
380 | case ATOM_ARG_MC7: |
381 | case ATOM_ARG_PS1: |
382 | case ATOM_ARG_WS2: |
383 | case ATOM_ARG_FB3: |
384 | (*ptr)++; |
385 | break; |
386 | case ATOM_ARG_IMM5: |
387 | switch (align) { |
388 | case ATOM_SRC_DWORD0: |
389 | (*ptr) += 4; |
390 | return; |
391 | case ATOM_SRC_WORD01: |
392 | case ATOM_SRC_WORD82: |
393 | case ATOM_SRC_WORD163: |
394 | (*ptr) += 2; |
395 | return; |
396 | case ATOM_SRC_BYTE04: |
397 | case ATOM_SRC_BYTE85: |
398 | case ATOM_SRC_BYTE166: |
399 | case ATOM_SRC_BYTE247: |
400 | (*ptr)++; |
401 | return; |
402 | } |
403 | return; |
404 | } |
405 | } |
406 | |
407 | static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr) |
408 | { |
409 | return atom_get_src_int(ctx, attr, ptr, NULL((void *)0), 1); |
410 | } |
411 | |
412 | static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr) |
413 | { |
414 | uint32_t val = 0xCDCDCDCD; |
415 | |
416 | switch (align) { |
417 | case ATOM_SRC_DWORD0: |
418 | val = U32(*ptr)get_u32(ctx->ctx->bios, (*ptr)); |
419 | (*ptr) += 4; |
420 | break; |
421 | case ATOM_SRC_WORD01: |
422 | case ATOM_SRC_WORD82: |
423 | case ATOM_SRC_WORD163: |
424 | val = U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)); |
425 | (*ptr) += 2; |
426 | break; |
427 | case ATOM_SRC_BYTE04: |
428 | case ATOM_SRC_BYTE85: |
429 | case ATOM_SRC_BYTE166: |
430 | case ATOM_SRC_BYTE247: |
431 | val = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
432 | (*ptr)++; |
433 | break; |
434 | } |
435 | return val; |
436 | } |
437 | |
438 | static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr, |
439 | int *ptr, uint32_t *saved, int print) |
440 | { |
441 | return atom_get_src_int(ctx, |
442 | arg | atom_dst_to_src[(attr >> 3) & |
443 | 7][(attr >> 6) & 3] << 3, |
444 | ptr, saved, print); |
445 | } |
446 | |
447 | static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr) |
448 | { |
449 | atom_skip_src_int(ctx, |
450 | arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & |
451 | 3] << 3, ptr); |
452 | } |
453 | |
454 | static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr, |
455 | int *ptr, uint32_t val, uint32_t saved) |
456 | { |
457 | uint32_t align = |
458 | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val = |
459 | val, idx; |
460 | struct atom_context *gctx = ctx->ctx; |
461 | old_val &= atom_arg_mask[align] >> atom_arg_shift[align]; |
462 | val <<= atom_arg_shift[align]; |
463 | val &= atom_arg_mask[align]; |
464 | saved &= ~atom_arg_mask[align]; |
465 | val |= saved; |
466 | switch (arg) { |
467 | case ATOM_ARG_REG0: |
468 | idx = U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)); |
469 | (*ptr) += 2; |
470 | DEBUG("REG[0x%04X]", idx)do if (atom_debug) { printk("\0017" "REG[0x%04X]", idx); } while (0); |
471 | idx += gctx->reg_block; |
472 | switch (gctx->io_mode) { |
473 | case ATOM_IO_MM0: |
474 | if (idx == 0) |
475 | gctx->card->reg_write(gctx->card, idx, |
476 | val << 2); |
477 | else |
478 | gctx->card->reg_write(gctx->card, idx, val); |
479 | break; |
480 | case ATOM_IO_PCI1: |
481 | pr_info("PCI registers are not implemented\n")do { } while(0); |
482 | return; |
483 | case ATOM_IO_SYSIO2: |
484 | pr_info("SYSIO registers are not implemented\n")do { } while(0); |
485 | return; |
486 | default: |
487 | if (!(gctx->io_mode & 0x80)) { |
488 | pr_info("Bad IO mode\n")do { } while(0); |
489 | return; |
490 | } |
491 | if (!gctx->iio[gctx->io_mode & 0xFF]) { |
492 | pr_info("Undefined indirect IO write method %d\n",do { } while(0) |
493 | gctx->io_mode & 0x7F)do { } while(0); |
494 | return; |
495 | } |
496 | atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF], |
497 | idx, val); |
498 | } |
499 | break; |
500 | case ATOM_ARG_PS1: |
501 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
502 | (*ptr)++; |
503 | DEBUG("PS[0x%02X]", idx)do if (atom_debug) { printk("\0017" "PS[0x%02X]", idx); } while (0); |
504 | ctx->ps[idx] = cpu_to_le32(val)((__uint32_t)(val)); |
505 | break; |
506 | case ATOM_ARG_WS2: |
507 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
508 | (*ptr)++; |
509 | DEBUG("WS[0x%02X]", idx)do if (atom_debug) { printk("\0017" "WS[0x%02X]", idx); } while (0); |
510 | switch (idx) { |
511 | case ATOM_WS_QUOTIENT0x40: |
512 | gctx->divmul[0] = val; |
513 | break; |
514 | case ATOM_WS_REMAINDER0x41: |
515 | gctx->divmul[1] = val; |
516 | break; |
517 | case ATOM_WS_DATAPTR0x42: |
518 | gctx->data_block = val; |
519 | break; |
520 | case ATOM_WS_SHIFT0x43: |
521 | gctx->shift = val; |
522 | break; |
523 | case ATOM_WS_OR_MASK0x44: |
524 | case ATOM_WS_AND_MASK0x45: |
525 | break; |
526 | case ATOM_WS_FB_WINDOW0x46: |
527 | gctx->fb_base = val; |
528 | break; |
529 | case ATOM_WS_ATTRIBUTES0x47: |
530 | gctx->io_attr = val; |
531 | break; |
532 | case ATOM_WS_REGPTR0x48: |
533 | gctx->reg_block = val; |
534 | break; |
535 | default: |
536 | ctx->ws[idx] = val; |
537 | } |
538 | break; |
539 | case ATOM_ARG_FB3: |
540 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
541 | (*ptr)++; |
542 | if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { |
543 | DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",__drm_err("ATOM: fb write beyond scratch region: %d vs. %d\n" , gctx->fb_base + (idx * 4), gctx->scratch_size_bytes) |
544 | gctx->fb_base + (idx * 4), gctx->scratch_size_bytes)__drm_err("ATOM: fb write beyond scratch region: %d vs. %d\n" , gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); |
545 | } else |
546 | gctx->scratch[(gctx->fb_base / 4) + idx] = val; |
547 | DEBUG("FB[0x%02X]", idx)do if (atom_debug) { printk("\0017" "FB[0x%02X]", idx); } while (0); |
548 | break; |
549 | case ATOM_ARG_PLL6: |
550 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
551 | (*ptr)++; |
552 | DEBUG("PLL[0x%02X]", idx)do if (atom_debug) { printk("\0017" "PLL[0x%02X]", idx); } while (0); |
553 | gctx->card->pll_write(gctx->card, idx, val); |
554 | break; |
555 | case ATOM_ARG_MC7: |
556 | idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
557 | (*ptr)++; |
558 | DEBUG("MC[0x%02X]", idx)do if (atom_debug) { printk("\0017" "MC[0x%02X]", idx); } while (0); |
559 | gctx->card->mc_write(gctx->card, idx, val); |
560 | return; |
561 | } |
562 | switch (align) { |
563 | case ATOM_SRC_DWORD0: |
564 | DEBUG(".[31:0] <- 0x%08X\n", old_val)do if (atom_debug) { printk("\0017" ".[31:0] <- 0x%08X\n", old_val); } while (0); |
565 | break; |
566 | case ATOM_SRC_WORD01: |
567 | DEBUG(".[15:0] <- 0x%04X\n", old_val)do if (atom_debug) { printk("\0017" ".[15:0] <- 0x%04X\n", old_val); } while (0); |
568 | break; |
569 | case ATOM_SRC_WORD82: |
570 | DEBUG(".[23:8] <- 0x%04X\n", old_val)do if (atom_debug) { printk("\0017" ".[23:8] <- 0x%04X\n", old_val); } while (0); |
571 | break; |
572 | case ATOM_SRC_WORD163: |
573 | DEBUG(".[31:16] <- 0x%04X\n", old_val)do if (atom_debug) { printk("\0017" ".[31:16] <- 0x%04X\n" , old_val); } while (0); |
574 | break; |
575 | case ATOM_SRC_BYTE04: |
576 | DEBUG(".[7:0] <- 0x%02X\n", old_val)do if (atom_debug) { printk("\0017" ".[7:0] <- 0x%02X\n", old_val ); } while (0); |
577 | break; |
578 | case ATOM_SRC_BYTE85: |
579 | DEBUG(".[15:8] <- 0x%02X\n", old_val)do if (atom_debug) { printk("\0017" ".[15:8] <- 0x%02X\n", old_val); } while (0); |
580 | break; |
581 | case ATOM_SRC_BYTE166: |
582 | DEBUG(".[23:16] <- 0x%02X\n", old_val)do if (atom_debug) { printk("\0017" ".[23:16] <- 0x%02X\n" , old_val); } while (0); |
583 | break; |
584 | case ATOM_SRC_BYTE247: |
585 | DEBUG(".[31:24] <- 0x%02X\n", old_val)do if (atom_debug) { printk("\0017" ".[31:24] <- 0x%02X\n" , old_val); } while (0); |
586 | break; |
587 | } |
588 | } |
589 | |
590 | static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg) |
591 | { |
592 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
593 | uint32_t dst, src, saved; |
594 | int dptr = *ptr; |
595 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
596 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
597 | SDEBUG(" src: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src: "); } while (0); |
598 | src = atom_get_src(ctx, attr, ptr); |
599 | dst += src; |
600 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
601 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
602 | } |
603 | |
604 | static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg) |
605 | { |
606 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
607 | uint32_t dst, src, saved; |
608 | int dptr = *ptr; |
609 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
610 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
611 | SDEBUG(" src: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src: "); } while (0); |
612 | src = atom_get_src(ctx, attr, ptr); |
613 | dst &= src; |
614 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
615 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
616 | } |
617 | |
618 | static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg) |
619 | { |
620 | printk("ATOM BIOS beeped!\n"); |
621 | } |
622 | |
623 | static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg) |
624 | { |
625 | int idx = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
626 | int r = 0; |
627 | |
628 | if (idx < ATOM_TABLE_NAMES_CNT74) |
629 | SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx])do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" table: %d (%s)\n", idx, atom_table_names[idx]); } while (0); |
630 | else |
631 | SDEBUG(" table: %d\n", idx)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" table: %d\n", idx); } while (0); |
632 | if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)get_u16(ctx->ctx->bios, (ctx->ctx->cmd_table + 4 + 2 * idx))) |
633 | r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift); |
634 | if (r) { |
635 | ctx->abort = true1; |
636 | } |
637 | } |
638 | |
639 | static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg) |
640 | { |
641 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
642 | uint32_t saved; |
643 | int dptr = *ptr; |
644 | attr &= 0x38; |
645 | attr |= atom_def_dst[attr >> 3] << 6; |
646 | atom_get_dst(ctx, arg, attr, ptr, &saved, 0); |
647 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
648 | atom_put_dst(ctx, arg, attr, &dptr, 0, saved); |
649 | } |
650 | |
651 | static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg) |
652 | { |
653 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
654 | uint32_t dst, src; |
655 | SDEBUG(" src1: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src1: "); } while (0); |
656 | dst = atom_get_dst(ctx, arg, attr, ptr, NULL((void *)0), 1); |
657 | SDEBUG(" src2: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src2: "); } while (0); |
658 | src = atom_get_src(ctx, attr, ptr); |
659 | ctx->ctx->cs_equal = (dst == src); |
660 | ctx->ctx->cs_above = (dst > src); |
661 | SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE", ctx->ctx->cs_above ? "GT" : "LE"); } while (0) |
662 | ctx->ctx->cs_above ? "GT" : "LE")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE", ctx->ctx->cs_above ? "GT" : "LE"); } while (0); |
663 | } |
664 | |
665 | static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg) |
666 | { |
667 | unsigned count = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
668 | SDEBUG(" count: %d\n", count)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" count: %d\n", count); } while (0); |
669 | if (arg == ATOM_UNIT_MICROSEC0) |
670 | udelay(count); |
671 | else if (!drm_can_sleep()) |
672 | mdelay(count); |
673 | else |
674 | drm_msleep(count)mdelay(count); |
675 | } |
676 | |
677 | static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg) |
678 | { |
679 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
680 | uint32_t dst, src; |
681 | SDEBUG(" src1: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src1: "); } while (0); |
682 | dst = atom_get_dst(ctx, arg, attr, ptr, NULL((void *)0), 1); |
683 | SDEBUG(" src2: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src2: "); } while (0); |
684 | src = atom_get_src(ctx, attr, ptr); |
685 | if (src != 0) { |
686 | ctx->ctx->divmul[0] = dst / src; |
687 | ctx->ctx->divmul[1] = dst % src; |
688 | } else { |
689 | ctx->ctx->divmul[0] = 0; |
690 | ctx->ctx->divmul[1] = 0; |
691 | } |
692 | } |
693 | |
694 | static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg) |
695 | { |
696 | /* functionally, a nop */ |
697 | } |
698 | |
699 | static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg) |
700 | { |
701 | int execute = 0, target = U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)); |
702 | unsigned long cjiffies; |
703 | |
704 | (*ptr) += 2; |
705 | switch (arg) { |
706 | case ATOM_COND_ABOVE0: |
707 | execute = ctx->ctx->cs_above; |
708 | break; |
709 | case ATOM_COND_ABOVEOREQUAL1: |
710 | execute = ctx->ctx->cs_above || ctx->ctx->cs_equal; |
711 | break; |
712 | case ATOM_COND_ALWAYS2: |
713 | execute = 1; |
714 | break; |
715 | case ATOM_COND_BELOW3: |
716 | execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal); |
717 | break; |
718 | case ATOM_COND_BELOWOREQUAL4: |
719 | execute = !ctx->ctx->cs_above; |
720 | break; |
721 | case ATOM_COND_EQUAL5: |
722 | execute = ctx->ctx->cs_equal; |
723 | break; |
724 | case ATOM_COND_NOTEQUAL6: |
725 | execute = !ctx->ctx->cs_equal; |
726 | break; |
727 | } |
728 | if (arg != ATOM_COND_ALWAYS2) |
729 | SDEBUG(" taken: %s\n", execute ? "yes" : "no")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" taken: %s\n", execute ? "yes" : "no"); } while ( 0); |
730 | SDEBUG(" target: 0x%04X\n", target)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" target: 0x%04X\n", target); } while (0); |
731 | if (execute) { |
732 | if (ctx->last_jump == (ctx->start + target)) { |
733 | cjiffies = jiffies; |
734 | if (time_after(cjiffies, ctx->last_jump_jiffies)((long)(ctx->last_jump_jiffies) - (long)(cjiffies) < 0)) { |
735 | cjiffies -= ctx->last_jump_jiffies; |
736 | if ((jiffies_to_msecs(cjiffies) > 5000)) { |
737 | DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n")__drm_err("atombios stuck in loop for more than 5secs aborting\n" ); |
738 | ctx->abort = true1; |
739 | } |
740 | } else { |
741 | /* jiffies wrap around we will just wait a little longer */ |
742 | ctx->last_jump_jiffies = jiffies; |
743 | } |
744 | } else { |
745 | ctx->last_jump = ctx->start + target; |
746 | ctx->last_jump_jiffies = jiffies; |
747 | } |
748 | *ptr = ctx->start + target; |
749 | } |
750 | } |
751 | |
752 | static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg) |
753 | { |
754 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
755 | uint32_t dst, mask, src, saved; |
756 | int dptr = *ptr; |
757 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
758 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
759 | mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr); |
760 | SDEBUG(" mask: 0x%08x", mask)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" mask: 0x%08x", mask); } while (0); |
761 | SDEBUG(" src: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src: "); } while (0); |
762 | src = atom_get_src(ctx, attr, ptr); |
763 | dst &= mask; |
764 | dst |= src; |
765 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
766 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
767 | } |
768 | |
769 | static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg) |
770 | { |
771 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
772 | uint32_t src, saved; |
773 | int dptr = *ptr; |
774 | if (((attr >> 3) & 7) != ATOM_SRC_DWORD0) |
775 | atom_get_dst(ctx, arg, attr, ptr, &saved, 0); |
776 | else { |
777 | atom_skip_dst(ctx, arg, attr, ptr); |
778 | saved = 0xCDCDCDCD; |
779 | } |
780 | SDEBUG(" src: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src: "); } while (0); |
781 | src = atom_get_src(ctx, attr, ptr); |
782 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
783 | atom_put_dst(ctx, arg, attr, &dptr, src, saved); |
784 | } |
785 | |
786 | static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg) |
787 | { |
788 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
789 | uint32_t dst, src; |
790 | SDEBUG(" src1: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src1: "); } while (0); |
791 | dst = atom_get_dst(ctx, arg, attr, ptr, NULL((void *)0), 1); |
792 | SDEBUG(" src2: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src2: "); } while (0); |
793 | src = atom_get_src(ctx, attr, ptr); |
794 | ctx->ctx->divmul[0] = dst * src; |
795 | } |
796 | |
797 | static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg) |
798 | { |
799 | /* nothing */ |
800 | } |
801 | |
802 | static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg) |
803 | { |
804 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
805 | uint32_t dst, src, saved; |
806 | int dptr = *ptr; |
807 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
808 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
809 | SDEBUG(" src: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src: "); } while (0); |
810 | src = atom_get_src(ctx, attr, ptr); |
811 | dst |= src; |
812 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
813 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
814 | } |
815 | |
816 | static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg) |
817 | { |
818 | uint8_t val = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
819 | SDEBUG("POST card output: 0x%02X\n", val)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk("POST card output: 0x%02X\n", val); } while (0); |
820 | } |
821 | |
822 | static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg) |
823 | { |
824 | pr_info("unimplemented!\n")do { } while(0); |
825 | } |
826 | |
827 | static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg) |
828 | { |
829 | pr_info("unimplemented!\n")do { } while(0); |
830 | } |
831 | |
832 | static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg) |
833 | { |
834 | pr_info("unimplemented!\n")do { } while(0); |
835 | } |
836 | |
837 | static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg) |
838 | { |
839 | int idx = U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)); |
840 | (*ptr)++; |
841 | SDEBUG(" block: %d\n", idx)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" block: %d\n", idx); } while (0); |
842 | if (!idx) |
843 | ctx->ctx->data_block = 0; |
844 | else if (idx == 255) |
845 | ctx->ctx->data_block = ctx->start; |
846 | else |
847 | ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx)get_u16(ctx->ctx->bios, (ctx->ctx->data_table + 4 + 2 * idx)); |
848 | SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" base: 0x%04X\n", ctx->ctx->data_block); } while (0); |
849 | } |
850 | |
851 | static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg) |
852 | { |
853 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
854 | SDEBUG(" fb_base: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" fb_base: "); } while (0); |
855 | ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr); |
856 | } |
857 | |
858 | static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg) |
859 | { |
860 | int port; |
861 | switch (arg) { |
862 | case ATOM_PORT_ATI0: |
863 | port = U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)); |
864 | if (port < ATOM_IO_NAMES_CNT5) |
865 | SDEBUG(" port: %d (%s)\n", port, atom_io_names[port])do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" port: %d (%s)\n", port, atom_io_names[port]); } while (0); |
866 | else |
867 | SDEBUG(" port: %d\n", port)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" port: %d\n", port); } while (0); |
868 | if (!port) |
869 | ctx->ctx->io_mode = ATOM_IO_MM0; |
870 | else |
871 | ctx->ctx->io_mode = ATOM_IO_IIO0x80 | port; |
872 | (*ptr) += 2; |
873 | break; |
874 | case ATOM_PORT_PCI1: |
875 | ctx->ctx->io_mode = ATOM_IO_PCI1; |
876 | (*ptr)++; |
877 | break; |
878 | case ATOM_PORT_SYSIO2: |
879 | ctx->ctx->io_mode = ATOM_IO_SYSIO2; |
880 | (*ptr)++; |
881 | break; |
882 | } |
883 | } |
884 | |
885 | static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg) |
886 | { |
887 | ctx->ctx->reg_block = U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)); |
888 | (*ptr) += 2; |
889 | SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" base: 0x%04X\n", ctx->ctx->reg_block); } while (0); |
890 | } |
891 | |
892 | static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg) |
893 | { |
894 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)), shift; |
895 | uint32_t saved, dst; |
896 | int dptr = *ptr; |
897 | attr &= 0x38; |
898 | attr |= atom_def_dst[attr >> 3] << 6; |
899 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
900 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
901 | shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE04, ptr); |
902 | SDEBUG(" shift: %d\n", shift)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" shift: %d\n", shift); } while (0); |
903 | dst <<= shift; |
904 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
905 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
906 | } |
907 | |
908 | static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg) |
909 | { |
910 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)), shift; |
911 | uint32_t saved, dst; |
912 | int dptr = *ptr; |
913 | attr &= 0x38; |
914 | attr |= atom_def_dst[attr >> 3] << 6; |
915 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
916 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
917 | shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE04, ptr); |
918 | SDEBUG(" shift: %d\n", shift)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" shift: %d\n", shift); } while (0); |
919 | dst >>= shift; |
920 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
921 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
922 | } |
923 | |
924 | static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg) |
925 | { |
926 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)), shift; |
927 | uint32_t saved, dst; |
928 | int dptr = *ptr; |
929 | uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; |
930 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
931 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
Value stored to 'dst' is never read | |
932 | /* op needs to full dst value */ |
933 | dst = saved; |
934 | shift = atom_get_src(ctx, attr, ptr); |
935 | SDEBUG(" shift: %d\n", shift)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" shift: %d\n", shift); } while (0); |
936 | dst <<= shift; |
937 | dst &= atom_arg_mask[dst_align]; |
938 | dst >>= atom_arg_shift[dst_align]; |
939 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
940 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
941 | } |
942 | |
943 | static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg) |
944 | { |
945 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)), shift; |
946 | uint32_t saved, dst; |
947 | int dptr = *ptr; |
948 | uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; |
949 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
950 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
951 | /* op needs to full dst value */ |
952 | dst = saved; |
953 | shift = atom_get_src(ctx, attr, ptr); |
954 | SDEBUG(" shift: %d\n", shift)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" shift: %d\n", shift); } while (0); |
955 | dst >>= shift; |
956 | dst &= atom_arg_mask[dst_align]; |
957 | dst >>= atom_arg_shift[dst_align]; |
958 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
959 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
960 | } |
961 | |
962 | static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg) |
963 | { |
964 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
965 | uint32_t dst, src, saved; |
966 | int dptr = *ptr; |
967 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
968 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
969 | SDEBUG(" src: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src: "); } while (0); |
970 | src = atom_get_src(ctx, attr, ptr); |
971 | dst -= src; |
972 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
973 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
974 | } |
975 | |
976 | static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg) |
977 | { |
978 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
979 | uint32_t src, val, target; |
980 | SDEBUG(" switch: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" switch: "); } while (0); |
981 | src = atom_get_src(ctx, attr, ptr); |
982 | while (U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)) != ATOM_CASE_END0x5A5A) |
983 | if (U8(*ptr)get_u8(ctx->ctx->bios, (*ptr)) == ATOM_CASE_MAGIC0x63) { |
984 | (*ptr)++; |
985 | SDEBUG(" case: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" case: "); } while (0); |
986 | val = |
987 | atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM5, |
988 | ptr); |
989 | target = U16(*ptr)get_u16(ctx->ctx->bios, (*ptr)); |
990 | if (val == src) { |
991 | SDEBUG(" target: %04X\n", target)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" target: %04X\n", target); } while (0); |
992 | *ptr = ctx->start + target; |
993 | return; |
994 | } |
995 | (*ptr) += 2; |
996 | } else { |
997 | pr_info("Bad case\n")do { } while(0); |
998 | return; |
999 | } |
1000 | (*ptr) += 2; |
1001 | } |
1002 | |
1003 | static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg) |
1004 | { |
1005 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
1006 | uint32_t dst, src; |
1007 | SDEBUG(" src1: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src1: "); } while (0); |
1008 | dst = atom_get_dst(ctx, arg, attr, ptr, NULL((void *)0), 1); |
1009 | SDEBUG(" src2: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src2: "); } while (0); |
1010 | src = atom_get_src(ctx, attr, ptr); |
1011 | ctx->ctx->cs_equal = ((dst & src) == 0); |
1012 | SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE"); } while (0); |
1013 | } |
1014 | |
1015 | static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg) |
1016 | { |
1017 | uint8_t attr = U8((*ptr)++)get_u8(ctx->ctx->bios, ((*ptr)++)); |
1018 | uint32_t dst, src, saved; |
1019 | int dptr = *ptr; |
1020 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
1021 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
1022 | SDEBUG(" src: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" src: "); } while (0); |
1023 | src = atom_get_src(ctx, attr, ptr); |
1024 | dst ^= src; |
1025 | SDEBUG(" dst: ")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(" dst: "); } while (0); |
1026 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
1027 | } |
1028 | |
1029 | static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg) |
1030 | { |
1031 | pr_info("unimplemented!\n")do { } while(0); |
1032 | } |
1033 | |
1034 | static struct { |
1035 | void (*func) (atom_exec_context *, int *, int); |
1036 | int arg; |
1037 | } opcode_table[ATOM_OP_CNT123] = { |
1038 | { |
1039 | NULL((void *)0), 0}, { |
1040 | atom_op_move, ATOM_ARG_REG0}, { |
1041 | atom_op_move, ATOM_ARG_PS1}, { |
1042 | atom_op_move, ATOM_ARG_WS2}, { |
1043 | atom_op_move, ATOM_ARG_FB3}, { |
1044 | atom_op_move, ATOM_ARG_PLL6}, { |
1045 | atom_op_move, ATOM_ARG_MC7}, { |
1046 | atom_op_and, ATOM_ARG_REG0}, { |
1047 | atom_op_and, ATOM_ARG_PS1}, { |
1048 | atom_op_and, ATOM_ARG_WS2}, { |
1049 | atom_op_and, ATOM_ARG_FB3}, { |
1050 | atom_op_and, ATOM_ARG_PLL6}, { |
1051 | atom_op_and, ATOM_ARG_MC7}, { |
1052 | atom_op_or, ATOM_ARG_REG0}, { |
1053 | atom_op_or, ATOM_ARG_PS1}, { |
1054 | atom_op_or, ATOM_ARG_WS2}, { |
1055 | atom_op_or, ATOM_ARG_FB3}, { |
1056 | atom_op_or, ATOM_ARG_PLL6}, { |
1057 | atom_op_or, ATOM_ARG_MC7}, { |
1058 | atom_op_shift_left, ATOM_ARG_REG0}, { |
1059 | atom_op_shift_left, ATOM_ARG_PS1}, { |
1060 | atom_op_shift_left, ATOM_ARG_WS2}, { |
1061 | atom_op_shift_left, ATOM_ARG_FB3}, { |
1062 | atom_op_shift_left, ATOM_ARG_PLL6}, { |
1063 | atom_op_shift_left, ATOM_ARG_MC7}, { |
1064 | atom_op_shift_right, ATOM_ARG_REG0}, { |
1065 | atom_op_shift_right, ATOM_ARG_PS1}, { |
1066 | atom_op_shift_right, ATOM_ARG_WS2}, { |
1067 | atom_op_shift_right, ATOM_ARG_FB3}, { |
1068 | atom_op_shift_right, ATOM_ARG_PLL6}, { |
1069 | atom_op_shift_right, ATOM_ARG_MC7}, { |
1070 | atom_op_mul, ATOM_ARG_REG0}, { |
1071 | atom_op_mul, ATOM_ARG_PS1}, { |
1072 | atom_op_mul, ATOM_ARG_WS2}, { |
1073 | atom_op_mul, ATOM_ARG_FB3}, { |
1074 | atom_op_mul, ATOM_ARG_PLL6}, { |
1075 | atom_op_mul, ATOM_ARG_MC7}, { |
1076 | atom_op_div, ATOM_ARG_REG0}, { |
1077 | atom_op_div, ATOM_ARG_PS1}, { |
1078 | atom_op_div, ATOM_ARG_WS2}, { |
1079 | atom_op_div, ATOM_ARG_FB3}, { |
1080 | atom_op_div, ATOM_ARG_PLL6}, { |
1081 | atom_op_div, ATOM_ARG_MC7}, { |
1082 | atom_op_add, ATOM_ARG_REG0}, { |
1083 | atom_op_add, ATOM_ARG_PS1}, { |
1084 | atom_op_add, ATOM_ARG_WS2}, { |
1085 | atom_op_add, ATOM_ARG_FB3}, { |
1086 | atom_op_add, ATOM_ARG_PLL6}, { |
1087 | atom_op_add, ATOM_ARG_MC7}, { |
1088 | atom_op_sub, ATOM_ARG_REG0}, { |
1089 | atom_op_sub, ATOM_ARG_PS1}, { |
1090 | atom_op_sub, ATOM_ARG_WS2}, { |
1091 | atom_op_sub, ATOM_ARG_FB3}, { |
1092 | atom_op_sub, ATOM_ARG_PLL6}, { |
1093 | atom_op_sub, ATOM_ARG_MC7}, { |
1094 | atom_op_setport, ATOM_PORT_ATI0}, { |
1095 | atom_op_setport, ATOM_PORT_PCI1}, { |
1096 | atom_op_setport, ATOM_PORT_SYSIO2}, { |
1097 | atom_op_setregblock, 0}, { |
1098 | atom_op_setfbbase, 0}, { |
1099 | atom_op_compare, ATOM_ARG_REG0}, { |
1100 | atom_op_compare, ATOM_ARG_PS1}, { |
1101 | atom_op_compare, ATOM_ARG_WS2}, { |
1102 | atom_op_compare, ATOM_ARG_FB3}, { |
1103 | atom_op_compare, ATOM_ARG_PLL6}, { |
1104 | atom_op_compare, ATOM_ARG_MC7}, { |
1105 | atom_op_switch, 0}, { |
1106 | atom_op_jump, ATOM_COND_ALWAYS2}, { |
1107 | atom_op_jump, ATOM_COND_EQUAL5}, { |
1108 | atom_op_jump, ATOM_COND_BELOW3}, { |
1109 | atom_op_jump, ATOM_COND_ABOVE0}, { |
1110 | atom_op_jump, ATOM_COND_BELOWOREQUAL4}, { |
1111 | atom_op_jump, ATOM_COND_ABOVEOREQUAL1}, { |
1112 | atom_op_jump, ATOM_COND_NOTEQUAL6}, { |
1113 | atom_op_test, ATOM_ARG_REG0}, { |
1114 | atom_op_test, ATOM_ARG_PS1}, { |
1115 | atom_op_test, ATOM_ARG_WS2}, { |
1116 | atom_op_test, ATOM_ARG_FB3}, { |
1117 | atom_op_test, ATOM_ARG_PLL6}, { |
1118 | atom_op_test, ATOM_ARG_MC7}, { |
1119 | atom_op_delay, ATOM_UNIT_MILLISEC1}, { |
1120 | atom_op_delay, ATOM_UNIT_MICROSEC0}, { |
1121 | atom_op_calltable, 0}, { |
1122 | atom_op_repeat, 0}, { |
1123 | atom_op_clear, ATOM_ARG_REG0}, { |
1124 | atom_op_clear, ATOM_ARG_PS1}, { |
1125 | atom_op_clear, ATOM_ARG_WS2}, { |
1126 | atom_op_clear, ATOM_ARG_FB3}, { |
1127 | atom_op_clear, ATOM_ARG_PLL6}, { |
1128 | atom_op_clear, ATOM_ARG_MC7}, { |
1129 | atom_op_nop, 0}, { |
1130 | atom_op_eot, 0}, { |
1131 | atom_op_mask, ATOM_ARG_REG0}, { |
1132 | atom_op_mask, ATOM_ARG_PS1}, { |
1133 | atom_op_mask, ATOM_ARG_WS2}, { |
1134 | atom_op_mask, ATOM_ARG_FB3}, { |
1135 | atom_op_mask, ATOM_ARG_PLL6}, { |
1136 | atom_op_mask, ATOM_ARG_MC7}, { |
1137 | atom_op_postcard, 0}, { |
1138 | atom_op_beep, 0}, { |
1139 | atom_op_savereg, 0}, { |
1140 | atom_op_restorereg, 0}, { |
1141 | atom_op_setdatablock, 0}, { |
1142 | atom_op_xor, ATOM_ARG_REG0}, { |
1143 | atom_op_xor, ATOM_ARG_PS1}, { |
1144 | atom_op_xor, ATOM_ARG_WS2}, { |
1145 | atom_op_xor, ATOM_ARG_FB3}, { |
1146 | atom_op_xor, ATOM_ARG_PLL6}, { |
1147 | atom_op_xor, ATOM_ARG_MC7}, { |
1148 | atom_op_shl, ATOM_ARG_REG0}, { |
1149 | atom_op_shl, ATOM_ARG_PS1}, { |
1150 | atom_op_shl, ATOM_ARG_WS2}, { |
1151 | atom_op_shl, ATOM_ARG_FB3}, { |
1152 | atom_op_shl, ATOM_ARG_PLL6}, { |
1153 | atom_op_shl, ATOM_ARG_MC7}, { |
1154 | atom_op_shr, ATOM_ARG_REG0}, { |
1155 | atom_op_shr, ATOM_ARG_PS1}, { |
1156 | atom_op_shr, ATOM_ARG_WS2}, { |
1157 | atom_op_shr, ATOM_ARG_FB3}, { |
1158 | atom_op_shr, ATOM_ARG_PLL6}, { |
1159 | atom_op_shr, ATOM_ARG_MC7}, { |
1160 | atom_op_debug, 0},}; |
1161 | |
1162 | static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params) |
1163 | { |
1164 | int base = CU16(ctx->cmd_table + 4 + 2 * index)get_u16(ctx->bios, (ctx->cmd_table + 4 + 2 * index)); |
1165 | int len, ws, ps, ptr; |
1166 | unsigned char op; |
1167 | atom_exec_context ectx; |
1168 | int ret = 0; |
1169 | |
1170 | if (!base) |
1171 | return -EINVAL22; |
1172 | |
1173 | len = CU16(base + ATOM_CT_SIZE_PTR)get_u16(ctx->bios, (base + 0)); |
1174 | ws = CU8(base + ATOM_CT_WS_PTR)get_u8(ctx->bios, (base + 4)); |
1175 | ps = CU8(base + ATOM_CT_PS_PTR)get_u8(ctx->bios, (base + 5)) & ATOM_CT_PS_MASK0x7F; |
1176 | ptr = base + ATOM_CT_CODE_PTR6; |
1177 | |
1178 | SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk(">> execute %04X (len %d, WS %d, PS %d)\n", base , len, ws, ps); } while (0); |
1179 | |
1180 | ectx.ctx = ctx; |
1181 | ectx.ps_shift = ps / 4; |
1182 | ectx.start = base; |
1183 | ectx.ps = params; |
1184 | ectx.abort = false0; |
1185 | ectx.last_jump = 0; |
1186 | if (ws) |
1187 | ectx.ws = kcalloc(4, ws, GFP_KERNEL(0x0001 | 0x0004)); |
1188 | else |
1189 | ectx.ws = NULL((void *)0); |
1190 | |
1191 | debug_depth++; |
1192 | while (1) { |
1193 | op = CU8(ptr++)get_u8(ctx->bios, (ptr++)); |
1194 | if (op < ATOM_OP_NAMES_CNT123) |
1195 | SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk("%s @ 0x%04X\n", atom_op_names[op], ptr - 1); } while (0); |
1196 | else |
1197 | SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1)do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk("[%d] @ 0x%04X\n", op, ptr - 1); } while (0); |
1198 | if (ectx.abort) { |
1199 | DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",__drm_err("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n" , base, len, ws, ps, ptr - 1) |
1200 | base, len, ws, ps, ptr - 1)__drm_err("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n" , base, len, ws, ps, ptr - 1); |
1201 | ret = -EINVAL22; |
1202 | goto free; |
1203 | } |
1204 | |
1205 | if (op < ATOM_OP_CNT123 && op > 0) |
1206 | opcode_table[op].func(&ectx, &ptr, |
1207 | opcode_table[op].arg); |
1208 | else |
1209 | break; |
1210 | |
1211 | if (op == ATOM_OP_EOT91) |
1212 | break; |
1213 | } |
1214 | debug_depth--; |
1215 | SDEBUG("<<\n")do if (atom_debug) { printk("\0017"); debug_print_spaces(debug_depth ); printk("<<\n"); } while (0); |
1216 | |
1217 | free: |
1218 | kfree(ectx.ws); |
1219 | return ret; |
1220 | } |
1221 | |
1222 | int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params) |
1223 | { |
1224 | int r; |
1225 | |
1226 | mutex_lock(&ctx->mutex)rw_enter_write(&ctx->mutex); |
1227 | /* reset data block */ |
1228 | ctx->data_block = 0; |
1229 | /* reset reg block */ |
1230 | ctx->reg_block = 0; |
1231 | /* reset fb window */ |
1232 | ctx->fb_base = 0; |
1233 | /* reset io mode */ |
1234 | ctx->io_mode = ATOM_IO_MM0; |
1235 | /* reset divmul */ |
1236 | ctx->divmul[0] = 0; |
1237 | ctx->divmul[1] = 0; |
1238 | r = atom_execute_table_locked(ctx, index, params); |
1239 | mutex_unlock(&ctx->mutex)rw_exit_write(&ctx->mutex); |
1240 | return r; |
1241 | } |
1242 | |
1243 | int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) |
1244 | { |
1245 | int r; |
1246 | mutex_lock(&ctx->scratch_mutex)rw_enter_write(&ctx->scratch_mutex); |
1247 | r = atom_execute_table_scratch_unlocked(ctx, index, params); |
1248 | mutex_unlock(&ctx->scratch_mutex)rw_exit_write(&ctx->scratch_mutex); |
1249 | return r; |
1250 | } |
1251 | |
1252 | static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 }; |
1253 | |
1254 | static void atom_index_iio(struct atom_context *ctx, int base) |
1255 | { |
1256 | ctx->iio = kzalloc(2 * 256, GFP_KERNEL(0x0001 | 0x0004)); |
1257 | if (!ctx->iio) |
1258 | return; |
1259 | while (CU8(base)get_u8(ctx->bios, (base)) == ATOM_IIO_START1) { |
1260 | ctx->iio[CU8(base + 1)get_u8(ctx->bios, (base + 1))] = base + 2; |
1261 | base += 2; |
1262 | while (CU8(base)get_u8(ctx->bios, (base)) != ATOM_IIO_END9) |
1263 | base += atom_iio_len[CU8(base)get_u8(ctx->bios, (base))]; |
1264 | base += 3; |
1265 | } |
1266 | } |
1267 | |
1268 | struct atom_context *atom_parse(struct card_info *card, void *bios) |
1269 | { |
1270 | int base; |
1271 | struct atom_context *ctx = |
1272 | kzalloc(sizeof(struct atom_context), GFP_KERNEL(0x0001 | 0x0004)); |
1273 | char *str; |
1274 | char name[512]; |
1275 | int i; |
1276 | |
1277 | if (!ctx) |
1278 | return NULL((void *)0); |
1279 | |
1280 | ctx->card = card; |
1281 | ctx->bios = bios; |
1282 | |
1283 | if (CU16(0)get_u16(ctx->bios, (0)) != ATOM_BIOS_MAGIC0xAA55) { |
1284 | pr_info("Invalid BIOS magic\n")do { } while(0); |
1285 | kfree(ctx); |
1286 | return NULL((void *)0); |
1287 | } |
1288 | if (strncmp |
1289 | (CSTR(ATOM_ATI_MAGIC_PTR)(((char *)(ctx->bios))+(0x30)), ATOM_ATI_MAGIC" 761295520", |
1290 | strlen(ATOM_ATI_MAGIC" 761295520"))) { |
1291 | pr_info("Invalid ATI magic\n")do { } while(0); |
1292 | kfree(ctx); |
1293 | return NULL((void *)0); |
1294 | } |
1295 | |
1296 | base = CU16(ATOM_ROM_TABLE_PTR)get_u16(ctx->bios, (0x48)); |
1297 | if (strncmp |
1298 | (CSTR(base + ATOM_ROM_MAGIC_PTR)(((char *)(ctx->bios))+(base + 4)), ATOM_ROM_MAGIC"ATOM", |
1299 | strlen(ATOM_ROM_MAGIC"ATOM"))) { |
1300 | pr_info("Invalid ATOM magic\n")do { } while(0); |
1301 | kfree(ctx); |
1302 | return NULL((void *)0); |
1303 | } |
1304 | |
1305 | ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR)get_u16(ctx->bios, (base + 0x1E)); |
1306 | ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR)get_u16(ctx->bios, (base + 0x20)); |
1307 | atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR)get_u16(ctx->bios, (ctx->data_table + 0x32)) + 4); |
1308 | if (!ctx->iio) { |
1309 | atom_destroy(ctx); |
1310 | return NULL((void *)0); |
1311 | } |
1312 | |
1313 | str = CSTR(CU16(base + ATOM_ROM_MSG_PTR))(((char *)(ctx->bios))+(get_u16(ctx->bios, (base + 0x10 )))); |
1314 | while (*str && ((*str == '\n') || (*str == '\r'))) |
1315 | str++; |
1316 | /* name string isn't always 0 terminated */ |
1317 | for (i = 0; i < 511; i++) { |
1318 | name[i] = str[i]; |
1319 | if (name[i] < '.' || name[i] > 'z') { |
1320 | name[i] = 0; |
1321 | break; |
1322 | } |
1323 | } |
1324 | pr_info("ATOM BIOS: %s\n", name)do { } while(0); |
1325 | |
1326 | return ctx; |
1327 | } |
1328 | |
1329 | int atom_asic_init(struct atom_context *ctx) |
1330 | { |
1331 | struct radeon_device *rdev = ctx->card->dev->dev_private; |
1332 | int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR)get_u16(ctx->bios, (ctx->data_table + 0xC)); |
1333 | uint32_t ps[16]; |
1334 | int ret; |
1335 | |
1336 | memset(ps, 0, 64)__builtin_memset((ps), (0), (64)); |
1337 | |
1338 | ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR))((__uint32_t)(get_u32(ctx->bios, (hwi + 8)))); |
1339 | ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR))((__uint32_t)(get_u32(ctx->bios, (hwi + 0xC)))); |
1340 | if (!ps[0] || !ps[1]) |
1341 | return 1; |
1342 | |
1343 | if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT)get_u16(ctx->bios, (ctx->cmd_table + 4 + 2 * 0))) |
1344 | return 1; |
1345 | ret = atom_execute_table(ctx, ATOM_CMD_INIT0, ps); |
1346 | if (ret) |
1347 | return ret; |
1348 | |
1349 | memset(ps, 0, 64)__builtin_memset((ps), (0), (64)); |
1350 | |
1351 | if (rdev->family < CHIP_R600) { |
1352 | if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL)get_u16(ctx->bios, (ctx->cmd_table + 4 + 2 * 0x39))) |
1353 | atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL0x39, ps); |
1354 | } |
1355 | return ret; |
1356 | } |
1357 | |
1358 | void atom_destroy(struct atom_context *ctx) |
1359 | { |
1360 | kfree(ctx->iio); |
1361 | kfree(ctx); |
1362 | } |
1363 | |
1364 | bool_Bool atom_parse_data_header(struct atom_context *ctx, int index, |
1365 | uint16_t * size, uint8_t * frev, uint8_t * crev, |
1366 | uint16_t * data_start) |
1367 | { |
1368 | int offset = index * 2 + 4; |
1369 | int idx = CU16(ctx->data_table + offset)get_u16(ctx->bios, (ctx->data_table + offset)); |
1370 | u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4); |
1371 | |
1372 | if (!mdt[index]) |
1373 | return false0; |
1374 | |
1375 | if (size) |
1376 | *size = CU16(idx)get_u16(ctx->bios, (idx)); |
1377 | if (frev) |
1378 | *frev = CU8(idx + 2)get_u8(ctx->bios, (idx + 2)); |
1379 | if (crev) |
1380 | *crev = CU8(idx + 3)get_u8(ctx->bios, (idx + 3)); |
1381 | *data_start = idx; |
1382 | return true1; |
1383 | } |
1384 | |
1385 | bool_Bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev, |
1386 | uint8_t * crev) |
1387 | { |
1388 | int offset = index * 2 + 4; |
1389 | int idx = CU16(ctx->cmd_table + offset)get_u16(ctx->bios, (ctx->cmd_table + offset)); |
1390 | u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4); |
1391 | |
1392 | if (!mct[index]) |
1393 | return false0; |
1394 | |
1395 | if (frev) |
1396 | *frev = CU8(idx + 2)get_u8(ctx->bios, (idx + 2)); |
1397 | if (crev) |
1398 | *crev = CU8(idx + 3)get_u8(ctx->bios, (idx + 3)); |
1399 | return true1; |
1400 | } |
1401 | |
1402 | int atom_allocate_fb_scratch(struct atom_context *ctx) |
1403 | { |
1404 | int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware)(((char*)(&((ATOM_MASTER_LIST_OF_DATA_TABLES*)0)->VRAM_UsageByFirmware )-(char*)0)/sizeof(USHORT)); |
1405 | uint16_t data_offset; |
1406 | int usage_bytes = 0; |
1407 | struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage; |
1408 | |
1409 | if (atom_parse_data_header(ctx, index, NULL((void *)0), NULL((void *)0), NULL((void *)0), &data_offset)) { |
1410 | firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset); |
1411 | |
1412 | DRM_DEBUG("atom firmware requested %08x %dkb\n",__drm_dbg(DRM_UT_CORE, "atom firmware requested %08x %dkb\n", ((__uint32_t)(firmware_usage->asFirmwareVramReserveInfo[0 ].ulStartAddrUsedByFirmware)), ((__uint16_t)(firmware_usage-> asFirmwareVramReserveInfo[0].usFirmwareUseInKb))) |
1413 | le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),__drm_dbg(DRM_UT_CORE, "atom firmware requested %08x %dkb\n", ((__uint32_t)(firmware_usage->asFirmwareVramReserveInfo[0 ].ulStartAddrUsedByFirmware)), ((__uint16_t)(firmware_usage-> asFirmwareVramReserveInfo[0].usFirmwareUseInKb))) |
1414 | le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb))__drm_dbg(DRM_UT_CORE, "atom firmware requested %08x %dkb\n", ((__uint32_t)(firmware_usage->asFirmwareVramReserveInfo[0 ].ulStartAddrUsedByFirmware)), ((__uint16_t)(firmware_usage-> asFirmwareVramReserveInfo[0].usFirmwareUseInKb))); |
1415 | |
1416 | usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb)((__uint16_t)(firmware_usage->asFirmwareVramReserveInfo[0] .usFirmwareUseInKb)) * 1024; |
1417 | } |
1418 | ctx->scratch_size_bytes = 0; |
1419 | if (usage_bytes == 0) |
1420 | usage_bytes = 20 * 1024; |
1421 | /* allocate some scratch memory */ |
1422 | ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL(0x0001 | 0x0004)); |
1423 | if (!ctx->scratch) |
1424 | return -ENOMEM12; |
1425 | ctx->scratch_size_bytes = usage_bytes; |
1426 | return 0; |
1427 | } |