Bug Summary

File:dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c
Warning:line 738, column 20
Value stored to 'tmp_h_init_phase_chroma' during its initialization is never read

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name dcn20_dwb_scl.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/pci/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c
1/*
2 * Copyright 2012-17 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include "reg_helper.h"
27#include "fixed31_32.h"
28#include "resource.h"
29#include "dwb.h"
30#include "dcn20_dwb.h"
31
32#define NUM_PHASES16 16
33#define HORZ_MAX_TAPS12 12
34#define VERT_MAX_TAPS12 12
35
36#define REG(reg)dwbc20->dwbc_regs->reg\
37 dwbc20->dwbc_regs->reg
38
39#define CTXdwbc20->base.ctx \
40 dwbc20->base.ctx
41
42#undef FN
43#define FN(reg_name, field_name)dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->
field_name \
44 dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name
45
46#define TO_DCN20_DWBC(dwbc_base)({ const __typeof( ((struct dcn20_dwbc *)0)->base ) *__mptr
= (dwbc_base); (struct dcn20_dwbc *)( (char *)__mptr - __builtin_offsetof
(struct dcn20_dwbc, base) );}) \
47 container_of(dwbc_base, struct dcn20_dwbc, base)({ const __typeof( ((struct dcn20_dwbc *)0)->base ) *__mptr
= (dwbc_base); (struct dcn20_dwbc *)( (char *)__mptr - __builtin_offsetof
(struct dcn20_dwbc, base) );})
48
49
50static const uint16_t filter_3tap_16p_upscale[27] = {
51 2048, 2048, 0,
52 1708, 2424, 16348,
53 1372, 2796, 16308,
54 1056, 3148, 16272,
55 768, 3464, 16244,
56 512, 3728, 16236,
57 296, 3928, 16252,
58 124, 4052, 16296,
59 0, 4096, 0
60};
61
62static const uint16_t filter_3tap_16p_117[27] = {
63 2048, 2048, 0,
64 1824, 2276, 16376,
65 1600, 2496, 16380,
66 1376, 2700, 16,
67 1156, 2880, 52,
68 948, 3032, 108,
69 756, 3144, 192,
70 580, 3212, 296,
71 428, 3236, 428
72};
73
74static const uint16_t filter_3tap_16p_150[27] = {
75 2048, 2048, 0,
76 1872, 2184, 36,
77 1692, 2308, 88,
78 1516, 2420, 156,
79 1340, 2516, 236,
80 1168, 2592, 328,
81 1004, 2648, 440,
82 844, 2684, 560,
83 696, 2696, 696
84};
85
86static const uint16_t filter_3tap_16p_183[27] = {
87 2048, 2048, 0,
88 1892, 2104, 92,
89 1744, 2152, 196,
90 1592, 2196, 300,
91 1448, 2232, 412,
92 1304, 2256, 528,
93 1168, 2276, 648,
94 1032, 2288, 772,
95 900, 2292, 900
96};
97
98static const uint16_t filter_4tap_16p_upscale[36] = {
99 0, 4096, 0, 0,
100 16240, 4056, 180, 16380,
101 16136, 3952, 404, 16364,
102 16072, 3780, 664, 16344,
103 16040, 3556, 952, 16312,
104 16036, 3284, 1268, 16272,
105 16052, 2980, 1604, 16224,
106 16084, 2648, 1952, 16176,
107 16128, 2304, 2304, 16128
108};
109
110static const uint16_t filter_4tap_16p_117[36] = {
111 428, 3236, 428, 0,
112 276, 3232, 604, 16364,
113 148, 3184, 800, 16340,
114 44, 3104, 1016, 16312,
115 16344, 2984, 1244, 16284,
116 16284, 2832, 1488, 16256,
117 16244, 2648, 1732, 16236,
118 16220, 2440, 1976, 16220,
119 16212, 2216, 2216, 16212
120};
121
122static const uint16_t filter_4tap_16p_150[36] = {
123 696, 2700, 696, 0,
124 560, 2700, 848, 16364,
125 436, 2676, 1008, 16348,
126 328, 2628, 1180, 16336,
127 232, 2556, 1356, 16328,
128 152, 2460, 1536, 16328,
129 84, 2344, 1716, 16332,
130 28, 2208, 1888, 16348,
131 16376, 2052, 2052, 16376
132};
133
134static const uint16_t filter_4tap_16p_183[36] = {
135 940, 2208, 940, 0,
136 832, 2200, 1052, 4,
137 728, 2180, 1164, 16,
138 628, 2148, 1280, 36,
139 536, 2100, 1392, 60,
140 448, 2044, 1504, 92,
141 368, 1976, 1612, 132,
142 296, 1900, 1716, 176,
143 232, 1812, 1812, 232
144};
145
146static const uint16_t filter_5tap_16p_upscale[45] = {
147 15936, 2496, 2496, 15936, 0,
148 15992, 2128, 2832, 15896, 12,
149 16056, 1760, 3140, 15876, 24,
150 16120, 1404, 3420, 15876, 36,
151 16188, 1060, 3652, 15908, 44,
152 16248, 744, 3844, 15972, 44,
153 16304, 460, 3980, 16072, 40,
154 16348, 212, 4064, 16208, 24,
155 0, 0, 4096, 0, 0,
156};
157
158static const uint16_t filter_5tap_16p_117[45] = {
159 16056, 2372, 2372, 16056, 0,
160 16052, 2124, 2600, 16076, 0,
161 16060, 1868, 2808, 16120, 0,
162 16080, 1612, 2992, 16180, 16376,
163 16112, 1356, 3144, 16268, 16364,
164 16144, 1108, 3268, 16376, 16344,
165 16184, 872, 3356, 124, 16320,
166 16220, 656, 3412, 276, 16292,
167 16256, 456, 3428, 456, 16256,
168};
169
170static const uint16_t filter_5tap_16p_150[45] = {
171 16368, 2064, 2064, 16368, 0,
172 16316, 1924, 2204, 44, 16372,
173 16280, 1772, 2328, 116, 16356,
174 16256, 1616, 2440, 204, 16340,
175 16240, 1456, 2536, 304, 16320,
176 16232, 1296, 2612, 416, 16300,
177 16232, 1132, 2664, 544, 16284,
178 16240, 976, 2700, 680, 16264,
179 16248, 824, 2708, 824, 16248,
180};
181
182static const uint16_t filter_5tap_16p_183[45] = {
183 228, 1816, 1816, 228, 0,
184 168, 1728, 1904, 300, 16372,
185 116, 1632, 1988, 376, 16360,
186 72, 1528, 2060, 460, 16348,
187 36, 1424, 2120, 552, 16340,
188 4, 1312, 2168, 652, 16336,
189 16368, 1200, 2204, 752, 16332,
190 16352, 1084, 2224, 860, 16332,
191 16340, 972, 2232, 972, 16340,
192};
193
194static const uint16_t filter_6tap_16p_upscale[54] = {
195 0, 0, 4092, 0, 0, 0,
196 44, 16188, 4064, 228, 16324, 0,
197 80, 16036, 3980, 492, 16256, 4,
198 108, 15916, 3844, 788, 16184, 16,
199 120, 15836, 3656, 1108, 16104, 28,
200 128, 15792, 3420, 1448, 16024, 44,
201 124, 15776, 3144, 1800, 15948, 64,
202 112, 15792, 2836, 2152, 15880, 80,
203 100, 15828, 2504, 2504, 15828, 100,
204};
205
206static const uint16_t filter_6tap_16p_117[54] = {
207 16168, 476, 3568, 476, 16168, 0,
208 16216, 280, 3540, 692, 16116, 8,
209 16264, 104, 3472, 924, 16068, 16,
210 16304, 16340, 3372, 1168, 16024, 28,
211 16344, 16212, 3236, 1424, 15988, 36,
212 16372, 16112, 3072, 1680, 15956, 44,
213 12, 16036, 2880, 1936, 15940, 48,
214 28, 15984, 2668, 2192, 15936, 48,
215 40, 15952, 2436, 2436, 15952, 40,
216};
217
218static const uint16_t filter_6tap_16p_150[54] = {
219 16148, 920, 2724, 920, 16148, 0,
220 16156, 768, 2712, 1072, 16144, 0,
221 16172, 628, 2684, 1232, 16148, 16380,
222 16192, 492, 2632, 1388, 16160, 16372,
223 16212, 368, 2564, 1548, 16180, 16364,
224 16232, 256, 2480, 1704, 16212, 16352,
225 16256, 156, 2380, 1856, 16256, 16336,
226 16276, 64, 2268, 2004, 16308, 16320,
227 16300, 16372, 2140, 2140, 16372, 16300,
228};
229
230static const uint16_t filter_6tap_16p_183[54] = {
231 16296, 1032, 2196, 1032, 16296, 0,
232 16284, 924, 2196, 1144, 16320, 16376,
233 16272, 820, 2180, 1256, 16348, 16364,
234 16268, 716, 2156, 1364, 16380, 16352,
235 16264, 620, 2116, 1472, 36, 16340,
236 16268, 524, 2068, 1576, 88, 16328,
237 16272, 436, 2008, 1680, 144, 16316,
238 16280, 352, 1940, 1772, 204, 16304,
239 16292, 276, 1860, 1860, 276, 16292,
240};
241
242static const uint16_t filter_7tap_16p_upscale[63] = {
243 176, 15760, 2488, 2488, 15760, 176, 0,
244 160, 15812, 2152, 2816, 15728, 192, 16376,
245 136, 15884, 1812, 3124, 15720, 196, 16368,
246 108, 15964, 1468, 3400, 15740, 196, 16364,
247 84, 16048, 1132, 3640, 15792, 180, 16360,
248 56, 16140, 812, 3832, 15884, 152, 16360,
249 32, 16228, 512, 3976, 16012, 116, 16364,
250 12, 16308, 240, 4064, 16180, 60, 16372,
251 0, 0, 0, 4096, 0, 0, 0,
252};
253
254static const uint16_t filter_7tap_16p_117[63] = {
255 92, 15868, 2464, 2464, 15868, 92, 0,
256 108, 15852, 2216, 2700, 15904, 72, 0,
257 112, 15856, 1960, 2916, 15964, 44, 0,
258 116, 15876, 1696, 3108, 16048, 8, 8,
259 112, 15908, 1428, 3268, 16156, 16348, 12,
260 104, 15952, 1168, 3400, 16288, 16300, 24,
261 92, 16004, 916, 3496, 64, 16244, 36,
262 80, 16064, 676, 3556, 248, 16184, 48,
263 64, 16124, 452, 3576, 452, 16124, 64,
264};
265
266static const uint16_t filter_7tap_16p_150[63] = {
267 16224, 16380, 2208, 2208, 16380, 16224, 0,
268 16252, 16304, 2072, 2324, 84, 16196, 4,
269 16276, 16240, 1924, 2432, 184, 16172, 8,
270 16300, 16184, 1772, 2524, 296, 16144, 12,
271 16324, 16144, 1616, 2600, 416, 16124, 12,
272 16344, 16112, 1456, 2660, 548, 16104, 12,
273 16360, 16092, 1296, 2704, 688, 16088, 12,
274 16372, 16080, 1140, 2732, 832, 16080, 8,
275 0, 16076, 984, 2740, 984, 16076, 0,
276};
277
278static const uint16_t filter_7tap_16p_183[63] = {
279 16216, 324, 1884, 1884, 324, 16216, 0,
280 16228, 248, 1804, 1960, 408, 16212, 16380,
281 16240, 176, 1716, 2028, 496, 16208, 16376,
282 16252, 112, 1624, 2084, 588, 16208, 16372,
283 16264, 56, 1524, 2132, 684, 16212, 16364,
284 16280, 4, 1424, 2168, 788, 16220, 16356,
285 16292, 16344, 1320, 2196, 892, 16232, 16344,
286 16308, 16308, 1212, 2212, 996, 16252, 16332,
287 16320, 16276, 1104, 2216, 1104, 16276, 16320,
288};
289
290static const uint16_t filter_8tap_16p_upscale[72] = {
291 0, 0, 0, 4096, 0, 0, 0, 0,
292 16360, 76, 16172, 4064, 244, 16296, 24, 16380,
293 16340, 136, 15996, 3980, 524, 16204, 56, 16380,
294 16328, 188, 15860, 3844, 828, 16104, 92, 16372,
295 16320, 224, 15760, 3656, 1156, 16008, 128, 16368,
296 16320, 248, 15696, 3428, 1496, 15912, 160, 16360,
297 16320, 256, 15668, 3156, 1844, 15828, 192, 16348,
298 16324, 256, 15672, 2856, 2192, 15756, 220, 16340,
299 16332, 244, 15704, 2532, 2532, 15704, 244, 16332,
300};
301
302static const uint16_t filter_8tap_16p_117[72] = {
303 116, 16100, 428, 3564, 428, 16100, 116, 0,
304 96, 16168, 220, 3548, 656, 16032, 136, 16376,
305 76, 16236, 32, 3496, 904, 15968, 152, 16372,
306 56, 16300, 16252, 3408, 1164, 15908, 164, 16368,
307 36, 16360, 16116, 3284, 1428, 15856, 172, 16364,
308 20, 28, 16000, 3124, 1700, 15820, 176, 16364,
309 4, 76, 15912, 2940, 1972, 15800, 172, 16364,
310 16380, 112, 15848, 2724, 2236, 15792, 160, 16364,
311 16372, 140, 15812, 2488, 2488, 15812, 140, 16372,
312};
313
314static const uint16_t filter_8tap_16p_150[72] = {
315 16380, 16020, 1032, 2756, 1032, 16020, 16380, 0,
316 12, 16020, 876, 2744, 1184, 16032, 16364, 4,
317 24, 16028, 728, 2716, 1344, 16052, 16340, 8,
318 36, 16040, 584, 2668, 1500, 16080, 16316, 16,
319 40, 16060, 448, 2608, 1652, 16120, 16288, 20,
320 44, 16080, 320, 2528, 1804, 16168, 16260, 28,
321 48, 16108, 204, 2436, 1948, 16232, 16228, 32,
322 44, 16136, 100, 2328, 2084, 16304, 16200, 40,
323 44, 16168, 4, 2212, 2212, 4, 16168, 44,
324};
325
326static const uint16_t filter_8tap_16p_183[72] = {
327 16264, 16264, 1164, 2244, 1164, 16264, 16264, 0,
328 16280, 16232, 1056, 2236, 1268, 16300, 16248, 0,
329 16296, 16204, 948, 2220, 1372, 16348, 16232, 0,
330 16312, 16184, 844, 2192, 1472, 12, 16216, 4,
331 16328, 16172, 740, 2156, 1572, 72, 16200, 0,
332 16340, 16160, 640, 2108, 1668, 136, 16188, 0,
333 16352, 16156, 544, 2052, 1756, 204, 16176, 16380,
334 16360, 16156, 452, 1988, 1840, 280, 16164, 16376,
335 16368, 16160, 364, 1920, 1920, 364, 16160, 16368,
336};
337
338static const uint16_t filter_9tap_16p_upscale[81] = {
339 16284, 296, 15660, 2572, 2572, 15660, 296, 16284, 0,
340 16296, 272, 15712, 2228, 2896, 15632, 304, 16276, 4,
341 16308, 240, 15788, 1876, 3192, 15632, 304, 16276, 4,
342 16320, 204, 15876, 1520, 3452, 15664, 288, 16280, 8,
343 16336, 164, 15976, 1176, 3676, 15732, 260, 16288, 12,
344 16348, 120, 16080, 844, 3856, 15840, 216, 16300, 12,
345 16364, 76, 16188, 532, 3988, 15984, 156, 16324, 8,
346 16376, 36, 16288, 252, 4068, 16164, 84, 16352, 4,
347 0, 0, 0, 0, 4096, 0, 0, 0, 0,
348};
349
350static const uint16_t filter_9tap_16p_117[81] = {
351 16356, 172, 15776, 2504, 2504, 15776, 172, 16356, 0,
352 16344, 200, 15756, 2252, 2740, 15816, 136, 16372, 16380,
353 16336, 216, 15756, 1988, 2956, 15884, 92, 8, 16380,
354 16332, 224, 15780, 1720, 3144, 15976, 40, 28, 16376,
355 16328, 224, 15816, 1448, 3304, 16096, 16364, 52, 16372,
356 16328, 216, 15868, 1180, 3432, 16240, 16296, 80, 16364,
357 16332, 200, 15928, 916, 3524, 24, 16224, 108, 16356,
358 16336, 184, 15996, 668, 3580, 220, 16148, 132, 16352,
359 16344, 160, 16072, 436, 3600, 436, 16072, 160, 16344,
360};
361
362static const uint16_t filter_9tap_16p_150[81] = {
363 84, 16128, 0, 2216, 2216, 0, 16128, 84, 0,
364 80, 16160, 16296, 2088, 2332, 100, 16092, 84, 0,
365 76, 16196, 16220, 1956, 2432, 208, 16064, 80, 0,
366 72, 16232, 16152, 1812, 2524, 328, 16036, 76, 4,
367 64, 16264, 16096, 1664, 2600, 460, 16012, 64, 8,
368 56, 16300, 16052, 1508, 2656, 596, 15996, 52, 12,
369 48, 16328, 16020, 1356, 2700, 740, 15984, 36, 20,
370 40, 16356, 15996, 1196, 2728, 888, 15980, 20, 24,
371 32, 0, 15984, 1044, 2736, 1044, 15984, 0, 32,
372};
373
374static const uint16_t filter_9tap_16p_183[81] = {
375 16356, 16112, 388, 1952, 1952, 388, 16112, 16356, 0,
376 16368, 16116, 304, 1876, 2020, 480, 16112, 16344, 4,
377 16376, 16124, 224, 1792, 2080, 576, 16116, 16328, 8,
378 0, 16136, 148, 1700, 2132, 672, 16124, 16312, 8,
379 8, 16148, 80, 1604, 2176, 772, 16140, 16296, 12,
380 12, 16164, 16, 1504, 2208, 876, 16156, 16276, 16,
381 16, 16180, 16344, 1404, 2232, 980, 16184, 16256, 20,
382 20, 16200, 16296, 1300, 2244, 1088, 16212, 16240, 20,
383 20, 16220, 16252, 1196, 2252, 1196, 16252, 16220, 20,
384};
385
386static const uint16_t filter_10tap_16p_upscale[90] = {
387 0, 0, 0, 0, 4096, 0, 0, 0, 0, 0,
388 12, 16344, 88, 16160, 4068, 252, 16280, 44, 16368, 0,
389 24, 16308, 168, 15976, 3988, 540, 16176, 92, 16348, 0,
390 32, 16280, 236, 15828, 3852, 852, 16064, 140, 16328, 4,
391 36, 16260, 284, 15720, 3672, 1184, 15956, 188, 16308, 8,
392 36, 16244, 320, 15648, 3448, 1528, 15852, 236, 16288, 12,
393 36, 16240, 336, 15612, 3184, 1880, 15764, 276, 16272, 20,
394 32, 16240, 340, 15608, 2888, 2228, 15688, 308, 16256, 24,
395 28, 16244, 332, 15636, 2568, 2568, 15636, 332, 16244, 28,
396};
397
398static const uint16_t filter_10tap_16p_117[90] = {
399 16308, 196, 16048, 440, 3636, 440, 16048, 196, 16308, 0,
400 16316, 164, 16132, 220, 3612, 676, 15972, 220, 16300, 0,
401 16324, 132, 16212, 20, 3552, 932, 15900, 240, 16296, 4,
402 16336, 100, 16292, 16232, 3456, 1192, 15836, 256, 16296, 4,
403 16348, 68, 16364, 16084, 3324, 1464, 15784, 264, 16296, 8,
404 16356, 36, 48, 15960, 3164, 1736, 15748, 260, 16304, 4,
405 16364, 8, 108, 15864, 2972, 2008, 15728, 252, 16312, 4,
406 16372, 16368, 160, 15792, 2756, 2268, 15724, 228, 16328, 0,
407 16380, 16344, 200, 15748, 2520, 2520, 15748, 200, 16344, 16380,
408};
409
410static const uint16_t filter_10tap_16p_150[90] = {
411 64, 0, 15956, 1048, 2716, 1048, 15956, 0, 64, 0,
412 52, 24, 15952, 896, 2708, 1204, 15972, 16356, 72, 16380,
413 44, 48, 15952, 748, 2684, 1360, 16000, 16320, 84, 16380,
414 32, 68, 15964, 604, 2644, 1516, 16032, 16288, 92, 16376,
415 24, 88, 15980, 464, 2588, 1668, 16080, 16248, 100, 16376,
416 16, 100, 16004, 332, 2516, 1816, 16140, 16212, 108, 16376,
417 8, 108, 16032, 212, 2428, 1956, 16208, 16172, 112, 16376,
418 4, 116, 16060, 100, 2328, 2092, 16288, 16132, 116, 16380,
419 0, 116, 16096, 16380, 2216, 2216, 16380, 16096, 116, 0,
420};
421
422static const uint16_t filter_10tap_16p_183[90] = {
423 40, 16180, 16240, 1216, 2256, 1216, 16240, 16180, 40, 0,
424 44, 16204, 16200, 1112, 2252, 1320, 16288, 16160, 36, 0,
425 44, 16224, 16168, 1004, 2236, 1424, 16344, 16144, 28, 4,
426 44, 16248, 16136, 900, 2208, 1524, 16, 16124, 24, 8,
427 44, 16268, 16116, 796, 2176, 1620, 84, 16108, 12, 12,
428 40, 16288, 16100, 692, 2132, 1712, 156, 16096, 4, 16,
429 36, 16308, 16088, 592, 2080, 1796, 232, 16088, 16376, 20,
430 32, 16328, 16080, 496, 2020, 1876, 316, 16080, 16360, 24,
431 28, 16344, 16080, 404, 1952, 1952, 404, 16080, 16344, 28,
432};
433
434static const uint16_t filter_11tap_16p_upscale[99] = {
435 60, 16216, 356, 15620, 2556, 2556, 15620, 356, 16216, 60, 0,
436 52, 16224, 336, 15672, 2224, 2876, 15592, 368, 16208, 64, 16380,
437 44, 16244, 304, 15744, 1876, 3176, 15596, 364, 16212, 64, 16376,
438 36, 16264, 260, 15836, 1532, 3440, 15636, 340, 16220, 60, 16376,
439 28, 16288, 212, 15940, 1188, 3668, 15708, 304, 16236, 56, 16376,
440 20, 16312, 160, 16052, 856, 3848, 15820, 248, 16264, 48, 16376,
441 12, 16336, 104, 16164, 544, 3984, 15968, 180, 16296, 36, 16376,
442 4, 16360, 48, 16276, 256, 4068, 16160, 96, 16336, 16, 16380,
443 0, 0, 0, 0, 0, 4096, 0, 0, 0, 0, 0,
444};
445
446static const uint16_t filter_11tap_16p_117[99] = {
447 16380, 16332, 220, 15728, 2536, 2536, 15728, 220, 16332, 16380, 0,
448 4, 16308, 256, 15704, 2280, 2768, 15772, 176, 16360, 16368, 0,
449 12, 16292, 280, 15704, 2016, 2984, 15848, 120, 8, 16356, 0,
450 20, 16276, 292, 15724, 1744, 3172, 15948, 56, 40, 16340, 4,
451 24, 16268, 292, 15760, 1468, 3328, 16072, 16368, 80, 16324, 8,
452 24, 16264, 288, 15816, 1196, 3456, 16224, 16288, 116, 16312, 12,
453 24, 16264, 272, 15880, 932, 3548, 16, 16208, 152, 16296, 16,
454 24, 16268, 248, 15956, 676, 3604, 216, 16120, 188, 16284, 20,
455 24, 16276, 220, 16036, 436, 3624, 436, 16036, 220, 16276, 24,
456};
457
458static const uint16_t filter_11tap_16p_150[99] = {
459 0, 144, 16072, 0, 2212, 2212, 0, 16072, 144, 0, 0,
460 16376, 144, 16112, 16288, 2092, 2324, 104, 16036, 140, 8, 16380,
461 16368, 144, 16152, 16204, 1960, 2424, 216, 16004, 132, 16, 16376,
462 16364, 140, 16192, 16132, 1820, 2512, 340, 15976, 116, 28, 16376,
463 16364, 132, 16232, 16072, 1676, 2584, 476, 15952, 100, 40, 16372,
464 16360, 124, 16272, 16020, 1528, 2644, 612, 15936, 80, 52, 16368,
465 16360, 116, 16312, 15980, 1372, 2684, 760, 15928, 56, 64, 16364,
466 16360, 104, 16348, 15952, 1216, 2712, 908, 15928, 28, 76, 16364,
467 16360, 92, 0, 15936, 1064, 2720, 1064, 15936, 0, 92, 16360,
468};
469
470static const uint16_t filter_11tap_16p_183[99] = {
471 60, 16336, 16052, 412, 1948, 1948, 412, 16052, 16336, 60, 0,
472 56, 16356, 16052, 324, 1876, 2016, 504, 16056, 16316, 64, 0,
473 48, 16372, 16060, 240, 1796, 2072, 604, 16064, 16292, 64, 0,
474 44, 4, 16068, 160, 1712, 2124, 700, 16080, 16272, 68, 0,
475 40, 20, 16080, 84, 1620, 2164, 804, 16096, 16248, 68, 4,
476 32, 32, 16096, 16, 1524, 2200, 908, 16124, 16224, 68, 4,
477 28, 40, 16112, 16340, 1428, 2220, 1012, 16152, 16200, 64, 8,
478 24, 52, 16132, 16284, 1328, 2236, 1120, 16192, 16176, 64, 12,
479 16, 56, 16156, 16236, 1224, 2240, 1224, 16236, 16156, 56, 16,
480};
481
482static const uint16_t filter_12tap_16p_upscale[108] = {
483 0, 0, 0, 0, 0, 4096, 0, 0, 0, 0, 0, 0,
484 16376, 24, 16332, 100, 16156, 4068, 260, 16272, 56, 16356, 8, 0,
485 16368, 44, 16284, 188, 15964, 3988, 548, 16156, 112, 16328, 20, 16380,
486 16360, 64, 16248, 260, 15812, 3856, 864, 16040, 172, 16296, 32, 16380,
487 16360, 76, 16216, 320, 15696, 3672, 1196, 15928, 228, 16268, 44, 16376,
488 16356, 84, 16196, 360, 15620, 3448, 1540, 15820, 280, 16240, 56, 16372,
489 16356, 88, 16184, 384, 15580, 3188, 1888, 15728, 324, 16216, 68, 16368,
490 16360, 88, 16180, 392, 15576, 2892, 2236, 15652, 360, 16200, 80, 16364,
491 16360, 84, 16188, 384, 15600, 2576, 2576, 15600, 384, 16188, 84, 16360,
492};
493
494static const uint16_t filter_12tap_16p_117[108] = {
495 48, 16248, 240, 16028, 436, 3612, 436, 16028, 240, 16248, 48, 0,
496 44, 16260, 208, 16116, 212, 3596, 676, 15944, 272, 16240, 48, 16380,
497 40, 16276, 168, 16204, 12, 3540, 932, 15868, 296, 16240, 48, 16380,
498 36, 16292, 128, 16288, 16220, 3452, 1196, 15800, 312, 16240, 44, 16380,
499 28, 16308, 84, 16372, 16064, 3324, 1472, 15748, 316, 16244, 40, 16380,
500 24, 16328, 44, 64, 15936, 3168, 1744, 15708, 312, 16256, 32, 16380,
501 16, 16344, 8, 132, 15836, 2980, 2016, 15688, 300, 16272, 20, 0,
502 12, 16364, 16356, 188, 15760, 2768, 2280, 15688, 272, 16296, 8, 4,
503 8, 16380, 16324, 236, 15712, 2532, 2532, 15712, 236, 16324, 16380, 8,
504};
505
506static const uint16_t filter_12tap_16p_150[108] = {
507 16340, 116, 0, 15916, 1076, 2724, 1076, 15916, 0, 116, 16340, 0,
508 16340, 100, 32, 15908, 920, 2716, 1232, 15936, 16344, 128, 16340, 0,
509 16344, 84, 64, 15908, 772, 2692, 1388, 15968, 16304, 140, 16344, 16380,
510 16344, 68, 92, 15912, 624, 2652, 1540, 16008, 16264, 152, 16344, 16380,
511 16348, 52, 112, 15928, 484, 2592, 1688, 16060, 16220, 160, 16348, 16380,
512 16352, 40, 132, 15952, 348, 2520, 1836, 16124, 16176, 168, 16356, 16376,
513 16356, 24, 148, 15980, 224, 2436, 1976, 16200, 16132, 172, 16364, 16372,
514 16360, 12, 160, 16012, 108, 2336, 2104, 16288, 16088, 172, 16372, 16368,
515 16364, 0, 168, 16048, 0, 2228, 2228, 0, 16048, 168, 0, 16364,
516};
517
518static const uint16_t filter_12tap_16p_183[108] = {
519 36, 72, 16132, 16228, 1224, 2224, 1224, 16228, 16132, 72, 36, 0,
520 28, 80, 16156, 16184, 1120, 2224, 1328, 16280, 16112, 64, 40, 16380,
521 24, 84, 16180, 16144, 1016, 2208, 1428, 16340, 16092, 52, 48, 16380,
522 16, 88, 16208, 16112, 912, 2188, 1524, 16, 16072, 36, 56, 16380,
523 12, 92, 16232, 16084, 812, 2156, 1620, 88, 16056, 24, 64, 16380,
524 8, 92, 16256, 16064, 708, 2116, 1708, 164, 16044, 4, 68, 16380,
525 4, 88, 16280, 16048, 608, 2068, 1792, 244, 16036, 16372, 76, 16380,
526 0, 88, 16308, 16036, 512, 2008, 1872, 328, 16032, 16352, 80, 16380,
527 0, 84, 16328, 16032, 416, 1944, 1944, 416, 16032, 16328, 84, 0,
528};
529
530static const uint16_t *wbscl_get_filter_3tap_16p(struct fixed31_32 ratio)
531{
532 if (ratio.value < dc_fixpt_one.value)
533 return filter_3tap_16p_upscale;
534 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
535 return filter_3tap_16p_117;
536 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
537 return filter_3tap_16p_150;
538 else
539 return filter_3tap_16p_183;
540}
541
542static const uint16_t *wbscl_get_filter_4tap_16p(struct fixed31_32 ratio)
543{
544 if (ratio.value < dc_fixpt_one.value)
545 return filter_4tap_16p_upscale;
546 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
547 return filter_4tap_16p_117;
548 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
549 return filter_4tap_16p_150;
550 else
551 return filter_4tap_16p_183;
552}
553
554static const uint16_t *wbscl_get_filter_5tap_16p(struct fixed31_32 ratio)
555{
556 if (ratio.value < dc_fixpt_one.value)
557 return filter_5tap_16p_upscale;
558 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
559 return filter_5tap_16p_117;
560 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
561 return filter_5tap_16p_150;
562 else
563 return filter_5tap_16p_183;
564}
565
566static const uint16_t *wbscl_get_filter_6tap_16p(struct fixed31_32 ratio)
567{
568 if (ratio.value < dc_fixpt_one.value)
569 return filter_6tap_16p_upscale;
570 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
571 return filter_6tap_16p_117;
572 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
573 return filter_6tap_16p_150;
574 else
575 return filter_6tap_16p_183;
576}
577
578static const uint16_t *wbscl_get_filter_7tap_16p(struct fixed31_32 ratio)
579{
580 if (ratio.value < dc_fixpt_one.value)
581 return filter_7tap_16p_upscale;
582 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
583 return filter_7tap_16p_117;
584 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
585 return filter_7tap_16p_150;
586 else
587 return filter_7tap_16p_183;
588}
589
590static const uint16_t *wbscl_get_filter_8tap_16p(struct fixed31_32 ratio)
591{
592 if (ratio.value < dc_fixpt_one.value)
593 return filter_8tap_16p_upscale;
594 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
595 return filter_8tap_16p_117;
596 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
597 return filter_8tap_16p_150;
598 else
599 return filter_8tap_16p_183;
600}
601
602static const uint16_t *wbscl_get_filter_9tap_16p(struct fixed31_32 ratio)
603{
604 if (ratio.value < dc_fixpt_one.value)
605 return filter_9tap_16p_upscale;
606 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
607 return filter_9tap_16p_117;
608 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
609 return filter_9tap_16p_150;
610 else
611 return filter_9tap_16p_183;
612}
613static const uint16_t *wbscl_get_filter_10tap_16p(struct fixed31_32 ratio)
614{
615 if (ratio.value < dc_fixpt_one.value)
616 return filter_10tap_16p_upscale;
617 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
618 return filter_10tap_16p_117;
619 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
620 return filter_10tap_16p_150;
621 else
622 return filter_10tap_16p_183;
623}
624
625static const uint16_t *wbscl_get_filter_11tap_16p(struct fixed31_32 ratio)
626{
627 if (ratio.value < dc_fixpt_one.value)
628 return filter_11tap_16p_upscale;
629 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
630 return filter_11tap_16p_117;
631 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
632 return filter_11tap_16p_150;
633 else
634 return filter_11tap_16p_183;
635}
636
637static const uint16_t *wbscl_get_filter_12tap_16p(struct fixed31_32 ratio)
638{
639 if (ratio.value < dc_fixpt_one.value)
640 return filter_12tap_16p_upscale;
641 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
642 return filter_12tap_16p_117;
643 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
644 return filter_12tap_16p_150;
645 else
646 return filter_12tap_16p_183;
647}
648
649static const uint16_t *wbscl_get_filter_coeffs_16p(int taps, struct fixed31_32 ratio)
650{
651 if (taps == 12)
652 return wbscl_get_filter_12tap_16p(ratio);
653 else if (taps == 11)
654 return wbscl_get_filter_11tap_16p(ratio);
655 else if (taps == 10)
656 return wbscl_get_filter_10tap_16p(ratio);
657 else if (taps == 9)
658 return wbscl_get_filter_9tap_16p(ratio);
659 else if (taps == 8)
660 return wbscl_get_filter_8tap_16p(ratio);
661 else if (taps == 7)
662 return wbscl_get_filter_7tap_16p(ratio);
663 else if (taps == 6)
664 return wbscl_get_filter_6tap_16p(ratio);
665 else if (taps == 5)
666 return wbscl_get_filter_5tap_16p(ratio);
667 else if (taps == 4)
668 return wbscl_get_filter_4tap_16p(ratio);
669 else if (taps == 3)
670 return wbscl_get_filter_3tap_16p(ratio);
671 else if (taps == 2)
672 return get_filter_2tap_16p();
673 else if (taps == 1)
674 return NULL((void *)0);
675 else {
676 /* should never happen, bug */
677 BREAK_TO_DEBUGGER()do { ___drm_dbg(((void *)0), DRM_UT_DRIVER, "%s():%d\n", __func__
, 677); do {} while (0); } while (0);
678 return NULL((void *)0);
679 }
680}
681
682static void wbscl_set_scaler_filter(
683 struct dcn20_dwbc *dwbc20,
684 uint32_t taps,
685 enum wbscl_coef_filter_type_sel filter_type,
686 const uint16_t *filter)
687{
688 const int tap_pairs = (taps + 1) / 2;
689 int phase;
690 int pair;
691 uint16_t odd_coef, even_coef;
692
693 for (phase = 0; phase < (NUM_PHASES16 / 2 + 1); phase++) {
694 for (pair = 0; pair < tap_pairs; pair++) {
695 even_coef = filter[phase * taps + 2 * pair];
696 if ((pair * 2 + 1) < taps)
697 odd_coef = filter[phase * taps + 2 * pair + 1];
698 else
699 odd_coef = 0;
700
701 REG_SET_3(WBSCL_COEF_RAM_SELECT, 0,generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_SELECT, 0, 3, dwbc20->dwbc_shift->WBSCL_COEF_RAM_TAP_PAIR_IDX
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_TAP_PAIR_IDX, pair,
dwbc20->dwbc_shift->WBSCL_COEF_RAM_PHASE, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_PHASE, phase, dwbc20->dwbc_shift->WBSCL_COEF_RAM_FILTER_TYPE
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_FILTER_TYPE, filter_type
)
702 WBSCL_COEF_RAM_TAP_PAIR_IDX, pair,generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_SELECT, 0, 3, dwbc20->dwbc_shift->WBSCL_COEF_RAM_TAP_PAIR_IDX
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_TAP_PAIR_IDX, pair,
dwbc20->dwbc_shift->WBSCL_COEF_RAM_PHASE, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_PHASE, phase, dwbc20->dwbc_shift->WBSCL_COEF_RAM_FILTER_TYPE
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_FILTER_TYPE, filter_type
)
703 WBSCL_COEF_RAM_PHASE, phase,generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_SELECT, 0, 3, dwbc20->dwbc_shift->WBSCL_COEF_RAM_TAP_PAIR_IDX
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_TAP_PAIR_IDX, pair,
dwbc20->dwbc_shift->WBSCL_COEF_RAM_PHASE, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_PHASE, phase, dwbc20->dwbc_shift->WBSCL_COEF_RAM_FILTER_TYPE
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_FILTER_TYPE, filter_type
)
704 WBSCL_COEF_RAM_FILTER_TYPE, filter_type)generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_SELECT, 0, 3, dwbc20->dwbc_shift->WBSCL_COEF_RAM_TAP_PAIR_IDX
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_TAP_PAIR_IDX, pair,
dwbc20->dwbc_shift->WBSCL_COEF_RAM_PHASE, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_PHASE, phase, dwbc20->dwbc_shift->WBSCL_COEF_RAM_FILTER_TYPE
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_FILTER_TYPE, filter_type
);
705
706 REG_SET_4(WBSCL_COEF_RAM_TAP_DATA, 0,generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_TAP_DATA, 0, 4, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef
, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, dwbc20
->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1, dwbc20
->dwbc_shift->WBSCL_COEF_RAM_ODD_TAP_COEF, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef, dwbc20->dwbc_shift
->WBSCL_COEF_RAM_ODD_TAP_COEF_EN, dwbc20->dwbc_mask->
WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1)
707 /* Even tap coefficient (bits 1:0 fixed to 0) */generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_TAP_DATA, 0, 4, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef
, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, dwbc20
->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1, dwbc20
->dwbc_shift->WBSCL_COEF_RAM_ODD_TAP_COEF, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef, dwbc20->dwbc_shift
->WBSCL_COEF_RAM_ODD_TAP_COEF_EN, dwbc20->dwbc_mask->
WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1)
708 WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef,generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_TAP_DATA, 0, 4, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef
, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, dwbc20
->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1, dwbc20
->dwbc_shift->WBSCL_COEF_RAM_ODD_TAP_COEF, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef, dwbc20->dwbc_shift
->WBSCL_COEF_RAM_ODD_TAP_COEF_EN, dwbc20->dwbc_mask->
WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1)
709 /* Write/read control for even coefficient */generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_TAP_DATA, 0, 4, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef
, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, dwbc20
->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1, dwbc20
->dwbc_shift->WBSCL_COEF_RAM_ODD_TAP_COEF, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef, dwbc20->dwbc_shift
->WBSCL_COEF_RAM_ODD_TAP_COEF_EN, dwbc20->dwbc_mask->
WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1)
710 WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1,generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_TAP_DATA, 0, 4, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef
, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, dwbc20
->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1, dwbc20
->dwbc_shift->WBSCL_COEF_RAM_ODD_TAP_COEF, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef, dwbc20->dwbc_shift
->WBSCL_COEF_RAM_ODD_TAP_COEF_EN, dwbc20->dwbc_mask->
WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1)
711 /* Odd tap coefficient (bits 1:0 fixed to 0) */generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_TAP_DATA, 0, 4, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef
, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, dwbc20
->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1, dwbc20
->dwbc_shift->WBSCL_COEF_RAM_ODD_TAP_COEF, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef, dwbc20->dwbc_shift
->WBSCL_COEF_RAM_ODD_TAP_COEF_EN, dwbc20->dwbc_mask->
WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1)
712 WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef,generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_TAP_DATA, 0, 4, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef
, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, dwbc20
->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1, dwbc20
->dwbc_shift->WBSCL_COEF_RAM_ODD_TAP_COEF, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef, dwbc20->dwbc_shift
->WBSCL_COEF_RAM_ODD_TAP_COEF_EN, dwbc20->dwbc_mask->
WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1)
713 /* Write/read control for odd coefficient */generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_TAP_DATA, 0, 4, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef
, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, dwbc20
->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1, dwbc20
->dwbc_shift->WBSCL_COEF_RAM_ODD_TAP_COEF, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef, dwbc20->dwbc_shift
->WBSCL_COEF_RAM_ODD_TAP_COEF_EN, dwbc20->dwbc_mask->
WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1)
714 WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1)generic_reg_set_ex(dwbc20->base.ctx, dwbc20->dwbc_regs->
WBSCL_COEF_RAM_TAP_DATA, 0, 4, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF
, dwbc20->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF, even_coef
, dwbc20->dwbc_shift->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, dwbc20
->dwbc_mask->WBSCL_COEF_RAM_EVEN_TAP_COEF_EN, 1, dwbc20
->dwbc_shift->WBSCL_COEF_RAM_ODD_TAP_COEF, dwbc20->dwbc_mask
->WBSCL_COEF_RAM_ODD_TAP_COEF, odd_coef, dwbc20->dwbc_shift
->WBSCL_COEF_RAM_ODD_TAP_COEF_EN, dwbc20->dwbc_mask->
WBSCL_COEF_RAM_ODD_TAP_COEF_EN, 1);
715 }
716 }
717}
718
719bool_Bool dwb_program_horz_scalar(struct dcn20_dwbc *dwbc20,
720 uint32_t src_width,
721 uint32_t dest_width,
722 struct scaling_taps num_taps)
723{
724 uint32_t h_ratio_luma = 1;
725 uint32_t h_taps_luma = num_taps.h_taps;
726 uint32_t h_taps_chroma = num_taps.h_taps_c;
727 int32_t h_init_phase_luma = 0;
728 int32_t h_init_phase_chroma = 0;
729 uint32_t h_init_phase_luma_int = 0;
730 uint32_t h_init_phase_luma_frac = 0;
731 uint32_t h_init_phase_chroma_int = 0;
732 uint32_t h_init_phase_chroma_frac = 0;
733 const uint16_t *filter_h = NULL((void *)0);
734 const uint16_t *filter_h_c = NULL((void *)0);
735
736
737 struct fixed31_32 tmp_h_init_phase_luma = dc_fixpt_from_int(0);
738 struct fixed31_32 tmp_h_init_phase_chroma = dc_fixpt_from_int(0);
Value stored to 'tmp_h_init_phase_chroma' during its initialization is never read
739
740
741 /*Calculate ratio*/
742 struct fixed31_32 tmp_h_ratio_luma = dc_fixpt_from_fraction(
743 src_width, dest_width);
744
745 if (dc_fixpt_floor(tmp_h_ratio_luma) == 8)
746 h_ratio_luma = -1;
747 else
748 h_ratio_luma = dc_fixpt_u3d19(tmp_h_ratio_luma) << 5;
749
750 /*Program ratio*/
751 REG_UPDATE(WBSCL_HORZ_FILTER_SCALE_RATIO, WBSCL_H_SCALE_RATIO, h_ratio_luma)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_HORZ_FILTER_SCALE_RATIO, 1, dwbc20->dwbc_shift->
WBSCL_H_SCALE_RATIO, dwbc20->dwbc_mask->WBSCL_H_SCALE_RATIO
, h_ratio_luma);
752
753 /* Program taps*/
754 REG_UPDATE(WBSCL_TAP_CONTROL, WBSCL_H_NUM_OF_TAPS_Y_RGB, h_taps_luma - 1)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_TAP_CONTROL, 1, dwbc20->dwbc_shift->WBSCL_H_NUM_OF_TAPS_Y_RGB
, dwbc20->dwbc_mask->WBSCL_H_NUM_OF_TAPS_Y_RGB, h_taps_luma
- 1);
755 REG_UPDATE(WBSCL_TAP_CONTROL, WBSCL_H_NUM_OF_TAPS_CBCR, h_taps_chroma - 1)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_TAP_CONTROL, 1, dwbc20->dwbc_shift->WBSCL_H_NUM_OF_TAPS_CBCR
, dwbc20->dwbc_mask->WBSCL_H_NUM_OF_TAPS_CBCR, h_taps_chroma
- 1);
756
757 /* Calculate phase*/
758 tmp_h_init_phase_luma = dc_fixpt_add_int(tmp_h_ratio_luma, h_taps_luma + 1);
759 tmp_h_init_phase_luma = dc_fixpt_div_int(tmp_h_init_phase_luma, 2);
760 tmp_h_init_phase_luma = dc_fixpt_sub_int(tmp_h_init_phase_luma, h_taps_luma);
761
762 h_init_phase_luma = dc_fixpt_s4d19(tmp_h_init_phase_luma);
763 h_init_phase_luma_int = (h_init_phase_luma >> 19) & 0x1f;
764 h_init_phase_luma_frac = (h_init_phase_luma & 0x7ffff) << 5;
765
766 tmp_h_init_phase_chroma = dc_fixpt_mul_int(tmp_h_ratio_luma, 2);
767 tmp_h_init_phase_chroma = dc_fixpt_add_int(tmp_h_init_phase_chroma, h_taps_chroma + 1);
768 tmp_h_init_phase_chroma = dc_fixpt_div_int(tmp_h_init_phase_chroma, 2);
769 tmp_h_init_phase_chroma = dc_fixpt_sub_int(tmp_h_init_phase_chroma, h_taps_chroma);
770 tmp_h_init_phase_chroma = dc_fixpt_add(tmp_h_init_phase_chroma, dc_fixpt_from_fraction(1, 4));
771
772 h_init_phase_chroma = dc_fixpt_s4d19(tmp_h_init_phase_chroma);
773 h_init_phase_chroma_int = (h_init_phase_chroma >> 19) & 0x1f;
774 h_init_phase_chroma_frac = (h_init_phase_chroma & 0x7ffff) << 5;
775
776 /* Program phase*/
777 REG_UPDATE(WBSCL_HORZ_FILTER_INIT_Y_RGB, WBSCL_H_INIT_INT_Y_RGB, h_init_phase_luma_int)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_HORZ_FILTER_INIT_Y_RGB, 1, dwbc20->dwbc_shift->
WBSCL_H_INIT_INT_Y_RGB, dwbc20->dwbc_mask->WBSCL_H_INIT_INT_Y_RGB
, h_init_phase_luma_int);
778 REG_UPDATE(WBSCL_HORZ_FILTER_INIT_Y_RGB, WBSCL_H_INIT_FRAC_Y_RGB, h_init_phase_luma_frac)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_HORZ_FILTER_INIT_Y_RGB, 1, dwbc20->dwbc_shift->
WBSCL_H_INIT_FRAC_Y_RGB, dwbc20->dwbc_mask->WBSCL_H_INIT_FRAC_Y_RGB
, h_init_phase_luma_frac);
779 REG_UPDATE(WBSCL_HORZ_FILTER_INIT_CBCR, WBSCL_H_INIT_INT_CBCR, h_init_phase_chroma_int)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_HORZ_FILTER_INIT_CBCR, 1, dwbc20->dwbc_shift->
WBSCL_H_INIT_INT_CBCR, dwbc20->dwbc_mask->WBSCL_H_INIT_INT_CBCR
, h_init_phase_chroma_int);
780 REG_UPDATE(WBSCL_HORZ_FILTER_INIT_CBCR, WBSCL_H_INIT_FRAC_CBCR, h_init_phase_chroma_frac)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_HORZ_FILTER_INIT_CBCR, 1, dwbc20->dwbc_shift->
WBSCL_H_INIT_FRAC_CBCR, dwbc20->dwbc_mask->WBSCL_H_INIT_FRAC_CBCR
, h_init_phase_chroma_frac);
781
782 /* Program LUT coefficients*/
783 filter_h = wbscl_get_filter_coeffs_16p(
784 h_taps_luma, tmp_h_ratio_luma);
785 filter_h_c = wbscl_get_filter_coeffs_16p(
786 h_taps_chroma, dc_fixpt_from_int(h_ratio_luma * 2));
787
788 wbscl_set_scaler_filter(dwbc20, h_taps_luma,
789 WBSCL_COEF_LUMA_HORZ_FILTER, filter_h);
790
791 wbscl_set_scaler_filter(dwbc20, h_taps_chroma,
792 WBSCL_COEF_CHROMA_HORZ_FILTER, filter_h_c);
793
794 return true1;
795}
796
797bool_Bool dwb_program_vert_scalar(struct dcn20_dwbc *dwbc20,
798 uint32_t src_height,
799 uint32_t dest_height,
800 struct scaling_taps num_taps,
801 enum dwb_subsample_position subsample_position)
802{
803 uint32_t v_ratio_luma = 1;
804 uint32_t v_taps_luma = num_taps.v_taps;
805 uint32_t v_taps_chroma = num_taps.v_taps_c;
806 int32_t v_init_phase_luma = 0;
807 int32_t v_init_phase_chroma = 0;
808 uint32_t v_init_phase_luma_int = 0;
809 uint32_t v_init_phase_luma_frac = 0;
810 uint32_t v_init_phase_chroma_int = 0;
811 uint32_t v_init_phase_chroma_frac = 0;
812
813 const uint16_t *filter_v = NULL((void *)0);
814 const uint16_t *filter_v_c = NULL((void *)0);
815
816 struct fixed31_32 tmp_v_init_phase_luma = dc_fixpt_from_int(0);
817 struct fixed31_32 tmp_v_init_phase_chroma = dc_fixpt_from_int(0);
818
819 /*Calculate ratio*/
820 struct fixed31_32 tmp_v_ratio_luma = dc_fixpt_from_fraction(
821 src_height, dest_height);
822
823 if (dc_fixpt_floor(tmp_v_ratio_luma) == 8)
824 v_ratio_luma = -1;
825 else
826 v_ratio_luma = dc_fixpt_u3d19(tmp_v_ratio_luma) << 5;
827
828 /*Program ratio*/
829 REG_UPDATE(WBSCL_VERT_FILTER_SCALE_RATIO, WBSCL_V_SCALE_RATIO, v_ratio_luma)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_VERT_FILTER_SCALE_RATIO, 1, dwbc20->dwbc_shift->
WBSCL_V_SCALE_RATIO, dwbc20->dwbc_mask->WBSCL_V_SCALE_RATIO
, v_ratio_luma);
830
831 /* Program taps*/
832 REG_UPDATE(WBSCL_TAP_CONTROL, WBSCL_V_NUM_OF_TAPS_Y_RGB, v_taps_luma - 1)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_TAP_CONTROL, 1, dwbc20->dwbc_shift->WBSCL_V_NUM_OF_TAPS_Y_RGB
, dwbc20->dwbc_mask->WBSCL_V_NUM_OF_TAPS_Y_RGB, v_taps_luma
- 1);
833 REG_UPDATE(WBSCL_TAP_CONTROL, WBSCL_V_NUM_OF_TAPS_CBCR, v_taps_chroma - 1)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_TAP_CONTROL, 1, dwbc20->dwbc_shift->WBSCL_V_NUM_OF_TAPS_CBCR
, dwbc20->dwbc_mask->WBSCL_V_NUM_OF_TAPS_CBCR, v_taps_chroma
- 1);
834
835 /* Calculate phase*/
836 tmp_v_init_phase_luma = dc_fixpt_add_int(tmp_v_ratio_luma, v_taps_luma + 1);
837 tmp_v_init_phase_luma = dc_fixpt_div_int(tmp_v_init_phase_luma, 2);
838 tmp_v_init_phase_luma = dc_fixpt_sub_int(tmp_v_init_phase_luma, v_taps_luma);
839
840 v_init_phase_luma = dc_fixpt_s4d19(tmp_v_init_phase_luma);
841 v_init_phase_luma_int = (v_init_phase_luma >> 19) & 0x1f;
842 v_init_phase_luma_frac = (v_init_phase_luma & 0x7ffff) << 5;
843
844 tmp_v_init_phase_chroma = dc_fixpt_mul_int(tmp_v_ratio_luma, 2);
845 tmp_v_init_phase_chroma = dc_fixpt_add_int(tmp_v_init_phase_chroma, v_taps_chroma + 1);
846 tmp_v_init_phase_chroma = dc_fixpt_div_int(tmp_v_init_phase_chroma, 2);
847 tmp_v_init_phase_chroma = dc_fixpt_sub_int(tmp_v_init_phase_chroma, v_taps_chroma);
848 if (subsample_position == DWB_COSITED_SUBSAMPLING)
849 tmp_v_init_phase_chroma = dc_fixpt_add(tmp_v_init_phase_chroma, dc_fixpt_from_fraction(1, 4));
850
851 v_init_phase_chroma = dc_fixpt_s4d19(tmp_v_init_phase_chroma);
852 v_init_phase_chroma_int = (v_init_phase_chroma >> 19) & 0x1f;
853 v_init_phase_chroma_frac = (v_init_phase_chroma & 0x7ffff) << 5;
854
855 /* Program phase*/
856 REG_UPDATE(WBSCL_VERT_FILTER_INIT_Y_RGB, WBSCL_V_INIT_INT_Y_RGB, v_init_phase_luma_int)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_VERT_FILTER_INIT_Y_RGB, 1, dwbc20->dwbc_shift->
WBSCL_V_INIT_INT_Y_RGB, dwbc20->dwbc_mask->WBSCL_V_INIT_INT_Y_RGB
, v_init_phase_luma_int);
857 REG_UPDATE(WBSCL_VERT_FILTER_INIT_Y_RGB, WBSCL_V_INIT_FRAC_Y_RGB, v_init_phase_luma_frac)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_VERT_FILTER_INIT_Y_RGB, 1, dwbc20->dwbc_shift->
WBSCL_V_INIT_FRAC_Y_RGB, dwbc20->dwbc_mask->WBSCL_V_INIT_FRAC_Y_RGB
, v_init_phase_luma_frac);
858 REG_UPDATE(WBSCL_VERT_FILTER_INIT_CBCR, WBSCL_V_INIT_INT_CBCR, v_init_phase_chroma_int)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_VERT_FILTER_INIT_CBCR, 1, dwbc20->dwbc_shift->
WBSCL_V_INIT_INT_CBCR, dwbc20->dwbc_mask->WBSCL_V_INIT_INT_CBCR
, v_init_phase_chroma_int);
859 REG_UPDATE(WBSCL_VERT_FILTER_INIT_CBCR, WBSCL_V_INIT_FRAC_CBCR, v_init_phase_chroma_frac)generic_reg_update_ex(dwbc20->base.ctx, dwbc20->dwbc_regs
->WBSCL_VERT_FILTER_INIT_CBCR, 1, dwbc20->dwbc_shift->
WBSCL_V_INIT_FRAC_CBCR, dwbc20->dwbc_mask->WBSCL_V_INIT_FRAC_CBCR
, v_init_phase_chroma_frac);
860
861
862 /* Program LUT coefficients*/
863 filter_v = wbscl_get_filter_coeffs_16p(
864 v_taps_luma, tmp_v_ratio_luma);
865 filter_v_c = wbscl_get_filter_coeffs_16p(
866 v_taps_chroma, dc_fixpt_from_int(v_ratio_luma * 2));
867 wbscl_set_scaler_filter(dwbc20, v_taps_luma,
868 WBSCL_COEF_LUMA_VERT_FILTER, filter_v);
869
870 wbscl_set_scaler_filter(dwbc20, v_taps_chroma,
871 WBSCL_COEF_CHROMA_VERT_FILTER, filter_v_c);
872 return true1;
873}