Bug Summary

File:dev/usb/uhci.c
Warning:line 2432, column 25
Dereference of undefined pointer value

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name uhci.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/usb/uhci.c
1/* $OpenBSD: uhci.c,v 1.156 2022/04/12 19:41:11 naddy Exp $ */
2/* $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $ */
3/* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */
4
5/*
6 * Copyright (c) 1998 The NetBSD Foundation, Inc.
7 * All rights reserved.
8 *
9 * This code is derived from software contributed to The NetBSD Foundation
10 * by Lennart Augustsson (lennart@augustsson.net) at
11 * Carlstedt Research & Technology.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/malloc.h>
38#include <sys/device.h>
39#include <sys/queue.h>
40#include <sys/timeout.h>
41#include <sys/pool.h>
42#include <sys/endian.h>
43
44#include <machine/bus.h>
45
46#include <dev/usb/usb.h>
47#include <dev/usb/usbdi.h>
48#include <dev/usb/usbdivar.h>
49#include <dev/usb/usb_mem.h>
50
51#include <dev/usb/uhcireg.h>
52#include <dev/usb/uhcivar.h>
53
54/* Use bandwidth reclamation for control transfers. Some devices choke on it. */
55/*#define UHCI_CTL_LOOP */
56
57struct cfdriver uhci_cd = {
58 NULL((void *)0), "uhci", DV_DULL, CD_SKIPHIBERNATE2
59};
60
61#ifdef UHCI_DEBUG
62struct uhci_softc *thesc;
63#define DPRINTF(x) if (uhcidebug) printf x
64#define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
65int uhcidebug = 0;
66int uhcinoloop = 0;
67#define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
68#else
69#define DPRINTF(x)
70#define DPRINTFN(n,x)
71#endif
72
73struct pool *uhcixfer;
74
75struct uhci_pipe {
76 struct usbd_pipe pipe;
77 int nexttoggle;
78
79 union {
80 /* Control pipe */
81 struct {
82 struct uhci_soft_qh *sqh;
83 struct usb_dma reqdma;
84 struct uhci_soft_td *setup, *stat;
85 u_int length;
86 } ctl;
87 /* Interrupt pipe */
88 struct {
89 int npoll;
90 int isread;
91 struct uhci_soft_qh **qhs;
92 } intr;
93 /* Bulk pipe */
94 struct {
95 struct uhci_soft_qh *sqh;
96 u_int length;
97 int isread;
98 } bulk;
99 /* Iso pipe */
100 struct iso {
101 struct uhci_soft_td **stds;
102 int next, inuse;
103 } iso;
104 } u;
105};
106
107void uhci_globalreset(struct uhci_softc *);
108usbd_status uhci_portreset(struct uhci_softc *, int);
109void uhci_reset(struct uhci_softc *);
110usbd_status uhci_run(struct uhci_softc *, int run);
111struct uhci_soft_td *uhci_alloc_std(struct uhci_softc *);
112void uhci_free_std(struct uhci_softc *, struct uhci_soft_td *);
113struct uhci_soft_qh *uhci_alloc_sqh(struct uhci_softc *);
114void uhci_free_sqh(struct uhci_softc *, struct uhci_soft_qh *);
115
116void uhci_free_std_chain(struct uhci_softc *,
117 struct uhci_soft_td *, struct uhci_soft_td *);
118usbd_status uhci_alloc_std_chain(struct uhci_softc *, u_int,
119 struct usbd_xfer *, struct uhci_soft_td **,
120 struct uhci_soft_td **);
121void uhci_poll_hub(void *);
122void uhci_check_intr(struct uhci_softc *, struct usbd_xfer *);
123void uhci_idone(struct usbd_xfer *);
124
125void uhci_abort_xfer(struct usbd_xfer *, usbd_status status);
126
127void uhci_timeout(void *);
128void uhci_timeout_task(void *);
129void uhci_add_ls_ctrl(struct uhci_softc *, struct uhci_soft_qh *);
130void uhci_add_hs_ctrl(struct uhci_softc *, struct uhci_soft_qh *);
131void uhci_add_bulk(struct uhci_softc *, struct uhci_soft_qh *);
132void uhci_remove_ls_ctrl(struct uhci_softc *, struct uhci_soft_qh *);
133void uhci_remove_hs_ctrl(struct uhci_softc *, struct uhci_soft_qh *);
134void uhci_remove_bulk(struct uhci_softc *,struct uhci_soft_qh *);
135void uhci_add_loop(struct uhci_softc *sc);
136void uhci_rem_loop(struct uhci_softc *sc);
137
138usbd_status uhci_setup_isoc(struct usbd_pipe *pipe);
139void uhci_device_isoc_enter(struct usbd_xfer *);
140
141struct usbd_xfer *uhci_allocx(struct usbd_bus *);
142void uhci_freex(struct usbd_bus *, struct usbd_xfer *);
143
144usbd_status uhci_device_ctrl_transfer(struct usbd_xfer *);
145usbd_status uhci_device_ctrl_start(struct usbd_xfer *);
146void uhci_device_ctrl_abort(struct usbd_xfer *);
147void uhci_device_ctrl_close(struct usbd_pipe *);
148void uhci_device_ctrl_done(struct usbd_xfer *);
149
150usbd_status uhci_device_intr_transfer(struct usbd_xfer *);
151usbd_status uhci_device_intr_start(struct usbd_xfer *);
152void uhci_device_intr_abort(struct usbd_xfer *);
153void uhci_device_intr_close(struct usbd_pipe *);
154void uhci_device_intr_done(struct usbd_xfer *);
155
156usbd_status uhci_device_bulk_transfer(struct usbd_xfer *);
157usbd_status uhci_device_bulk_start(struct usbd_xfer *);
158void uhci_device_bulk_abort(struct usbd_xfer *);
159void uhci_device_bulk_close(struct usbd_pipe *);
160void uhci_device_bulk_done(struct usbd_xfer *);
161
162usbd_status uhci_device_isoc_transfer(struct usbd_xfer *);
163usbd_status uhci_device_isoc_start(struct usbd_xfer *);
164void uhci_device_isoc_abort(struct usbd_xfer *);
165void uhci_device_isoc_close(struct usbd_pipe *);
166void uhci_device_isoc_done(struct usbd_xfer *);
167
168usbd_status uhci_root_ctrl_transfer(struct usbd_xfer *);
169usbd_status uhci_root_ctrl_start(struct usbd_xfer *);
170void uhci_root_ctrl_abort(struct usbd_xfer *);
171void uhci_root_ctrl_close(struct usbd_pipe *);
172void uhci_root_ctrl_done(struct usbd_xfer *);
173
174usbd_status uhci_root_intr_transfer(struct usbd_xfer *);
175usbd_status uhci_root_intr_start(struct usbd_xfer *);
176void uhci_root_intr_abort(struct usbd_xfer *);
177void uhci_root_intr_close(struct usbd_pipe *);
178void uhci_root_intr_done(struct usbd_xfer *);
179
180usbd_status uhci_open(struct usbd_pipe *);
181void uhci_poll(struct usbd_bus *);
182void uhci_softintr(void *);
183
184usbd_status uhci_device_request(struct usbd_xfer *xfer);
185
186void uhci_add_intr(struct uhci_softc *, struct uhci_soft_qh *);
187void uhci_remove_intr(struct uhci_softc *, struct uhci_soft_qh *);
188usbd_status uhci_device_setintr(struct uhci_softc *sc,
189 struct uhci_pipe *pipe, int ival);
190
191void uhci_device_clear_toggle(struct usbd_pipe *pipe);
192
193static inline struct uhci_soft_qh *uhci_find_prev_qh(struct uhci_soft_qh *,
194 struct uhci_soft_qh *);
195
196#ifdef UHCI_DEBUG
197void uhci_dump_all(struct uhci_softc *);
198void uhci_dumpregs(struct uhci_softc *);
199void uhci_dump_qhs(struct uhci_soft_qh *);
200void uhci_dump_qh(struct uhci_soft_qh *);
201void uhci_dump_tds(struct uhci_soft_td *);
202void uhci_dump_td(struct uhci_soft_td *);
203void uhci_dump_xfer(struct uhci_xfer *);
204void uhci_dump(void);
205#endif
206
207#define UBARR(sc)bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size
, 0x01|0x02) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
208 BUS_SPACE_BARRIER_READ0x01|BUS_SPACE_BARRIER_WRITE0x02)
209#define UWRITE1(sc, r, x)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_1(((sc)->ioh
), ((r)), ((x)))); } while ( 0) \
210 do { UBARR(sc)bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size
, 0x01|0x02); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x))(((sc)->iot)->write_1(((sc)->ioh), ((r)), ((x)))); \
211 } while (/*CONSTCOND*/0)
212#define UWRITE2(sc, r, x)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((r)), ((x)))); } while ( 0) \
213 do { UBARR(sc)bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size
, 0x01|0x02); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))(((sc)->iot)->write_2(((sc)->ioh), ((r)), ((x)))); \
214 } while (/*CONSTCOND*/0)
215#define UWRITE4(sc, r, x)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_4(((sc)->ioh
), ((r)), ((x)))); } while ( 0) \
216 do { UBARR(sc)bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size
, 0x01|0x02); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))(((sc)->iot)->write_4(((sc)->ioh), ((r)), ((x)))); \
217 } while (/*CONSTCOND*/0)
218
219__unused__attribute__((__unused__)) static __inline u_int8_t
220UREAD1(struct uhci_softc *sc, bus_size_t r)
221{
222 UBARR(sc)bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size
, 0x01|0x02);
223 return bus_space_read_1(sc->iot, sc->ioh, r)((sc->iot)->read_1((sc->ioh), (r)));
224}
225
226__unused__attribute__((__unused__)) static __inline u_int16_t
227UREAD2(struct uhci_softc *sc, bus_size_t r)
228{
229 UBARR(sc)bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size
, 0x01|0x02);
230 return bus_space_read_2(sc->iot, sc->ioh, r)((sc->iot)->read_2((sc->ioh), (r)));
231}
232
233__unused__attribute__((__unused__)) static __inline u_int32_t
234UREAD4(struct uhci_softc *sc, bus_size_t r)
235{
236 UBARR(sc)bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size
, 0x01|0x02);
237 return bus_space_read_4(sc->iot, sc->ioh, r)((sc->iot)->read_4((sc->ioh), (r)));
238}
239
240#define UHCICMD(sc, cmd)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((cmd)))); } while ( 0) UWRITE2(sc, UHCI_CMD, cmd)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((cmd)))); } while ( 0)
241#define UHCISTS(sc)UREAD2(sc, 0x02) UREAD2(sc, UHCI_STS0x02)
242
243#define UHCI_RESET_TIMEOUT100 100 /* ms, reset timeout */
244
245#define UHCI_CURFRAME(sc)(UREAD2(sc, 0x06) & 0x03ff) (UREAD2(sc, UHCI_FRNUM0x06) & UHCI_FRNUM_MASK0x03ff)
246
247#define UHCI_INTR_ENDPT1 1
248
249const struct usbd_bus_methods uhci_bus_methods = {
250 .open_pipe = uhci_open,
251 .dev_setaddr = usbd_set_address,
252 .soft_intr = uhci_softintr,
253 .do_poll = uhci_poll,
254 .allocx = uhci_allocx,
255 .freex = uhci_freex,
256};
257
258const struct usbd_pipe_methods uhci_root_ctrl_methods = {
259 .transfer = uhci_root_ctrl_transfer,
260 .start = uhci_root_ctrl_start,
261 .abort = uhci_root_ctrl_abort,
262 .close = uhci_root_ctrl_close,
263 .done = uhci_root_ctrl_done,
264};
265
266const struct usbd_pipe_methods uhci_root_intr_methods = {
267 .transfer = uhci_root_intr_transfer,
268 .start = uhci_root_intr_start,
269 .abort = uhci_root_intr_abort,
270 .close = uhci_root_intr_close,
271 .done = uhci_root_intr_done,
272};
273
274const struct usbd_pipe_methods uhci_device_ctrl_methods = {
275 .transfer = uhci_device_ctrl_transfer,
276 .start = uhci_device_ctrl_start,
277 .abort = uhci_device_ctrl_abort,
278 .close = uhci_device_ctrl_close,
279 .done = uhci_device_ctrl_done,
280};
281
282const struct usbd_pipe_methods uhci_device_intr_methods = {
283 .transfer = uhci_device_intr_transfer,
284 .start = uhci_device_intr_start,
285 .abort = uhci_device_intr_abort,
286 .close = uhci_device_intr_close,
287 .cleartoggle = uhci_device_clear_toggle,
288 .done = uhci_device_intr_done,
289};
290
291const struct usbd_pipe_methods uhci_device_bulk_methods = {
292 .transfer = uhci_device_bulk_transfer,
293 .start = uhci_device_bulk_start,
294 .abort = uhci_device_bulk_abort,
295 .close = uhci_device_bulk_close,
296 .cleartoggle = uhci_device_clear_toggle,
297 .done = uhci_device_bulk_done,
298};
299
300const struct usbd_pipe_methods uhci_device_isoc_methods = {
301 .transfer = uhci_device_isoc_transfer,
302 .start = uhci_device_isoc_start,
303 .abort = uhci_device_isoc_abort,
304 .close = uhci_device_isoc_close,
305 .done = uhci_device_isoc_done,
306};
307
308#define uhci_add_intr_list(sc, ex)do { if ((((ex))->inext.le_next = (&(sc)->sc_intrhead
)->lh_first) != ((void *)0)) (&(sc)->sc_intrhead)->
lh_first->inext.le_prev = &((ex))->inext.le_next; (
&(sc)->sc_intrhead)->lh_first = ((ex)); ((ex))->
inext.le_prev = &(&(sc)->sc_intrhead)->lh_first
; } while (0) \
309 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext)do { if ((((ex))->inext.le_next = (&(sc)->sc_intrhead
)->lh_first) != ((void *)0)) (&(sc)->sc_intrhead)->
lh_first->inext.le_prev = &((ex))->inext.le_next; (
&(sc)->sc_intrhead)->lh_first = ((ex)); ((ex))->
inext.le_prev = &(&(sc)->sc_intrhead)->lh_first
; } while (0)
310#define uhci_del_intr_list(ex)do { do { if (((ex))->inext.le_next != ((void *)0)) ((ex))
->inext.le_next->inext.le_prev = ((ex))->inext.le_prev
; *((ex))->inext.le_prev = ((ex))->inext.le_next; (((ex
))->inext.le_prev) = ((void *)-1); (((ex))->inext.le_next
) = ((void *)-1); } while (0); (ex)->inext.le_prev = ((void
*)0); } while (0) \
311 do { \
312 LIST_REMOVE((ex), inext)do { if (((ex))->inext.le_next != ((void *)0)) ((ex))->
inext.le_next->inext.le_prev = ((ex))->inext.le_prev; *
((ex))->inext.le_prev = ((ex))->inext.le_next; (((ex))->
inext.le_prev) = ((void *)-1); (((ex))->inext.le_next) = (
(void *)-1); } while (0); \
313 (ex)->inext.le_prev = NULL((void *)0); \
314 } while (0)
315#define uhci_active_intr_list(ex)((ex)->inext.le_prev != ((void *)0)) ((ex)->inext.le_prev != NULL((void *)0))
316
317static inline struct uhci_soft_qh *
318uhci_find_prev_qh(struct uhci_soft_qh *pqh, struct uhci_soft_qh *sqh)
319{
320 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
321
322 for (; pqh->hlink != sqh; pqh = pqh->hlink) {
323#if defined(DIAGNOSTIC1) || defined(UHCI_DEBUG)
324 if (letoh32(pqh->qh.qh_hlink)((__uint32_t)(pqh->qh.qh_hlink)) & UHCI_PTR_T0x00000001) {
325 printf("uhci_find_prev_qh: QH not found\n");
326 return (NULL((void *)0));
327 }
328#endif
329 }
330 return (pqh);
331}
332
333void
334uhci_globalreset(struct uhci_softc *sc)
335{
336 UHCICMD(sc, UHCI_CMD_GRESET)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((0x0004)))); } while ( 0); /* global reset */
337 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY100); /* wait a little */
338 UHCICMD(sc, 0)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((0)))); } while ( 0); /* do nothing */
339}
340
341usbd_status
342uhci_init(struct uhci_softc *sc)
343{
344 usbd_status err;
345 int i, j;
346 struct uhci_soft_qh *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
347 struct uhci_soft_td *std;
348
349 DPRINTFN(1,("uhci_init: start\n"));
350
351#ifdef UHCI_DEBUG
352 thesc = sc;
353
354 if (uhcidebug > 2)
355 uhci_dumpregs(sc);
356#endif
357
358 /* Save SOF over HC reset. */
359 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF0x0c);
360
361 UWRITE2(sc, UHCI_INTR, 0)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x04)), ((0)))); } while ( 0); /* disable interrupts */
362 uhci_globalreset(sc); /* reset the controller */
363 uhci_reset(sc);
364
365 if (uhcixfer == NULL((void *)0)) {
366 uhcixfer = malloc(sizeof(struct pool), M_USBHC103, M_NOWAIT0x0002);
367 if (uhcixfer == NULL((void *)0)) {
368 printf("%s: unable to allocate pool descriptor\n",
369 sc->sc_bus.bdev.dv_xname);
370 return (ENOMEM12);
371 }
372 pool_init(uhcixfer, sizeof(struct uhci_xfer), 0, IPL_SOFTUSB0x2,
373 0, "uhcixfer", NULL((void *)0));
374 }
375
376 /* Restore saved SOF. */
377 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_1(((sc)->ioh
), ((0x0c)), ((sc->sc_saved_sof)))); } while ( 0);
378
379 /* Allocate and initialize real frame array. */
380 err = usb_allocmem(&sc->sc_bus,
381 UHCI_FRAMELIST_COUNT1024 * sizeof(uhci_physaddr_t),
382 UHCI_FRAMELIST_ALIGN4096, USB_DMA_COHERENT(1 << 0), &sc->sc_dma);
383 if (err)
384 return (err);
385 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0)((void *)((char *)((&sc->sc_dma)->block->kaddr +
(&sc->sc_dma)->offs) + (0)));
386 UWRITE2(sc, UHCI_FRNUM, 0)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x06)), ((0)))); } while ( 0); /* set frame number to 0 */
387 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0))do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_4(((sc)->ioh
), ((0x08)), ((((&sc->sc_dma)->block->map->dm_segs
[0].ds_addr + (&sc->sc_dma)->offs + (0)))))); } while
( 0); /* set frame list*/
388
389 /*
390 * Allocate a TD, inactive, that hangs from the last QH.
391 * This is to avoid a bug in the PIIX that makes it run berserk
392 * otherwise.
393 */
394 std = uhci_alloc_std(sc);
395 if (std == NULL((void *)0))
396 return (USBD_NOMEM);
397 std->link.std = NULL((void *)0);
398 std->td.td_link = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
399 std->td.td_status = htole32(0)((__uint32_t)(0)); /* inactive */
400 std->td.td_token = htole32(0)((__uint32_t)(0));
401 std->td.td_buffer = htole32(0)((__uint32_t)(0));
402
403 /* Allocate the dummy QH marking the end and used for looping the QHs.*/
404 lsqh = uhci_alloc_sqh(sc);
405 if (lsqh == NULL((void *)0))
406 return (USBD_NOMEM);
407 lsqh->hlink = NULL((void *)0);
408 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001)); /* end of QH chain */
409 lsqh->elink = std;
410 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD)((__uint32_t)(std->physaddr | 0x00000000));
411 sc->sc_last_qh = lsqh;
412
413 /* Allocate the dummy QH where bulk traffic will be queued. */
414 bsqh = uhci_alloc_sqh(sc);
415 if (bsqh == NULL((void *)0))
416 return (USBD_NOMEM);
417 bsqh->hlink = lsqh;
418 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH)((__uint32_t)(lsqh->physaddr | 0x00000002));
419 bsqh->elink = NULL((void *)0);
420 bsqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
421 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
422
423 /* Allocate dummy QH where high speed control traffic will be queued. */
424 chsqh = uhci_alloc_sqh(sc);
425 if (chsqh == NULL((void *)0))
426 return (USBD_NOMEM);
427 chsqh->hlink = bsqh;
428 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH)((__uint32_t)(bsqh->physaddr | 0x00000002));
429 chsqh->elink = NULL((void *)0);
430 chsqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
431 sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
432
433 /* Allocate dummy QH where control traffic will be queued. */
434 clsqh = uhci_alloc_sqh(sc);
435 if (clsqh == NULL((void *)0))
436 return (USBD_NOMEM);
437 clsqh->hlink = chsqh;
438 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH)((__uint32_t)(chsqh->physaddr | 0x00000002));
439 clsqh->elink = NULL((void *)0);
440 clsqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
441 sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
442
443 /*
444 * Make all (virtual) frame list pointers point to the interrupt
445 * queue heads and the interrupt queue heads at the control
446 * queue head and point the physical frame list to the virtual.
447 */
448 for(i = 0; i < UHCI_VFRAMELIST_COUNT128; i++) {
449 std = uhci_alloc_std(sc);
450 sqh = uhci_alloc_sqh(sc);
451 if (std == NULL((void *)0) || sqh == NULL((void *)0))
452 return (USBD_NOMEM);
453 std->link.sqh = sqh;
454 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH)((__uint32_t)(sqh->physaddr | 0x00000002));
455 std->td.td_status = htole32(UHCI_TD_IOS)((__uint32_t)(0x02000000)); /* iso, inactive */
456 std->td.td_token = htole32(0)((__uint32_t)(0));
457 std->td.td_buffer = htole32(0)((__uint32_t)(0));
458 sqh->hlink = clsqh;
459 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH)((__uint32_t)(clsqh->physaddr | 0x00000002));
460 sqh->elink = NULL((void *)0);
461 sqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
462 sc->sc_vframes[i].htd = std;
463 sc->sc_vframes[i].etd = std;
464 sc->sc_vframes[i].hqh = sqh;
465 sc->sc_vframes[i].eqh = sqh;
466 for (j = i;
467 j < UHCI_FRAMELIST_COUNT1024;
468 j += UHCI_VFRAMELIST_COUNT128)
469 sc->sc_pframes[j] = htole32(std->physaddr)((__uint32_t)(std->physaddr));
470 }
471
472 LIST_INIT(&sc->sc_intrhead)do { ((&sc->sc_intrhead)->lh_first) = ((void *)0); }
while (0);
473
474 timeout_set(&sc->sc_root_intr, uhci_poll_hub, sc);
475
476 /* Set up the bus struct. */
477 sc->sc_bus.methods = &uhci_bus_methods;
478 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
479
480 sc->sc_suspend = DVACT_RESUME4;
481
482 UHCICMD(sc, UHCI_CMD_MAXP)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((0x0080)))); } while ( 0); /* Assume 64 byte packets at frame end */
483
484 DPRINTFN(1,("uhci_init: enabling\n"));
485 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x04)), ((0x0001 | 0x0002 | 0x0004 | 0x0008)))); } while
( 0)
486 UHCI_INTR_IOCE | UHCI_INTR_SPIE)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x04)), ((0x0001 | 0x0002 | 0x0004 | 0x0008)))); } while
( 0); /* enable interrupts */
487
488 return (uhci_run(sc, 1)); /* and here we go... */
489}
490
491int
492uhci_activate(struct device *self, int act)
493{
494 struct uhci_softc *sc = (struct uhci_softc *)self;
495 int cmd, rv = 0;
496
497 switch (act) {
498 case DVACT_SUSPEND3:
499#ifdef UHCI_DEBUG
500 if (uhcidebug > 2)
501 uhci_dumpregs(sc);
502#endif
503 rv = config_activate_children(self, act);
504 sc->sc_bus.use_polling++;
505 uhci_run(sc, 0); /* stop the controller */
506
507 /* save some state if BIOS doesn't */
508 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM0x06);
509
510 UWRITE2(sc, UHCI_INTR, 0)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x04)), ((0)))); } while ( 0); /* disable intrs */
511
512 cmd = UREAD2(sc, UHCI_CMD0x00);
513 UHCICMD(sc, cmd | UHCI_CMD_EGSM)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((cmd | 0x0008)))); } while ( 0); /* enter global suspend */
514 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT50);
515 sc->sc_suspend = act;
516 sc->sc_bus.use_polling--;
517 DPRINTF(("uhci_activate: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
518 break;
519 case DVACT_POWERDOWN6:
520 rv = config_activate_children(self, act);
521 uhci_run(sc, 0); /* stop the controller */
522 break;
523 case DVACT_RESUME4:
524#ifdef DIAGNOSTIC1
525 if (sc->sc_suspend == DVACT_RESUME4)
526 printf("uhci_powerhook: weird, resume without suspend.\n");
527#endif
528 sc->sc_bus.use_polling++;
529 sc->sc_suspend = act;
530 cmd = UREAD2(sc, UHCI_CMD0x00);
531 if (cmd & UHCI_CMD_RS0x0001)
532 uhci_run(sc, 0); /* in case BIOS has started it */
533
534 /* restore saved state */
535 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0))do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_4(((sc)->ioh
), ((0x08)), ((((&sc->sc_dma)->block->map->dm_segs
[0].ds_addr + (&sc->sc_dma)->offs + (0)))))); } while
( 0);
536 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x06)), ((sc->sc_saved_frnum)))); } while ( 0);
537 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_1(((sc)->ioh
), ((0x0c)), ((sc->sc_saved_sof)))); } while ( 0);
538
539 UHCICMD(sc, cmd | UHCI_CMD_FGR)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((cmd | 0x0010)))); } while ( 0); /* force global resume */
540 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY(50*5));
541 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((cmd & ~0x0008)))); } while ( 0); /* back to normal */
542 UHCICMD(sc, UHCI_CMD_MAXP)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((0x0080)))); } while ( 0);
543 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x04)), ((0x0001 | 0x0002 | 0x0004 | 0x0008)))); } while
( 0)
544 UHCI_INTR_IOCE | UHCI_INTR_SPIE)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x04)), ((0x0001 | 0x0002 | 0x0004 | 0x0008)))); } while
( 0); /* re-enable intrs */
545 uhci_run(sc, 1); /* and start traffic again */
546 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY50);
547 sc->sc_bus.use_polling--;
548#ifdef UHCI_DEBUG
549 if (uhcidebug > 2)
550 uhci_dumpregs(sc);
551#endif
552 rv = config_activate_children(self, act);
553 break;
554 default:
555 rv = config_activate_children(self, act);
556 break;
557 }
558 return (rv);
559}
560
561int
562uhci_detach(struct device *self, int flags)
563{
564#ifdef DIAGNOSTIC1
565 struct uhci_softc *sc = (struct uhci_softc *)self;
566#endif
567 int rv;
568
569 rv = config_detach_children(self, flags);
570 if (rv != 0)
571 return (rv);
572
573 KASSERT(sc->sc_intrxfer == NULL)((sc->sc_intrxfer == ((void *)0)) ? (void)0 : __assert("diagnostic "
, "/usr/src/sys/dev/usb/uhci.c", 573, "sc->sc_intrxfer == NULL"
));
574
575 /* XXX free other data structures XXX */
576
577 return (rv);
578}
579
580struct usbd_xfer *
581uhci_allocx(struct usbd_bus *bus)
582{
583 struct uhci_xfer *ux;
584
585 ux = pool_get(uhcixfer, PR_NOWAIT0x0002 | PR_ZERO0x0008);
586#ifdef DIAGNOSTIC1
587 if (ux != NULL((void *)0))
588 ux->isdone = 1;
589#endif
590 return ((struct usbd_xfer *)ux);
591}
592
593void
594uhci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
595{
596 struct uhci_xfer *ux = (struct uhci_xfer*)xfer;
597
598#ifdef DIAGNOSTIC1
599 if (!ux->isdone) {
600 printf("%s: !isdone\n", __func__);
601 return;
602 }
603#endif
604 pool_put(uhcixfer, ux);
605}
606
607#ifdef UHCI_DEBUG
608void
609uhci_dumpregs(struct uhci_softc *sc)
610{
611 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
612 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
613 sc->sc_bus.bdev.dv_xname,
614 UREAD2(sc, UHCI_CMD),
615 UREAD2(sc, UHCI_STS),
616 UREAD2(sc, UHCI_INTR),
617 UREAD2(sc, UHCI_FRNUM),
618 UREAD4(sc, UHCI_FLBASEADDR),
619 UREAD1(sc, UHCI_SOF),
620 UREAD2(sc, UHCI_PORTSC1),
621 UREAD2(sc, UHCI_PORTSC2)));
622}
623
624void
625uhci_dump_td(struct uhci_soft_td *p)
626{
627 char sbuf[128], sbuf2[128];
628
629 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
630 "token=0x%08lx buffer=0x%08lx\n",
631 p, (long)p->physaddr,
632 (long)letoh32(p->td.td_link),
633 (long)letoh32(p->td.td_status),
634 (long)letoh32(p->td.td_token),
635 (long)letoh32(p->td.td_buffer)));
636
637 bitmask_snprintf((u_int32_t)letoh32(p->td.td_link)((__uint32_t)(p->td.td_link)), "\20\1T\2Q\3VF",
638 sbuf, sizeof(sbuf));
639 bitmask_snprintf((u_int32_t)letoh32(p->td.td_status)((__uint32_t)(p->td.td_status)),
640 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
641 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
642 sbuf2, sizeof(sbuf2));
643
644 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
645 "D=%d,maxlen=%d\n", sbuf, sbuf2,
646 UHCI_TD_GET_ERRCNT(letoh32(p->td.td_status)),
647 UHCI_TD_GET_ACTLEN(letoh32(p->td.td_status)),
648 UHCI_TD_GET_PID(letoh32(p->td.td_token)),
649 UHCI_TD_GET_DEVADDR(letoh32(p->td.td_token)),
650 UHCI_TD_GET_ENDPT(letoh32(p->td.td_token)),
651 UHCI_TD_GET_DT(letoh32(p->td.td_token)),
652 UHCI_TD_GET_MAXLEN(letoh32(p->td.td_token))));
653}
654
655void
656uhci_dump_qh(struct uhci_soft_qh *sqh)
657{
658 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
659 (int)sqh->physaddr, letoh32(sqh->qh.qh_hlink),
660 letoh32(sqh->qh.qh_elink)));
661}
662
663
664void
665uhci_dump(void)
666{
667 uhci_dump_all(thesc);
668}
669
670void
671uhci_dump_all(struct uhci_softc *sc)
672{
673 uhci_dumpregs(sc);
674 printf("intrs=%d\n", sc->sc_bus.no_intrs);
675 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
676 uhci_dump_qh(sc->sc_lctl_start);
677}
678
679
680void
681uhci_dump_qhs(struct uhci_soft_qh *sqh)
682{
683 uhci_dump_qh(sqh);
684
685 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
686 * Traverses sideways first, then down.
687 *
688 * QH1
689 * QH2
690 * No QH
691 * TD2.1
692 * TD2.2
693 * TD1.1
694 * etc.
695 *
696 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
697 */
698
699
700 if (sqh->hlink != NULL((void *)0) && !(letoh32(sqh->qh.qh_hlink)((__uint32_t)(sqh->qh.qh_hlink)) & UHCI_PTR_T0x00000001))
701 uhci_dump_qhs(sqh->hlink);
702 else
703 DPRINTF(("No QH\n"));
704
705 if (sqh->elink != NULL((void *)0) && !(letoh32(sqh->qh.qh_elink)((__uint32_t)(sqh->qh.qh_elink)) & UHCI_PTR_T0x00000001))
706 uhci_dump_tds(sqh->elink);
707 else
708 DPRINTF(("No TD\n"));
709}
710
711void
712uhci_dump_tds(struct uhci_soft_td *std)
713{
714 struct uhci_soft_td *td;
715
716 for(td = std; td != NULL((void *)0); td = td->link.std) {
717 uhci_dump_td(td);
718
719 /* Check whether the link pointer in this TD marks
720 * the link pointer as end of queue. This avoids
721 * printing the free list in case the queue/TD has
722 * already been moved there (seatbelt).
723 */
724 if (letoh32(td->td.td_link)((__uint32_t)(td->td.td_link)) & UHCI_PTR_T0x00000001 ||
725 letoh32(td->td.td_link)((__uint32_t)(td->td.td_link)) == 0)
726 break;
727 }
728}
729
730void
731uhci_dump_xfer(struct uhci_xfer *ex)
732{
733 struct usbd_pipe *pipe;
734 usb_endpoint_descriptor_t *ed;
735 struct usbd_device *dev;
736
737#ifdef DIAGNOSTIC1
738#define DONE ex->isdone
739#else
740#define DONE 0
741#endif
742 if (ex == NULL((void *)0)) {
743 printf("ex NULL\n");
744 return;
745 }
746 pipe = ex->xfer.pipe;
747 if (pipe == NULL((void *)0)) {
748 printf("ex %p: done=%d pipe=NULL\n",
749 ex, DONE);
750 return;
751 }
752 if (pipe->endpoint == NULL((void *)0)) {
753 printf("ex %p: done=%d pipe=%p pipe->endpoint=NULL\n",
754 ex, DONE, pipe);
755 return;
756 }
757 if (pipe->device == NULL((void *)0)) {
758 printf("ex %p: done=%d pipe=%p pipe->device=NULL\n",
759 ex, DONE, pipe);
760 return;
761 }
762 ed = pipe->endpoint->edesc;
763 dev = pipe->device;
764 printf("ex %p: done=%d dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
765 ex, DONE, dev,
766 UGETW(dev->ddesc.idVendor)(*(u_int16_t *)(dev->ddesc.idVendor)),
767 UGETW(dev->ddesc.idProduct)(*(u_int16_t *)(dev->ddesc.idProduct)),
768 dev->address, pipe,
769 ed->bEndpointAddress, ed->bmAttributes);
770#undef DONE
771}
772
773void uhci_dump_xfers(struct uhci_softc *sc);
774void
775uhci_dump_xfers(struct uhci_softc *sc)
776{
777 struct uhci_xfer *ex;
778
779 printf("ex list:\n");
780 for (ex = LIST_FIRST(&sc->sc_intrhead)((&sc->sc_intrhead)->lh_first); ex; ex = LIST_NEXT(ex, inext)((ex)->inext.le_next))
781 uhci_dump_xfer(ex);
782}
783
784void exdump(void);
785void exdump(void) { uhci_dump_xfers(thesc); }
786
787#endif
788
789/*
790 * This routine is executed periodically and simulates interrupts
791 * from the root controller interrupt pipe for port status change.
792 */
793void
794uhci_poll_hub(void *addr)
795{
796 struct uhci_softc *sc = addr;
797 struct usbd_xfer *xfer;
798 int s;
799 u_char *p;
800
801 if (sc->sc_bus.dying)
802 return;
803
804 xfer = sc->sc_intrxfer;
805 if (xfer == NULL((void *)0))
806 return;
807
808 p = KERNADDR(&xfer->dmabuf, 0)((void *)((char *)((&xfer->dmabuf)->block->kaddr
+ (&xfer->dmabuf)->offs) + (0)));
809 p[0] = 0;
810 if (UREAD2(sc, UHCI_PORTSC10x010) & (UHCI_PORTSC_CSC0x0002|UHCI_PORTSC_OCIC0x0800))
811 p[0] |= 1<<1;
812 if (UREAD2(sc, UHCI_PORTSC20x012) & (UHCI_PORTSC_CSC0x0002|UHCI_PORTSC_OCIC0x0800))
813 p[0] |= 1<<2;
814 if (p[0] == 0) {
815 /* No change, try again in a while */
816 timeout_add_msec(&sc->sc_root_intr, 255);
817 return;
818 }
819
820 xfer->actlen = xfer->length;
821 xfer->status = USBD_NORMAL_COMPLETION;
822
823 s = splusb()splraise(0x2);
824 xfer->device->bus->intr_context++;
825 usb_transfer_complete(xfer);
826 xfer->device->bus->intr_context--;
827 splx(s)spllower(s);
828}
829
830void
831uhci_root_ctrl_done(struct usbd_xfer *xfer)
832{
833}
834
835/*
836 * Let the last QH loop back to the high speed control transfer QH.
837 * This is what intel calls "bandwidth reclamation" and improves
838 * USB performance a lot for some devices.
839 * If we are already looping, just count it.
840 */
841void
842uhci_add_loop(struct uhci_softc *sc) {
843#ifdef UHCI_DEBUG
844 if (uhcinoloop)
845 return;
846#endif
847 if (++sc->sc_loops == 1) {
848 DPRINTFN(5,("uhci_add_loop\n"));
849 /* Note, we don't loop back the soft pointer. */
850 sc->sc_last_qh->qh.qh_hlink =
851 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH)((__uint32_t)(sc->sc_hctl_start->physaddr | 0x00000002)
);
852 }
853}
854
855void
856uhci_rem_loop(struct uhci_softc *sc) {
857#ifdef UHCI_DEBUG
858 if (uhcinoloop)
859 return;
860#endif
861 if (--sc->sc_loops == 0) {
862 DPRINTFN(5,("uhci_rem_loop\n"));
863 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
864 }
865}
866
867/* Add high speed control QH, called at splusb(). */
868void
869uhci_add_hs_ctrl(struct uhci_softc *sc, struct uhci_soft_qh *sqh)
870{
871 struct uhci_soft_qh *eqh;
872
873 splsoftassert(IPL_SOFTUSB)do { if (splassert_ctl > 0) { splassert_check(0x2, __func__
); } } while (0);
874
875 DPRINTFN(10, ("uhci_add_hs_ctrl: sqh=%p\n", sqh));
876 eqh = sc->sc_hctl_end;
877 sqh->hlink = eqh->hlink;
878 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
879 eqh->hlink = sqh;
880 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH)((__uint32_t)(sqh->physaddr | 0x00000002));
881 sc->sc_hctl_end = sqh;
882#ifdef UHCI_CTL_LOOP
883 uhci_add_loop(sc);
884#endif
885}
886
887/* Remove high speed control QH, called at splusb(). */
888void
889uhci_remove_hs_ctrl(struct uhci_softc *sc, struct uhci_soft_qh *sqh)
890{
891 struct uhci_soft_qh *pqh;
892
893 splsoftassert(IPL_SOFTUSB)do { if (splassert_ctl > 0) { splassert_check(0x2, __func__
); } } while (0);
894
895 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
896#ifdef UHCI_CTL_LOOP
897 uhci_rem_loop(sc);
898#endif
899 /*
900 * The T bit should be set in the elink of the QH so that the HC
901 * doesn't follow the pointer. This condition may fail if the
902 * the transferred packet was short so that the QH still points
903 * at the last used TD.
904 * In this case we set the T bit and wait a little for the HC
905 * to stop looking at the TD.
906 */
907 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T)((__uint32_t)(0x00000001)))) {
908 sqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
909 delay(UHCI_QH_REMOVE_DELAY)(*delay_func)(5);
910 }
911
912 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
913 pqh->hlink = sqh->hlink;
914 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
915 delay(UHCI_QH_REMOVE_DELAY)(*delay_func)(5);
916 if (sc->sc_hctl_end == sqh)
917 sc->sc_hctl_end = pqh;
918}
919
920/* Add low speed control QH, called at splusb(). */
921void
922uhci_add_ls_ctrl(struct uhci_softc *sc, struct uhci_soft_qh *sqh)
923{
924 struct uhci_soft_qh *eqh;
925
926 splsoftassert(IPL_SOFTUSB)do { if (splassert_ctl > 0) { splassert_check(0x2, __func__
); } } while (0);
927
928 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
929 eqh = sc->sc_lctl_end;
930 sqh->hlink = eqh->hlink;
931 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
932 eqh->hlink = sqh;
933 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH)((__uint32_t)(sqh->physaddr | 0x00000002));
934 sc->sc_lctl_end = sqh;
935}
936
937/* Remove low speed control QH, called at splusb(). */
938void
939uhci_remove_ls_ctrl(struct uhci_softc *sc, struct uhci_soft_qh *sqh)
940{
941 struct uhci_soft_qh *pqh;
942
943 splsoftassert(IPL_SOFTUSB)do { if (splassert_ctl > 0) { splassert_check(0x2, __func__
); } } while (0);
944
945 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
946 /* See comment in uhci_remove_hs_ctrl() */
947 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T)((__uint32_t)(0x00000001)))) {
948 sqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
949 delay(UHCI_QH_REMOVE_DELAY)(*delay_func)(5);
950 }
951 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
952 pqh->hlink = sqh->hlink;
953 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
954 delay(UHCI_QH_REMOVE_DELAY)(*delay_func)(5);
955 if (sc->sc_lctl_end == sqh)
956 sc->sc_lctl_end = pqh;
957}
958
959/* Add bulk QH, called at splusb(). */
960void
961uhci_add_bulk(struct uhci_softc *sc, struct uhci_soft_qh *sqh)
962{
963 struct uhci_soft_qh *eqh;
964
965 splsoftassert(IPL_SOFTUSB)do { if (splassert_ctl > 0) { splassert_check(0x2, __func__
); } } while (0);
966
967 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
968 eqh = sc->sc_bulk_end;
969 sqh->hlink = eqh->hlink;
970 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
971 eqh->hlink = sqh;
972 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH)((__uint32_t)(sqh->physaddr | 0x00000002));
973 sc->sc_bulk_end = sqh;
974 uhci_add_loop(sc);
975}
976
977/* Remove bulk QH, called at splusb(). */
978void
979uhci_remove_bulk(struct uhci_softc *sc, struct uhci_soft_qh *sqh)
980{
981 struct uhci_soft_qh *pqh;
982
983 splsoftassert(IPL_SOFTUSB)do { if (splassert_ctl > 0) { splassert_check(0x2, __func__
); } } while (0);
984
985 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
986 uhci_rem_loop(sc);
987 /* See comment in uhci_remove_hs_ctrl() */
988 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T)((__uint32_t)(0x00000001)))) {
989 sqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
990 delay(UHCI_QH_REMOVE_DELAY)(*delay_func)(5);
991 }
992 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
993 pqh->hlink = sqh->hlink;
994 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
995 delay(UHCI_QH_REMOVE_DELAY)(*delay_func)(5);
996 if (sc->sc_bulk_end == sqh)
997 sc->sc_bulk_end = pqh;
998}
999
1000int uhci_intr1(struct uhci_softc *);
1001
1002int
1003uhci_intr(void *arg)
1004{
1005 struct uhci_softc *sc = arg;
1006
1007 if (sc->sc_bus.dying)
1008 return (0);
1009 if (sc->sc_bus.use_polling)
1010 return (0);
1011 return (uhci_intr1(sc));
1012}
1013
1014int
1015uhci_intr1(struct uhci_softc *sc)
1016{
1017 int status;
1018 int ack;
1019
1020 status = UREAD2(sc, UHCI_STS0x02);
1021 if (status == 0xffff) {
1022 sc->sc_bus.dying = 1;
1023 return (0);
1024 }
1025 status &= UHCI_STS_ALLINTRS0x003f;
1026 if (status == 0) /* The interrupt was not for us. */
1027 return (0);
1028
1029#ifdef UHCI_DEBUG
1030 if (uhcidebug > 15) {
1031 DPRINTF(("%s: uhci_intr1\n", sc->sc_bus.bdev.dv_xname));
1032 uhci_dumpregs(sc);
1033 }
1034#endif
1035
1036 if (sc->sc_suspend != DVACT_RESUME4) {
1037 printf("%s: interrupt while not operating ignored\n",
1038 sc->sc_bus.bdev.dv_xname);
1039 return (0);
1040 }
1041
1042 ack = 0;
1043 if (status & UHCI_STS_USBINT0x0001)
1044 ack |= UHCI_STS_USBINT0x0001;
1045 if (status & UHCI_STS_USBEI0x0002)
1046 ack |= UHCI_STS_USBEI0x0002;
1047 if (status & UHCI_STS_RD0x0004) {
1048 ack |= UHCI_STS_RD0x0004;
1049#ifdef UHCI_DEBUG
1050 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname);
1051#endif
1052 }
1053 if (status & UHCI_STS_HSE0x0008) {
1054 ack |= UHCI_STS_HSE0x0008;
1055 printf("%s: host system error\n", sc->sc_bus.bdev.dv_xname);
1056 }
1057 if (status & UHCI_STS_HCPE0x0010) {
1058 ack |= UHCI_STS_HCPE0x0010;
1059 printf("%s: host controller process error\n",
1060 sc->sc_bus.bdev.dv_xname);
1061 }
1062 if (status & UHCI_STS_HCH0x0020) {
1063 /* no acknowledge needed */
1064 if (!sc->sc_bus.dying) {
1065 printf("%s: host controller halted\n",
1066 sc->sc_bus.bdev.dv_xname);
1067#ifdef UHCI_DEBUG
1068 uhci_dump_all(sc);
1069#endif
1070 }
1071 sc->sc_bus.dying = 1;
1072 }
1073
1074 if (!ack)
1075 return (0); /* nothing to acknowledge */
1076 UWRITE2(sc, UHCI_STS, ack)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x02)), ((ack)))); } while ( 0); /* acknowledge the ints */
1077
1078 sc->sc_bus.no_intrs++;
1079 usb_schedsoftintr(&sc->sc_bus);
1080
1081 DPRINTFN(15, ("%s: uhci_intr1: exit\n", sc->sc_bus.bdev.dv_xname));
1082
1083 return (1);
1084}
1085
1086void
1087uhci_softintr(void *v)
1088{
1089 struct uhci_softc *sc = v;
1090 struct uhci_xfer *ux, *nextex;
1091
1092 DPRINTFN(10,("%s: uhci_softintr (%d)\n", sc->sc_bus.bdev.dv_xname,
1093 sc->sc_bus.intr_context));
1094
1095 if (sc->sc_bus.dying)
1096 return;
1097
1098 sc->sc_bus.intr_context++;
1099
1100 /*
1101 * Interrupts on UHCI really suck. When the host controller
1102 * interrupts because a transfer is completed there is no
1103 * way of knowing which transfer it was. You can scan down
1104 * the TDs and QHs of the previous frame to limit the search,
1105 * but that assumes that the interrupt was not delayed by more
1106 * than 1 ms, which may not always be true (e.g. after debug
1107 * output on a slow console).
1108 * We scan all interrupt descriptors to see if any have
1109 * completed.
1110 */
1111 for (ux = LIST_FIRST(&sc->sc_intrhead)((&sc->sc_intrhead)->lh_first); ux; ux = nextex) {
1112 nextex = LIST_NEXT(ux, inext)((ux)->inext.le_next);
1113 uhci_check_intr(sc, &ux->xfer);
1114 }
1115
1116 if (sc->sc_softwake) {
1117 sc->sc_softwake = 0;
1118 wakeup(&sc->sc_softwake);
1119 }
1120
1121 sc->sc_bus.intr_context--;
1122}
1123
1124void
1125uhci_check_intr(struct uhci_softc *sc, struct usbd_xfer *xfer)
1126{
1127 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
1128 struct uhci_soft_td *std, *lstd;
1129 u_int32_t status;
1130
1131 DPRINTFN(15, ("%s: ux=%p\n", __func__, ux));
1132#ifdef DIAGNOSTIC1
1133 if (ux == NULL((void *)0)) {
1134 printf("%s: no ux? %p\n", __func__, ux);
1135 return;
1136 }
1137#endif
1138 if (xfer->status == USBD_CANCELLED || xfer->status == USBD_TIMEOUT) {
1139 DPRINTF(("%s: aborted xfer=%p\n", __func__, xfer));
1140 return;
1141 }
1142
1143 if (ux->stdstart == NULL((void *)0))
1144 return;
1145 lstd = ux->stdend;
1146#ifdef DIAGNOSTIC1
1147 if (lstd == NULL((void *)0)) {
1148 printf("%s: std==0\n", __func__);
1149 return;
1150 }
1151#endif
1152 /*
1153 * If the last TD is still active we need to check whether there
1154 * is an error somewhere in the middle, or whether there was a
1155 * short packet (SPD and not ACTIVE).
1156 */
1157 if (letoh32(lstd->td.td_status)((__uint32_t)(lstd->td.td_status)) & UHCI_TD_ACTIVE0x00800000) {
1158 DPRINTFN(12, ("%s: active ux=%p\n", __func__, ux));
1159 for (std = ux->stdstart; std != lstd; std = std->link.std) {
1160 status = letoh32(std->td.td_status)((__uint32_t)(std->td.td_status));
1161 /* If there's an active TD the xfer isn't done. */
1162 if (status & UHCI_TD_ACTIVE0x00800000)
1163 break;
1164 /* Any kind of error makes the xfer done. */
1165 if (status & UHCI_TD_STALLED0x00400000)
1166 goto done;
1167 /* We want short packets, and it is short: it's done */
1168 if ((status & UHCI_TD_SPD0x20000000) &&
1169 UHCI_TD_GET_ACTLEN(status)(((status) + 1) & 0x3ff) <
1170 UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token))((((((__uint32_t)(std->td.td_token))) >> 21) + 1) &
0x7ff))
1171 goto done;
1172 }
1173 DPRINTFN(12, ("%s: ux=%p std=%p still active\n", __func__,
1174 ux, ux->stdstart));
1175 return;
1176 }
1177 done:
1178 DPRINTFN(12, ("uhci_check_intr: ux=%p done\n", ux));
1179 timeout_del(&xfer->timeout_handle);
1180 usb_rem_task(xfer->pipe->device, &xfer->abort_task);
1181 uhci_idone(xfer);
1182}
1183
1184/* Called at splusb() */
1185void
1186uhci_idone(struct usbd_xfer *xfer)
1187{
1188 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
1189 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1190 struct uhci_soft_td *std;
1191 u_int32_t status = 0, nstatus;
1192 int actlen;
1193
1194 DPRINTFN(12, ("uhci_idone: ux=%p\n", ux));
1195#ifdef DIAGNOSTIC1
1196 {
1197 int s = splhigh()splraise(0xd);
1198 if (ux->isdone) {
1199 splx(s)spllower(s);
1200#ifdef UHCI_DEBUG
1201 printf("uhci_idone: ux is done!\n ");
1202 uhci_dump_xfer(ux);
1203#else
1204 printf("uhci_idone: ux=%p is done!\n", ux);
1205#endif
1206 return;
1207 }
1208 ux->isdone = 1;
1209 splx(s)spllower(s);
1210 }
1211#endif
1212
1213 if (xfer->nframes != 0) {
1214 /* Isoc transfer, do things differently. */
1215 struct uhci_soft_td **stds = upipe->u.iso.stds;
1216 int i, n, nframes, len;
1217
1218 DPRINTFN(5,("uhci_idone: ux=%p isoc ready\n", ux));
1219
1220 nframes = xfer->nframes;
1221 actlen = 0;
1222 n = ux->curframe;
1223 for (i = 0; i < nframes; i++) {
1224 std = stds[n];
1225#ifdef UHCI_DEBUG
1226 if (uhcidebug > 5) {
1227 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1228 uhci_dump_td(std);
1229 }
1230#endif
1231 if (++n >= UHCI_VFRAMELIST_COUNT128)
1232 n = 0;
1233 status = letoh32(std->td.td_status)((__uint32_t)(std->td.td_status));
1234 len = UHCI_TD_GET_ACTLEN(status)(((status) + 1) & 0x3ff);
1235 xfer->frlengths[i] = len;
1236 actlen += len;
1237 }
1238 upipe->u.iso.inuse -= nframes;
1239 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1240 usbd_xfer_isread(xfer) ?
1241 BUS_DMASYNC_POSTREAD0x02 : BUS_DMASYNC_POSTWRITE0x08);
1242 xfer->actlen = actlen;
1243 xfer->status = USBD_NORMAL_COMPLETION;
1244 goto end;
1245 }
1246
1247#ifdef UHCI_DEBUG
1248 DPRINTFN(10, ("uhci_idone: ux=%p, xfer=%p, pipe=%p ready\n",
1249 ux, xfer, upipe));
1250 if (uhcidebug > 10)
1251 uhci_dump_tds(ux->stdstart);
1252#endif
1253
1254 /* The transfer is done, compute actual length and status. */
1255 actlen = 0;
1256 for (std = ux->stdstart; std != NULL((void *)0); std = std->link.std) {
1257 nstatus = letoh32(std->td.td_status)((__uint32_t)(std->td.td_status));
1258 if (nstatus & UHCI_TD_ACTIVE0x00800000)
1259 break;
1260
1261 status = nstatus;
1262 if (UHCI_TD_GET_PID(letoh32(std->td.td_token))((((__uint32_t)(std->td.td_token))) & 0xff) !=
1263 UHCI_TD_PID_SETUP0x0000002d)
1264 actlen += UHCI_TD_GET_ACTLEN(status)(((status) + 1) & 0x3ff);
1265 else {
1266 /*
1267 * UHCI will report CRCTO in addition to a STALL or NAK
1268 * for a SETUP transaction. See section 3.2.2, "TD
1269 * CONTROL AND STATUS".
1270 */
1271 if (status & (UHCI_TD_STALLED0x00400000 | UHCI_TD_NAK0x00080000))
1272 status &= ~UHCI_TD_CRCTO0x00040000;
1273 }
1274 }
1275 /* If there are left over TDs we need to update the toggle. */
1276 if (std != NULL((void *)0))
1277 upipe->nexttoggle = UHCI_TD_GET_DT(letoh32(std->td.td_token))(((((__uint32_t)(std->td.td_token))) >> 19) & 1);
1278
1279 status &= UHCI_TD_ERROR(0x00020000|0x00040000|0x00100000|0x00200000|0x00400000);
1280 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1281 actlen, status));
1282 xfer->actlen = actlen;
1283 if (status != 0) {
1284#ifdef UHCI_DEBUG
1285 char sbuf[128];
1286
1287 bitmask_snprintf((u_int32_t)status,
1288 "\20\22BITSTUFF\23CRCTO\24NAK\25"
1289 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1290 sbuf, sizeof(sbuf));
1291
1292 DPRINTFN((status == UHCI_TD_STALLED)*10,
1293 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1294 "status 0x%s\n",
1295 xfer->device->address,
1296 xfer->pipe->endpoint->edesc->bEndpointAddress,
1297 sbuf));
1298#endif
1299
1300 if (status == UHCI_TD_STALLED0x00400000)
1301 xfer->status = USBD_STALLED;
1302 else
1303 xfer->status = USBD_IOERROR; /* more info XXX */
1304 } else {
1305 if (xfer->actlen)
1306 usb_syncmem(&xfer->dmabuf, 0, xfer->actlen,
1307 usbd_xfer_isread(xfer) ?
1308 BUS_DMASYNC_POSTREAD0x02 : BUS_DMASYNC_POSTWRITE0x08);
1309 xfer->status = USBD_NORMAL_COMPLETION;
1310 }
1311
1312 end:
1313 usb_transfer_complete(xfer);
1314 DPRINTFN(12, ("uhci_idone: ux=%p done\n", ux));
1315}
1316
1317void
1318uhci_timeout(void *addr)
1319{
1320 struct usbd_xfer *xfer = addr;
1321 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
1322
1323 if (sc->sc_bus.dying) {
1324 uhci_timeout_task(addr);
1325 return;
1326 }
1327
1328 usb_init_task(&xfer->abort_task, uhci_timeout_task, addr,((&xfer->abort_task)->fun = (uhci_timeout_task), (&
xfer->abort_task)->arg = (addr), (&xfer->abort_task
)->type = (2), (&xfer->abort_task)->state = 0x0)
1329 USB_TASK_TYPE_ABORT)((&xfer->abort_task)->fun = (uhci_timeout_task), (&
xfer->abort_task)->arg = (addr), (&xfer->abort_task
)->type = (2), (&xfer->abort_task)->state = 0x0);
1330 usb_add_task(xfer->device, &xfer->abort_task);
1331}
1332
1333void
1334uhci_timeout_task(void *addr)
1335{
1336 struct usbd_xfer *xfer = addr;
1337 int s;
1338
1339 DPRINTF(("%s: xfer=%p\n", __func__, xfer));
1340
1341 s = splusb()splraise(0x2);
1342 uhci_abort_xfer(xfer, USBD_TIMEOUT);
1343 splx(s)spllower(s);
1344}
1345
1346void
1347uhci_poll(struct usbd_bus *bus)
1348{
1349 struct uhci_softc *sc = (struct uhci_softc *)bus;
1350
1351 if (UREAD2(sc, UHCI_STS0x02) & UHCI_STS_ALLINTRS0x003f)
1352 uhci_intr1(sc);
1353}
1354
1355void
1356uhci_reset(struct uhci_softc *sc)
1357{
1358 int n;
1359
1360 UHCICMD(sc, UHCI_CMD_HCRESET)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((0x0002)))); } while ( 0);
1361 /* The reset bit goes low when the controller is done. */
1362 for (n = 0; n < UHCI_RESET_TIMEOUT100 &&
1363 (UREAD2(sc, UHCI_CMD0x00) & UHCI_CMD_HCRESET0x0002); n++)
1364 usb_delay_ms(&sc->sc_bus, 1);
1365 if (n >= UHCI_RESET_TIMEOUT100)
1366 printf("%s: controller did not reset\n",
1367 sc->sc_bus.bdev.dv_xname);
1368}
1369
1370usbd_status
1371uhci_run(struct uhci_softc *sc, int run)
1372{
1373 int s, n, running;
1374 u_int16_t cmd;
1375
1376 run = run != 0;
1377 s = splhardusb()splraise(0x3);
1378 DPRINTF(("uhci_run: setting run=%d\n", run));
1379 cmd = UREAD2(sc, UHCI_CMD0x00);
1380 if (run)
1381 cmd |= UHCI_CMD_RS0x0001;
1382 else
1383 cmd &= ~UHCI_CMD_RS0x0001;
1384 UHCICMD(sc, cmd)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((0x00)), ((cmd)))); } while ( 0);
1385 for(n = 0; n < 10; n++) {
1386 running = !(UREAD2(sc, UHCI_STS0x02) & UHCI_STS_HCH0x0020);
1387 /* return when we've entered the state we want */
1388 if (run == running) {
1389 splx(s)spllower(s);
1390 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1391 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1392 return (USBD_NORMAL_COMPLETION);
1393 }
1394 usb_delay_ms(&sc->sc_bus, 1);
1395 }
1396 splx(s)spllower(s);
1397 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname,
1398 run ? "start" : "stop");
1399 return (USBD_IOERROR);
1400}
1401
1402/*
1403 * Memory management routines.
1404 * uhci_alloc_std allocates TDs
1405 * uhci_alloc_sqh allocates QHs
1406 * These two routines do their own free list management,
1407 * partly for speed, partly because allocating DMAable memory
1408 * has page size granularity so much memory would be wasted if
1409 * only one TD/QH (32 bytes) was placed in each allocated chunk.
1410 */
1411
1412struct uhci_soft_td *
1413uhci_alloc_std(struct uhci_softc *sc)
1414{
1415 struct uhci_soft_td *std = NULL((void *)0);
1416 usbd_status err;
1417 int i, offs;
1418 struct usb_dma dma;
1419 int s;
1420
1421 s = splusb()splraise(0x2);
1422 if (sc->sc_freetds == NULL((void *)0)) {
1423 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1424 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE((sizeof (struct uhci_soft_td) + 16 - 1) / 16 * 16) * UHCI_STD_CHUNK128,
1425 UHCI_TD_ALIGN16, USB_DMA_COHERENT(1 << 0), &dma);
1426 if (err)
1427 goto out;
1428 for(i = 0; i < UHCI_STD_CHUNK128; i++) {
1429 offs = i * UHCI_STD_SIZE((sizeof (struct uhci_soft_td) + 16 - 1) / 16 * 16);
1430 std = KERNADDR(&dma, offs)((void *)((char *)((&dma)->block->kaddr + (&dma
)->offs) + (offs)));
1431 std->physaddr = DMAADDR(&dma, offs)((&dma)->block->map->dm_segs[0].ds_addr + (&
dma)->offs + (offs));
1432 std->link.std = sc->sc_freetds;
1433 sc->sc_freetds = std;
1434 }
1435 }
1436
1437 std = sc->sc_freetds;
1438 sc->sc_freetds = std->link.std;
1439 memset(&std->td, 0, sizeof(struct uhci_td))__builtin_memset((&std->td), (0), (sizeof(struct uhci_td
)));
1440
1441out:
1442 splx(s)spllower(s);
1443 return (std);
1444}
1445
1446void
1447uhci_free_std(struct uhci_softc *sc, struct uhci_soft_td *std)
1448{
1449 int s;
1450
1451#ifdef DIAGNOSTIC1
1452#define TD_IS_FREE0x12345678 0x12345678
1453 if (letoh32(std->td.td_token)((__uint32_t)(std->td.td_token)) == TD_IS_FREE0x12345678) {
1454 printf("uhci_free_std: freeing free TD %p\n", std);
1455 return;
1456 }
1457 std->td.td_token = htole32(TD_IS_FREE)((__uint32_t)(0x12345678));
1458#endif
1459
1460 s = splusb()splraise(0x2);
1461 std->link.std = sc->sc_freetds;
1462 sc->sc_freetds = std;
1463 splx(s)spllower(s);
1464}
1465
1466struct uhci_soft_qh *
1467uhci_alloc_sqh(struct uhci_softc *sc)
1468{
1469 struct uhci_soft_qh *sqh = NULL((void *)0);
1470 usbd_status err;
1471 int i, offs;
1472 struct usb_dma dma;
1473 int s;
1474
1475 s = splusb()splraise(0x2);
1476 if (sc->sc_freeqhs == NULL((void *)0)) {
1477 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1478 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE((sizeof (struct uhci_soft_qh) + 16 - 1) / 16 * 16) * UHCI_SQH_CHUNK128,
1479 UHCI_QH_ALIGN16, USB_DMA_COHERENT(1 << 0), &dma);
1480 if (err)
1481 goto out;
1482 for (i = 0; i < UHCI_SQH_CHUNK128; i++) {
1483 offs = i * UHCI_SQH_SIZE((sizeof (struct uhci_soft_qh) + 16 - 1) / 16 * 16);
1484 sqh = KERNADDR(&dma, offs)((void *)((char *)((&dma)->block->kaddr + (&dma
)->offs) + (offs)));
1485 sqh->physaddr = DMAADDR(&dma, offs)((&dma)->block->map->dm_segs[0].ds_addr + (&
dma)->offs + (offs));
1486 sqh->hlink = sc->sc_freeqhs;
1487 sc->sc_freeqhs = sqh;
1488 }
1489 }
1490 sqh = sc->sc_freeqhs;
1491 sc->sc_freeqhs = sqh->hlink;
1492 memset(&sqh->qh, 0, sizeof(struct uhci_qh))__builtin_memset((&sqh->qh), (0), (sizeof(struct uhci_qh
)));
1493
1494out:
1495 splx(s)spllower(s);
1496 return (sqh);
1497}
1498
1499void
1500uhci_free_sqh(struct uhci_softc *sc, struct uhci_soft_qh *sqh)
1501{
1502 sqh->hlink = sc->sc_freeqhs;
1503 sc->sc_freeqhs = sqh;
1504}
1505
1506void
1507uhci_free_std_chain(struct uhci_softc *sc, struct uhci_soft_td *std,
1508 struct uhci_soft_td *stdend)
1509{
1510 struct uhci_soft_td *p;
1511
1512 for (; std != stdend; std = p) {
1513 p = std->link.std;
1514 uhci_free_std(sc, std);
1515 }
1516}
1517
1518usbd_status
1519uhci_alloc_std_chain(struct uhci_softc *sc, u_int len, struct usbd_xfer *xfer,
1520 struct uhci_soft_td **sp, struct uhci_soft_td **ep)
1521{
1522 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1523 struct uhci_soft_td *p, *lastp;
1524 uhci_physaddr_t lastlink;
1525 int i, ntd, l, tog, mps;
1526 u_int32_t status;
1527 u_int16_t flags = xfer->flags;
1528 int rd = usbd_xfer_isread(xfer);
1529 struct usb_dma *dma = &xfer->dmabuf;
1530 int addr = xfer->device->address;
1531 int endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
1532
1533 DPRINTFN(8, ("%s: addr=%d endpt=%d len=%u speed=%d flags=0x%x\n",
1534 __func__, addr, UE_GET_ADDR(endpt), len, xfer->device->speed,
1535 flags));
1536
1537 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1538 usbd_xfer_isread(xfer) ?
7
←
Assuming the condition is false
→
8
←
'?' condition is false
→
1539 BUS_DMASYNC_PREREAD0x01 : BUS_DMASYNC_PREWRITE0x04);
1540
1541 mps = UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize)(*(u_int16_t *)(xfer->pipe->endpoint->edesc->wMaxPacketSize
));
1542 if (mps == 0) {
9
←
Assuming 'mps' is equal to 0
→
10
←
Taking true branch
→
1543 printf("uhci_alloc_std_chain: mps=0\n");
1544 return (USBD_INVAL);
11
←
Returning without writing to '*ep'
→
1545 }
1546 ntd = (len + mps - 1) / mps;
1547 if (len == 0)
1548 flags |= USBD_FORCE_SHORT_XFER0x08;
1549 if ((flags & USBD_FORCE_SHORT_XFER0x08) && len % mps == 0)
1550 ntd++;
1551 DPRINTFN(10, ("%s: mps=%d ntd=%d\n", __func__, mps, ntd));
1552 tog = upipe->nexttoggle;
1553 if (ntd % 2 == 0)
1554 tog ^= 1;
1555 upipe->nexttoggle = tog ^ 1;
1556 lastp = NULL((void *)0);
1557 lastlink = UHCI_PTR_T0x00000001;
1558 ntd--;
1559 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE)((((3) << 27) | 0x00800000) | 0x3ff);
1560 if (xfer->pipe->device->speed == USB_SPEED_LOW1)
1561 status |= UHCI_TD_LS0x04000000;
1562 if (flags & USBD_SHORT_XFER_OK0x04)
1563 status |= UHCI_TD_SPD0x20000000;
1564 for (i = ntd; i >= 0; i--) {
1565 p = uhci_alloc_std(sc);
1566 if (p == NULL((void *)0)) {
1567 uhci_free_std_chain(sc, lastp, NULL((void *)0));
1568 return (USBD_NOMEM);
1569 }
1570 p->link.std = lastp;
1571 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD)((__uint32_t)(lastlink | 0x00000004 | 0x00000000));
1572 lastp = p;
1573 lastlink = p->physaddr;
1574 p->td.td_status = htole32(status)((__uint32_t)(status));
1575 if (i == ntd) {
1576 /* last TD */
1577 l = len % mps;
1578 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER0x08))
1579 l = mps;
1580 *ep = p;
1581 } else
1582 l = mps;
1583 p->td.td_token =
1584 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :((__uint32_t)(rd ? ((((uint32_t)(l)-1) << 21) | (((endpt
)&0xf) << 15) | ((addr) << 8) | 0x00000069 | (
(tog) << 19)) : ((((uint32_t)(l)-1) << 21) | (((endpt
)&0xf) << 15) | ((addr) << 8) | 0x000000e1 | (
(tog) << 19))))
1585 UHCI_TD_OUT(l, endpt, addr, tog))((__uint32_t)(rd ? ((((uint32_t)(l)-1) << 21) | (((endpt
)&0xf) << 15) | ((addr) << 8) | 0x00000069 | (
(tog) << 19)) : ((((uint32_t)(l)-1) << 21) | (((endpt
)&0xf) << 15) | ((addr) << 8) | 0x000000e1 | (
(tog) << 19))));
1586 p->td.td_buffer = htole32(DMAADDR(dma, i * mps))((__uint32_t)(((dma)->block->map->dm_segs[0].ds_addr
+ (dma)->offs + (i * mps))));
1587 tog ^= 1;
1588 }
1589 *sp = lastp;
1590 DPRINTFN(10, ("%s: nexttog=%d\n", __func__, upipe->nexttoggle));
1591 return (USBD_NORMAL_COMPLETION);
1592}
1593
1594void
1595uhci_device_clear_toggle(struct usbd_pipe *pipe)
1596{
1597 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1598 upipe->nexttoggle = 0;
1599}
1600
1601usbd_status
1602uhci_device_bulk_transfer(struct usbd_xfer *xfer)
1603{
1604 usbd_status err;
1605
1606 /* Insert last in queue. */
1607 err = usb_insert_transfer(xfer);
1608 if (err)
1609 return (err);
1610
1611 /*
1612 * Pipe isn't running (otherwise err would be USBD_INPROG),
1613 * so start it first.
1614 */
1615 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)((&xfer->pipe->queue)->sqh_first)));
1616}
1617
1618usbd_status
1619uhci_device_bulk_start(struct usbd_xfer *xfer)
1620{
1621 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
1622 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1623 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
1624 struct uhci_soft_td *data, *dataend;
1625 struct uhci_soft_qh *sqh;
1626 usbd_status err;
1627 u_int len;
1628 int s;
1629
1630 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%u flags=%d ux=%p\n",
1631 xfer, xfer->length, xfer->flags, ux));
1632
1633 if (sc->sc_bus.dying)
1634 return (USBD_IOERROR);
1635
1636#ifdef DIAGNOSTIC1
1637 if (xfer->rqflags & URQ_REQUEST0x01)
1638 panic("uhci_device_bulk_start: a request");
1639#endif
1640
1641 len = xfer->length;
1642 sqh = upipe->u.bulk.sqh;
1643
1644 err = uhci_alloc_std_chain(sc, len, xfer, &data, &dataend);
1645 if (err)
1646 return (err);
1647 dataend->td.td_status |= htole32(UHCI_TD_IOC)((__uint32_t)(0x01000000));
1648
1649#ifdef UHCI_DEBUG
1650 if (uhcidebug > 8) {
1651 DPRINTF(("uhci_device_bulk_start: data(1)\n"));
1652 uhci_dump_tds(data);
1653 }
1654#endif
1655
1656 /* Set up interrupt info. */
1657 ux->stdstart = data;
1658 ux->stdend = dataend;
1659#ifdef DIAGNOSTIC1
1660 if (!ux->isdone) {
1661 printf("uhci_device_bulk_start: not done, ux=%p\n", ux);
1662 }
1663 ux->isdone = 0;
1664#endif
1665
1666 sqh->elink = data;
1667 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD)((__uint32_t)(data->physaddr | 0x00000000));
1668
1669 s = splusb()splraise(0x2);
1670 uhci_add_bulk(sc, sqh);
1671 uhci_add_intr_list(sc, ux)do { if ((((ux))->inext.le_next = (&(sc)->sc_intrhead
)->lh_first) != ((void *)0)) (&(sc)->sc_intrhead)->
lh_first->inext.le_prev = &((ux))->inext.le_next; (
&(sc)->sc_intrhead)->lh_first = ((ux)); ((ux))->
inext.le_prev = &(&(sc)->sc_intrhead)->lh_first
; } while (0);
1672
1673 if (xfer->timeout && !sc->sc_bus.use_polling) {
1674 timeout_del(&xfer->timeout_handle);
1675 timeout_set(&xfer->timeout_handle, uhci_timeout, xfer);
1676 timeout_add_msec(&xfer->timeout_handle, xfer->timeout);
1677 }
1678 xfer->status = USBD_IN_PROGRESS;
1679 splx(s)spllower(s);
1680
1681#ifdef UHCI_DEBUG
1682 if (uhcidebug > 10) {
1683 DPRINTF(("uhci_device_bulk_start: data(2)\n"));
1684 uhci_dump_tds(data);
1685 }
1686#endif
1687
1688 return (USBD_IN_PROGRESS);
1689}
1690
1691/* Abort a device bulk request. */
1692void
1693uhci_device_bulk_abort(struct usbd_xfer *xfer)
1694{
1695 DPRINTF(("uhci_device_bulk_abort:\n"));
1696 uhci_abort_xfer(xfer, USBD_CANCELLED);
1697}
1698
1699/*
1700 * Abort a device request.
1701 * If this routine is called at splusb() it guarantees that the request
1702 * will be removed from the hardware scheduling and that the callback
1703 * for it will be called with USBD_CANCELLED status.
1704 * It's impossible to guarantee that the requested transfer will not
1705 * have happened since the hardware runs concurrently.
1706 * If the transaction has already happened we rely on the ordinary
1707 * interrupt processing to process it.
1708 */
1709void
1710uhci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
1711{
1712 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
1713 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
1714 struct uhci_soft_td *std;
1715 int s;
1716
1717 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1718
1719 if (sc->sc_bus.dying) {
1720 /* If we're dying, just do the software part. */
1721 s = splusb()splraise(0x2);
1722 xfer->status = status; /* make software ignore it */
1723 timeout_del(&xfer->timeout_handle);
1724 usb_rem_task(xfer->device, &xfer->abort_task);
1725#ifdef DIAGNOSTIC1
1726 ux->isdone = 1;
1727#endif
1728 usb_transfer_complete(xfer);
1729 splx(s)spllower(s);
1730 return;
1731 }
1732
1733 if (xfer->device->bus->intr_context || !curproc({struct cpu_info *__ci; asm volatile("movq %%gs:%P1,%0" : "=r"
(__ci) :"n" (__builtin_offsetof(struct cpu_info, ci_self)));
__ci;})->ci_curproc)
1734 panic("uhci_abort_xfer: not in process context");
1735
1736 /*
1737 * Step 1: Make interrupt routine and hardware ignore xfer.
1738 */
1739 s = splusb()splraise(0x2);
1740 xfer->status = status; /* make software ignore it */
1741 timeout_del(&xfer->timeout_handle);
1742 usb_rem_task(xfer->device, &xfer->abort_task);
1743 DPRINTFN(1,("uhci_abort_xfer: stop ux=%p\n", ux));
1744 for (std = ux->stdstart; std != NULL((void *)0); std = std->link.std)
1745 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC))((__uint32_t)(~(0x00800000 | 0x01000000)));
1746 splx(s)spllower(s);
1747
1748 /*
1749 * Step 2: Wait until we know hardware has finished any possible
1750 * use of the xfer. Also make sure the soft interrupt routine
1751 * has run.
1752 */
1753 usb_delay_ms(&sc->sc_bus, 2); /* Hardware finishes in 1ms */
1754 s = splusb()splraise(0x2);
1755 sc->sc_softwake = 1;
1756 usb_schedsoftintr(&sc->sc_bus);
1757 DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
1758 tsleep_nsec(&sc->sc_softwake, PZERO22, "uhciab", INFSLP0xffffffffffffffffULL);
1759 splx(s)spllower(s);
1760
1761 /*
1762 * Step 3: Execute callback.
1763 */
1764 DPRINTFN(1,("uhci_abort_xfer: callback\n"));
1765 s = splusb()splraise(0x2);
1766#ifdef DIAGNOSTIC1
1767 ux->isdone = 1;
1768#endif
1769 usb_transfer_complete(xfer);
1770 splx(s)spllower(s);
1771}
1772
1773/* Close a device bulk pipe. */
1774void
1775uhci_device_bulk_close(struct usbd_pipe *pipe)
1776{
1777 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus;
1778 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1779
1780 uhci_free_sqh(sc, upipe->u.bulk.sqh);
1781 pipe->endpoint->savedtoggle = upipe->nexttoggle;
1782}
1783
1784usbd_status
1785uhci_device_ctrl_transfer(struct usbd_xfer *xfer)
1786{
1787 usbd_status err;
1788
1789 /* Insert last in queue. */
1790 err = usb_insert_transfer(xfer);
1791 if (err)
1792 return (err);
1793
1794 /*
1795 * Pipe isn't running (otherwise err would be USBD_INPROG),
1796 * so start it first.
1797 */
1798 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)((&xfer->pipe->queue)->sqh_first)));
1799}
1800
1801usbd_status
1802uhci_device_ctrl_start(struct usbd_xfer *xfer)
1803{
1804 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
1805 usbd_status err;
1806
1807 if (sc->sc_bus.dying)
1808 return (USBD_IOERROR);
1809
1810#ifdef DIAGNOSTIC1
1811 if (!(xfer->rqflags & URQ_REQUEST0x01))
1812 panic("uhci_device_ctrl_transfer: not a request");
1813#endif
1814
1815 err = uhci_device_request(xfer);
1816 if (err)
1817 return (err);
1818
1819 return (USBD_IN_PROGRESS);
1820}
1821
1822usbd_status
1823uhci_device_intr_transfer(struct usbd_xfer *xfer)
1824{
1825 usbd_status err;
1826
1827 /* Insert last in queue. */
1828 err = usb_insert_transfer(xfer);
1829 if (err)
1830 return (err);
1831
1832 /*
1833 * Pipe isn't running (otherwise err would be USBD_INPROG),
1834 * so start it first.
1835 */
1836 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)((&xfer->pipe->queue)->sqh_first)));
1837}
1838
1839usbd_status
1840uhci_device_intr_start(struct usbd_xfer *xfer)
1841{
1842 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
1843 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1844 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
1845 struct uhci_soft_td *data, *dataend;
1846 struct uhci_soft_qh *sqh;
1847 usbd_status err;
1848 int i, s;
1849
1850 if (sc->sc_bus.dying)
1851 return (USBD_IOERROR);
1852
1853 DPRINTFN(3,("uhci_device_intr_start: xfer=%p len=%u flags=%d\n",
1854 xfer, xfer->length, xfer->flags));
1855
1856#ifdef DIAGNOSTIC1
1857 if (xfer->rqflags & URQ_REQUEST0x01)
1858 panic("uhci_device_intr_start: a request");
1859#endif
1860
1861 upipe->u.intr.isread = usbd_xfer_isread(xfer);
1862
1863 err = uhci_alloc_std_chain(sc, xfer->length, xfer, &data, &dataend);
1864
1865 if (err)
1866 return (err);
1867 dataend->td.td_status |= htole32(UHCI_TD_IOC)((__uint32_t)(0x01000000));
1868
1869#ifdef UHCI_DEBUG
1870 if (uhcidebug > 10) {
1871 DPRINTF(("uhci_device_intr_start: data(1)\n"));
1872 uhci_dump_tds(data);
1873 uhci_dump_qh(upipe->u.intr.qhs[0]);
1874 }
1875#endif
1876
1877 s = splusb()splraise(0x2);
1878 /* Set up interrupt info. */
1879 ux->stdstart = data;
1880 ux->stdend = dataend;
1881#ifdef DIAGNOSTIC1
1882 if (!ux->isdone) {
1883 printf("uhci_device_intr_transfer: not done, ux=%p\n", ux);
1884 }
1885 ux->isdone = 0;
1886#endif
1887
1888 DPRINTFN(10,("uhci_device_intr_start: qhs[0]=%p\n",
1889 upipe->u.intr.qhs[0]));
1890 for (i = 0; i < upipe->u.intr.npoll; i++) {
1891 sqh = upipe->u.intr.qhs[i];
1892 sqh->elink = data;
1893 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD)((__uint32_t)(data->physaddr | 0x00000000));
1894 }
1895 uhci_add_intr_list(sc, ux)do { if ((((ux))->inext.le_next = (&(sc)->sc_intrhead
)->lh_first) != ((void *)0)) (&(sc)->sc_intrhead)->
lh_first->inext.le_prev = &((ux))->inext.le_next; (
&(sc)->sc_intrhead)->lh_first = ((ux)); ((ux))->
inext.le_prev = &(&(sc)->sc_intrhead)->lh_first
; } while (0);
1896 xfer->status = USBD_IN_PROGRESS;
1897 splx(s)spllower(s);
1898
1899#ifdef UHCI_DEBUG
1900 if (uhcidebug > 10) {
1901 DPRINTF(("uhci_device_intr_start: data(2)\n"));
1902 uhci_dump_tds(data);
1903 uhci_dump_qh(upipe->u.intr.qhs[0]);
1904 }
1905#endif
1906
1907 return (USBD_IN_PROGRESS);
1908}
1909
1910/* Abort a device control request. */
1911void
1912uhci_device_ctrl_abort(struct usbd_xfer *xfer)
1913{
1914 DPRINTF(("uhci_device_ctrl_abort:\n"));
1915 uhci_abort_xfer(xfer, USBD_CANCELLED);
1916}
1917
1918/* Close a device control pipe. */
1919void
1920uhci_device_ctrl_close(struct usbd_pipe *pipe)
1921{
1922}
1923
1924void
1925uhci_device_intr_abort(struct usbd_xfer *xfer)
1926{
1927 KASSERT(!xfer->pipe->repeat || xfer->pipe->intrxfer == xfer)((!xfer->pipe->repeat || xfer->pipe->intrxfer == xfer
) ? (void)0 : __assert("diagnostic ", "/usr/src/sys/dev/usb/uhci.c"
, 1927, "!xfer->pipe->repeat || xfer->pipe->intrxfer == xfer"
));
1928
1929 uhci_abort_xfer(xfer, USBD_CANCELLED);
1930}
1931
1932/* Close a device interrupt pipe. */
1933void
1934uhci_device_intr_close(struct usbd_pipe *pipe)
1935{
1936 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1937 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus;
1938 struct uhci_soft_qh **qhs;
1939 int i, npoll;
1940 int s;
1941
1942 /* Unlink descriptors from controller data structures. */
1943 qhs = upipe->u.intr.qhs;
1944 npoll = upipe->u.intr.npoll;
1945 s = splusb()splraise(0x2);
1946 for (i = 0; i < npoll; i++)
1947 uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
1948 splx(s)spllower(s);
1949
1950 /*
1951 * We now have to wait for any activity on the physical
1952 * descriptors to stop.
1953 */
1954 usb_delay_ms(&sc->sc_bus, 2);
1955
1956 for(i = 0; i < npoll; i++)
1957 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1958 free(qhs, M_USBHC103, npoll * sizeof(*qhs));
1959
1960 /* XXX free other resources */
1961}
1962
1963usbd_status
1964uhci_device_request(struct usbd_xfer *xfer)
1965{
1966 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
1967 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1968 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
1969 usb_device_request_t *req = &xfer->request;
1970 int addr = xfer->device->address;
1971 int endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
1972 struct uhci_soft_td *setup, *data, *stat, *next, *dataend;
1973 struct uhci_soft_qh *sqh;
1974 u_int len;
1975 u_int32_t ls;
1976 usbd_status err;
1977 int s;
1978
1979 DPRINTFN(3,("uhci_device_request type=0x%02x, request=0x%02x, "
1980 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n",
1981 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1982 UGETW(req->wIndex), UGETW(req->wLength),
1983 addr, endpt));
1984
1985 ls = xfer->device->speed == USB_SPEED_LOW1 ? UHCI_TD_LS0x04000000 : 0;
1986 len = UGETW(req->wLength)(*(u_int16_t *)(req->wLength));
1987
1988 setup = upipe->u.ctl.setup;
1989 stat = upipe->u.ctl.stat;
1990 sqh = upipe->u.ctl.sqh;
1991
1992 /* Set up data transaction */
1993 if (len != 0) {
1994 upipe->nexttoggle = 1;
1995 err = uhci_alloc_std_chain(sc, len, xfer, &data, &dataend);
1996 if (err)
1997 return (err);
1998 next = data;
1999 dataend->link.std = stat;
2000 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD)((__uint32_t)(stat->physaddr | 0x00000004 | 0x00000000));
2001 } else {
2002 next = stat;
2003 }
2004 upipe->u.ctl.length = len;
2005
2006 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req)__builtin_memcpy((((void *)((char *)((&upipe->u.ctl.reqdma
)->block->kaddr + (&upipe->u.ctl.reqdma)->offs
) + (0)))), (req), (sizeof *req));
2007
2008 setup->link.std = next;
2009 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD)((__uint32_t)(next->physaddr | 0x00000004 | 0x00000000));
2010 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |((__uint32_t)(((3) << 27) | ls | 0x00800000))
2011 UHCI_TD_ACTIVE)((__uint32_t)(((3) << 27) | ls | 0x00800000));
2012 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr))((__uint32_t)(((((uint32_t)(sizeof *req)-1) << 21) | ((
(endpt)&0xf) << 15) | ((addr) << 8) | 0x0000002d
)));
2013 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0))((__uint32_t)(((&upipe->u.ctl.reqdma)->block->map
->dm_segs[0].ds_addr + (&upipe->u.ctl.reqdma)->offs
+ (0))));
2014
2015 stat->link.std = NULL((void *)0);
2016 stat->td.td_link = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
2017 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |((__uint32_t)(((3) << 27) | ls | 0x00800000 | 0x01000000
))
2018 UHCI_TD_ACTIVE | UHCI_TD_IOC)((__uint32_t)(((3) << 27) | ls | 0x00800000 | 0x01000000
));
2019 stat->td.td_token = htole32(usbd_xfer_isread(xfer) ?((__uint32_t)(usbd_xfer_isread(xfer) ? ((((uint32_t)(0)-1) <<
21) | (((endpt)&0xf) << 15) | ((addr) << 8) |
0x000000e1 | ((1) << 19)) : ((((uint32_t)(0)-1) <<
21) | (((endpt)&0xf) << 15) | ((addr) << 8) |
0x00000069 | ((1) << 19))))
2020 UHCI_TD_OUT(0, endpt, addr, 1) : UHCI_TD_IN (0, endpt, addr, 1))((__uint32_t)(usbd_xfer_isread(xfer) ? ((((uint32_t)(0)-1) <<
21) | (((endpt)&0xf) << 15) | ((addr) << 8) |
0x000000e1 | ((1) << 19)) : ((((uint32_t)(0)-1) <<
21) | (((endpt)&0xf) << 15) | ((addr) << 8) |
0x00000069 | ((1) << 19))));
2021 stat->td.td_buffer = htole32(0)((__uint32_t)(0));
2022
2023#ifdef UHCI_DEBUG
2024 if (uhcidebug > 10) {
2025 DPRINTF(("uhci_device_request: before transfer\n"));
2026 uhci_dump_tds(setup);
2027 }
2028#endif
2029
2030 /* Set up interrupt info. */
2031 ux->stdstart = setup;
2032 ux->stdend = stat;
2033#ifdef DIAGNOSTIC1
2034 if (!ux->isdone) {
2035 printf("%s: not done, ux=%p\n", __func__, ux);
2036 }
2037 ux->isdone = 0;
2038#endif
2039
2040 sqh->elink = setup;
2041 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD)((__uint32_t)(setup->physaddr | 0x00000000));
2042
2043 s = splusb()splraise(0x2);
2044 if (xfer->device->speed == USB_SPEED_LOW1)
2045 uhci_add_ls_ctrl(sc, sqh);
2046 else
2047 uhci_add_hs_ctrl(sc, sqh);
2048 uhci_add_intr_list(sc, ux)do { if ((((ux))->inext.le_next = (&(sc)->sc_intrhead
)->lh_first) != ((void *)0)) (&(sc)->sc_intrhead)->
lh_first->inext.le_prev = &((ux))->inext.le_next; (
&(sc)->sc_intrhead)->lh_first = ((ux)); ((ux))->
inext.le_prev = &(&(sc)->sc_intrhead)->lh_first
; } while (0);
2049#ifdef UHCI_DEBUG
2050 if (uhcidebug > 12) {
2051 struct uhci_soft_td *std;
2052 struct uhci_soft_qh *xqh;
2053 struct uhci_soft_qh *sxqh;
2054 int maxqh = 0;
2055 uhci_physaddr_t link;
2056 DPRINTF(("uhci_device_request: follow from [0]\n"));
2057 for (std = sc->sc_vframes[0].htd, link = 0;
2058 (link & UHCI_PTR_QH0x00000002) == 0;
2059 std = std->link.std) {
2060 link = letoh32(std->td.td_link)((__uint32_t)(std->td.td_link));
2061 uhci_dump_td(std);
2062 }
2063 sxqh = (struct uhci_soft_qh *)std;
2064 uhci_dump_qh(sxqh);
2065 for (xqh = sxqh;
2066 xqh != NULL((void *)0);
2067 xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2068 xqh->hlink == xqh ? NULL((void *)0) : xqh->hlink)) {
2069 uhci_dump_qh(xqh);
2070 }
2071 DPRINTF(("Enqueued QH:\n"));
2072 uhci_dump_qh(sqh);
2073 uhci_dump_tds(sqh->elink);
2074 }
2075#endif
2076 if (xfer->timeout && !sc->sc_bus.use_polling) {
2077 timeout_del(&xfer->timeout_handle);
2078 timeout_set(&xfer->timeout_handle, uhci_timeout, xfer);
2079 timeout_add_msec(&xfer->timeout_handle, xfer->timeout);
2080 }
2081 xfer->status = USBD_IN_PROGRESS;
2082 splx(s)spllower(s);
2083
2084 return (USBD_NORMAL_COMPLETION);
2085}
2086
2087usbd_status
2088uhci_device_isoc_transfer(struct usbd_xfer *xfer)
2089{
2090 usbd_status err;
2091
2092 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2093
2094 /* Put it on our queue, */
2095 err = usb_insert_transfer(xfer);
2096
2097 /* bail out on error, */
2098 if (err && err != USBD_IN_PROGRESS)
2099 return (err);
2100
2101 /* XXX should check inuse here */
2102
2103 /* insert into schedule, */
2104 uhci_device_isoc_enter(xfer);
2105
2106 /* and start if the pipe wasn't running */
2107 if (!err)
2108 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)((&xfer->pipe->queue)->sqh_first));
2109
2110 return (err);
2111}
2112
2113void
2114uhci_device_isoc_enter(struct usbd_xfer *xfer)
2115{
2116 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
2117 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2118 struct iso *iso = &upipe->u.iso;
2119 struct uhci_soft_td *std;
2120 u_int32_t buf, len, status;
2121 int s, i, next, nframes;
2122
2123 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2124 "nframes=%d\n",
2125 iso->inuse, iso->next, xfer, xfer->nframes));
2126
2127 if (sc->sc_bus.dying)
2128 return;
2129
2130 if (xfer->status == USBD_IN_PROGRESS) {
2131 /* This request has already been entered into the frame list */
2132 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2133 /* XXX */
2134 }
2135
2136#ifdef DIAGNOSTIC1
2137 if (iso->inuse >= UHCI_VFRAMELIST_COUNT128)
2138 printf("uhci_device_isoc_enter: overflow!\n");
2139#endif
2140
2141 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
2142 usbd_xfer_isread(xfer) ?
2143 BUS_DMASYNC_PREREAD0x01 : BUS_DMASYNC_PREWRITE0x04);
2144
2145 next = iso->next;
2146 if (next == -1) {
2147 /* Not in use yet, schedule it a few frames ahead. */
2148 next = (UREAD2(sc, UHCI_FRNUM0x06) + 3) % UHCI_VFRAMELIST_COUNT128;
2149 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2150 }
2151
2152 xfer->status = USBD_IN_PROGRESS;
2153 ((struct uhci_xfer *)xfer)->curframe = next;
2154
2155 buf = DMAADDR(&xfer->dmabuf, 0)((&xfer->dmabuf)->block->map->dm_segs[0].ds_addr
+ (&xfer->dmabuf)->offs + (0));
2156 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |((((0) << 27) | 0x00800000 | 0x02000000) | 0x3ff)
2157 UHCI_TD_ACTIVE |((((0) << 27) | 0x00800000 | 0x02000000) | 0x3ff)
2158 UHCI_TD_IOS)((((0) << 27) | 0x00800000 | 0x02000000) | 0x3ff);
2159 nframes = xfer->nframes;
2160 s = splusb()splraise(0x2);
2161 for (i = 0; i < nframes; i++) {
2162 std = iso->stds[next];
2163 if (++next >= UHCI_VFRAMELIST_COUNT128)
2164 next = 0;
2165 len = xfer->frlengths[i];
2166 std->td.td_buffer = htole32(buf)((__uint32_t)(buf));
2167 if (i == nframes - 1)
2168 status |= UHCI_TD_IOC0x01000000;
2169 std->td.td_status = htole32(status)((__uint32_t)(status));
2170 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK)((__uint32_t)(~0xffe00000));
2171 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len))((__uint32_t)((((uint32_t)(len)-1) << 21)));
2172#ifdef UHCI_DEBUG
2173 if (uhcidebug > 5) {
2174 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2175 uhci_dump_td(std);
2176 }
2177#endif
2178 buf += len;
2179 }
2180 iso->next = next;
2181 iso->inuse += xfer->nframes;
2182
2183 splx(s)spllower(s);
2184}
2185
2186usbd_status
2187uhci_device_isoc_start(struct usbd_xfer *xfer)
2188{
2189 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
2190 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2191 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
2192 struct uhci_soft_td *end;
2193 int s, i;
2194
2195 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2196
2197 if (sc->sc_bus.dying)
2198 return (USBD_IOERROR);
2199
2200#ifdef DIAGNOSTIC1
2201 if (xfer->status != USBD_IN_PROGRESS)
2202 printf("uhci_device_isoc_start: not in progress %p\n", xfer);
2203#endif
2204
2205 /* Find the last TD */
2206 i = ux->curframe + (xfer->nframes - 1);
2207 if (i >= UHCI_VFRAMELIST_COUNT128)
2208 i -= UHCI_VFRAMELIST_COUNT128;
2209 end = upipe->u.iso.stds[i];
2210
2211#ifdef DIAGNOSTIC1
2212 if (end == NULL((void *)0)) {
2213 printf("uhci_device_isoc_start: end == NULL\n");
2214 return (USBD_INVAL);
2215 }
2216#endif
2217
2218 s = splusb()splraise(0x2);
2219
2220 /* Set up interrupt info. */
2221 ux->stdstart = end;
2222 ux->stdend = end;
2223#ifdef DIAGNOSTIC1
2224 if (!ux->isdone)
2225 printf("%s: not done, ux=%p\n", __func__, ux);
2226 ux->isdone = 0;
2227#endif
2228 uhci_add_intr_list(sc, ux)do { if ((((ux))->inext.le_next = (&(sc)->sc_intrhead
)->lh_first) != ((void *)0)) (&(sc)->sc_intrhead)->
lh_first->inext.le_prev = &((ux))->inext.le_next; (
&(sc)->sc_intrhead)->lh_first = ((ux)); ((ux))->
inext.le_prev = &(&(sc)->sc_intrhead)->lh_first
; } while (0);
2229
2230 splx(s)spllower(s);
2231
2232 return (USBD_IN_PROGRESS);
2233}
2234
2235void
2236uhci_device_isoc_abort(struct usbd_xfer *xfer)
2237{
2238 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
2239 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2240 struct uhci_soft_td **stds = upipe->u.iso.stds;
2241 struct uhci_soft_td *std;
2242 int i, n, s, nframes, maxlen, len;
2243
2244 s = splusb()splraise(0x2);
2245
2246 /* Transfer is already done. */
2247 if (xfer->status != USBD_NOT_STARTED &&
2248 xfer->status != USBD_IN_PROGRESS) {
2249 splx(s)spllower(s);
2250 return;
2251 }
2252
2253 /* Give xfer the requested abort code. */
2254 xfer->status = USBD_CANCELLED;
2255
2256 /* make hardware ignore it, */
2257 nframes = xfer->nframes;
2258 n = ux->curframe;
2259 maxlen = 0;
2260 for (i = 0; i < nframes; i++) {
2261 std = stds[n];
2262 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC))((__uint32_t)(~(0x00800000 | 0x01000000)));
2263 len = UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token))((((((__uint32_t)(std->td.td_token))) >> 21) + 1) &
0x7ff);
2264 if (len > maxlen)
2265 maxlen = len;
2266 if (++n >= UHCI_VFRAMELIST_COUNT128)
2267 n = 0;
2268 }
2269
2270 /* and wait until we are sure the hardware has finished. */
2271 delay(maxlen)(*delay_func)(maxlen);
2272
2273#ifdef DIAGNOSTIC1
2274 ux->isdone = 1;
2275#endif
2276 /* Run callback and remove from interrupt list. */
2277 usb_transfer_complete(xfer);
2278
2279 splx(s)spllower(s);
2280}
2281
2282void
2283uhci_device_isoc_close(struct usbd_pipe *pipe)
2284{
2285 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus;
2286 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2287 struct uhci_soft_td *std, *vstd;
2288 struct iso *iso;
2289 int i, s;
2290
2291 /*
2292 * Make sure all TDs are marked as inactive.
2293 * Wait for completion.
2294 * Unschedule.
2295 * Deallocate.
2296 */
2297 iso = &upipe->u.iso;
2298
2299 for (i = 0; i < UHCI_VFRAMELIST_COUNT128; i++)
2300 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE)((__uint32_t)(~0x00800000));
2301 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2302
2303 s = splusb()splraise(0x2);
2304 for (i = 0; i < UHCI_VFRAMELIST_COUNT128; i++) {
2305 std = iso->stds[i];
2306 for (vstd = sc->sc_vframes[i].htd;
2307 vstd != NULL((void *)0) && vstd->link.std != std;
2308 vstd = vstd->link.std)
2309 ;
2310 if (vstd == NULL((void *)0)) {
2311 /*panic*/
2312 printf("uhci_device_isoc_close: %p not found\n", std);
2313 splx(s)spllower(s);
2314 return;
2315 }
2316 vstd->link = std->link;
2317 vstd->td.td_link = std->td.td_link;
2318 uhci_free_std(sc, std);
2319 }
2320 splx(s)spllower(s);
2321
2322 free(iso->stds, M_USBHC103, UHCI_VFRAMELIST_COUNT128 * sizeof(*iso->stds));
2323}
2324
2325usbd_status
2326uhci_setup_isoc(struct usbd_pipe *pipe)
2327{
2328 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus;
2329 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2330 int addr = pipe->device->address;
2331 int endpt = pipe->endpoint->edesc->bEndpointAddress;
2332 int rd = UE_GET_DIR(endpt)((endpt) & 0x80) == UE_DIR_IN0x80;
2333 struct uhci_soft_td *std, *vstd;
2334 u_int32_t token;
2335 struct iso *iso;
2336 int i, s;
2337
2338 iso = &upipe->u.iso;
2339 iso->stds = mallocarray(UHCI_VFRAMELIST_COUNT128, sizeof(*iso->stds),
2340 M_USBHC103, M_WAITOK0x0001);
2341
2342 token = rd ? UHCI_TD_IN (0, endpt, addr, 0)((((uint32_t)(0)-1) << 21) | (((endpt)&0xf) <<
15) | ((addr) << 8) | 0x00000069 | ((0) << 19)) :
2343 UHCI_TD_OUT(0, endpt, addr, 0)((((uint32_t)(0)-1) << 21) | (((endpt)&0xf) <<
15) | ((addr) << 8) | 0x000000e1 | ((0) << 19));
2344
2345 /* Allocate the TDs and mark as inactive; */
2346 for (i = 0; i < UHCI_VFRAMELIST_COUNT128; i++) {
2347 std = uhci_alloc_std(sc);
2348 if (std == 0)
2349 goto bad;
2350 std->td.td_status = htole32(UHCI_TD_IOS)((__uint32_t)(0x02000000)); /* iso, inactive */
2351 std->td.td_token = htole32(token)((__uint32_t)(token));
2352 iso->stds[i] = std;
2353 }
2354
2355 /* Insert TDs into schedule. */
2356 s = splusb()splraise(0x2);
2357 for (i = 0; i < UHCI_VFRAMELIST_COUNT128; i++) {
2358 std = iso->stds[i];
2359 vstd = sc->sc_vframes[i].htd;
2360 std->link = vstd->link;
2361 std->td.td_link = vstd->td.td_link;
2362 vstd->link.std = std;
2363 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD)((__uint32_t)(std->physaddr | 0x00000000));
2364 }
2365 splx(s)spllower(s);
2366
2367 iso->next = -1;
2368 iso->inuse = 0;
2369
2370 return (USBD_NORMAL_COMPLETION);
2371
2372 bad:
2373 while (--i >= 0)
2374 uhci_free_std(sc, iso->stds[i]);
2375 free(iso->stds, M_USBHC103, UHCI_VFRAMELIST_COUNT128 * sizeof(*iso->stds));
2376 return (USBD_NOMEM);
2377}
2378
2379void
2380uhci_device_isoc_done(struct usbd_xfer *xfer)
2381{
2382 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
2383
2384 DPRINTFN(4, ("uhci_device_isoc_done: length=%d\n", xfer->actlen));
2385
2386 if (!uhci_active_intr_list(ux)((ux)->inext.le_prev != ((void *)0)))
2387 return;
2388
2389#ifdef DIAGNOSTIC1
2390 if (ux->stdend == NULL((void *)0)) {
2391 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2392#ifdef UHCI_DEBUG
2393 uhci_dump_xfer(ux);
2394#endif
2395 return;
2396 }
2397#endif
2398
2399 /* Turn off the interrupt since it is active even if the TD is not. */
2400 ux->stdend->td.td_status &= htole32(~UHCI_TD_IOC)((__uint32_t)(~0x01000000));
2401
2402 uhci_del_intr_list(ux)do { do { if (((ux))->inext.le_next != ((void *)0)) ((ux))
->inext.le_next->inext.le_prev = ((ux))->inext.le_prev
; *((ux))->inext.le_prev = ((ux))->inext.le_next; (((ux
))->inext.le_prev) = ((void *)-1); (((ux))->inext.le_next
) = ((void *)-1); } while (0); (ux)->inext.le_prev = ((void
*)0); } while (0); /* remove from active list */
2403}
2404
2405void
2406uhci_device_intr_done(struct usbd_xfer *xfer)
2407{
2408 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
2409 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2410 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
2411 struct uhci_soft_qh *sqh;
2412 int i, npoll;
2413
2414 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2415
2416 npoll = upipe->u.intr.npoll;
2417 for(i = 0; i < npoll; i++) {
1
Assuming 'i' is >= 'npoll'
→
2
←
Loop condition is false. Execution continues on line 2422
→
2418 sqh = upipe->u.intr.qhs[i];
2419 sqh->elink = NULL((void *)0);
2420 sqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
2421 }
2422 uhci_free_std_chain(sc, ux->stdstart, NULL((void *)0));
2423
2424 /* XXX Wasteful. */
2425 if (xfer->pipe->repeat) {
3
←
Assuming field 'repeat' is not equal to 0
→
4
←
Taking true branch
→
2426 struct uhci_soft_td *data, *dataend;
5
←
'dataend' declared without an initial value
→
2427
2428 DPRINTFN(5,("uhci_device_intr_done: requeuing\n"));
2429
2430 /* This alloc cannot fail since we freed the chain above. */
2431 uhci_alloc_std_chain(sc, xfer->length, xfer, &data, &dataend);
6
←
Calling 'uhci_alloc_std_chain'
→
12
←
Returning from 'uhci_alloc_std_chain'
→
2432 dataend->td.td_status |= htole32(UHCI_TD_IOC)((__uint32_t)(0x01000000));
13
←
Dereference of undefined pointer value
2433
2434#ifdef UHCI_DEBUG
2435 if (uhcidebug > 10) {
2436 DPRINTF(("uhci_device_intr_done: data(1)\n"));
2437 uhci_dump_tds(data);
2438 uhci_dump_qh(upipe->u.intr.qhs[0]);
2439 }
2440#endif
2441
2442 ux->stdstart = data;
2443 ux->stdend = dataend;
2444#ifdef DIAGNOSTIC1
2445 if (!ux->isdone) {
2446 printf("%s: not done, ux=%p\n", __func__, ux);
2447 }
2448 ux->isdone = 0;
2449#endif
2450 for (i = 0; i < npoll; i++) {
2451 sqh = upipe->u.intr.qhs[i];
2452 sqh->elink = data;
2453 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD)((__uint32_t)(data->physaddr | 0x00000000));
2454 }
2455 xfer->status = USBD_IN_PROGRESS;
2456 /* The ux is already on the examined list, just leave it. */
2457 } else {
2458 DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2459 if (uhci_active_intr_list(ux)((ux)->inext.le_prev != ((void *)0)))
2460 uhci_del_intr_list(ux)do { do { if (((ux))->inext.le_next != ((void *)0)) ((ux))
->inext.le_next->inext.le_prev = ((ux))->inext.le_prev
; *((ux))->inext.le_prev = ((ux))->inext.le_next; (((ux
))->inext.le_prev) = ((void *)-1); (((ux))->inext.le_next
) = ((void *)-1); } while (0); (ux)->inext.le_prev = ((void
*)0); } while (0);
2461 }
2462}
2463
2464/* Deallocate request data structures */
2465void
2466uhci_device_ctrl_done(struct usbd_xfer *xfer)
2467{
2468 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
2469 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2470 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
2471
2472#ifdef DIAGNOSTIC1
2473 if (!(xfer->rqflags & URQ_REQUEST0x01))
2474 panic("uhci_device_ctrl_done: not a request");
2475#endif
2476
2477 if (!uhci_active_intr_list(ux)((ux)->inext.le_prev != ((void *)0)))
2478 return;
2479
2480 uhci_del_intr_list(ux)do { do { if (((ux))->inext.le_next != ((void *)0)) ((ux))
->inext.le_next->inext.le_prev = ((ux))->inext.le_prev
; *((ux))->inext.le_prev = ((ux))->inext.le_next; (((ux
))->inext.le_prev) = ((void *)-1); (((ux))->inext.le_next
) = ((void *)-1); } while (0); (ux)->inext.le_prev = ((void
*)0); } while (0); /* remove from active list */
2481
2482 if (xfer->device->speed == USB_SPEED_LOW1)
2483 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2484 else
2485 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2486
2487 if (upipe->u.ctl.length != 0)
2488 uhci_free_std_chain(sc, ux->stdstart->link.std, ux->stdend);
2489
2490 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
2491}
2492
2493/* Deallocate request data structures */
2494void
2495uhci_device_bulk_done(struct usbd_xfer *xfer)
2496{
2497 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
2498 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2499 struct uhci_xfer *ux = (struct uhci_xfer *)xfer;
2500
2501 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ux=%p sc=%p upipe=%p\n",
2502 xfer, ux, sc, upipe));
2503
2504 if (!uhci_active_intr_list(ux)((ux)->inext.le_prev != ((void *)0)))
2505 return;
2506
2507 uhci_del_intr_list(ux)do { do { if (((ux))->inext.le_next != ((void *)0)) ((ux))
->inext.le_next->inext.le_prev = ((ux))->inext.le_prev
; *((ux))->inext.le_prev = ((ux))->inext.le_next; (((ux
))->inext.le_prev) = ((void *)-1); (((ux))->inext.le_next
) = ((void *)-1); } while (0); (ux)->inext.le_prev = ((void
*)0); } while (0); /* remove from active list */
2508
2509 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2510
2511 uhci_free_std_chain(sc, ux->stdstart, NULL((void *)0));
2512
2513 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
2514}
2515
2516/* Add interrupt QH, called with vflock. */
2517void
2518uhci_add_intr(struct uhci_softc *sc, struct uhci_soft_qh *sqh)
2519{
2520 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2521 struct uhci_soft_qh *eqh;
2522
2523 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2524
2525 eqh = vf->eqh;
2526 sqh->hlink = eqh->hlink;
2527 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2528 eqh->hlink = sqh;
2529 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH)((__uint32_t)(sqh->physaddr | 0x00000002));
2530 vf->eqh = sqh;
2531 vf->bandwidth++;
2532}
2533
2534/* Remove interrupt QH. */
2535void
2536uhci_remove_intr(struct uhci_softc *sc, struct uhci_soft_qh *sqh)
2537{
2538 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2539 struct uhci_soft_qh *pqh;
2540
2541 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2542
2543 /* See comment in uhci_remove_ctrl() */
2544 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T)((__uint32_t)(0x00000001)))) {
2545 sqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
2546 delay(UHCI_QH_REMOVE_DELAY)(*delay_func)(5);
2547 }
2548
2549 pqh = uhci_find_prev_qh(vf->hqh, sqh);
2550 pqh->hlink = sqh->hlink;
2551 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2552 delay(UHCI_QH_REMOVE_DELAY)(*delay_func)(5);
2553 if (vf->eqh == sqh)
2554 vf->eqh = pqh;
2555 vf->bandwidth--;
2556}
2557
2558usbd_status
2559uhci_device_setintr(struct uhci_softc *sc, struct uhci_pipe *upipe, int ival)
2560{
2561 struct uhci_soft_qh *sqh, **qhs;
2562 int i, npoll, s;
2563 u_int bestbw, bw, bestoffs, offs;
2564
2565 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
2566 if (ival == 0) {
2567 printf("uhci_device_setintr: 0 interval\n");
2568 return (USBD_INVAL);
2569 }
2570
2571 if (ival > UHCI_VFRAMELIST_COUNT128)
2572 ival = UHCI_VFRAMELIST_COUNT128;
2573 npoll = (UHCI_VFRAMELIST_COUNT128 + ival - 1) / ival;
2574 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
2575
2576 qhs = mallocarray(npoll, sizeof(*qhs), M_USBHC103, M_NOWAIT0x0002);
2577 if (qhs == NULL((void *)0))
2578 return (USBD_NOMEM);
2579
2580 /*
2581 * Figure out which offset in the schedule that has most
2582 * bandwidth left over.
2583 */
2584#define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT128-1))
2585 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2586 for (bw = i = 0; i < npoll; i++)
2587 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2588 if (bw < bestbw) {
2589 bestbw = bw;
2590 bestoffs = offs;
2591 }
2592 }
2593 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2594
2595 for(i = 0; i < npoll; i++) {
2596 sqh = uhci_alloc_sqh(sc);
2597 if (sqh == NULL((void *)0)) {
2598 while (i > 0)
2599 uhci_free_sqh(sc, qhs[--i]);
2600 free(qhs, M_USBHC103, npoll * sizeof(*qhs));
2601 return (USBD_NOMEM);
2602 }
2603 sqh->elink = NULL((void *)0);
2604 sqh->qh.qh_elink = htole32(UHCI_PTR_T)((__uint32_t)(0x00000001));
2605 sqh->pos = MOD(i * ival + bestoffs);
2606 qhs[i] = sqh;
2607 }
2608#undef MOD
2609
2610 upipe->u.intr.npoll = npoll;
2611 upipe->u.intr.qhs = qhs;
2612
2613 s = splusb()splraise(0x2);
2614 /* Enter QHs into the controller data structures. */
2615 for(i = 0; i < npoll; i++)
2616 uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2617 splx(s)spllower(s);
2618
2619 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
2620 return (USBD_NORMAL_COMPLETION);
2621}
2622
2623/* Open a new pipe. */
2624usbd_status
2625uhci_open(struct usbd_pipe *pipe)
2626{
2627 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus;
2628 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2629 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2630 usbd_status err;
2631 int ival;
2632
2633 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d\n",
2634 pipe, pipe->device->address, ed->bEndpointAddress));
2635
2636 upipe->nexttoggle = pipe->endpoint->savedtoggle;
2637
2638 /* Root Hub */
2639 if (pipe->device->depth == 0) {
2640 switch (ed->bEndpointAddress) {
2641 case USB_CONTROL_ENDPOINT0:
2642 pipe->methods = &uhci_root_ctrl_methods;
2643 break;
2644 case UE_DIR_IN0x80 | UHCI_INTR_ENDPT1:
2645 pipe->methods = &uhci_root_intr_methods;
2646 break;
2647 default:
2648 return (USBD_INVAL);
2649 }
2650 } else {
2651 switch (UE_GET_XFERTYPE(ed->bmAttributes)((ed->bmAttributes) & 0x03)) {
2652 case UE_CONTROL0x00:
2653 pipe->methods = &uhci_device_ctrl_methods;
2654 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2655 if (upipe->u.ctl.sqh == NULL((void *)0))
2656 goto bad;
2657 upipe->u.ctl.setup = uhci_alloc_std(sc);
2658 if (upipe->u.ctl.setup == NULL((void *)0)) {
2659 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2660 goto bad;
2661 }
2662 upipe->u.ctl.stat = uhci_alloc_std(sc);
2663 if (upipe->u.ctl.stat == NULL((void *)0)) {
2664 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2665 uhci_free_std(sc, upipe->u.ctl.setup);
2666 goto bad;
2667 }
2668 err = usb_allocmem(&sc->sc_bus,
2669 sizeof(usb_device_request_t),
2670 0, USB_DMA_COHERENT(1 << 0),
2671 &upipe->u.ctl.reqdma);
2672 if (err) {
2673 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2674 uhci_free_std(sc, upipe->u.ctl.setup);
2675 uhci_free_std(sc, upipe->u.ctl.stat);
2676 goto bad;
2677 }
2678 break;
2679 case UE_INTERRUPT0x03:
2680 pipe->methods = &uhci_device_intr_methods;
2681 ival = pipe->interval;
2682 if (ival == USBD_DEFAULT_INTERVAL(-1))
2683 ival = ed->bInterval;
2684 return (uhci_device_setintr(sc, upipe, ival));
2685 case UE_ISOCHRONOUS0x01:
2686 pipe->methods = &uhci_device_isoc_methods;
2687 return (uhci_setup_isoc(pipe));
2688 case UE_BULK0x02:
2689 pipe->methods = &uhci_device_bulk_methods;
2690 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2691 if (upipe->u.bulk.sqh == NULL((void *)0))
2692 goto bad;
2693 break;
2694 }
2695 }
2696 return (USBD_NORMAL_COMPLETION);
2697
2698 bad:
2699 return (USBD_NOMEM);
2700}
2701
2702/*
2703 * Data structures and routines to emulate the root hub.
2704 */
2705const usb_device_descriptor_t uhci_devd = {
2706 USB_DEVICE_DESCRIPTOR_SIZE18,
2707 UDESC_DEVICE0x01, /* type */
2708 {0x00, 0x01}, /* USB version */
2709 UDCLASS_HUB0x09, /* class */
2710 UDSUBCLASS_HUB0x00, /* subclass */
2711 UDPROTO_FSHUB0x00, /* protocol */
2712 64, /* max packet */
2713 {0},{0},{0x00,0x01}, /* device id */
2714 1,2,0, /* string indices */
2715 1 /* # of configurations */
2716};
2717
2718const usb_config_descriptor_t uhci_confd = {
2719 USB_CONFIG_DESCRIPTOR_SIZE9,
2720 UDESC_CONFIG0x02,
2721 {USB_CONFIG_DESCRIPTOR_SIZE9 +
2722 USB_INTERFACE_DESCRIPTOR_SIZE9 +
2723 USB_ENDPOINT_DESCRIPTOR_SIZE7},
2724 1,
2725 1,
2726 0,
2727 UC_BUS_POWERED0x80 | UC_SELF_POWERED0x40,
2728 0 /* max power */
2729};
2730
2731const usb_interface_descriptor_t uhci_ifcd = {
2732 USB_INTERFACE_DESCRIPTOR_SIZE9,
2733 UDESC_INTERFACE0x04,
2734 0,
2735 0,
2736 1,
2737 UICLASS_HUB0x09,
2738 UISUBCLASS_HUB0,
2739 UIPROTO_FSHUB0,
2740 0
2741};
2742
2743const usb_endpoint_descriptor_t uhci_endpd = {
2744 USB_ENDPOINT_DESCRIPTOR_SIZE7,
2745 UDESC_ENDPOINT0x05,
2746 UE_DIR_IN0x80 | UHCI_INTR_ENDPT1,
2747 UE_INTERRUPT0x03,
2748 {8},
2749 255
2750};
2751
2752const usb_hub_descriptor_t uhci_hubd_piix = {
2753 USB_HUB_DESCRIPTOR_SIZE8,
2754 UDESC_HUB0x29,
2755 2,
2756 { UHD_PWR_NO_SWITCH0x0002 | UHD_OC_INDIVIDUAL0x0008, 0 },
2757 50, /* power on to power good */
2758 0,
2759 { 0x00 }, /* both ports are removable */
2760};
2761
2762/*
2763 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
2764 * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
2765 * should not be used by the USB subsystem. As we cannot issue a
2766 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
2767 * will be enabled as part of the reset.
2768 *
2769 * On the VT83C572, the port cannot be successfully enabled until the
2770 * outstanding "port enable change" and "connection status change"
2771 * events have been reset.
2772 */
2773usbd_status
2774uhci_portreset(struct uhci_softc *sc, int index)
2775{
2776 int lim, port, x;
2777
2778 if (index == 1)
2779 port = UHCI_PORTSC10x010;
2780 else if (index == 2)
2781 port = UHCI_PORTSC20x012;
2782 else
2783 return (USBD_IOERROR);
2784
2785 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
2786 UWRITE2(sc, port, x | UHCI_PORTSC_PR)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x | 0x0200)))); } while ( 0);
2787
2788 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY100);
2789
2790 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
2791 index, UREAD2(sc, port)));
2792
2793 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
2794 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x & ~0x0200)))); } while ( 0);
2795
2796 delay(100)(*delay_func)(100);
2797
2798 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
2799 index, UREAD2(sc, port)));
2800
2801 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
2802 UWRITE2(sc, port, x | UHCI_PORTSC_PE)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x | 0x0004)))); } while ( 0);
2803
2804 for (lim = 10; --lim > 0;) {
2805 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY50);
2806
2807 x = UREAD2(sc, port);
2808
2809 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
2810 index, lim, x));
2811
2812 if (!(x & UHCI_PORTSC_CCS0x0001)) {
2813 /*
2814 * No device is connected (or was disconnected
2815 * during reset). Consider the port reset.
2816 * The delay must be long enough to ensure on
2817 * the initial iteration that the device
2818 * connection will have been registered. 50ms
2819 * appears to be sufficient, but 20ms is not.
2820 */
2821 DPRINTFN(3,("uhci port %d loop %u, device detached\n",
2822 index, lim));
2823 break;
2824 }
2825
2826 if (x & (UHCI_PORTSC_POEDC0x0008 | UHCI_PORTSC_CSC0x0002)) {
2827 /*
2828 * Port enabled changed and/or connection
2829 * status changed were set. Reset either or
2830 * both raised flags (by writing a 1 to that
2831 * bit), and wait again for state to settle.
2832 */
2833 UWRITE2(sc, port, URWMASK(x) |do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((((x) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
) | (x & (0x0008 | 0x0002)))))); } while ( 0)
2834 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)))do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((((x) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
) | (x & (0x0008 | 0x0002)))))); } while ( 0);
2835 continue;
2836 }
2837
2838 if (x & UHCI_PORTSC_PE0x0004)
2839 /* Port is enabled */
2840 break;
2841
2842 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((((x) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
) | 0x0004)))); } while ( 0);
2843 }
2844
2845 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
2846 index, UREAD2(sc, port)));
2847
2848 if (lim <= 0) {
2849 DPRINTFN(1,("uhci port %d reset timed out\n", index));
2850 return (USBD_TIMEOUT);
2851 }
2852
2853 sc->sc_isreset = 1;
2854 return (USBD_NORMAL_COMPLETION);
2855}
2856
2857/*
2858 * Simulate a hardware hub by handling all the necessary requests.
2859 */
2860usbd_status
2861uhci_root_ctrl_transfer(struct usbd_xfer *xfer)
2862{
2863 usbd_status err;
2864
2865 /* Insert last in queue. */
2866 err = usb_insert_transfer(xfer);
2867 if (err)
2868 return (err);
2869
2870 /*
2871 * Pipe isn't running (otherwise err would be USBD_INPROG),
2872 * so start it first.
2873 */
2874 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)((&xfer->pipe->queue)->sqh_first)));
2875}
2876
2877usbd_status
2878uhci_root_ctrl_start(struct usbd_xfer *xfer)
2879{
2880 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
2881 usb_device_request_t *req;
2882 void *buf = NULL((void *)0);
2883 int port, x;
2884 int s, len, value, index, status, change, l, totlen = 0;
2885 usb_port_status_t ps;
2886 usb_device_descriptor_t devd;
2887 usbd_status err;
2888
2889 if (sc->sc_bus.dying)
2890 return (USBD_IOERROR);
2891
2892#ifdef DIAGNOSTIC1
2893 if (!(xfer->rqflags & URQ_REQUEST0x01))
2894 panic("uhci_root_ctrl_start: not a request");
2895#endif
2896 req = &xfer->request;
2897
2898 DPRINTFN(2,("uhci_root_ctrl_start type=0x%02x request=%02x\n",
2899 req->bmRequestType, req->bRequest));
2900
2901 len = UGETW(req->wLength)(*(u_int16_t *)(req->wLength));
2902 value = UGETW(req->wValue)(*(u_int16_t *)(req->wValue));
2903 index = UGETW(req->wIndex)(*(u_int16_t *)(req->wIndex));
2904
2905 if (len != 0)
2906 buf = KERNADDR(&xfer->dmabuf, 0)((void *)((char *)((&xfer->dmabuf)->block->kaddr
+ (&xfer->dmabuf)->offs) + (0)));
2907
2908#define C(x,y)((x) | ((y) << 8)) ((x) | ((y) << 8))
2909 switch(C(req->bRequest, req->bmRequestType)((req->bRequest) | ((req->bmRequestType) << 8))) {
2910 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE)((0x01) | (((0x00 | 0x00 | 0x00)) << 8)):
2911 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE)((0x01) | (((0x00 | 0x00 | 0x01)) << 8)):
2912 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT)((0x01) | (((0x00 | 0x00 | 0x02)) << 8)):
2913 /*
2914 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2915 * for the integrated root hub.
2916 */
2917 break;
2918 case C(UR_GET_CONFIG, UT_READ_DEVICE)((0x08) | (((0x80 | 0x00 | 0x00)) << 8)):
2919 if (len > 0) {
2920 *(u_int8_t *)buf = sc->sc_conf;
2921 totlen = 1;
2922 }
2923 break;
2924 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE)((0x06) | (((0x80 | 0x00 | 0x00)) << 8)):
2925 DPRINTFN(2,("uhci_root_ctrl_start wValue=0x%04x\n", value));
2926 switch(value >> 8) {
2927 case UDESC_DEVICE0x01:
2928 if ((value & 0xff) != 0) {
2929 err = USBD_IOERROR;
2930 goto ret;
2931 }
2932 devd = uhci_devd;
2933 USETW(devd.idVendor, sc->sc_id_vendor)(*(u_int16_t *)(devd.idVendor) = (sc->sc_id_vendor));
2934 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE18);
2935 memcpy(buf, &devd, l)__builtin_memcpy((buf), (&devd), (l));
2936 break;
2937 case UDESC_CONFIG0x02:
2938 if ((value & 0xff) != 0) {
2939 err = USBD_IOERROR;
2940 goto ret;
2941 }
2942 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE9);
2943 memcpy(buf, &uhci_confd, l)__builtin_memcpy((buf), (&uhci_confd), (l));
2944 buf = (char *)buf + l;
2945 len -= l;
2946 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE9);
2947 totlen += l;
2948 memcpy(buf, &uhci_ifcd, l)__builtin_memcpy((buf), (&uhci_ifcd), (l));
2949 buf = (char *)buf + l;
2950 len -= l;
2951 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE7);
2952 totlen += l;
2953 memcpy(buf, &uhci_endpd, l)__builtin_memcpy((buf), (&uhci_endpd), (l));
2954 break;
2955 case UDESC_STRING0x03:
2956 if (len == 0)
2957 break;
2958 *(u_int8_t *)buf = 0;
2959 totlen = 1;
2960 switch (value & 0xff) {
2961 case 0: /* Language table */
2962 totlen = usbd_str(buf, len, "\001");
2963 break;
2964 case 1: /* Vendor */
2965 totlen = usbd_str(buf, len, sc->sc_vendor);
2966 break;
2967 case 2: /* Product */
2968 totlen = usbd_str(buf, len, "UHCI root hub");
2969 break;
2970 }
2971 break;
2972 default:
2973 err = USBD_IOERROR;
2974 goto ret;
2975 }
2976 break;
2977 case C(UR_GET_INTERFACE, UT_READ_INTERFACE)((0x0a) | (((0x80 | 0x00 | 0x01)) << 8)):
2978 if (len > 0) {
2979 *(u_int8_t *)buf = 0;
2980 totlen = 1;
2981 }
2982 break;
2983 case C(UR_GET_STATUS, UT_READ_DEVICE)((0x00) | (((0x80 | 0x00 | 0x00)) << 8)):
2984 if (len > 1) {
2985 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED)(*(u_int16_t *)(((usb_status_t *)buf)->wStatus) = (0x0001)
);
2986 totlen = 2;
2987 }
2988 break;
2989 case C(UR_GET_STATUS, UT_READ_INTERFACE)((0x00) | (((0x80 | 0x00 | 0x01)) << 8)):
2990 case C(UR_GET_STATUS, UT_READ_ENDPOINT)((0x00) | (((0x80 | 0x00 | 0x02)) << 8)):
2991 if (len > 1) {
2992 USETW(((usb_status_t *)buf)->wStatus, 0)(*(u_int16_t *)(((usb_status_t *)buf)->wStatus) = (0));
2993 totlen = 2;
2994 }
2995 break;
2996 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE)((0x05) | (((0x00 | 0x00 | 0x00)) << 8)):
2997 if (value >= USB_MAX_DEVICES128) {
2998 err = USBD_IOERROR;
2999 goto ret;
3000 }
3001 break;
3002 case C(UR_SET_CONFIG, UT_WRITE_DEVICE)((0x09) | (((0x00 | 0x00 | 0x00)) << 8)):
3003 if (value != 0 && value != 1) {
3004 err = USBD_IOERROR;
3005 goto ret;
3006 }
3007 sc->sc_conf = value;
3008 break;
3009 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE)((0x07) | (((0x00 | 0x00 | 0x00)) << 8)):
3010 break;
3011 case C(UR_SET_FEATURE, UT_WRITE_DEVICE)((0x03) | (((0x00 | 0x00 | 0x00)) << 8)):
3012 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE)((0x03) | (((0x00 | 0x00 | 0x01)) << 8)):
3013 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT)((0x03) | (((0x00 | 0x00 | 0x02)) << 8)):
3014 err = USBD_IOERROR;
3015 goto ret;
3016 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE)((0x0b) | (((0x00 | 0x00 | 0x01)) << 8)):
3017 break;
3018 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT)((0x0c) | (((0x00 | 0x00 | 0x02)) << 8)):
3019 break;
3020 /* Hub requests */
3021 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE)((0x01) | (((0x00 | 0x20 | 0x00)) << 8)):
3022 break;
3023 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER)((0x01) | (((0x00 | 0x20 | 0x03)) << 8)):
3024 DPRINTFN(3, ("uhci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
3025 "port=%d feature=%d\n",
3026 index, value));
3027 if (index == 1)
3028 port = UHCI_PORTSC10x010;
3029 else if (index == 2)
3030 port = UHCI_PORTSC20x012;
3031 else {
3032 err = USBD_IOERROR;
3033 goto ret;
3034 }
3035 switch(value) {
3036 case UHF_PORT_ENABLE1:
3037 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
3038 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x & ~0x0004)))); } while ( 0);
3039 break;
3040 case UHF_PORT_SUSPEND2:
3041 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
3042 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x & ~0x1000)))); } while ( 0);
3043 break;
3044 case UHF_PORT_RESET4:
3045 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
3046 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x & ~0x0200)))); } while ( 0);
3047 break;
3048 case UHF_C_PORT_CONNECTION16:
3049 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
3050 UWRITE2(sc, port, x | UHCI_PORTSC_CSC)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x | 0x0002)))); } while ( 0);
3051 break;
3052 case UHF_C_PORT_ENABLE17:
3053 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
3054 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x | 0x0008)))); } while ( 0);
3055 break;
3056 case UHF_C_PORT_OVER_CURRENT19:
3057 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
3058 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x | 0x0800)))); } while ( 0);
3059 break;
3060 case UHF_C_PORT_RESET20:
3061 sc->sc_isreset = 0;
3062 err = USBD_NORMAL_COMPLETION;
3063 goto ret;
3064 case UHF_PORT_CONNECTION0:
3065 case UHF_PORT_OVER_CURRENT3:
3066 case UHF_PORT_POWER8:
3067 case UHF_PORT_LOW_SPEED9:
3068 case UHF_C_PORT_SUSPEND18:
3069 default:
3070 err = USBD_IOERROR;
3071 goto ret;
3072 }
3073 break;
3074 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER)((0x02) | (((0x80 | 0x20 | 0x03)) << 8)):
3075 if (index == 1)
3076 port = UHCI_PORTSC10x010;
3077 else if (index == 2)
3078 port = UHCI_PORTSC20x012;
3079 else {
3080 err = USBD_IOERROR;
3081 goto ret;
3082 }
3083 if (len > 0) {
3084 *(u_int8_t *)buf =
3085 (UREAD2(sc, port) & UHCI_PORTSC_LS0x0030) >>
3086 UHCI_PORTSC_LS_SHIFT4;
3087 totlen = 1;
3088 }
3089 break;
3090 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE)((0x06) | (((0x80 | 0x20 | 0x00)) << 8)):
3091 if ((value & 0xff) != 0) {
3092 err = USBD_IOERROR;
3093 goto ret;
3094 }
3095 l = min(len, USB_HUB_DESCRIPTOR_SIZE8);
3096 totlen = l;
3097 memcpy(buf, &uhci_hubd_piix, l)__builtin_memcpy((buf), (&uhci_hubd_piix), (l));
3098 break;
3099 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE)((0x00) | (((0x80 | 0x20 | 0x00)) << 8)):
3100 if (len != 4) {
3101 err = USBD_IOERROR;
3102 goto ret;
3103 }
3104 memset(buf, 0, len)__builtin_memset((buf), (0), (len));
3105 totlen = len;
3106 break;
3107 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER)((0x00) | (((0x80 | 0x20 | 0x03)) << 8)):
3108 if (index == 1)
3109 port = UHCI_PORTSC10x010;
3110 else if (index == 2)
3111 port = UHCI_PORTSC20x012;
3112 else {
3113 err = USBD_IOERROR;
3114 goto ret;
3115 }
3116 if (len != 4) {
3117 err = USBD_IOERROR;
3118 goto ret;
3119 }
3120 x = UREAD2(sc, port);
3121 status = change = 0;
3122 if (x & UHCI_PORTSC_CCS0x0001)
3123 status |= UPS_CURRENT_CONNECT_STATUS0x0001;
3124 if (x & UHCI_PORTSC_CSC0x0002)
3125 change |= UPS_C_CONNECT_STATUS0x0001;
3126 if (x & UHCI_PORTSC_PE0x0004)
3127 status |= UPS_PORT_ENABLED0x0002;
3128 if (x & UHCI_PORTSC_POEDC0x0008)
3129 change |= UPS_C_PORT_ENABLED0x0002;
3130 if (x & UHCI_PORTSC_OCI0x0400)
3131 status |= UPS_OVERCURRENT_INDICATOR0x0008;
3132 if (x & UHCI_PORTSC_OCIC0x0800)
3133 change |= UPS_C_OVERCURRENT_INDICATOR0x0008;
3134 if (x & UHCI_PORTSC_SUSP0x1000)
3135 status |= UPS_SUSPEND0x0004;
3136 if (x & UHCI_PORTSC_LSDA0x0100)
3137 status |= UPS_LOW_SPEED0x0200;
3138 status |= UPS_PORT_POWER0x0100;
3139 if (sc->sc_isreset)
3140 change |= UPS_C_PORT_RESET0x0010;
3141 USETW(ps.wPortStatus, status)(*(u_int16_t *)(ps.wPortStatus) = (status));
3142 USETW(ps.wPortChange, change)(*(u_int16_t *)(ps.wPortChange) = (change));
3143 l = min(len, sizeof ps);
3144 memcpy(buf, &ps, l)__builtin_memcpy((buf), (&ps), (l));
3145 totlen = l;
3146 break;
3147 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE)((0x07) | (((0x00 | 0x20 | 0x00)) << 8)):
3148 err = USBD_IOERROR;
3149 goto ret;
3150 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE)((0x03) | (((0x00 | 0x20 | 0x00)) << 8)):
3151 break;
3152 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER)((0x03) | (((0x00 | 0x20 | 0x03)) << 8)):
3153 if (index == 1)
3154 port = UHCI_PORTSC10x010;
3155 else if (index == 2)
3156 port = UHCI_PORTSC20x012;
3157 else {
3158 err = USBD_IOERROR;
3159 goto ret;
3160 }
3161 switch(value) {
3162 case UHF_PORT_ENABLE1:
3163 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
3164 UWRITE2(sc, port, x | UHCI_PORTSC_PE)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x | 0x0004)))); } while ( 0);
3165 break;
3166 case UHF_PORT_SUSPEND2:
3167 x = URWMASK(UREAD2(sc, port))((UREAD2(sc, port)) & (0x1000 | 0x0200 | 0x0040 | 0x0004)
);
3168 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP)do { bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->
sc_size, 0x01|0x02); (((sc)->iot)->write_2(((sc)->ioh
), ((port)), ((x | 0x1000)))); } while ( 0);
3169 break;
3170 case UHF_PORT_RESET4:
3171 err = uhci_portreset(sc, index);
3172 goto ret;
3173 case UHF_PORT_POWER8:
3174 /* Pretend we turned on power */
3175 err = USBD_NORMAL_COMPLETION;
3176 goto ret;
3177 case UHF_PORT_DISOWN_TO_1_130:
3178 /* accept, but do nothing */
3179 err = USBD_NORMAL_COMPLETION;
3180 goto ret;
3181 case UHF_C_PORT_CONNECTION16:
3182 case UHF_C_PORT_ENABLE17:
3183 case UHF_C_PORT_OVER_CURRENT19:
3184 case UHF_PORT_CONNECTION0:
3185 case UHF_PORT_OVER_CURRENT3:
3186 case UHF_PORT_LOW_SPEED9:
3187 case UHF_C_PORT_SUSPEND18:
3188 case UHF_C_PORT_RESET20:
3189 default:
3190 err = USBD_IOERROR;
3191 goto ret;
3192 }
3193 break;
3194 default:
3195 err = USBD_IOERROR;
3196 goto ret;
3197 }
3198 xfer->actlen = totlen;
3199 err = USBD_NORMAL_COMPLETION;
3200 ret:
3201 xfer->status = err;
3202 s = splusb()splraise(0x2);
3203 usb_transfer_complete(xfer);
3204 splx(s)spllower(s);
3205 return (err);
3206}
3207
3208/* Abort a root control request. */
3209void
3210uhci_root_ctrl_abort(struct usbd_xfer *xfer)
3211{
3212 /* Nothing to do, all transfers are synchronous. */
3213}
3214
3215/* Close the root pipe. */
3216void
3217uhci_root_ctrl_close(struct usbd_pipe *pipe)
3218{
3219 DPRINTF(("uhci_root_ctrl_close\n"));
3220}
3221
3222void
3223uhci_root_intr_abort(struct usbd_xfer *xfer)
3224{
3225 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
3226 int s;
3227
3228 timeout_del(&sc->sc_root_intr);
3229 sc->sc_intrxfer = NULL((void *)0);
3230
3231 xfer->status = USBD_CANCELLED;
3232 s = splusb()splraise(0x2);
3233 usb_transfer_complete(xfer);
3234 splx(s)spllower(s);
3235}
3236
3237usbd_status
3238uhci_root_intr_transfer(struct usbd_xfer *xfer)
3239{
3240 usbd_status err;
3241
3242 /* Insert last in queue. */
3243 err = usb_insert_transfer(xfer);
3244 if (err)
3245 return (err);
3246
3247 /* Pipe isn't running (otherwise err would be USBD_INPROG),
3248 * start first
3249 */
3250 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)((&xfer->pipe->queue)->sqh_first)));
3251}
3252
3253/* Start a transfer on the root interrupt pipe */
3254usbd_status
3255uhci_root_intr_start(struct usbd_xfer *xfer)
3256{
3257 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
3258
3259 if (sc->sc_bus.dying)
3260 return (USBD_IOERROR);
3261
3262 sc->sc_intrxfer = xfer;
3263 timeout_add_msec(&sc->sc_root_intr, 255);
3264
3265 return (USBD_IN_PROGRESS);
3266}
3267
3268void
3269uhci_root_intr_close(struct usbd_pipe *pipe)
3270{
3271}
3272
3273void
3274uhci_root_intr_done(struct usbd_xfer *xfer)
3275{
3276 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
3277
3278 if (xfer->pipe->repeat)
3279 timeout_add_msec(&sc->sc_root_intr, 255);
3280}