Bug Summary

File:dev/pci/drm/amd/display/dc/core/dc_link_dpcd.c
Warning:line 223, column 2
Undefined or garbage value returned to caller

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name dc_link_dpcd.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/pci/drm/amd/display/dc/core/dc_link_dpcd.c
1/*
2 * Copyright 2021 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include <inc/core_status.h>
27#include <dc_link.h>
28#include <inc/link_hwss.h>
29#include <inc/link_dpcd.h>
30#include <dc_dp_types.h>
31#include <drm/display/drm_dp_helper.h>
32#include "dm_helpers.h"
33
34#define END_ADDRESS(start, size)(start + size - 1) (start + size - 1)
35#define ADDRESS_RANGE_SIZE(start, end)(end - start + 1) (end - start + 1)
36struct dpcd_address_range {
37 uint32_t start;
38 uint32_t end;
39};
40
41static enum dc_status internal_link_read_dpcd(
42 struct dc_link *link,
43 uint32_t address,
44 uint8_t *data,
45 uint32_t size)
46{
47 if (!link->aux_access_disabled &&
48 !dm_helpers_dp_read_dpcd(link->ctx,
49 link, address, data, size)) {
50 return DC_ERROR_UNEXPECTED;
51 }
52
53 return DC_OK;
54}
55
56static enum dc_status internal_link_write_dpcd(
57 struct dc_link *link,
58 uint32_t address,
59 const uint8_t *data,
60 uint32_t size)
61{
62 if (!link->aux_access_disabled &&
63 !dm_helpers_dp_write_dpcd(link->ctx,
64 link, address, data, size)) {
65 return DC_ERROR_UNEXPECTED;
66 }
67
68 return DC_OK;
69}
70
71/*
72 * Partition the entire DPCD address space
73 * XXX: This partitioning must cover the entire DPCD address space,
74 * and must contain no gaps or overlapping address ranges.
75 */
76static const struct dpcd_address_range mandatory_dpcd_partitions[] = {
77 { 0, DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR1)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)) - 1},
78 { DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR1)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR2)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR2) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)) - 1 },
79 { DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR2)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR2) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR3)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR3) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)) - 1 },
80 { DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR3)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR3) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR4)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR4) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)) - 1 },
81 { DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR4)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR4) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR5)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR5) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)) - 1 },
82 { DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR5)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR5) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR6)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR6) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)) - 1 },
83 { DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR6)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR6) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR7)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR7) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)) - 1 },
84 { DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR7)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR7) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)), DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR8)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR8) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)) - 1 },
85 { DP_TRAINING_PATTERN_SET_PHY_REPEATER(DP_PHY_LTTPR8)((0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR8) - DP_PHY_LTTPR1
)) - (0xf0010 + (0xf0060 - 0xf0010) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
)) + (0xf0010)), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR1)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290) - 1 },
86 /*
87 * The FEC registers are contiguous
88 */
89 { DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR1)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR1)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290) - 1 },
90 { DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR2)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR2) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR2)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR2) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290) - 1 },
91 { DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR3)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR3) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR3)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR3) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290) - 1 },
92 { DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR4)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR4) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR4)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR4) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290) - 1 },
93 { DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR5)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR5) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR5)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR5) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290) - 1 },
94 { DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR6)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR6) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR6)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR6) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290) - 1 },
95 { DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR7)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR7) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290), DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR7)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR7) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290) - 1 },
96 { DP_FEC_STATUS_PHY_REPEATER(DP_PHY_LTTPR8)((0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR8) - DP_PHY_LTTPR1
))) - (0xf0290 + ((0xf0298 - 0xf0290) * ((DP_PHY_LTTPR1) - DP_PHY_LTTPR1
))) + 0xf0290), DP_LTTPR_MAX_ADD0xf02ff },
97 /* all remaining DPCD addresses */
98 { DP_LTTPR_MAX_ADD0xf02ff + 1, DP_DPCD_MAX_ADD0xfffff } };
99
100static inline bool_Bool do_addresses_intersect_with_range(
101 const struct dpcd_address_range *range,
102 const uint32_t start_address,
103 const uint32_t end_address)
104{
105 return start_address <= range->end && end_address >= range->start;
106}
107
108static uint32_t dpcd_get_next_partition_size(const uint32_t address, const uint32_t size)
109{
110 const uint32_t end_address = END_ADDRESS(address, size)(address + size - 1);
111 uint32_t partition_iterator = 0;
112
113 /*
114 * find current partition
115 * this loop spins forever if partition map above is not surjective
116 */
117 while (!do_addresses_intersect_with_range(&mandatory_dpcd_partitions[partition_iterator],
118 address, end_address))
119 partition_iterator++;
120 if (end_address < mandatory_dpcd_partitions[partition_iterator].end)
121 return size;
122 return ADDRESS_RANGE_SIZE(address, mandatory_dpcd_partitions[partition_iterator].end)(mandatory_dpcd_partitions[partition_iterator].end - address +
1);
123}
124
125/*
126 * Ranges of DPCD addresses that must be read in a single transaction
127 * XXX: Do not allow any two address ranges in this array to overlap
128 */
129static const struct dpcd_address_range mandatory_dpcd_blocks[] = {
130 { DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV0xf0000, DP_PHY_REPEATER_EXTENDED_WAIT_TIMEOUT0xf0005 }};
131
132/*
133 * extend addresses to read all mandatory blocks together
134 */
135static void dpcd_extend_address_range(
136 const uint32_t in_address,
137 uint8_t * const in_data,
138 const uint32_t in_size,
139 uint32_t *out_address,
140 uint8_t **out_data,
141 uint32_t *out_size)
142{
143 const uint32_t end_address = END_ADDRESS(in_address, in_size)(in_address + in_size - 1);
144 const struct dpcd_address_range *addr_range;
145 struct dpcd_address_range new_addr_range;
146 uint32_t i;
147
148 new_addr_range.start = in_address;
149 new_addr_range.end = end_address;
150 for (i = 0; i < ARRAY_SIZE(mandatory_dpcd_blocks)(sizeof((mandatory_dpcd_blocks)) / sizeof((mandatory_dpcd_blocks
)[0])); i++) {
151 addr_range = &mandatory_dpcd_blocks[i];
152 if (addr_range->start <= in_address && addr_range->end >= in_address)
153 new_addr_range.start = addr_range->start;
154
155 if (addr_range->start <= end_address && addr_range->end >= end_address)
156 new_addr_range.end = addr_range->end;
157 }
158 *out_address = in_address;
159 *out_size = in_size;
160 *out_data = in_data;
161 if (new_addr_range.start != in_address || new_addr_range.end != end_address) {
162 *out_address = new_addr_range.start;
163 *out_size = ADDRESS_RANGE_SIZE(new_addr_range.start, new_addr_range.end)(new_addr_range.end - new_addr_range.start + 1);
164 *out_data = kzalloc(*out_size * sizeof(**out_data), GFP_KERNEL(0x0001 | 0x0004));
165 }
166}
167
168/*
169 * Reduce the AUX reply down to the values the caller requested
170 */
171static void dpcd_reduce_address_range(
172 const uint32_t extended_address,
173 uint8_t * const extended_data,
174 const uint32_t extended_size,
175 const uint32_t reduced_address,
176 uint8_t * const reduced_data,
177 const uint32_t reduced_size)
178{
179 const uint32_t offset = reduced_address - extended_address;
180
181 /*
182 * If the address is same, address was not extended.
183 * So we do not need to free any memory.
184 * The data is in original buffer(reduced_data).
185 */
186 if (extended_data == reduced_data)
187 return;
188
189 memcpy(&extended_data[offset], reduced_data, reduced_size)__builtin_memcpy((&extended_data[offset]), (reduced_data)
, (reduced_size));
190 kfree(extended_data);
191}
192
193enum dc_status core_link_read_dpcd(
194 struct dc_link *link,
195 uint32_t address,
196 uint8_t *data,
197 uint32_t size)
198{
199 uint32_t extended_address;
200 uint32_t partitioned_address;
201 uint8_t *extended_data;
202 uint32_t extended_size;
203 /* size of the remaining partitioned address space */
204 uint32_t size_left_to_read;
205 enum dc_status status;
1
'status' declared without an initial value
→
206 /* size of the next partition to be read from */
207 uint32_t partition_size;
208 uint32_t data_index = 0;
209
210 dpcd_extend_address_range(address, data, size, &extended_address, &extended_data, &extended_size);
211 partitioned_address = extended_address;
212 size_left_to_read = extended_size;
213 while (size_left_to_read) {
2
←
Loop condition is false. Execution continues on line 222
→
214 partition_size = dpcd_get_next_partition_size(partitioned_address, size_left_to_read);
215 status = internal_link_read_dpcd(link, partitioned_address, &extended_data[data_index], partition_size);
216 if (status != DC_OK)
217 break;
218 partitioned_address += partition_size;
219 data_index += partition_size;
220 size_left_to_read -= partition_size;
221 }
222 dpcd_reduce_address_range(extended_address, extended_data, extended_size, address, data, size);
223 return status;
3
←
Undefined or garbage value returned to caller
224}
225
226enum dc_status core_link_write_dpcd(
227 struct dc_link *link,
228 uint32_t address,
229 const uint8_t *data,
230 uint32_t size)
231{
232 uint32_t partition_size;
233 uint32_t data_index = 0;
234 enum dc_status status;
235
236 while (size) {
237 partition_size = dpcd_get_next_partition_size(address, size);
238 status = internal_link_write_dpcd(link, address, &data[data_index], partition_size);
239 if (status != DC_OK)
240 break;
241 address += partition_size;
242 data_index += partition_size;
243 size -= partition_size;
244 }
245 return status;
246}