Bug Summary

File:dev/pci/drm/amd/display/modules/freesync/freesync.c
Warning:line 1199, column 3
Value stored to 'average_render_time_in_us' is never read

Annotated Source Code

Press '?' to see keyboard shortcuts

clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name freesync.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/pci/drm/amd/display/modules/freesync/freesync.c
1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include "dm_services.h"
27#include "dc.h"
28#include "mod_freesync.h"
29#include "core_types.h"
30
31#define MOD_FREESYNC_MAX_CONCURRENT_STREAMS32 32
32
33#define MIN_REFRESH_RANGE10 10
34/* Refresh rate ramp at a fixed rate of 65 Hz/second */
35#define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME((1000 / 60) * 65) ((1000 / 60) * 65)
36/* Number of elements in the render times cache array */
37#define RENDER_TIMES_MAX_COUNT10 10
38/* Threshold to exit/exit BTR (to avoid frequent enter-exits at the lower limit) */
39#define BTR_MAX_MARGIN2500 2500
40/* Threshold to change BTR multiplier (to avoid frequent changes) */
41#define BTR_DRIFT_MARGIN2000 2000
42/* Threshold to exit fixed refresh rate */
43#define FIXED_REFRESH_EXIT_MARGIN_IN_HZ1 1
44/* Number of consecutive frames to check before entering/exiting fixed refresh */
45#define FIXED_REFRESH_ENTER_FRAME_COUNT5 5
46#define FIXED_REFRESH_EXIT_FRAME_COUNT10 10
47/* Flip interval workaround constants */
48#define VSYNCS_BETWEEN_FLIP_THRESHOLD2 2
49#define FREESYNC_CONSEC_FLIP_AFTER_VSYNC5 5
50#define FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US500 500
51
52struct core_freesync {
53 struct mod_freesync public;
54 struct dc *dc;
55};
56
57#define MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );})\
58 container_of(mod_freesync, struct core_freesync, public)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );})
59
60struct mod_freesync *mod_freesync_create(struct dc *dc)
61{
62 struct core_freesync *core_freesync =
63 kzalloc(sizeof(struct core_freesync), GFP_KERNEL(0x0001 | 0x0004));
64
65 if (core_freesync == NULL((void *)0))
66 goto fail_alloc_context;
67
68 if (dc == NULL((void *)0))
69 goto fail_construct;
70
71 core_freesync->dc = dc;
72 return &core_freesync->public;
73
74fail_construct:
75 kfree(core_freesync);
76
77fail_alloc_context:
78 return NULL((void *)0);
79}
80
81void mod_freesync_destroy(struct mod_freesync *mod_freesync)
82{
83 struct core_freesync *core_freesync = NULL((void *)0);
84 if (mod_freesync == NULL((void *)0))
85 return;
86 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
87 kfree(core_freesync);
88}
89
90#if 0 /* Unused currently */
91static unsigned int calc_refresh_in_uhz_from_duration(
92 unsigned int duration_in_ns)
93{
94 unsigned int refresh_in_uhz =
95 ((unsigned int)(div64_u64((1000000000ULL * 1000000),
96 duration_in_ns)));
97 return refresh_in_uhz;
98}
99#endif
100
101static unsigned int calc_duration_in_us_from_refresh_in_uhz(
102 unsigned int refresh_in_uhz)
103{
104 unsigned int duration_in_us =
105 ((unsigned int)(div64_u64((1000000000ULL * 1000),
106 refresh_in_uhz)));
107 return duration_in_us;
108}
109
110static unsigned int calc_duration_in_us_from_v_total(
111 const struct dc_stream_state *stream,
112 const struct mod_vrr_params *in_vrr,
113 unsigned int v_total)
114{
115 unsigned int duration_in_us =
116 (unsigned int)(div64_u64(((unsigned long long)(v_total)
117 * 10000) * stream->timing.h_total,
118 stream->timing.pix_clk_100hz));
119
120 return duration_in_us;
121}
122
123unsigned int mod_freesync_calc_v_total_from_refresh(
124 const struct dc_stream_state *stream,
125 unsigned int refresh_in_uhz)
126{
127 unsigned int v_total;
128 unsigned int frame_duration_in_ns;
129
130 frame_duration_in_ns =
131 ((unsigned int)(div64_u64((1000000000ULL * 1000000),
132 refresh_in_uhz)));
133
134 v_total = div64_u64(div64_u64(((unsigned long long)(
135 frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),
136 stream->timing.h_total), 1000000);
137
138 /* v_total cannot be less than nominal */
139 if (v_total < stream->timing.v_total) {
140 ASSERT(v_total < stream->timing.v_total)do { if (({ static int __warned; int __ret = !!(!(v_total <
stream->timing.v_total)); if (__ret && !__warned)
{ printf("WARNING %s failed at %s:%d\n", "!(v_total < stream->timing.v_total)"
, "/usr/src/sys/dev/pci/drm/amd/display/modules/freesync/freesync.c"
, 140); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
{} while (0); } while (0);
141 v_total = stream->timing.v_total;
142 }
143
144 return v_total;
145}
146
147static unsigned int calc_v_total_from_duration(
148 const struct dc_stream_state *stream,
149 const struct mod_vrr_params *vrr,
150 unsigned int duration_in_us)
151{
152 unsigned int v_total = 0;
153
154 if (duration_in_us < vrr->min_duration_in_us)
155 duration_in_us = vrr->min_duration_in_us;
156
157 if (duration_in_us > vrr->max_duration_in_us)
158 duration_in_us = vrr->max_duration_in_us;
159
160 if (dc_is_hdmi_signal(stream->signal)) {
161 uint32_t h_total_up_scaled;
162
163 h_total_up_scaled = stream->timing.h_total * 10000;
164 v_total = div_u64((unsigned long long)duration_in_us
165 * stream->timing.pix_clk_100hz + (h_total_up_scaled - 1),
166 h_total_up_scaled);
167 } else {
168 v_total = div64_u64(div64_u64(((unsigned long long)(
169 duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
170 stream->timing.h_total), 1000);
171 }
172
173 /* v_total cannot be less than nominal */
174 if (v_total < stream->timing.v_total) {
175 ASSERT(v_total < stream->timing.v_total)do { if (({ static int __warned; int __ret = !!(!(v_total <
stream->timing.v_total)); if (__ret && !__warned)
{ printf("WARNING %s failed at %s:%d\n", "!(v_total < stream->timing.v_total)"
, "/usr/src/sys/dev/pci/drm/amd/display/modules/freesync/freesync.c"
, 175); __warned = 1; } __builtin_expect(!!(__ret), 0); })) do
{} while (0); } while (0);
176 v_total = stream->timing.v_total;
177 }
178
179 return v_total;
180}
181
182static void update_v_total_for_static_ramp(
183 struct core_freesync *core_freesync,
184 const struct dc_stream_state *stream,
185 struct mod_vrr_params *in_out_vrr)
186{
187 unsigned int v_total = 0;
188 unsigned int current_duration_in_us =
189 calc_duration_in_us_from_v_total(
190 stream, in_out_vrr,
191 in_out_vrr->adjust.v_total_max);
192 unsigned int target_duration_in_us =
193 calc_duration_in_us_from_refresh_in_uhz(
194 in_out_vrr->fixed.target_refresh_in_uhz);
195 bool_Bool ramp_direction_is_up = (current_duration_in_us >
196 target_duration_in_us) ? true1 : false0;
197
198 /* Calculate ratio between new and current frame duration with 3 digit */
199 unsigned int frame_duration_ratio = div64_u64(1000000,
200 (1000 + div64_u64(((unsigned long long)(
201 STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME((1000 / 60) * 65)) *
202 current_duration_in_us),
203 1000000)));
204
205 /* Calculate delta between new and current frame duration in us */
206 unsigned int frame_duration_delta = div64_u64(((unsigned long long)(
207 current_duration_in_us) *
208 (1000 - frame_duration_ratio)), 1000);
209
210 /* Adjust frame duration delta based on ratio between current and
211 * standard frame duration (frame duration at 60 Hz refresh rate).
212 */
213 unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)(
214 frame_duration_delta) * current_duration_in_us), 16666);
215
216 /* Going to a higher refresh rate (lower frame duration) */
217 if (ramp_direction_is_up) {
218 /* Reduce frame duration */
219 current_duration_in_us -= ramp_rate_interpolated;
220
221 /* Adjust for frame duration below min */
222 if (current_duration_in_us <= target_duration_in_us) {
223 in_out_vrr->fixed.ramping_active = false0;
224 in_out_vrr->fixed.ramping_done = true1;
225 current_duration_in_us =
226 calc_duration_in_us_from_refresh_in_uhz(
227 in_out_vrr->fixed.target_refresh_in_uhz);
228 }
229 /* Going to a lower refresh rate (larger frame duration) */
230 } else {
231 /* Increase frame duration */
232 current_duration_in_us += ramp_rate_interpolated;
233
234 /* Adjust for frame duration above max */
235 if (current_duration_in_us >= target_duration_in_us) {
236 in_out_vrr->fixed.ramping_active = false0;
237 in_out_vrr->fixed.ramping_done = true1;
238 current_duration_in_us =
239 calc_duration_in_us_from_refresh_in_uhz(
240 in_out_vrr->fixed.target_refresh_in_uhz);
241 }
242 }
243
244 v_total = div64_u64(div64_u64(((unsigned long long)(
245 current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
246 stream->timing.h_total), 1000);
247
248 /* v_total cannot be less than nominal */
249 if (v_total < stream->timing.v_total)
250 v_total = stream->timing.v_total;
251
252 in_out_vrr->adjust.v_total_min = v_total;
253 in_out_vrr->adjust.v_total_max = v_total;
254}
255
256static void apply_below_the_range(struct core_freesync *core_freesync,
257 const struct dc_stream_state *stream,
258 unsigned int last_render_time_in_us,
259 struct mod_vrr_params *in_out_vrr)
260{
261 unsigned int inserted_frame_duration_in_us = 0;
262 unsigned int mid_point_frames_ceil = 0;
263 unsigned int mid_point_frames_floor = 0;
264 unsigned int frame_time_in_us = 0;
265 unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF;
266 unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF;
267 unsigned int frames_to_insert = 0;
268 unsigned int delta_from_mid_point_delta_in_us;
269 unsigned int max_render_time_in_us =
270 in_out_vrr->max_duration_in_us - in_out_vrr->btr.margin_in_us;
271
272 /* Program BTR */
273 if ((last_render_time_in_us + in_out_vrr->btr.margin_in_us / 2) < max_render_time_in_us) {
274 /* Exit Below the Range */
275 if (in_out_vrr->btr.btr_active) {
276 in_out_vrr->btr.frame_counter = 0;
277 in_out_vrr->btr.btr_active = false0;
278 }
279 } else if (last_render_time_in_us > (max_render_time_in_us + in_out_vrr->btr.margin_in_us / 2)) {
280 /* Enter Below the Range */
281 if (!in_out_vrr->btr.btr_active) {
282 in_out_vrr->btr.btr_active = true1;
283 }
284 }
285
286 /* BTR set to "not active" so disengage */
287 if (!in_out_vrr->btr.btr_active) {
288 in_out_vrr->btr.inserted_duration_in_us = 0;
289 in_out_vrr->btr.frames_to_insert = 0;
290 in_out_vrr->btr.frame_counter = 0;
291
292 /* Restore FreeSync */
293 in_out_vrr->adjust.v_total_min =
294 mod_freesync_calc_v_total_from_refresh(stream,
295 in_out_vrr->max_refresh_in_uhz);
296 in_out_vrr->adjust.v_total_max =
297 mod_freesync_calc_v_total_from_refresh(stream,
298 in_out_vrr->min_refresh_in_uhz);
299 /* BTR set to "active" so engage */
300 } else {
301
302 /* Calculate number of midPoint frames that could fit within
303 * the render time interval - take ceil of this value
304 */
305 mid_point_frames_ceil = (last_render_time_in_us +
306 in_out_vrr->btr.mid_point_in_us - 1) /
307 in_out_vrr->btr.mid_point_in_us;
308
309 if (mid_point_frames_ceil > 0) {
310 frame_time_in_us = last_render_time_in_us /
311 mid_point_frames_ceil;
312 delta_from_mid_point_in_us_1 =
313 (in_out_vrr->btr.mid_point_in_us >
314 frame_time_in_us) ?
315 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
316 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
317 }
318
319 /* Calculate number of midPoint frames that could fit within
320 * the render time interval - take floor of this value
321 */
322 mid_point_frames_floor = last_render_time_in_us /
323 in_out_vrr->btr.mid_point_in_us;
324
325 if (mid_point_frames_floor > 0) {
326
327 frame_time_in_us = last_render_time_in_us /
328 mid_point_frames_floor;
329 delta_from_mid_point_in_us_2 =
330 (in_out_vrr->btr.mid_point_in_us >
331 frame_time_in_us) ?
332 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
333 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
334 }
335
336 /* Choose number of frames to insert based on how close it
337 * can get to the mid point of the variable range.
338 * - Delta for CEIL: delta_from_mid_point_in_us_1
339 * - Delta for FLOOR: delta_from_mid_point_in_us_2
340 */
341 if (mid_point_frames_ceil &&
342 (last_render_time_in_us / mid_point_frames_ceil) <
343 in_out_vrr->min_duration_in_us) {
344 /* Check for out of range.
345 * If using CEIL produces a value that is out of range,
346 * then we are forced to use FLOOR.
347 */
348 frames_to_insert = mid_point_frames_floor;
349 } else if (mid_point_frames_floor < 2) {
350 /* Check if FLOOR would result in non-LFC. In this case
351 * choose to use CEIL
352 */
353 frames_to_insert = mid_point_frames_ceil;
354 } else if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) {
355 /* If choosing CEIL results in a frame duration that is
356 * closer to the mid point of the range.
357 * Choose CEIL
358 */
359 frames_to_insert = mid_point_frames_ceil;
360 } else {
361 /* If choosing FLOOR results in a frame duration that is
362 * closer to the mid point of the range.
363 * Choose FLOOR
364 */
365 frames_to_insert = mid_point_frames_floor;
366 }
367
368 /* Prefer current frame multiplier when BTR is enabled unless it drifts
369 * too far from the midpoint
370 */
371 if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) {
372 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_2 -
373 delta_from_mid_point_in_us_1;
374 } else {
375 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_1 -
376 delta_from_mid_point_in_us_2;
377 }
378 if (in_out_vrr->btr.frames_to_insert != 0 &&
379 delta_from_mid_point_delta_in_us < BTR_DRIFT_MARGIN2000) {
380 if (((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) <
381 max_render_time_in_us) &&
382 ((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) >
383 in_out_vrr->min_duration_in_us))
384 frames_to_insert = in_out_vrr->btr.frames_to_insert;
385 }
386
387 /* Either we've calculated the number of frames to insert,
388 * or we need to insert min duration frames
389 */
390 if (frames_to_insert &&
391 (last_render_time_in_us / frames_to_insert) <
392 in_out_vrr->min_duration_in_us){
393 frames_to_insert -= (frames_to_insert > 1) ?
394 1 : 0;
395 }
396
397 if (frames_to_insert > 0)
398 inserted_frame_duration_in_us = last_render_time_in_us /
399 frames_to_insert;
400
401 if (inserted_frame_duration_in_us < in_out_vrr->min_duration_in_us)
402 inserted_frame_duration_in_us = in_out_vrr->min_duration_in_us;
403
404 /* Cache the calculated variables */
405 in_out_vrr->btr.inserted_duration_in_us =
406 inserted_frame_duration_in_us;
407 in_out_vrr->btr.frames_to_insert = frames_to_insert;
408 in_out_vrr->btr.frame_counter = frames_to_insert;
409 }
410}
411
412static void apply_fixed_refresh(struct core_freesync *core_freesync,
413 const struct dc_stream_state *stream,
414 unsigned int last_render_time_in_us,
415 struct mod_vrr_params *in_out_vrr)
416{
417 bool_Bool update = false0;
418 unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us;
419
420 /* Compute the exit refresh rate and exit frame duration */
421 unsigned int exit_refresh_rate_in_milli_hz = ((1000000000/max_render_time_in_us)
422 + (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ1));
423 unsigned int exit_frame_duration_in_us = 1000000000/exit_refresh_rate_in_milli_hz;
424
425 if (last_render_time_in_us < exit_frame_duration_in_us) {
426 /* Exit Fixed Refresh mode */
427 if (in_out_vrr->fixed.fixed_active) {
428 in_out_vrr->fixed.frame_counter++;
429
430 if (in_out_vrr->fixed.frame_counter >
431 FIXED_REFRESH_EXIT_FRAME_COUNT10) {
432 in_out_vrr->fixed.frame_counter = 0;
433 in_out_vrr->fixed.fixed_active = false0;
434 in_out_vrr->fixed.target_refresh_in_uhz = 0;
435 update = true1;
436 }
437 } else
438 in_out_vrr->fixed.frame_counter = 0;
439 } else if (last_render_time_in_us > max_render_time_in_us) {
440 /* Enter Fixed Refresh mode */
441 if (!in_out_vrr->fixed.fixed_active) {
442 in_out_vrr->fixed.frame_counter++;
443
444 if (in_out_vrr->fixed.frame_counter >
445 FIXED_REFRESH_ENTER_FRAME_COUNT5) {
446 in_out_vrr->fixed.frame_counter = 0;
447 in_out_vrr->fixed.fixed_active = true1;
448 in_out_vrr->fixed.target_refresh_in_uhz =
449 in_out_vrr->max_refresh_in_uhz;
450 update = true1;
451 }
452 } else
453 in_out_vrr->fixed.frame_counter = 0;
454 }
455
456 if (update) {
457 if (in_out_vrr->fixed.fixed_active) {
458 in_out_vrr->adjust.v_total_min =
459 mod_freesync_calc_v_total_from_refresh(
460 stream, in_out_vrr->max_refresh_in_uhz);
461 in_out_vrr->adjust.v_total_max =
462 in_out_vrr->adjust.v_total_min;
463 } else {
464 in_out_vrr->adjust.v_total_min =
465 mod_freesync_calc_v_total_from_refresh(stream,
466 in_out_vrr->max_refresh_in_uhz);
467 in_out_vrr->adjust.v_total_max =
468 mod_freesync_calc_v_total_from_refresh(stream,
469 in_out_vrr->min_refresh_in_uhz);
470 }
471 }
472}
473
474static void determine_flip_interval_workaround_req(struct mod_vrr_params *in_vrr,
475 unsigned int curr_time_stamp_in_us)
476{
477 in_vrr->flip_interval.vsync_to_flip_in_us = curr_time_stamp_in_us -
478 in_vrr->flip_interval.v_update_timestamp_in_us;
479
480 /* Determine conditions for stopping workaround */
481 if (in_vrr->flip_interval.flip_interval_workaround_active &&
482 in_vrr->flip_interval.vsyncs_between_flip < VSYNCS_BETWEEN_FLIP_THRESHOLD2 &&
483 in_vrr->flip_interval.vsync_to_flip_in_us > FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US500) {
484 in_vrr->flip_interval.flip_interval_detect_counter = 0;
485 in_vrr->flip_interval.program_flip_interval_workaround = true1;
486 in_vrr->flip_interval.flip_interval_workaround_active = false0;
487 } else {
488 /* Determine conditions for starting workaround */
489 if (in_vrr->flip_interval.vsyncs_between_flip >= VSYNCS_BETWEEN_FLIP_THRESHOLD2 &&
490 in_vrr->flip_interval.vsync_to_flip_in_us < FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US500) {
491 /* Increase flip interval counter we have 2 vsyncs between flips and
492 * vsync to flip interval is less than 500us
493 */
494 in_vrr->flip_interval.flip_interval_detect_counter++;
495 if (in_vrr->flip_interval.flip_interval_detect_counter > FREESYNC_CONSEC_FLIP_AFTER_VSYNC5) {
496 /* Start workaround if we detect 5 consecutive instances of the above case */
497 in_vrr->flip_interval.program_flip_interval_workaround = true1;
498 in_vrr->flip_interval.flip_interval_workaround_active = true1;
499 }
500 } else {
501 /* Reset the flip interval counter if we condition is no longer met */
502 in_vrr->flip_interval.flip_interval_detect_counter = 0;
503 }
504 }
505
506 in_vrr->flip_interval.vsyncs_between_flip = 0;
507}
508
509static bool_Bool vrr_settings_require_update(struct core_freesync *core_freesync,
510 struct mod_freesync_config *in_config,
511 unsigned int min_refresh_in_uhz,
512 unsigned int max_refresh_in_uhz,
513 struct mod_vrr_params *in_vrr)
514{
515 if (in_vrr->state != in_config->state) {
516 return true1;
517 } else if (in_vrr->state == VRR_STATE_ACTIVE_FIXED &&
518 in_vrr->fixed.target_refresh_in_uhz !=
519 in_config->fixed_refresh_in_uhz) {
520 return true1;
521 } else if (in_vrr->min_refresh_in_uhz != min_refresh_in_uhz) {
522 return true1;
523 } else if (in_vrr->max_refresh_in_uhz != max_refresh_in_uhz) {
524 return true1;
525 }
526
527 return false0;
528}
529
530bool_Bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync,
531 const struct dc_stream_state *stream,
532 unsigned int *vmin,
533 unsigned int *vmax)
534{
535 *vmin = stream->adjust.v_total_min;
536 *vmax = stream->adjust.v_total_max;
537
538 return true1;
539}
540
541bool_Bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync,
542 struct dc_stream_state *stream,
543 unsigned int *nom_v_pos,
544 unsigned int *v_pos)
545{
546 struct core_freesync *core_freesync = NULL((void *)0);
547 struct crtc_position position;
548
549 if (mod_freesync == NULL((void *)0))
550 return false0;
551
552 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
553
554 if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1,
555 &position.vertical_count,
556 &position.nominal_vcount)) {
557
558 *nom_v_pos = position.nominal_vcount;
559 *v_pos = position.vertical_count;
560
561 return true1;
562 }
563
564 return false0;
565}
566
567static void build_vrr_infopacket_data_v1(const struct mod_vrr_params *vrr,
568 struct dc_info_packet *infopacket,
569 bool_Bool freesync_on_desktop)
570{
571 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
572 infopacket->sb[1] = 0x1A;
573
574 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
575 infopacket->sb[2] = 0x00;
576
577 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
578 infopacket->sb[3] = 0x00;
579
580 /* PB4 = Reserved */
581
582 /* PB5 = Reserved */
583
584 /* PB6 = [Bits 7:3 = Reserved] */
585
586 /* PB6 = [Bit 0 = FreeSync Supported] */
587 if (vrr->state != VRR_STATE_UNSUPPORTED)
588 infopacket->sb[6] |= 0x01;
589
590 /* PB6 = [Bit 1 = FreeSync Enabled] */
591 if (vrr->state != VRR_STATE_DISABLED &&
592 vrr->state != VRR_STATE_UNSUPPORTED)
593 infopacket->sb[6] |= 0x02;
594
595 if (freesync_on_desktop) {
596 /* PB6 = [Bit 2 = FreeSync Active] */
597 if (vrr->state != VRR_STATE_DISABLED &&
598 vrr->state != VRR_STATE_UNSUPPORTED)
599 infopacket->sb[6] |= 0x04;
600 } else {
601 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
602 vrr->state == VRR_STATE_ACTIVE_FIXED)
603 infopacket->sb[6] |= 0x04;
604 }
605
606 // For v1 & 2 infoframes program nominal if non-fs mode, otherwise full range
607 /* PB7 = FreeSync Minimum refresh rate (Hz) */
608 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
609 vrr->state == VRR_STATE_ACTIVE_FIXED) {
610 infopacket->sb[7] = (unsigned char)((vrr->min_refresh_in_uhz + 500000) / 1000000);
611 } else {
612 infopacket->sb[7] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
613 }
614
615 /* PB8 = FreeSync Maximum refresh rate (Hz)
616 * Note: We should never go above the field rate of the mode timing set.
617 */
618 infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
619}
620
621static void build_vrr_infopacket_data_v3(const struct mod_vrr_params *vrr,
622 struct dc_info_packet *infopacket)
623{
624 unsigned int min_refresh;
625 unsigned int max_refresh;
626 unsigned int fixed_refresh;
627 unsigned int min_programmed;
628 unsigned int max_programmed;
629
630 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
631 infopacket->sb[1] = 0x1A;
632
633 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
634 infopacket->sb[2] = 0x00;
635
636 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
637 infopacket->sb[3] = 0x00;
638
639 /* PB4 = Reserved */
640
641 /* PB5 = Reserved */
642
643 /* PB6 = [Bits 7:3 = Reserved] */
644
645 /* PB6 = [Bit 0 = FreeSync Supported] */
646 if (vrr->state != VRR_STATE_UNSUPPORTED)
647 infopacket->sb[6] |= 0x01;
648
649 /* PB6 = [Bit 1 = FreeSync Enabled] */
650 if (vrr->state != VRR_STATE_DISABLED &&
651 vrr->state != VRR_STATE_UNSUPPORTED)
652 infopacket->sb[6] |= 0x02;
653
654 /* PB6 = [Bit 2 = FreeSync Active] */
655 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
656 vrr->state == VRR_STATE_ACTIVE_FIXED)
657 infopacket->sb[6] |= 0x04;
658
659 min_refresh = (vrr->min_refresh_in_uhz + 500000) / 1000000;
660 max_refresh = (vrr->max_refresh_in_uhz + 500000) / 1000000;
661 fixed_refresh = (vrr->fixed_refresh_in_uhz + 500000) / 1000000;
662
663 min_programmed = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? fixed_refresh :
664 (vrr->state == VRR_STATE_ACTIVE_VARIABLE) ? min_refresh :
665 (vrr->state == VRR_STATE_INACTIVE) ? min_refresh :
666 max_refresh; // Non-fs case, program nominal range
667
668 max_programmed = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? fixed_refresh :
669 (vrr->state == VRR_STATE_ACTIVE_VARIABLE) ? max_refresh :
670 max_refresh;// Non-fs case, program nominal range
671
672 /* PB7 = FreeSync Minimum refresh rate (Hz) */
673 infopacket->sb[7] = min_programmed & 0xFF;
674
675 /* PB8 = FreeSync Maximum refresh rate (Hz) */
676 infopacket->sb[8] = max_programmed & 0xFF;
677
678 /* PB11 : MSB FreeSync Minimum refresh rate [Hz] - bits 9:8 */
679 infopacket->sb[11] = (min_programmed >> 8) & 0x03;
680
681 /* PB12 : MSB FreeSync Maximum refresh rate [Hz] - bits 9:8 */
682 infopacket->sb[12] = (max_programmed >> 8) & 0x03;
683
684 /* PB16 : Reserved bits 7:1, FixedRate bit 0 */
685 infopacket->sb[16] = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? 1 : 0;
686}
687
688static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf,
689 struct dc_info_packet *infopacket)
690{
691 if (app_tf != TRANSFER_FUNC_UNKNOWN) {
692 infopacket->valid = true1;
693
694 infopacket->sb[6] |= 0x08; // PB6 = [Bit 3 = Native Color Active]
695
696 if (app_tf == TRANSFER_FUNC_GAMMA_22) {
697 infopacket->sb[9] |= 0x04; // PB6 = [Bit 2 = Gamma 2.2 EOTF Active]
698 }
699 }
700}
701
702static void build_vrr_infopacket_header_v1(enum amd_signal_type signal,
703 struct dc_info_packet *infopacket,
704 unsigned int *payload_size)
705{
706 if (dc_is_hdmi_signal(signal)) {
707
708 /* HEADER */
709
710 /* HB0 = Packet Type = 0x83 (Source Product
711 * Descriptor InfoFrame)
712 */
713 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
714
715 /* HB1 = Version = 0x01 */
716 infopacket->hb1 = 0x01;
717
718 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */
719 infopacket->hb2 = 0x08;
720
721 *payload_size = 0x08;
722
723 } else if (dc_is_dp_signal(signal)) {
724
725 /* HEADER */
726
727 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
728 * when used to associate audio related info packets
729 */
730 infopacket->hb0 = 0x00;
731
732 /* HB1 = Packet Type = 0x83 (Source Product
733 * Descriptor InfoFrame)
734 */
735 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
736
737 /* HB2 = [Bits 7:0 = Least significant eight bits -
738 * For INFOFRAME, the value must be 1Bh]
739 */
740 infopacket->hb2 = 0x1B;
741
742 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1]
743 * [Bits 1:0 = Most significant two bits = 0x00]
744 */
745 infopacket->hb3 = 0x04;
746
747 *payload_size = 0x1B;
748 }
749}
750
751static void build_vrr_infopacket_header_v2(enum amd_signal_type signal,
752 struct dc_info_packet *infopacket,
753 unsigned int *payload_size)
754{
755 if (dc_is_hdmi_signal(signal)) {
756
757 /* HEADER */
758
759 /* HB0 = Packet Type = 0x83 (Source Product
760 * Descriptor InfoFrame)
761 */
762 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
763
764 /* HB1 = Version = 0x02 */
765 infopacket->hb1 = 0x02;
766
767 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x09] */
768 infopacket->hb2 = 0x09;
769
770 *payload_size = 0x09;
771 } else if (dc_is_dp_signal(signal)) {
772
773 /* HEADER */
774
775 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
776 * when used to associate audio related info packets
777 */
778 infopacket->hb0 = 0x00;
779
780 /* HB1 = Packet Type = 0x83 (Source Product
781 * Descriptor InfoFrame)
782 */
783 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
784
785 /* HB2 = [Bits 7:0 = Least significant eight bits -
786 * For INFOFRAME, the value must be 1Bh]
787 */
788 infopacket->hb2 = 0x1B;
789
790 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2]
791 * [Bits 1:0 = Most significant two bits = 0x00]
792 */
793 infopacket->hb3 = 0x08;
794
795 *payload_size = 0x1B;
796 }
797}
798
799static void build_vrr_infopacket_header_v3(enum amd_signal_type signal,
800 struct dc_info_packet *infopacket,
801 unsigned int *payload_size)
802{
803 unsigned char version;
804
805 version = 3;
806 if (dc_is_hdmi_signal(signal)) {
807
808 /* HEADER */
809
810 /* HB0 = Packet Type = 0x83 (Source Product
811 * Descriptor InfoFrame)
812 */
813 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
814
815 /* HB1 = Version = 0x03 */
816 infopacket->hb1 = version;
817
818 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length] */
819 infopacket->hb2 = 0x10;
820
821 *payload_size = 0x10;
822 } else if (dc_is_dp_signal(signal)) {
823
824 /* HEADER */
825
826 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
827 * when used to associate audio related info packets
828 */
829 infopacket->hb0 = 0x00;
830
831 /* HB1 = Packet Type = 0x83 (Source Product
832 * Descriptor InfoFrame)
833 */
834 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
835
836 /* HB2 = [Bits 7:0 = Least significant eight bits -
837 * For INFOFRAME, the value must be 1Bh]
838 */
839 infopacket->hb2 = 0x1B;
840
841 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2]
842 * [Bits 1:0 = Most significant two bits = 0x00]
843 */
844
845 infopacket->hb3 = (version & 0x3F) << 2;
846
847 *payload_size = 0x1B;
848 }
849}
850
851static void build_vrr_infopacket_checksum(unsigned int *payload_size,
852 struct dc_info_packet *infopacket)
853{
854 /* Calculate checksum */
855 unsigned int idx = 0;
856 unsigned char checksum = 0;
857
858 checksum += infopacket->hb0;
859 checksum += infopacket->hb1;
860 checksum += infopacket->hb2;
861 checksum += infopacket->hb3;
862
863 for (idx = 1; idx <= *payload_size; idx++)
864 checksum += infopacket->sb[idx];
865
866 /* PB0 = Checksum (one byte complement) */
867 infopacket->sb[0] = (unsigned char)(0x100 - checksum);
868
869 infopacket->valid = true1;
870}
871
872static void build_vrr_infopacket_v1(enum amd_signal_type signal,
873 const struct mod_vrr_params *vrr,
874 struct dc_info_packet *infopacket,
875 bool_Bool freesync_on_desktop)
876{
877 /* SPD info packet for FreeSync */
878 unsigned int payload_size = 0;
879
880 build_vrr_infopacket_header_v1(signal, infopacket, &payload_size);
881 build_vrr_infopacket_data_v1(vrr, infopacket, freesync_on_desktop);
882 build_vrr_infopacket_checksum(&payload_size, infopacket);
883
884 infopacket->valid = true1;
885}
886
887static void build_vrr_infopacket_v2(enum amd_signal_type signal,
888 const struct mod_vrr_params *vrr,
889 enum color_transfer_func app_tf,
890 struct dc_info_packet *infopacket,
891 bool_Bool freesync_on_desktop)
892{
893 unsigned int payload_size = 0;
894
895 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size);
896 build_vrr_infopacket_data_v1(vrr, infopacket, freesync_on_desktop);
897
898 build_vrr_infopacket_fs2_data(app_tf, infopacket);
899
900 build_vrr_infopacket_checksum(&payload_size, infopacket);
901
902 infopacket->valid = true1;
903}
904#ifndef TRIM_FSFT
905static void build_vrr_infopacket_fast_transport_data(
906 bool_Bool ftActive,
907 unsigned int ftOutputRate,
908 struct dc_info_packet *infopacket)
909{
910 /* PB9 : bit7 - fast transport Active*/
911 unsigned char activeBit = (ftActive) ? 1 << 7 : 0;
912
913 infopacket->sb[1] &= ~activeBit; //clear bit
914 infopacket->sb[1] |= activeBit; //set bit
915
916 /* PB13 : Target Output Pixel Rate [kHz] - bits 7:0 */
917 infopacket->sb[13] = ftOutputRate & 0xFF;
918
919 /* PB14 : Target Output Pixel Rate [kHz] - bits 15:8 */
920 infopacket->sb[14] = (ftOutputRate >> 8) & 0xFF;
921
922 /* PB15 : Target Output Pixel Rate [kHz] - bits 23:16 */
923 infopacket->sb[15] = (ftOutputRate >> 16) & 0xFF;
924
925}
926#endif
927
928static void build_vrr_infopacket_v3(enum amd_signal_type signal,
929 const struct mod_vrr_params *vrr,
930#ifndef TRIM_FSFT
931 bool_Bool ftActive, unsigned int ftOutputRate,
932#endif
933 enum color_transfer_func app_tf,
934 struct dc_info_packet *infopacket)
935{
936 unsigned int payload_size = 0;
937
938 build_vrr_infopacket_header_v3(signal, infopacket, &payload_size);
939 build_vrr_infopacket_data_v3(vrr, infopacket);
940
941 build_vrr_infopacket_fs2_data(app_tf, infopacket);
942
943#ifndef TRIM_FSFT
944 build_vrr_infopacket_fast_transport_data(
945 ftActive,
946 ftOutputRate,
947 infopacket);
948#endif
949
950 build_vrr_infopacket_checksum(&payload_size, infopacket);
951
952 infopacket->valid = true1;
953}
954
955static void build_vrr_infopacket_sdp_v1_3(enum vrr_packet_type packet_type,
956 struct dc_info_packet *infopacket)
957{
958 uint8_t idx = 0, size = 0;
959
960 size = ((packet_type == PACKET_TYPE_FS_V1) ? 0x08 :
961 (packet_type == PACKET_TYPE_FS_V3) ? 0x10 :
962 0x09);
963
964 for (idx = infopacket->hb2; idx > 1; idx--) // Data Byte Count: 0x1B
965 infopacket->sb[idx] = infopacket->sb[idx-1];
966
967 infopacket->sb[1] = size; // Length
968 infopacket->sb[0] = (infopacket->hb3 >> 2) & 0x3F;//Version
969 infopacket->hb3 = (0x13 << 2); // Header,SDP 1.3
970 infopacket->hb2 = 0x1D;
971}
972
973void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
974 const struct dc_stream_state *stream,
975 const struct mod_vrr_params *vrr,
976 enum vrr_packet_type packet_type,
977 enum color_transfer_func app_tf,
978 struct dc_info_packet *infopacket,
979 bool_Bool pack_sdp_v1_3)
980{
981 /* SPD info packet for FreeSync
982 * VTEM info packet for HdmiVRR
983 * Check if Freesync is supported. Return if false. If true,
984 * set the corresponding bit in the info packet
985 */
986 if (!vrr->send_info_frame)
987 return;
988
989 switch (packet_type) {
990 case PACKET_TYPE_FS_V3:
991#ifndef TRIM_FSFT
992 // always populate with pixel rate.
993 build_vrr_infopacket_v3(
994 stream->signal, vrr,
995 stream->timing.flags.FAST_TRANSPORT,
996 (stream->timing.flags.FAST_TRANSPORT) ?
997 stream->timing.fast_transport_output_rate_100hz :
998 stream->timing.pix_clk_100hz,
999 app_tf, infopacket);
1000#else
1001 build_vrr_infopacket_v3(stream->signal, vrr, app_tf, infopacket);
1002#endif
1003 break;
1004 case PACKET_TYPE_FS_V2:
1005 build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket, stream->freesync_on_desktop);
1006 break;
1007 case PACKET_TYPE_VRR:
1008 case PACKET_TYPE_FS_V1:
1009 default:
1010 build_vrr_infopacket_v1(stream->signal, vrr, infopacket, stream->freesync_on_desktop);
1011 }
1012
1013 if (true1 == pack_sdp_v1_3 &&
1014 true1 == dc_is_dp_signal(stream->signal) &&
1015 packet_type != PACKET_TYPE_VRR &&
1016 packet_type != PACKET_TYPE_VTEM)
1017 build_vrr_infopacket_sdp_v1_3(packet_type, infopacket);
1018}
1019
1020void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
1021 const struct dc_stream_state *stream,
1022 struct mod_freesync_config *in_config,
1023 struct mod_vrr_params *in_out_vrr)
1024{
1025 struct core_freesync *core_freesync = NULL((void *)0);
1026 unsigned long long nominal_field_rate_in_uhz = 0;
1027 unsigned long long rounded_nominal_in_uhz = 0;
1028 unsigned int refresh_range = 0;
1029 unsigned long long min_refresh_in_uhz = 0;
1030 unsigned long long max_refresh_in_uhz = 0;
1031
1032 if (mod_freesync == NULL((void *)0))
1033 return;
1034
1035 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
1036
1037 /* Calculate nominal field rate for stream */
1038 nominal_field_rate_in_uhz =
1039 mod_freesync_calc_nominal_field_rate(stream);
1040
1041 min_refresh_in_uhz = in_config->min_refresh_in_uhz;
1042 max_refresh_in_uhz = in_config->max_refresh_in_uhz;
1043
1044 /* Full range may be larger than current video timing, so cap at nominal */
1045 if (max_refresh_in_uhz > nominal_field_rate_in_uhz)
1046 max_refresh_in_uhz = nominal_field_rate_in_uhz;
1047
1048 /* Full range may be larger than current video timing, so cap at nominal */
1049 if (min_refresh_in_uhz > max_refresh_in_uhz)
1050 min_refresh_in_uhz = max_refresh_in_uhz;
1051
1052 /* If a monitor reports exactly max refresh of 2x of min, enforce it on nominal */
1053 rounded_nominal_in_uhz =
1054 div_u64(nominal_field_rate_in_uhz + 50000, 100000) * 100000;
1055 if (in_config->max_refresh_in_uhz == (2 * in_config->min_refresh_in_uhz) &&
1056 in_config->max_refresh_in_uhz == rounded_nominal_in_uhz)
1057 min_refresh_in_uhz = div_u64(nominal_field_rate_in_uhz, 2);
1058
1059 if (!vrr_settings_require_update(core_freesync,
1060 in_config, (unsigned int)min_refresh_in_uhz, (unsigned int)max_refresh_in_uhz,
1061 in_out_vrr))
1062 return;
1063
1064 in_out_vrr->state = in_config->state;
1065 in_out_vrr->send_info_frame = in_config->vsif_supported;
1066
1067 if (in_config->state == VRR_STATE_UNSUPPORTED) {
1068 in_out_vrr->state = VRR_STATE_UNSUPPORTED;
1069 in_out_vrr->supported = false0;
1070 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1071 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1072
1073 return;
1074
1075 } else {
1076 in_out_vrr->min_refresh_in_uhz = (unsigned int)min_refresh_in_uhz;
1077 in_out_vrr->max_duration_in_us =
1078 calc_duration_in_us_from_refresh_in_uhz(
1079 (unsigned int)min_refresh_in_uhz);
1080
1081 in_out_vrr->max_refresh_in_uhz = (unsigned int)max_refresh_in_uhz;
1082 in_out_vrr->min_duration_in_us =
1083 calc_duration_in_us_from_refresh_in_uhz(
1084 (unsigned int)max_refresh_in_uhz);
1085
1086 if (in_config->state == VRR_STATE_ACTIVE_FIXED)
1087 in_out_vrr->fixed_refresh_in_uhz = in_config->fixed_refresh_in_uhz;
1088 else
1089 in_out_vrr->fixed_refresh_in_uhz = 0;
1090
1091 refresh_range = div_u64(in_out_vrr->max_refresh_in_uhz + 500000, 1000000) -
1092+ div_u64(in_out_vrr->min_refresh_in_uhz + 500000, 1000000);
1093
1094 in_out_vrr->supported = true1;
1095 }
1096
1097 in_out_vrr->fixed.ramping_active = in_config->ramping;
1098
1099 in_out_vrr->btr.btr_enabled = in_config->btr;
1100
1101 if (in_out_vrr->max_refresh_in_uhz < (2 * in_out_vrr->min_refresh_in_uhz))
1102 in_out_vrr->btr.btr_enabled = false0;
1103 else {
1104 in_out_vrr->btr.margin_in_us = in_out_vrr->max_duration_in_us -
1105 2 * in_out_vrr->min_duration_in_us;
1106 if (in_out_vrr->btr.margin_in_us > BTR_MAX_MARGIN2500)
1107 in_out_vrr->btr.margin_in_us = BTR_MAX_MARGIN2500;
1108 }
1109
1110 in_out_vrr->btr.btr_active = false0;
1111 in_out_vrr->btr.inserted_duration_in_us = 0;
1112 in_out_vrr->btr.frames_to_insert = 0;
1113 in_out_vrr->btr.frame_counter = 0;
1114 in_out_vrr->fixed.fixed_active = false0;
1115 in_out_vrr->fixed.target_refresh_in_uhz = 0;
1116
1117 in_out_vrr->btr.mid_point_in_us =
1118 (in_out_vrr->min_duration_in_us +
1119 in_out_vrr->max_duration_in_us) / 2;
1120
1121 if (in_out_vrr->state == VRR_STATE_UNSUPPORTED) {
1122 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1123 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1124 } else if (in_out_vrr->state == VRR_STATE_DISABLED) {
1125 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1126 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1127 } else if (in_out_vrr->state == VRR_STATE_INACTIVE) {
1128 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1129 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1130 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1131 refresh_range >= MIN_REFRESH_RANGE10) {
1132
1133 in_out_vrr->adjust.v_total_min =
1134 mod_freesync_calc_v_total_from_refresh(stream,
1135 in_out_vrr->max_refresh_in_uhz);
1136 in_out_vrr->adjust.v_total_max =
1137 mod_freesync_calc_v_total_from_refresh(stream,
1138 in_out_vrr->min_refresh_in_uhz);
1139 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) {
1140 in_out_vrr->fixed.target_refresh_in_uhz =
1141 in_out_vrr->fixed_refresh_in_uhz;
1142 if (in_out_vrr->fixed.ramping_active &&
1143 in_out_vrr->fixed.fixed_active) {
1144 /* Do not update vtotals if ramping is already active
1145 * in order to continue ramp from current refresh.
1146 */
1147 in_out_vrr->fixed.fixed_active = true1;
1148 } else {
1149 in_out_vrr->fixed.fixed_active = true1;
1150 in_out_vrr->adjust.v_total_min =
1151 mod_freesync_calc_v_total_from_refresh(stream,
1152 in_out_vrr->fixed.target_refresh_in_uhz);
1153 in_out_vrr->adjust.v_total_max =
1154 in_out_vrr->adjust.v_total_min;
1155 }
1156 } else {
1157 in_out_vrr->state = VRR_STATE_INACTIVE;
1158 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1159 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1160 }
1161}
1162
1163void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync,
1164 const struct dc_plane_state *plane,
1165 const struct dc_stream_state *stream,
1166 unsigned int curr_time_stamp_in_us,
1167 struct mod_vrr_params *in_out_vrr)
1168{
1169 struct core_freesync *core_freesync = NULL((void *)0);
1170 unsigned int last_render_time_in_us = 0;
1171 unsigned int average_render_time_in_us = 0;
1172
1173 if (mod_freesync == NULL((void *)0))
1174 return;
1175
1176 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
1177
1178 if (in_out_vrr->supported &&
1179 in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) {
1180 unsigned int i = 0;
1181 unsigned int oldest_index = plane->time.index + 1;
1182
1183 if (oldest_index >= DC_PLANE_UPDATE_TIMES_MAX10)
1184 oldest_index = 0;
1185
1186 last_render_time_in_us = curr_time_stamp_in_us -
1187 plane->time.prev_update_time_in_us;
1188
1189 /* Sum off all entries except oldest one */
1190 for (i = 0; i < DC_PLANE_UPDATE_TIMES_MAX10; i++) {
1191 average_render_time_in_us +=
1192 plane->time.time_elapsed_in_us[i];
1193 }
1194 average_render_time_in_us -=
1195 plane->time.time_elapsed_in_us[oldest_index];
1196
1197 /* Add render time for current flip */
1198 average_render_time_in_us += last_render_time_in_us;
1199 average_render_time_in_us /= DC_PLANE_UPDATE_TIMES_MAX10;
Value stored to 'average_render_time_in_us' is never read
1200
1201 if (in_out_vrr->btr.btr_enabled) {
1202 apply_below_the_range(core_freesync,
1203 stream,
1204 last_render_time_in_us,
1205 in_out_vrr);
1206 } else {
1207 apply_fixed_refresh(core_freesync,
1208 stream,
1209 last_render_time_in_us,
1210 in_out_vrr);
1211 }
1212
1213 determine_flip_interval_workaround_req(in_out_vrr,
1214 curr_time_stamp_in_us);
1215
1216 }
1217}
1218
1219void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
1220 const struct dc_stream_state *stream,
1221 struct mod_vrr_params *in_out_vrr)
1222{
1223 struct core_freesync *core_freesync = NULL((void *)0);
1224 unsigned int cur_timestamp_in_us;
1225 unsigned long long cur_tick;
1226
1227 if ((mod_freesync == NULL((void *)0)) || (stream == NULL((void *)0)) || (in_out_vrr == NULL((void *)0)))
1228 return;
1229
1230 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync)({ const __typeof( ((struct core_freesync *)0)->public ) *
__mptr = (mod_freesync); (struct core_freesync *)( (char *)__mptr
- __builtin_offsetof(struct core_freesync, public) );});
1231
1232 if (in_out_vrr->supported == false0)
1233 return;
1234
1235 cur_tick = dm_get_timestamp(core_freesync->dc->ctx);
1236 cur_timestamp_in_us = (unsigned int)
1237 div_u64(dm_get_elapse_time_in_ns(core_freesync->dc->ctx, cur_tick, 0), 1000);
1238
1239 in_out_vrr->flip_interval.vsyncs_between_flip++;
1240 in_out_vrr->flip_interval.v_update_timestamp_in_us = cur_timestamp_in_us;
1241
1242 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1243 (in_out_vrr->flip_interval.flip_interval_workaround_active ||
1244 (!in_out_vrr->flip_interval.flip_interval_workaround_active &&
1245 in_out_vrr->flip_interval.program_flip_interval_workaround))) {
1246 // set freesync vmin vmax to nominal for workaround
1247 in_out_vrr->adjust.v_total_min =
1248 mod_freesync_calc_v_total_from_refresh(
1249 stream, in_out_vrr->max_refresh_in_uhz);
1250 in_out_vrr->adjust.v_total_max =
1251 in_out_vrr->adjust.v_total_min;
1252 in_out_vrr->flip_interval.program_flip_interval_workaround = false0;
1253 in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup = true1;
1254 return;
1255 }
1256
1257 if (in_out_vrr->state != VRR_STATE_ACTIVE_VARIABLE &&
1258 in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup) {
1259 in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup = false0;
1260 in_out_vrr->flip_interval.flip_interval_detect_counter = 0;
1261 in_out_vrr->flip_interval.vsyncs_between_flip = 0;
1262 in_out_vrr->flip_interval.vsync_to_flip_in_us = 0;
1263 }
1264
1265 /* Below the Range Logic */
1266
1267 /* Only execute if in fullscreen mode */
1268 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1269 in_out_vrr->btr.btr_active) {
1270 /* TODO: pass in flag for Pre-DCE12 ASIC
1271 * in order for frame variable duration to take affect,
1272 * it needs to be done one VSYNC early, which is at
1273 * frameCounter == 1.
1274 * For DCE12 and newer updates to V_TOTAL_MIN/MAX
1275 * will take affect on current frame
1276 */
1277 if (in_out_vrr->btr.frames_to_insert ==
1278 in_out_vrr->btr.frame_counter) {
1279 in_out_vrr->adjust.v_total_min =
1280 calc_v_total_from_duration(stream,
1281 in_out_vrr,
1282 in_out_vrr->btr.inserted_duration_in_us);
1283 in_out_vrr->adjust.v_total_max =
1284 in_out_vrr->adjust.v_total_min;
1285 }
1286
1287 if (in_out_vrr->btr.frame_counter > 0)
1288 in_out_vrr->btr.frame_counter--;
1289
1290 /* Restore FreeSync */
1291 if (in_out_vrr->btr.frame_counter == 0) {
1292 in_out_vrr->adjust.v_total_min =
1293 mod_freesync_calc_v_total_from_refresh(stream,
1294 in_out_vrr->max_refresh_in_uhz);
1295 in_out_vrr->adjust.v_total_max =
1296 mod_freesync_calc_v_total_from_refresh(stream,
1297 in_out_vrr->min_refresh_in_uhz);
1298 }
1299 }
1300
1301 /* If in fullscreen freesync mode or in video, do not program
1302 * static screen ramp values
1303 */
1304 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE)
1305 in_out_vrr->fixed.ramping_active = false0;
1306
1307 /* Gradual Static Screen Ramping Logic
1308 * Execute if ramp is active and user enabled freesync static screen
1309 */
1310 if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED &&
1311 in_out_vrr->fixed.ramping_active) {
1312 update_v_total_for_static_ramp(
1313 core_freesync, stream, in_out_vrr);
1314 }
1315}
1316
1317void mod_freesync_get_settings(struct mod_freesync *mod_freesync,
1318 const struct mod_vrr_params *vrr,
1319 unsigned int *v_total_min, unsigned int *v_total_max,
1320 unsigned int *event_triggers,
1321 unsigned int *window_min, unsigned int *window_max,
1322 unsigned int *lfc_mid_point_in_us,
1323 unsigned int *inserted_frames,
1324 unsigned int *inserted_duration_in_us)
1325{
1326 if (mod_freesync == NULL((void *)0))
1327 return;
1328
1329 if (vrr->supported) {
1330 *v_total_min = vrr->adjust.v_total_min;
1331 *v_total_max = vrr->adjust.v_total_max;
1332 *event_triggers = 0;
1333 *lfc_mid_point_in_us = vrr->btr.mid_point_in_us;
1334 *inserted_frames = vrr->btr.frames_to_insert;
1335 *inserted_duration_in_us = vrr->btr.inserted_duration_in_us;
1336 }
1337}
1338
1339unsigned long long mod_freesync_calc_nominal_field_rate(
1340 const struct dc_stream_state *stream)
1341{
1342 unsigned long long nominal_field_rate_in_uhz = 0;
1343 unsigned int total = stream->timing.h_total * stream->timing.v_total;
1344
1345 /* Calculate nominal field rate for stream, rounded up to nearest integer */
1346 nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz;
1347 nominal_field_rate_in_uhz *= 100000000ULL;
1348
1349 nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz, total);
1350
1351 return nominal_field_rate_in_uhz;
1352}
1353
1354unsigned long long mod_freesync_calc_field_rate_from_timing(
1355 unsigned int vtotal, unsigned int htotal, unsigned int pix_clk)
1356{
1357 unsigned long long field_rate_in_uhz = 0;
1358 unsigned int total = htotal * vtotal;
1359
1360 /* Calculate nominal field rate for stream, rounded up to nearest integer */
1361 field_rate_in_uhz = pix_clk;
1362 field_rate_in_uhz *= 1000000ULL;
1363
1364 field_rate_in_uhz = div_u64(field_rate_in_uhz, total);
1365
1366 return field_rate_in_uhz;
1367}
1368
1369bool_Bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr)
1370{
1371 return (pVrr->state != VRR_STATE_UNSUPPORTED) && (pVrr->state != VRR_STATE_DISABLED);
1372}
1373
1374bool_Bool mod_freesync_is_valid_range(uint32_t min_refresh_cap_in_uhz,
1375 uint32_t max_refresh_cap_in_uhz,
1376 uint32_t nominal_field_rate_in_uhz)
1377{
1378
1379 /* Typically nominal refresh calculated can have some fractional part.
1380 * Allow for some rounding error of actual video timing by taking floor
1381 * of caps and request. Round the nominal refresh rate.
1382 *
1383 * Dividing will convert everything to units in Hz although input
1384 * variable name is in uHz!
1385 *
1386 * Also note, this takes care of rounding error on the nominal refresh
1387 * so by rounding error we only expect it to be off by a small amount,
1388 * such as < 0.1 Hz. i.e. 143.9xxx or 144.1xxx.
1389 *
1390 * Example 1. Caps Min = 40 Hz, Max = 144 Hz
1391 * Request Min = 40 Hz, Max = 144 Hz
1392 * Nominal = 143.5x Hz rounded to 144 Hz
1393 * This function should allow this as valid request
1394 *
1395 * Example 2. Caps Min = 40 Hz, Max = 144 Hz
1396 * Request Min = 40 Hz, Max = 144 Hz
1397 * Nominal = 144.4x Hz rounded to 144 Hz
1398 * This function should allow this as valid request
1399 *
1400 * Example 3. Caps Min = 40 Hz, Max = 144 Hz
1401 * Request Min = 40 Hz, Max = 144 Hz
1402 * Nominal = 120.xx Hz rounded to 120 Hz
1403 * This function should return NOT valid since the requested
1404 * max is greater than current timing's nominal
1405 *
1406 * Example 4. Caps Min = 40 Hz, Max = 120 Hz
1407 * Request Min = 40 Hz, Max = 120 Hz
1408 * Nominal = 144.xx Hz rounded to 144 Hz
1409 * This function should return NOT valid since the nominal
1410 * is greater than the capability's max refresh
1411 */
1412 nominal_field_rate_in_uhz =
1413 div_u64(nominal_field_rate_in_uhz + 500000, 1000000);
1414 min_refresh_cap_in_uhz /= 1000000;
1415 max_refresh_cap_in_uhz /= 1000000;
1416
1417 /* Check nominal is within range */
1418 if (nominal_field_rate_in_uhz > max_refresh_cap_in_uhz ||
1419 nominal_field_rate_in_uhz < min_refresh_cap_in_uhz)
1420 return false0;
1421
1422 /* If nominal is less than max, limit the max allowed refresh rate */
1423 if (nominal_field_rate_in_uhz < max_refresh_cap_in_uhz)
1424 max_refresh_cap_in_uhz = nominal_field_rate_in_uhz;
1425
1426 /* Check min is within range */
1427 if (min_refresh_cap_in_uhz > max_refresh_cap_in_uhz)
1428 return false0;
1429
1430 /* For variable range, check for at least 10 Hz range */
1431 if (nominal_field_rate_in_uhz - min_refresh_cap_in_uhz < 10)
1432 return false0;
1433
1434 return true1;
1435}