Bug Summary

File:dev/pci/drm/radeon/radeon_gart.c
Warning:line 302, column 7
Array access (via field 'pages') results in a null pointer dereference

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name radeon_gart.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/pci/drm/radeon/radeon_gart.c
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28
29#include <linux/pci.h>
30#include <linux/vmalloc.h>
31
32#include <uvm/uvm_glue.h>
33
34#include <drm/radeon_drm.h>
35#ifdef CONFIG_X861
36#include <asm/set_memory.h>
37#endif
38#include "radeon.h"
39
40/*
41 * GART
42 * The GART (Graphics Aperture Remapping Table) is an aperture
43 * in the GPU's address space. System pages can be mapped into
44 * the aperture and look like contiguous pages from the GPU's
45 * perspective. A page table maps the pages in the aperture
46 * to the actual backing pages in system memory.
47 *
48 * Radeon GPUs support both an internal GART, as described above,
49 * and AGP. AGP works similarly, but the GART table is configured
50 * and maintained by the northbridge rather than the driver.
51 * Radeon hw has a separate AGP aperture that is programmed to
52 * point to the AGP aperture provided by the northbridge and the
53 * requests are passed through to the northbridge aperture.
54 * Both AGP and internal GART can be used at the same time, however
55 * that is not currently supported by the driver.
56 *
57 * This file handles the common internal GART management.
58 */
59
60/*
61 * Common GART table functions.
62 */
63/**
64 * radeon_gart_table_ram_alloc - allocate system ram for gart page table
65 *
66 * @rdev: radeon_device pointer
67 *
68 * Allocate system memory for GART page table
69 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
70 * gart table to be in system memory.
71 * Returns 0 for success, -ENOMEM for failure.
72 */
73#ifdef __linux__
74int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
75{
76 void *ptr;
77
78 ptr = dma_alloc_coherent(&rdev->pdev->dev, rdev->gart.table_size,
79 &rdev->gart.table_addr, GFP_KERNEL(0x0001 | 0x0004));
80 if (ptr == NULL((void *)0)) {
81 return -ENOMEM12;
82 }
83#ifdef CONFIG_X861
84 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
85 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
86 set_memory_uc((unsigned long)ptr,
87 rdev->gart.table_size >> PAGE_SHIFT12);
88 }
89#endif
90 rdev->gart.ptr = ptr;
91 return 0;
92}
93#else
94int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
95{
96 struct drm_dmamem *dmah;
97 int flags = 0;
98
99#ifdef CONFIG_X861
100 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
101 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
102 flags |= BUS_DMA_NOCACHE0x0800;
103 }
104#endif
105 dmah = drm_dmamem_alloc(rdev->dmat, rdev->gart.table_size,
106 rdev->gart.table_size, 1, rdev->gart.table_size, flags, 0);
107 if (dmah == NULL((void *)0)) {
108 return -ENOMEM12;
109 }
110 rdev->gart.dmah = dmah;
111 rdev->gart.table_addr = dmah->map->dm_segs[0].ds_addr;
112 rdev->gart.ptr = dmah->kva;
113 memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size)__builtin_memset(((void *)rdev->gart.ptr), (0), (rdev->
gart.table_size));
114 return 0;
115}
116#endif
117
118/**
119 * radeon_gart_table_ram_free - free system ram for gart page table
120 *
121 * @rdev: radeon_device pointer
122 *
123 * Free system memory for GART page table
124 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
125 * gart table to be in system memory.
126 */
127#ifdef __linux__
128void radeon_gart_table_ram_free(struct radeon_device *rdev)
129{
130 if (rdev->gart.ptr == NULL((void *)0)) {
131 return;
132 }
133#ifdef CONFIG_X861
134 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
135 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
136 set_memory_wb((unsigned long)rdev->gart.ptr,
137 rdev->gart.table_size >> PAGE_SHIFT12);
138 }
139#endif
140 dma_free_coherent(&rdev->pdev->dev, rdev->gart.table_size,
141 (void *)rdev->gart.ptr, rdev->gart.table_addr);
142 rdev->gart.ptr = NULL((void *)0);
143 rdev->gart.table_addr = 0;
144}
145#else
146void radeon_gart_table_ram_free(struct radeon_device *rdev)
147{
148 if (rdev->gart.ptr == NULL((void *)0)) {
149 return;
150 }
151#if defined (CONFIG_X861) && defined(__linux__)
152 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
153 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
154 set_memory_wb((unsigned long)rdev->gart.ptr,
155 rdev->gart.table_size >> PAGE_SHIFT12);
156 }
157#endif
158 drm_dmamem_free(rdev->dmat, rdev->gart.dmah);
159 rdev->gart.ptr = NULL((void *)0);
160 rdev->gart.table_addr = 0;
161}
162#endif
163
164/**
165 * radeon_gart_table_vram_alloc - allocate vram for gart page table
166 *
167 * @rdev: radeon_device pointer
168 *
169 * Allocate video memory for GART page table
170 * (pcie r4xx, r5xx+). These asics require the
171 * gart table to be in video memory.
172 * Returns 0 for success, error for failure.
173 */
174int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
175{
176 int r;
177
178 if (rdev->gart.robj == NULL((void *)0)) {
179 r = radeon_bo_create(rdev, rdev->gart.table_size,
180 PAGE_SIZE(1 << 12), true1, RADEON_GEM_DOMAIN_VRAM0x4,
181 0, NULL((void *)0), NULL((void *)0), &rdev->gart.robj);
182 if (r) {
183 return r;
184 }
185 }
186 return 0;
187}
188
189/**
190 * radeon_gart_table_vram_pin - pin gart page table in vram
191 *
192 * @rdev: radeon_device pointer
193 *
194 * Pin the GART page table in vram so it will not be moved
195 * by the memory manager (pcie r4xx, r5xx+). These asics require the
196 * gart table to be in video memory.
197 * Returns 0 for success, error for failure.
198 */
199int radeon_gart_table_vram_pin(struct radeon_device *rdev)
200{
201 uint64_t gpu_addr;
202 int r;
203
204 r = radeon_bo_reserve(rdev->gart.robj, false0);
205 if (unlikely(r != 0)__builtin_expect(!!(r != 0), 0))
206 return r;
207 r = radeon_bo_pin(rdev->gart.robj,
208 RADEON_GEM_DOMAIN_VRAM0x4, &gpu_addr);
209 if (r) {
210 radeon_bo_unreserve(rdev->gart.robj);
211 return r;
212 }
213 r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr);
214 if (r)
215 radeon_bo_unpin(rdev->gart.robj);
216 radeon_bo_unreserve(rdev->gart.robj);
217 rdev->gart.table_addr = gpu_addr;
218
219 if (!r) {
220 int i;
221
222 /* We might have dropped some GART table updates while it wasn't
223 * mapped, restore all entries
224 */
225 for (i = 0; i < rdev->gart.num_gpu_pages; i++)
226 radeon_gart_set_page(rdev, i, rdev->gart.pages_entry[i])(rdev)->asic->gart.set_page((rdev), (i), (rdev->gart
.pages_entry[i]));
227 mb()do { __asm volatile("mfence" ::: "memory"); } while (0);
228 radeon_gart_tlb_flush(rdev)(rdev)->asic->gart.tlb_flush((rdev));
229 }
230
231 return r;
232}
233
234/**
235 * radeon_gart_table_vram_unpin - unpin gart page table in vram
236 *
237 * @rdev: radeon_device pointer
238 *
239 * Unpin the GART page table in vram (pcie r4xx, r5xx+).
240 * These asics require the gart table to be in video memory.
241 */
242void radeon_gart_table_vram_unpin(struct radeon_device *rdev)
243{
244 int r;
245
246 if (rdev->gart.robj == NULL((void *)0)) {
247 return;
248 }
249 r = radeon_bo_reserve(rdev->gart.robj, false0);
250 if (likely(r == 0)__builtin_expect(!!(r == 0), 1)) {
251 radeon_bo_kunmap(rdev->gart.robj);
252 radeon_bo_unpin(rdev->gart.robj);
253 radeon_bo_unreserve(rdev->gart.robj);
254 rdev->gart.ptr = NULL((void *)0);
255 }
256}
257
258/**
259 * radeon_gart_table_vram_free - free gart page table vram
260 *
261 * @rdev: radeon_device pointer
262 *
263 * Free the video memory used for the GART page table
264 * (pcie r4xx, r5xx+). These asics require the gart table to
265 * be in video memory.
266 */
267void radeon_gart_table_vram_free(struct radeon_device *rdev)
268{
269 if (rdev->gart.robj == NULL((void *)0)) {
270 return;
271 }
272 radeon_bo_unref(&rdev->gart.robj);
273}
274
275/*
276 * Common gart functions.
277 */
278/**
279 * radeon_gart_unbind - unbind pages from the gart page table
280 *
281 * @rdev: radeon_device pointer
282 * @offset: offset into the GPU's gart aperture
283 * @pages: number of pages to unbind
284 *
285 * Unbinds the requested pages from the gart page table and
286 * replaces them with the dummy page (all asics).
287 */
288void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
289 int pages)
290{
291 unsigned t;
292 unsigned p;
293 int i, j;
294
295 if (!rdev->gart.ready
12.1
Field 'ready' is true
) {
13
←
Taking false branch
→
296 WARN(1, "trying to unbind memory from uninitialized GART !\n")({ int __ret = !!(1); if (__ret) printf("trying to unbind memory from uninitialized GART !\n"
); __builtin_expect(!!(__ret), 0); });
297 return;
298 }
299 t = offset / RADEON_GPU_PAGE_SIZE4096;
300 p = t / (PAGE_SIZE(1 << 12) / RADEON_GPU_PAGE_SIZE4096);
301 for (i = 0; i < pages; i++, p++) {
14
←
Assuming 'i' is < 'pages'
→
15
←
Loop condition is true. Entering loop body
→
302 if (rdev->gart.pages[p]) {
16
←
Array access (via field 'pages') results in a null pointer dereference
303 rdev->gart.pages[p] = NULL((void *)0);
304 for (j = 0; j < (PAGE_SIZE(1 << 12) / RADEON_GPU_PAGE_SIZE4096); j++, t++) {
305 rdev->gart.pages_entry[t] = rdev->dummy_page.entry;
306 if (rdev->gart.ptr) {
307 radeon_gart_set_page(rdev, t,(rdev)->asic->gart.set_page((rdev), (t), (rdev->dummy_page
.entry))
308 rdev->dummy_page.entry)(rdev)->asic->gart.set_page((rdev), (t), (rdev->dummy_page
.entry));
309 }
310 }
311 }
312 }
313 if (rdev->gart.ptr) {
314 mb()do { __asm volatile("mfence" ::: "memory"); } while (0);
315 radeon_gart_tlb_flush(rdev)(rdev)->asic->gart.tlb_flush((rdev));
316 }
317}
318
319/**
320 * radeon_gart_bind - bind pages into the gart page table
321 *
322 * @rdev: radeon_device pointer
323 * @offset: offset into the GPU's gart aperture
324 * @pages: number of pages to bind
325 * @pagelist: pages to bind
326 * @dma_addr: DMA addresses of pages
327 * @flags: RADEON_GART_PAGE_* flags
328 *
329 * Binds the requested pages to the gart page table
330 * (all asics).
331 * Returns 0 for success, -EINVAL for failure.
332 */
333int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
334 int pages, struct vm_page **pagelist, dma_addr_t *dma_addr,
335 uint32_t flags)
336{
337 unsigned t;
338 unsigned p;
339 uint64_t page_base, page_entry;
340 int i, j;
341
342 if (!rdev->gart.ready) {
343 WARN(1, "trying to bind memory to uninitialized GART !\n")({ int __ret = !!(1); if (__ret) printf("trying to bind memory to uninitialized GART !\n"
); __builtin_expect(!!(__ret), 0); });
344 return -EINVAL22;
345 }
346 t = offset / RADEON_GPU_PAGE_SIZE4096;
347 p = t / (PAGE_SIZE(1 << 12) / RADEON_GPU_PAGE_SIZE4096);
348
349 for (i = 0; i < pages; i++, p++) {
350 rdev->gart.pages[p] = pagelist ? pagelist[i] :
351 uvm_atopg(rdev->dummy_page.addr);
352 page_base = dma_addr[i];
353 for (j = 0; j < (PAGE_SIZE(1 << 12) / RADEON_GPU_PAGE_SIZE4096); j++, t++) {
354 page_entry = radeon_gart_get_page_entry(page_base, flags)(rdev)->asic->gart.get_page_entry((page_base), (flags));
355 rdev->gart.pages_entry[t] = page_entry;
356 if (rdev->gart.ptr) {
357 radeon_gart_set_page(rdev, t, page_entry)(rdev)->asic->gart.set_page((rdev), (t), (page_entry));
358 }
359 page_base += RADEON_GPU_PAGE_SIZE4096;
360 }
361 }
362 if (rdev->gart.ptr) {
363 mb()do { __asm volatile("mfence" ::: "memory"); } while (0);
364 radeon_gart_tlb_flush(rdev)(rdev)->asic->gart.tlb_flush((rdev));
365 }
366 return 0;
367}
368
369/**
370 * radeon_gart_init - init the driver info for managing the gart
371 *
372 * @rdev: radeon_device pointer
373 *
374 * Allocate the dummy page and init the gart driver info (all asics).
375 * Returns 0 for success, error for failure.
376 */
377int radeon_gart_init(struct radeon_device *rdev)
378{
379 int r, i;
380
381 if (rdev->gart.pages) {
1
Assuming field 'pages' is null
→
2
←
Taking false branch
→
382 return 0;
383 }
384 /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
385 if (PAGE_SIZE(1 << 12) < RADEON_GPU_PAGE_SIZE4096) {
3
←
Taking false branch
→
386 DRM_ERROR("Page size is smaller than GPU page size!\n")__drm_err("Page size is smaller than GPU page size!\n");
387 return -EINVAL22;
388 }
389 r = radeon_dummy_page_init(rdev);
390 if (r)
4
←
Assuming 'r' is 0
→
5
←
Taking false branch
→
391 return r;
392 /* Compute table size */
393 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE(1 << 12);
394 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE4096;
395 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",printk("\0016" "[" "drm" "] " "GART: num cpu pages %u, num gpu pages %u\n"
, rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages)
396 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages)printk("\0016" "[" "drm" "] " "GART: num cpu pages %u, num gpu pages %u\n"
, rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
397 /* Allocate pages table */
398 rdev->gart.pages = vzalloc(array_size(sizeof(void *),((sizeof(void *)) * (rdev->gart.num_cpu_pages))
6
←
Value assigned to field 'pages'
→
399 rdev->gart.num_cpu_pages)((sizeof(void *)) * (rdev->gart.num_cpu_pages)));
400 if (rdev->gart.pages == NULL((void *)0)) {
7
←
Assuming field 'pages' is equal to NULL
→
8
←
Taking true branch
→
401 radeon_gart_fini(rdev);
9
←
Calling 'radeon_gart_fini'
→
402 return -ENOMEM12;
403 }
404 rdev->gart.pages_entry = vmalloc(array_size(sizeof(uint64_t),((sizeof(uint64_t)) * (rdev->gart.num_gpu_pages))
405 rdev->gart.num_gpu_pages)((sizeof(uint64_t)) * (rdev->gart.num_gpu_pages)));
406 if (rdev->gart.pages_entry == NULL((void *)0)) {
407 radeon_gart_fini(rdev);
408 return -ENOMEM12;
409 }
410 /* set GART entry to point to the dummy page by default */
411 for (i = 0; i < rdev->gart.num_gpu_pages; i++)
412 rdev->gart.pages_entry[i] = rdev->dummy_page.entry;
413 return 0;
414}
415
416/**
417 * radeon_gart_fini - tear down the driver info for managing the gart
418 *
419 * @rdev: radeon_device pointer
420 *
421 * Tear down the gart driver info and free the dummy page (all asics).
422 */
423void radeon_gart_fini(struct radeon_device *rdev)
424{
425 if (rdev->gart.ready) {
10
←
Assuming field 'ready' is true
→
11
←
Taking true branch
→
426 /* unbind pages */
427 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
12
←
Calling 'radeon_gart_unbind'
→
428 }
429 rdev->gart.ready = false0;
430 vfree(rdev->gart.pages);
431 vfree(rdev->gart.pages_entry);
432 rdev->gart.pages = NULL((void *)0);
433 rdev->gart.pages_entry = NULL((void *)0);
434
435 radeon_dummy_page_fini(rdev);
436}