/usr/src/sys/dev/pci/drm/amd/amdgpu/amdgpu

Bug Summary

File:	dev/pci/drm/amd/amdgpu/amdgpu_connectors.c
Warning:	line 1988, column 2 Potential leak of memory pointed to by 'amdgpu_connector'

Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name amdgpu_connectors.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c

/usr/src/sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c

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1/*
* Copyright 2007-8 Advanced Micro Devices, Inc.
* Copyright 2008 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Dave Airlie
*          Alex Deucher
*/

27#include <drm/display/drm_dp_helper.h>
28#include <drm/drm_edid.h>
29#include <drm/drm_fb_helper.h>
30#include <drm/drm_probe_helper.h>
31#include <drm/amdgpu_drm.h>
32#include "amdgpu.h"
33#include "atom.h"
34#include "atombios_encoders.h"
35#include "atombios_dp.h"
36#include "amdgpu_connectors.h"
37#include "amdgpu_i2c.h"
38#include "amdgpu_display.h"

40#include <linux/pm_runtime.h>

42void amdgpu_connector_hotplug(struct drm_connector *connector)
43{
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = drm_to_adev(dev);
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});

/* bail if the connector does not have hpd pin, e.g.,
* VGA, TV, etc.
*/
if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE)
return;

amdgpu_display_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd)(adev)->mode_info.funcs->hpd_set_polarity((adev), (amdgpu_connector
->hpd.hpd));

/* if the connector is already off, don't turn it back on */
if (connector->dpms != DRM_MODE_DPMS_ON0)
return;

/* just deal with DP (not eDP) here. */
if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort10) {
struct amdgpu_connector_atom_dig *dig_connector =
	amdgpu_connector->con_priv;

/* if existing sink type was not DP no need to retrain */
if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT0x13)
	return;

/* first get sink type as it may be reset after (un)plug */
dig_connector->dp_sink_type = amdgpu_atombios_dp_get_sinktype(amdgpu_connector);
/* don't do anything if sink is not display port, i.e.,
 * passive dp->(dvi|hdmi) adaptor
 */
if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13 &&
    amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)(adev)->mode_info.funcs->hpd_sense((adev), (amdgpu_connector
->hpd.hpd)) &&
    amdgpu_atombios_dp_needs_link_train(amdgpu_connector)) {
	/* Don't start link training before we have the DPCD */
	if (amdgpu_atombios_dp_get_dpcd(amdgpu_connector))
		return;

	/* Turn the connector off and back on immediately, which
	 * will trigger link training
	 */
	drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF3);
	drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON0);
}
}
88}

90static void amdgpu_connector_property_change_mode(struct drm_encoder *encoder)
91{
struct drm_crtc *crtc = encoder->crtc;

if (crtc && crtc->enabled) {
drm_crtc_helper_set_mode(crtc, &crtc->mode,
			 crtc->x, crtc->y, crtc->primary->fb);
}
98}

100int amdgpu_connector_get_monitor_bpc(struct drm_connector *connector)
101{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
struct amdgpu_connector_atom_dig *dig_connector;
int bpc = 8;
unsigned mode_clock, max_tmds_clock;

switch (connector->connector_type) {
case DRM_MODE_CONNECTOR_DVII2:
case DRM_MODE_CONNECTOR_HDMIB12:
if (amdgpu_connector->use_digital) {
	if (connector->display_info.is_hdmi) {
		if (connector->display_info.bpc)
			bpc = connector->display_info.bpc;
	}
}
break;
case DRM_MODE_CONNECTOR_DVID3:
case DRM_MODE_CONNECTOR_HDMIA11:
if (connector->display_info.is_hdmi) {
	if (connector->display_info.bpc)
		bpc = connector->display_info.bpc;
}
break;
case DRM_MODE_CONNECTOR_DisplayPort10:
dig_connector = amdgpu_connector->con_priv;
if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13) ||
    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP0x14) ||
    connector->display_info.is_hdmi) {
	if (connector->display_info.bpc)
		bpc = connector->display_info.bpc;
}
break;
case DRM_MODE_CONNECTOR_eDP14:
case DRM_MODE_CONNECTOR_LVDS7:
if (connector->display_info.bpc)
	bpc = connector->display_info.bpc;
else {
	const struct drm_connector_helper_funcs *connector_funcs =
		connector->helper_private;
	struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
	struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;

	if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR0x10)
		bpc = 6;
	else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR0x20)
		bpc = 8;
}
break;
}

if (connector->display_info.is_hdmi) {
/*
 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
 * 12 bpc is always supported on hdmi deep color sinks, as this is
 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
 */
if (bpc > 12) {
	DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",___drm_dbg(((void *)0), DRM_UT_CORE, "%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n"
, connector->name, bpc)
		  connector->name, bpc)___drm_dbg(((void *)0), DRM_UT_CORE, "%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n"
, connector->name, bpc);
	bpc = 12;
}

/* Any defined maximum tmds clock limit we must not exceed? */
if (connector->display_info.max_tmds_clock > 0) {
	/* mode_clock is clock in kHz for mode to be modeset on this connector */
	mode_clock = amdgpu_connector->pixelclock_for_modeset;

	/* Maximum allowable input clock in kHz */
	max_tmds_clock = connector->display_info.max_tmds_clock;

	DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",___drm_dbg(((void *)0), DRM_UT_CORE, "%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n"
, connector->name, mode_clock, max_tmds_clock)
		  connector->name, mode_clock, max_tmds_clock)___drm_dbg(((void *)0), DRM_UT_CORE, "%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n"
, connector->name, mode_clock, max_tmds_clock);

	/* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
	if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
		if ((connector->display_info.edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30(1 << 4)) &&
		    (mode_clock * 5/4 <= max_tmds_clock))
			bpc = 10;
		else
			bpc = 8;

		DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",___drm_dbg(((void *)0), DRM_UT_CORE, "%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n"
, connector->name, bpc)
			  connector->name, bpc)___drm_dbg(((void *)0), DRM_UT_CORE, "%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n"
, connector->name, bpc);
	}

	if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
		bpc = 8;
		DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",___drm_dbg(((void *)0), DRM_UT_CORE, "%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n"
, connector->name, bpc)
			  connector->name, bpc)___drm_dbg(((void *)0), DRM_UT_CORE, "%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n"
, connector->name, bpc);
	}
} else if (bpc > 8) {
	/* max_tmds_clock missing, but hdmi spec mandates it for deep color. */
	DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",___drm_dbg(((void *)0), DRM_UT_CORE, "%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n"
, connector->name)
		  connector->name)___drm_dbg(((void *)0), DRM_UT_CORE, "%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n"
, connector->name);
	bpc = 8;
}
}

if ((amdgpu_deep_color == 0) && (bpc > 8)) {
DRM_DEBUG("%s: Deep color disabled. Set amdgpu module param deep_color=1 to enable.\n",___drm_dbg(((void *)0), DRM_UT_CORE, "%s: Deep color disabled. Set amdgpu module param deep_color=1 to enable.\n"
, connector->name)
	  connector->name)___drm_dbg(((void *)0), DRM_UT_CORE, "%s: Deep color disabled. Set amdgpu module param deep_color=1 to enable.\n"
, connector->name);
bpc = 8;
}

DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",___drm_dbg(((void *)0), DRM_UT_CORE, "%s: Display bpc=%d, returned bpc=%d\n"
, connector->name, connector->display_info.bpc, bpc)
  connector->name, connector->display_info.bpc, bpc)___drm_dbg(((void *)0), DRM_UT_CORE, "%s: Display bpc=%d, returned bpc=%d\n"
, connector->name, connector->display_info.bpc, bpc);

return bpc;
211}

213static void
214amdgpu_connector_update_scratch_regs(struct drm_connector *connector,
		      enum drm_connector_status status)
216{
struct drm_encoder *best_encoder;
struct drm_encoder *encoder;
const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
bool_Bool connected;

best_encoder = connector_funcs->best_encoder(connector);

drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *)
0)->head ) *__mptr = ((&((connector)->dev)->mode_config
.encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr
 - __builtin_offsetof(__typeof(*(encoder)), head) );}); &
(encoder)->head != (&((connector)->dev)->mode_config
.encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder
)) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof
(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof
(*(encoder)), head) );})) if (!(((connector)->possible_encoders
) & drm_encoder_mask(encoder))) {} else {
if ((encoder == best_encoder) && (status == connector_status_connected))
	connected = true1;
else
	connected = false0;

amdgpu_atombios_encoder_set_bios_scratch_regs(connector, encoder, connected);
}
232}

234static struct drm_encoder *
235amdgpu_connector_find_encoder(struct drm_connector *connector,
	       int encoder_type)
237{
struct drm_encoder *encoder;

drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *)
0)->head ) *__mptr = ((&((connector)->dev)->mode_config
.encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr
 - __builtin_offsetof(__typeof(*(encoder)), head) );}); &
(encoder)->head != (&((connector)->dev)->mode_config
.encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder
)) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof
(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof
(*(encoder)), head) );})) if (!(((connector)->possible_encoders
) & drm_encoder_mask(encoder))) {} else {
if (encoder->encoder_type == encoder_type)
	return encoder;
}

return NULL((void *)0);
246}

248struct edid *amdgpu_connector_edid(struct drm_connector *connector)
249{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
struct drm_property_blob *edid_blob = connector->edid_blob_ptr;

if (amdgpu_connector->edid) {
return amdgpu_connector->edid;
} else if (edid_blob) {
struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL(0x0001 | 0x0004));
if (edid)
	amdgpu_connector->edid = edid;
}
return amdgpu_connector->edid;
261}

263static struct edid *
264amdgpu_connector_get_hardcoded_edid(struct amdgpu_device *adev)
265{
struct edid *edid;

if (adev->mode_info.bios_hardcoded_edid) {
edid = kmalloc(adev->mode_info.bios_hardcoded_edid_size, GFP_KERNEL(0x0001 | 0x0004));
if (edid) {
	memcpy((unsigned char *)edid,__builtin_memcpy(((unsigned char *)edid), ((unsigned char *)adev
->mode_info.bios_hardcoded_edid), (adev->mode_info.bios_hardcoded_edid_size
))
	       (unsigned char *)adev->mode_info.bios_hardcoded_edid,__builtin_memcpy(((unsigned char *)edid), ((unsigned char *)adev
->mode_info.bios_hardcoded_edid), (adev->mode_info.bios_hardcoded_edid_size
))
	       adev->mode_info.bios_hardcoded_edid_size)__builtin_memcpy(((unsigned char *)edid), ((unsigned char *)adev
->mode_info.bios_hardcoded_edid), (adev->mode_info.bios_hardcoded_edid_size
));
	return edid;
}
}
return NULL((void *)0);
278}

280static void amdgpu_connector_get_edid(struct drm_connector *connector)
281{
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = drm_to_adev(dev);
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});

if (amdgpu_connector->edid)
return;

/* on hw with routers, select right port */
if (amdgpu_connector->router.ddc_valid)
amdgpu_i2c_router_select_ddc_port(amdgpu_connector);

if ((amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) !=
    ENCODER_OBJECT_ID_NONE0x00) &&
   amdgpu_connector->ddc_bus->has_aux) {
amdgpu_connector->edid = drm_get_edid(connector,
				      &amdgpu_connector->ddc_bus->aux.ddc);
} else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort10) ||
   (connector->connector_type == DRM_MODE_CONNECTOR_eDP14)) {
struct amdgpu_connector_atom_dig *dig = amdgpu_connector->con_priv;

if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13 ||
     dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP0x14) &&
    amdgpu_connector->ddc_bus->has_aux)
	amdgpu_connector->edid = drm_get_edid(connector,
					      &amdgpu_connector->ddc_bus->aux.ddc);
else if (amdgpu_connector->ddc_bus)
	amdgpu_connector->edid = drm_get_edid(connector,
					      &amdgpu_connector->ddc_bus->adapter);
} else if (amdgpu_connector->ddc_bus) {
amdgpu_connector->edid = drm_get_edid(connector,
				      &amdgpu_connector->ddc_bus->adapter);
}

if (!amdgpu_connector->edid) {
/* some laptops provide a hardcoded edid in rom for LCDs */
if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS7) ||
     (connector->connector_type == DRM_MODE_CONNECTOR_eDP14))) {
	amdgpu_connector->edid = amdgpu_connector_get_hardcoded_edid(adev);
	drm_connector_update_edid_property(connector, amdgpu_connector->edid);
}
}
323}

325static void amdgpu_connector_free_edid(struct drm_connector *connector)
326{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});

kfree(amdgpu_connector->edid);
amdgpu_connector->edid = NULL((void *)0);
331}

333static int amdgpu_connector_ddc_get_modes(struct drm_connector *connector)
334{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
int ret;

if (amdgpu_connector->edid) {
drm_connector_update_edid_property(connector, amdgpu_connector->edid);
ret = drm_add_edid_modes(connector, amdgpu_connector->edid);
return ret;
}
drm_connector_update_edid_property(connector, NULL((void *)0));
return 0;
345}

347static struct drm_encoder *
348amdgpu_connector_best_single_encoder(struct drm_connector *connector)
349{
struct drm_encoder *encoder;

/* pick the first one */
drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *)
0)->head ) *__mptr = ((&((connector)->dev)->mode_config
.encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr
 - __builtin_offsetof(__typeof(*(encoder)), head) );}); &
(encoder)->head != (&((connector)->dev)->mode_config
.encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder
)) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof
(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof
(*(encoder)), head) );})) if (!(((connector)->possible_encoders
) & drm_encoder_mask(encoder))) {} else
return encoder;

return NULL((void *)0);
357}

359static void amdgpu_get_native_mode(struct drm_connector *connector)
360{
struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
struct amdgpu_encoder *amdgpu_encoder;

if (encoder == NULL((void *)0))
return;

amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});

if (!list_empty(&connector->probed_modes)) {
struct drm_display_mode *preferred_mode =
	list_first_entry(&connector->probed_modes,({ const __typeof( ((struct drm_display_mode *)0)->head ) *
__mptr = ((&connector->probed_modes)->next); (struct
 drm_display_mode *)( (char *)__mptr - __builtin_offsetof(struct
 drm_display_mode, head) );})
			 struct drm_display_mode, head)({ const __typeof( ((struct drm_display_mode *)0)->head ) *
__mptr = ((&connector->probed_modes)->next); (struct
 drm_display_mode *)( (char *)__mptr - __builtin_offsetof(struct
 drm_display_mode, head) );});

amdgpu_encoder->native_mode = *preferred_mode;
} else {
amdgpu_encoder->native_mode.clock = 0;
}
378}

380static struct drm_display_mode *
381amdgpu_connector_lcd_native_mode(struct drm_encoder *encoder)
382{
struct drm_device *dev = encoder->dev;
struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
struct drm_display_mode *mode = NULL((void *)0);
struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;

if (native_mode->hdisplay != 0 &&
   native_mode->vdisplay != 0 &&
   native_mode->clock != 0) {
mode = drm_mode_duplicate(dev, native_mode);
if (!mode)
	return NULL((void *)0);

mode->type = DRM_MODE_TYPE_PREFERRED(1<<3) | DRM_MODE_TYPE_DRIVER(1<<6);
drm_mode_set_name(mode);

DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name)___drm_dbg(((void *)0), DRM_UT_KMS, "Adding native panel mode %s\n"
, mode->name);
} else if (native_mode->hdisplay != 0 &&
   native_mode->vdisplay != 0) {
/* mac laptops without an edid */
/* Note that this is not necessarily the exact panel mode,
 * but an approximation based on the cvt formula.  For these
 * systems we should ideally read the mode info out of the
 * registers or add a mode table, but this works and is much
 * simpler.
 */
mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true1, false0, false0);
if (!mode)
	return NULL((void *)0);

mode->type = DRM_MODE_TYPE_PREFERRED(1<<3) | DRM_MODE_TYPE_DRIVER(1<<6);
DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name)___drm_dbg(((void *)0), DRM_UT_KMS, "Adding cvt approximation of native panel mode %s\n"
, mode->name);
}
return mode;
416}

418static void amdgpu_connector_add_common_modes(struct drm_encoder *encoder,
			       struct drm_connector *connector)
420{
struct drm_device *dev = encoder->dev;
struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
struct drm_display_mode *mode = NULL((void *)0);
struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
int i;
static const struct mode_size {
int w;
int h;
} common_modes[17] = {
{ 640,  480},
{ 720,  480},
{ 800,  600},
{ 848,  480},
{1024,  768},
{1152,  768},
{1280,  720},
{1280,  800},
{1280,  854},
{1280,  960},
{1280, 1024},
{1440,  900},
{1400, 1050},
{1680, 1050},
{1600, 1200},
{1920, 1080},
{1920, 1200}
};

for (i = 0; i < 17; i++) {
if (amdgpu_encoder->devices & (ATOM_DEVICE_TV_SUPPORT(0x1L << 0x00000002 ))) {
	if (common_modes[i].w > 1024 ||
	    common_modes[i].h > 768)
		continue;
}
if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT((0x1L << 0x00000001 ) | (0x1L << 0x00000005 )))) {
	if (common_modes[i].w > native_mode->hdisplay ||
	    common_modes[i].h > native_mode->vdisplay ||
	    (common_modes[i].w == native_mode->hdisplay &&
	     common_modes[i].h == native_mode->vdisplay))
		continue;
}
if (common_modes[i].w < 320 || common_modes[i].h < 200)
	continue;

mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false0, false0, false0);
drm_mode_probed_add(connector, mode);
}
468}

470static int amdgpu_connector_set_property(struct drm_connector *connector,
			  struct drm_property *property,
			  uint64_t val)
473{
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = drm_to_adev(dev);
struct drm_encoder *encoder;
struct amdgpu_encoder *amdgpu_encoder;

if (property == adev->mode_info.coherent_mode_property) {
struct amdgpu_encoder_atom_dig *dig;
bool_Bool new_coherent_mode;

/* need to find digital encoder on connector */
encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS2);
if (!encoder)
	return 0;

amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});

if (!amdgpu_encoder->enc_priv)
	return 0;

dig = amdgpu_encoder->enc_priv;
new_coherent_mode = val ? true1 : false0;
if (dig->coherent_mode != new_coherent_mode) {
	dig->coherent_mode = new_coherent_mode;
	amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
}
}

if (property == adev->mode_info.audio_property) {
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
/* need to find digital encoder on connector */
encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS2);
if (!encoder)
	return 0;

amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});

if (amdgpu_connector->audio != val) {
	amdgpu_connector->audio = val;
	amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
}
}

if (property == adev->mode_info.dither_property) {
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
/* need to find digital encoder on connector */
encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS2);
if (!encoder)
	return 0;

amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});

if (amdgpu_connector->dither != val) {
	amdgpu_connector->dither = val;
	amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
}
}

if (property == adev->mode_info.underscan_property) {
/* need to find digital encoder on connector */
encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS2);
if (!encoder)
	return 0;

amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});

if (amdgpu_encoder->underscan_type != val) {
	amdgpu_encoder->underscan_type = val;
	amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
}
}

if (property == adev->mode_info.underscan_hborder_property) {
/* need to find digital encoder on connector */
encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS2);
if (!encoder)
	return 0;

amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});

if (amdgpu_encoder->underscan_hborder != val) {
	amdgpu_encoder->underscan_hborder = val;
	amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
}
}

if (property == adev->mode_info.underscan_vborder_property) {
/* need to find digital encoder on connector */
encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS2);
if (!encoder)
	return 0;

amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});

if (amdgpu_encoder->underscan_vborder != val) {
	amdgpu_encoder->underscan_vborder = val;
	amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
}
}

if (property == adev->mode_info.load_detect_property) {
struct amdgpu_connector *amdgpu_connector =
	to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});

if (val == 0)
	amdgpu_connector->dac_load_detect = false0;
else
	amdgpu_connector->dac_load_detect = true1;
}

if (property == dev->mode_config.scaling_mode_property) {
enum amdgpu_rmx_type rmx_type;

if (connector->encoder) {
	amdgpu_encoder = to_amdgpu_encoder(connector->encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (connector->encoder); (struct amdgpu_encoder *)( (char *
)__mptr - __builtin_offsetof(struct amdgpu_encoder, base) );}
);
} else {
	const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
	amdgpu_encoder = to_amdgpu_encoder(connector_funcs->best_encoder(connector))({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (connector_funcs->best_encoder(connector)); (struct amdgpu_encoder
 *)( (char *)__mptr - __builtin_offsetof(struct amdgpu_encoder
, base) );});
}

switch (val) {
default:
case DRM_MODE_SCALE_NONE0: rmx_type = RMX_OFF; break;
case DRM_MODE_SCALE_CENTER2: rmx_type = RMX_CENTER; break;
case DRM_MODE_SCALE_ASPECT3: rmx_type = RMX_ASPECT; break;
case DRM_MODE_SCALE_FULLSCREEN1: rmx_type = RMX_FULL; break;
}
if (amdgpu_encoder->rmx_type == rmx_type)
	return 0;

if ((rmx_type != DRM_MODE_SCALE_NONE0) &&
    (amdgpu_encoder->native_mode.clock == 0))
	return 0;

amdgpu_encoder->rmx_type = rmx_type;

amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
}

return 0;
613}

615static void
616amdgpu_connector_fixup_lcd_native_mode(struct drm_encoder *encoder,
			struct drm_connector *connector)
618{
struct amdgpu_encoder *amdgpu_encoder =	to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
struct drm_display_mode *t, *mode;

/* If the EDID preferred mode doesn't match the native mode, use it */
list_for_each_entry_safe(mode, t, &connector->probed_modes, head)for (mode = ({ const __typeof( ((__typeof(*mode) *)0)->head
 ) *__mptr = ((&connector->probed_modes)->next); (__typeof
(*mode) *)( (char *)__mptr - __builtin_offsetof(__typeof(*mode
), head) );}), t = ({ const __typeof( ((__typeof(*mode) *)0)->
head ) *__mptr = (mode->head.next); (__typeof(*mode) *)( (
char *)__mptr - __builtin_offsetof(__typeof(*mode), head) );}
); &mode->head != (&connector->probed_modes); mode
 = t, t = ({ const __typeof( ((__typeof(*t) *)0)->head ) *
__mptr = (t->head.next); (__typeof(*t) *)( (char *)__mptr -
 __builtin_offsetof(__typeof(*t), head) );})) {
if (mode->type & DRM_MODE_TYPE_PREFERRED(1<<3)) {
	if (mode->hdisplay != native_mode->hdisplay ||
	    mode->vdisplay != native_mode->vdisplay)
		drm_mode_copy(native_mode, mode);
}
}

/* Try to get native mode details from EDID if necessary */
if (!native_mode->clock) {
list_for_each_entry_safe(mode, t, &connector->probed_modes, head)for (mode = ({ const __typeof( ((__typeof(*mode) *)0)->head
 ) *__mptr = ((&connector->probed_modes)->next); (__typeof
(*mode) *)( (char *)__mptr - __builtin_offsetof(__typeof(*mode
), head) );}), t = ({ const __typeof( ((__typeof(*mode) *)0)->
head ) *__mptr = (mode->head.next); (__typeof(*mode) *)( (
char *)__mptr - __builtin_offsetof(__typeof(*mode), head) );}
); &mode->head != (&connector->probed_modes); mode
 = t, t = ({ const __typeof( ((__typeof(*t) *)0)->head ) *
__mptr = (t->head.next); (__typeof(*t) *)( (char *)__mptr -
 __builtin_offsetof(__typeof(*t), head) );})) {
	if (mode->hdisplay == native_mode->hdisplay &&
	    mode->vdisplay == native_mode->vdisplay) {
		drm_mode_copy(native_mode, mode);
		drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V(1 << 0));
		DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n")___drm_dbg(((void *)0), DRM_UT_KMS, "Determined LVDS native mode details from EDID\n"
);
		break;
	}
}
}

if (!native_mode->clock) {
DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n")___drm_dbg(((void *)0), DRM_UT_KMS, "No LVDS native mode details, disabling RMX\n"
);
amdgpu_encoder->rmx_type = RMX_OFF;
}
649}

651static int amdgpu_connector_lvds_get_modes(struct drm_connector *connector)
652{
struct drm_encoder *encoder;
int ret = 0;
struct drm_display_mode *mode;

amdgpu_connector_get_edid(connector);
ret = amdgpu_connector_ddc_get_modes(connector);
if (ret > 0) {
encoder = amdgpu_connector_best_single_encoder(connector);
if (encoder) {
	amdgpu_connector_fixup_lcd_native_mode(encoder, connector);
	/* add scaled modes */
	amdgpu_connector_add_common_modes(encoder, connector);
}
return ret;
}

encoder = amdgpu_connector_best_single_encoder(connector);
if (!encoder)
return 0;

/* we have no EDID modes */
mode = amdgpu_connector_lcd_native_mode(encoder);
if (mode) {
ret = 1;
drm_mode_probed_add(connector, mode);
/* add the width/height from vbios tables if available */
connector->display_info.width_mm = mode->width_mm;
connector->display_info.height_mm = mode->height_mm;
/* add scaled modes */
amdgpu_connector_add_common_modes(encoder, connector);
}

return ret;
686}

688static enum drm_mode_status amdgpu_connector_lvds_mode_valid(struct drm_connector *connector,
			     struct drm_display_mode *mode)
690{
struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);

if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
return MODE_PANEL;

if (encoder) {
struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;

/* AVIVO hardware supports downscaling modes larger than the panel
 * to the panel size, but I'm not sure this is desirable.
 */
if ((mode->hdisplay > native_mode->hdisplay) ||
    (mode->vdisplay > native_mode->vdisplay))
	return MODE_PANEL;

/* if scaling is disabled, block non-native modes */
if (amdgpu_encoder->rmx_type == RMX_OFF) {
	if ((mode->hdisplay != native_mode->hdisplay) ||
	    (mode->vdisplay != native_mode->vdisplay))
		return MODE_PANEL;
}
}

return MODE_OK;
716}

718static enum drm_connector_status
719amdgpu_connector_lvds_detect(struct drm_connector *connector, bool_Bool force)
720{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
enum drm_connector_status ret = connector_status_disconnected;
int r;

if (!drm_kms_helper_is_poll_worker()) {
r = pm_runtime_get_sync(connector->dev->dev);
if (r < 0) {
	pm_runtime_put_autosuspend(connector->dev->dev);
	return connector_status_disconnected;
}
}

if (encoder) {
struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;

/* check if panel is valid */
if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
	ret = connector_status_connected;

}

/* check for edid as well */
amdgpu_connector_get_edid(connector);
if (amdgpu_connector->edid)
ret = connector_status_connected;
/* check acpi lid status ??? */

amdgpu_connector_update_scratch_regs(connector, ret);

if (!drm_kms_helper_is_poll_worker()) {
pm_runtime_mark_last_busy(connector->dev->dev);
pm_runtime_put_autosuspend(connector->dev->dev);
}

return ret;
758}

760static void amdgpu_connector_unregister(struct drm_connector *connector)
761{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});

if (amdgpu_connector->ddc_bus && amdgpu_connector->ddc_bus->has_aux) {
drm_dp_aux_unregister(&amdgpu_connector->ddc_bus->aux);
amdgpu_connector->ddc_bus->has_aux = false0;
}
768}

770static void amdgpu_connector_destroy(struct drm_connector *connector)
771{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});

amdgpu_connector_free_edid(connector);
kfree(amdgpu_connector->con_priv);
drm_connector_unregister(connector);
drm_connector_cleanup(connector);
kfree(connector);
779}

781static int amdgpu_connector_set_lcd_property(struct drm_connector *connector,
			      struct drm_property *property,
			      uint64_t value)
784{
struct drm_device *dev = connector->dev;
struct amdgpu_encoder *amdgpu_encoder;
enum amdgpu_rmx_type rmx_type;

DRM_DEBUG_KMS("\n")___drm_dbg(((void *)0), DRM_UT_KMS, "\n");
if (property != dev->mode_config.scaling_mode_property)
return 0;

if (connector->encoder)
amdgpu_encoder = to_amdgpu_encoder(connector->encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (connector->encoder); (struct amdgpu_encoder *)( (char *
)__mptr - __builtin_offsetof(struct amdgpu_encoder, base) );}
);
else {
const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
amdgpu_encoder = to_amdgpu_encoder(connector_funcs->best_encoder(connector))({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (connector_funcs->best_encoder(connector)); (struct amdgpu_encoder
 *)( (char *)__mptr - __builtin_offsetof(struct amdgpu_encoder
, base) );});
}

switch (value) {
case DRM_MODE_SCALE_NONE0: rmx_type = RMX_OFF; break;
case DRM_MODE_SCALE_CENTER2: rmx_type = RMX_CENTER; break;
case DRM_MODE_SCALE_ASPECT3: rmx_type = RMX_ASPECT; break;
default:
case DRM_MODE_SCALE_FULLSCREEN1: rmx_type = RMX_FULL; break;
}
if (amdgpu_encoder->rmx_type == rmx_type)
return 0;

amdgpu_encoder->rmx_type = rmx_type;

amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
return 0;
814}


817static const struct drm_connector_helper_funcs amdgpu_connector_lvds_helper_funcs = {
.get_modes = amdgpu_connector_lvds_get_modes,
.mode_valid = amdgpu_connector_lvds_mode_valid,
.best_encoder = amdgpu_connector_best_single_encoder,
821};

823static const struct drm_connector_funcs amdgpu_connector_lvds_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = amdgpu_connector_lvds_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
.early_unregister = amdgpu_connector_unregister,
.destroy = amdgpu_connector_destroy,
.set_property = amdgpu_connector_set_lcd_property,
830};

832static int amdgpu_connector_vga_get_modes(struct drm_connector *connector)
833{
int ret;

amdgpu_connector_get_edid(connector);
ret = amdgpu_connector_ddc_get_modes(connector);
amdgpu_get_native_mode(connector);

return ret;
841}

843static enum drm_mode_status amdgpu_connector_vga_mode_valid(struct drm_connector *connector,
			    struct drm_display_mode *mode)
845{
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = drm_to_adev(dev);

/* XXX check mode bandwidth */

if ((mode->clock / 10) > adev->clock.max_pixel_clock)
return MODE_CLOCK_HIGH;

return MODE_OK;
855}

857static enum drm_connector_status
858amdgpu_connector_vga_detect(struct drm_connector *connector, bool_Bool force)
859{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
struct drm_encoder *encoder;
const struct drm_encoder_helper_funcs *encoder_funcs;
bool_Bool dret = false0;
enum drm_connector_status ret = connector_status_disconnected;
int r;

if (!drm_kms_helper_is_poll_worker()) {
r = pm_runtime_get_sync(connector->dev->dev);
if (r < 0) {
	pm_runtime_put_autosuspend(connector->dev->dev);
	return connector_status_disconnected;
}
}

encoder = amdgpu_connector_best_single_encoder(connector);
if (!encoder)
ret = connector_status_disconnected;

if (amdgpu_connector->ddc_bus)
dret = amdgpu_display_ddc_probe(amdgpu_connector, false0);
if (dret) {
amdgpu_connector->detected_by_load = false0;
amdgpu_connector_free_edid(connector);
amdgpu_connector_get_edid(connector);

if (!amdgpu_connector->edid) {
	DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",__drm_err("%s: probed a monitor but no|invalid EDID\n", connector
->name)
			connector->name)__drm_err("%s: probed a monitor but no|invalid EDID\n", connector
->name);
	ret = connector_status_connected;
} else {
	amdgpu_connector->use_digital =
		!!(amdgpu_connector->edid->input & DRM_EDID_INPUT_DIGITAL(1 << 7));

	/* some oems have boards with separate digital and analog connectors
	 * with a shared ddc line (often vga + hdmi)
	 */
	if (amdgpu_connector->use_digital && amdgpu_connector->shared_ddc) {
		amdgpu_connector_free_edid(connector);
		ret = connector_status_disconnected;
	} else {
		ret = connector_status_connected;
	}
}
} else {

/* if we aren't forcing don't do destructive polling */
if (!force) {
	/* only return the previous status if we last
	 * detected a monitor via load.
	 */
	if (amdgpu_connector->detected_by_load)
		ret = connector->status;
	goto out;
}

if (amdgpu_connector->dac_load_detect && encoder) {
	encoder_funcs = encoder->helper_private;
	ret = encoder_funcs->detect(encoder, connector);
	if (ret != connector_status_disconnected)
		amdgpu_connector->detected_by_load = true1;
}
}

amdgpu_connector_update_scratch_regs(connector, ret);

926out:
if (!drm_kms_helper_is_poll_worker()) {
pm_runtime_mark_last_busy(connector->dev->dev);
pm_runtime_put_autosuspend(connector->dev->dev);
}

return ret;
933}

935static const struct drm_connector_helper_funcs amdgpu_connector_vga_helper_funcs = {
.get_modes = amdgpu_connector_vga_get_modes,
.mode_valid = amdgpu_connector_vga_mode_valid,
.best_encoder = amdgpu_connector_best_single_encoder,
939};

941static const struct drm_connector_funcs amdgpu_connector_vga_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = amdgpu_connector_vga_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
.early_unregister = amdgpu_connector_unregister,
.destroy = amdgpu_connector_destroy,
.set_property = amdgpu_connector_set_property,
948};

950static bool_Bool
951amdgpu_connector_check_hpd_status_unchanged(struct drm_connector *connector)
952{
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = drm_to_adev(dev);
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
enum drm_connector_status status;

if (amdgpu_connector->hpd.hpd != AMDGPU_HPD_NONE) {
if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)(adev)->mode_info.funcs->hpd_sense((adev), (amdgpu_connector
->hpd.hpd)))
	status = connector_status_connected;
else
	status = connector_status_disconnected;
if (connector->status == status)
	return true1;
}

return false0;
968}

970/*
* DVI is complicated
* Do a DDC probe, if DDC probe passes, get the full EDID so
* we can do analog/digital monitor detection at this point.
* If the monitor is an analog monitor or we got no DDC,
* we need to find the DAC encoder object for this connector.
* If we got no DDC, we do load detection on the DAC encoder object.
* If we got analog DDC or load detection passes on the DAC encoder
* we have to check if this analog encoder is shared with anyone else (TV)
* if its shared we have to set the other connector to disconnected.
*/
981static enum drm_connector_status
982amdgpu_connector_dvi_detect(struct drm_connector *connector, bool_Bool force)
983{
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = drm_to_adev(dev);
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
const struct drm_encoder_helper_funcs *encoder_funcs;
int r;
enum drm_connector_status ret = connector_status_disconnected;
bool_Bool dret = false0, broken_edid = false0;

if (!drm_kms_helper_is_poll_worker()) {
r = pm_runtime_get_sync(connector->dev->dev);
if (r < 0) {
	pm_runtime_put_autosuspend(connector->dev->dev);
	return connector_status_disconnected;
}
}

if (!force && amdgpu_connector_check_hpd_status_unchanged(connector)) {
ret = connector->status;
goto exit;
}

if (amdgpu_connector->ddc_bus)
dret = amdgpu_display_ddc_probe(amdgpu_connector, false0);
if (dret) {
amdgpu_connector->detected_by_load = false0;
amdgpu_connector_free_edid(connector);
amdgpu_connector_get_edid(connector);

if (!amdgpu_connector->edid) {
	DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",__drm_err("%s: probed a monitor but no|invalid EDID\n", connector
->name)
			connector->name)__drm_err("%s: probed a monitor but no|invalid EDID\n", connector
->name);
	ret = connector_status_connected;
	broken_edid = true1; /* defer use_digital to later */
} else {
	amdgpu_connector->use_digital =
		!!(amdgpu_connector->edid->input & DRM_EDID_INPUT_DIGITAL(1 << 7));

	/* some oems have boards with separate digital and analog connectors
	 * with a shared ddc line (often vga + hdmi)
	 */
	if ((!amdgpu_connector->use_digital) && amdgpu_connector->shared_ddc) {
		amdgpu_connector_free_edid(connector);
		ret = connector_status_disconnected;
	} else {
		ret = connector_status_connected;
	}

	/* This gets complicated.  We have boards with VGA + HDMI with a
	 * shared DDC line and we have boards with DVI-D + HDMI with a shared
	 * DDC line.  The latter is more complex because with DVI<->HDMI adapters
	 * you don't really know what's connected to which port as both are digital.
	 */
	if (amdgpu_connector->shared_ddc && (ret == connector_status_connected)) {
		struct drm_connector *list_connector;
		struct drm_connector_list_iter iter;
		struct amdgpu_connector *list_amdgpu_connector;

		drm_connector_list_iter_begin(dev, &iter);
		drm_for_each_connector_iter(list_connector,while ((list_connector = drm_connector_list_iter_next(&iter
)))
					    &iter)while ((list_connector = drm_connector_list_iter_next(&iter
))) {
			if (connector == list_connector)
				continue;
			list_amdgpu_connector = to_amdgpu_connector(list_connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (list_connector); (struct amdgpu_connector *)( (char
 *)__mptr - __builtin_offsetof(struct amdgpu_connector, base)
 );});
			if (list_amdgpu_connector->shared_ddc &&
			    (list_amdgpu_connector->ddc_bus->rec.i2c_id ==
			     amdgpu_connector->ddc_bus->rec.i2c_id)) {
				/* cases where both connectors are digital */
				if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA1) {
					/* hpd is our only option in this case */
					if (!amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)(adev)->mode_info.funcs->hpd_sense((adev), (amdgpu_connector
->hpd.hpd))) {
						amdgpu_connector_free_edid(connector);
						ret = connector_status_disconnected;
					}
				}
			}
		}
		drm_connector_list_iter_end(&iter);
	}
}
}

if ((ret == connector_status_connected) && (amdgpu_connector->use_digital == true1))
goto out;

/* DVI-D and HDMI-A are digital only */
if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID3) ||
   (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA11))
goto out;

/* if we aren't forcing don't do destructive polling */
if (!force) {
/* only return the previous status if we last
 * detected a monitor via load.
 */
if (amdgpu_connector->detected_by_load)
	ret = connector->status;
goto out;
}

/* find analog encoder */
if (amdgpu_connector->dac_load_detect) {
struct drm_encoder *encoder;

drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *)
0)->head ) *__mptr = ((&((connector)->dev)->mode_config
.encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr
 - __builtin_offsetof(__typeof(*(encoder)), head) );}); &
(encoder)->head != (&((connector)->dev)->mode_config
.encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder
)) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof
(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof
(*(encoder)), head) );})) if (!(((connector)->possible_encoders
) & drm_encoder_mask(encoder))) {} else {
	if (encoder->encoder_type != DRM_MODE_ENCODER_DAC1 &&
	    encoder->encoder_type != DRM_MODE_ENCODER_TVDAC4)
		continue;

	encoder_funcs = encoder->helper_private;
	if (encoder_funcs->detect) {
		if (!broken_edid) {
			if (ret != connector_status_connected) {
				/* deal with analog monitors without DDC */
				ret = encoder_funcs->detect(encoder, connector);
				if (ret == connector_status_connected) {
					amdgpu_connector->use_digital = false0;
				}
				if (ret != connector_status_disconnected)
					amdgpu_connector->detected_by_load = true1;
			}
		} else {
			enum drm_connector_status lret;
			/* assume digital unless load detected otherwise */
			amdgpu_connector->use_digital = true1;
			lret = encoder_funcs->detect(encoder, connector);
			DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret)___drm_dbg(((void *)0), DRM_UT_KMS, "load_detect %x returned: %x\n"
,encoder->encoder_type,lret);
			if (lret == connector_status_connected)
				amdgpu_connector->use_digital = false0;
		}
		break;
	}
}
}

1118out:
/* updated in get modes as well since we need to know if it's analog or digital */
amdgpu_connector_update_scratch_regs(connector, ret);

1122exit:
if (!drm_kms_helper_is_poll_worker()) {
pm_runtime_mark_last_busy(connector->dev->dev);
pm_runtime_put_autosuspend(connector->dev->dev);
}

return ret;
1129}

1131/* okay need to be smart in here about which encoder to pick */
1132static struct drm_encoder *
1133amdgpu_connector_dvi_encoder(struct drm_connector *connector)
1134{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
struct drm_encoder *encoder;

drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *)
0)->head ) *__mptr = ((&((connector)->dev)->mode_config
.encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr
 - __builtin_offsetof(__typeof(*(encoder)), head) );}); &
(encoder)->head != (&((connector)->dev)->mode_config
.encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder
)) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof
(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof
(*(encoder)), head) );})) if (!(((connector)->possible_encoders
) & drm_encoder_mask(encoder))) {} else {
if (amdgpu_connector->use_digital == true1) {
	if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS2)
		return encoder;
} else {
	if (encoder->encoder_type == DRM_MODE_ENCODER_DAC1 ||
	    encoder->encoder_type == DRM_MODE_ENCODER_TVDAC4)
		return encoder;
}
}

/* see if we have a default encoder  TODO */

/* then check use digitial */
/* pick the first one */
drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *)
0)->head ) *__mptr = ((&((connector)->dev)->mode_config
.encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr
 - __builtin_offsetof(__typeof(*(encoder)), head) );}); &
(encoder)->head != (&((connector)->dev)->mode_config
.encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder
)) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof
(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof
(*(encoder)), head) );})) if (!(((connector)->possible_encoders
) & drm_encoder_mask(encoder))) {} else
return encoder;

return NULL((void *)0);
1157}

1159static void amdgpu_connector_dvi_force(struct drm_connector *connector)
1160{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
if (connector->force == DRM_FORCE_ON)
amdgpu_connector->use_digital = false0;
if (connector->force == DRM_FORCE_ON_DIGITAL)
amdgpu_connector->use_digital = true1;
1166}

1168static enum drm_mode_status amdgpu_connector_dvi_mode_valid(struct drm_connector *connector,
			    struct drm_display_mode *mode)
1170{
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = drm_to_adev(dev);
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});

/* XXX check mode bandwidth */

if (amdgpu_connector->use_digital && (mode->clock > 165000)) {
if ((amdgpu_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I0x02) ||
    (amdgpu_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D0x04) ||
    (amdgpu_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B0x0D)) {
	return MODE_OK;
} else if (connector->display_info.is_hdmi) {
	/* HDMI 1.3+ supports max clock of 340 Mhz */
	if (mode->clock > 340000)
		return MODE_CLOCK_HIGH;
	else
		return MODE_OK;
} else {
	return MODE_CLOCK_HIGH;
}
}

/* check against the max pixel clock */
if ((mode->clock / 10) > adev->clock.max_pixel_clock)
return MODE_CLOCK_HIGH;

return MODE_OK;
1198}

1200static const struct drm_connector_helper_funcs amdgpu_connector_dvi_helper_funcs = {
.get_modes = amdgpu_connector_vga_get_modes,
.mode_valid = amdgpu_connector_dvi_mode_valid,
.best_encoder = amdgpu_connector_dvi_encoder,
1204};

1206static const struct drm_connector_funcs amdgpu_connector_dvi_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = amdgpu_connector_dvi_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
.set_property = amdgpu_connector_set_property,
.early_unregister = amdgpu_connector_unregister,
.destroy = amdgpu_connector_destroy,
.force = amdgpu_connector_dvi_force,
1214};

1216static int amdgpu_connector_dp_get_modes(struct drm_connector *connector)
1217{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
struct amdgpu_connector_atom_dig *amdgpu_dig_connector = amdgpu_connector->con_priv;
struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
int ret;

if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP14) ||
   (connector->connector_type == DRM_MODE_CONNECTOR_LVDS7)) {
struct drm_display_mode *mode;

if (connector->connector_type == DRM_MODE_CONNECTOR_eDP14) {
	if (!amdgpu_dig_connector->edp_on)
		amdgpu_atombios_encoder_set_edp_panel_power(connector,
						     ATOM_TRANSMITTER_ACTION_POWER_ON12);
	amdgpu_connector_get_edid(connector);
	ret = amdgpu_connector_ddc_get_modes(connector);
	if (!amdgpu_dig_connector->edp_on)
		amdgpu_atombios_encoder_set_edp_panel_power(connector,
						     ATOM_TRANSMITTER_ACTION_POWER_OFF13);
} else {
	/* need to setup ddc on the bridge */
	if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) !=
	    ENCODER_OBJECT_ID_NONE0x00) {
		if (encoder)
			amdgpu_atombios_encoder_setup_ext_encoder_ddc(encoder);
	}
	amdgpu_connector_get_edid(connector);
	ret = amdgpu_connector_ddc_get_modes(connector);
}

if (ret > 0) {
	if (encoder) {
		amdgpu_connector_fixup_lcd_native_mode(encoder, connector);
		/* add scaled modes */
		amdgpu_connector_add_common_modes(encoder, connector);
	}
	return ret;
}

if (!encoder)
	return 0;

/* we have no EDID modes */
mode = amdgpu_connector_lcd_native_mode(encoder);
if (mode) {
	ret = 1;
	drm_mode_probed_add(connector, mode);
	/* add the width/height from vbios tables if available */
	connector->display_info.width_mm = mode->width_mm;
	connector->display_info.height_mm = mode->height_mm;
	/* add scaled modes */
	amdgpu_connector_add_common_modes(encoder, connector);
}
} else {
/* need to setup ddc on the bridge */
if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) !=
	ENCODER_OBJECT_ID_NONE0x00) {
	if (encoder)
		amdgpu_atombios_encoder_setup_ext_encoder_ddc(encoder);
}
amdgpu_connector_get_edid(connector);
ret = amdgpu_connector_ddc_get_modes(connector);

amdgpu_get_native_mode(connector);
}

return ret;
1284}

1286u16 amdgpu_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
1287{
struct drm_encoder *encoder;
struct amdgpu_encoder *amdgpu_encoder;

drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *)
0)->head ) *__mptr = ((&((connector)->dev)->mode_config
.encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr
 - __builtin_offsetof(__typeof(*(encoder)), head) );}); &
(encoder)->head != (&((connector)->dev)->mode_config
.encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder
)) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof
(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof
(*(encoder)), head) );})) if (!(((connector)->possible_encoders
) & drm_encoder_mask(encoder))) {} else {
amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});

switch (amdgpu_encoder->encoder_id) {
case ENCODER_OBJECT_ID_TRAVIS0x23:
case ENCODER_OBJECT_ID_NUTMEG0x22:
	return amdgpu_encoder->encoder_id;
default:
	break;
}
}

return ENCODER_OBJECT_ID_NONE0x00;
1304}

1306static bool_Bool amdgpu_connector_encoder_is_hbr2(struct drm_connector *connector)
1307{
struct drm_encoder *encoder;
struct amdgpu_encoder *amdgpu_encoder;
bool_Bool found = false0;

drm_connector_for_each_possible_encoder(connector, encoder)for ((encoder) = ({ const __typeof( ((__typeof(*(encoder)) *)
0)->head ) *__mptr = ((&((connector)->dev)->mode_config
.encoder_list)->next); (__typeof(*(encoder)) *)( (char *)__mptr
 - __builtin_offsetof(__typeof(*(encoder)), head) );}); &
(encoder)->head != (&((connector)->dev)->mode_config
.encoder_list); (encoder) = ({ const __typeof( ((__typeof(*(encoder
)) *)0)->head ) *__mptr = ((encoder)->head.next); (__typeof
(*(encoder)) *)( (char *)__mptr - __builtin_offsetof(__typeof
(*(encoder)), head) );})) if (!(((connector)->possible_encoders
) & drm_encoder_mask(encoder))) {} else {
amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
if (amdgpu_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR20x01)
	found = true1;
}

return found;
1319}

1321bool_Bool amdgpu_connector_is_dp12_capable(struct drm_connector *connector)
1322{
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = drm_to_adev(dev);

if ((adev->clock.default_dispclk >= 53900) &&
   amdgpu_connector_encoder_is_hbr2(connector)) {
return true1;
}

return false0;
1332}

1334static enum drm_connector_status
1335amdgpu_connector_dp_detect(struct drm_connector *connector, bool_Bool force)
1336{
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = drm_to_adev(dev);
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
enum drm_connector_status ret = connector_status_disconnected;
struct amdgpu_connector_atom_dig *amdgpu_dig_connector = amdgpu_connector->con_priv;
struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
int r;

if (!drm_kms_helper_is_poll_worker()) {
r = pm_runtime_get_sync(connector->dev->dev);
if (r < 0) {
	pm_runtime_put_autosuspend(connector->dev->dev);
	return connector_status_disconnected;
}
}

if (!force && amdgpu_connector_check_hpd_status_unchanged(connector)) {
ret = connector->status;
goto out;
}

amdgpu_connector_free_edid(connector);

if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP14) ||
   (connector->connector_type == DRM_MODE_CONNECTOR_LVDS7)) {
if (encoder) {
	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
	struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;

	/* check if panel is valid */
	if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
		ret = connector_status_connected;
}
/* eDP is always DP */
amdgpu_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT0x13;
if (!amdgpu_dig_connector->edp_on)
	amdgpu_atombios_encoder_set_edp_panel_power(connector,
					     ATOM_TRANSMITTER_ACTION_POWER_ON12);
if (!amdgpu_atombios_dp_get_dpcd(amdgpu_connector))
	ret = connector_status_connected;
if (!amdgpu_dig_connector->edp_on)
	amdgpu_atombios_encoder_set_edp_panel_power(connector,
					     ATOM_TRANSMITTER_ACTION_POWER_OFF13);
} else if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) !=
   ENCODER_OBJECT_ID_NONE0x00) {
/* DP bridges are always DP */
amdgpu_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT0x13;
/* get the DPCD from the bridge */
amdgpu_atombios_dp_get_dpcd(amdgpu_connector);

if (encoder) {
	/* setup ddc on the bridge */
	amdgpu_atombios_encoder_setup_ext_encoder_ddc(encoder);
	/* bridge chips are always aux */
	/* try DDC */
	if (amdgpu_display_ddc_probe(amdgpu_connector, true1))
		ret = connector_status_connected;
	else if (amdgpu_connector->dac_load_detect) { /* try load detection */
		const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
		ret = encoder_funcs->detect(encoder, connector);
	}
}
} else {
amdgpu_dig_connector->dp_sink_type =
	amdgpu_atombios_dp_get_sinktype(amdgpu_connector);
if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)(adev)->mode_info.funcs->hpd_sense((adev), (amdgpu_connector
->hpd.hpd))) {
	ret = connector_status_connected;
	if (amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13)
		amdgpu_atombios_dp_get_dpcd(amdgpu_connector);
} else {
	if (amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13) {
		if (!amdgpu_atombios_dp_get_dpcd(amdgpu_connector))
			ret = connector_status_connected;
	} else {
		/* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
		if (amdgpu_display_ddc_probe(amdgpu_connector,
					     false0))
			ret = connector_status_connected;
	}
}
}

amdgpu_connector_update_scratch_regs(connector, ret);
1420out:
if (!drm_kms_helper_is_poll_worker()) {
pm_runtime_mark_last_busy(connector->dev->dev);
pm_runtime_put_autosuspend(connector->dev->dev);
}

if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort10 ||
   connector->connector_type == DRM_MODE_CONNECTOR_eDP14)
drm_dp_set_subconnector_property(&amdgpu_connector->base,
				 ret,
				 amdgpu_dig_connector->dpcd,
				 amdgpu_dig_connector->downstream_ports);
return ret;
1433}

1435static enum drm_mode_status amdgpu_connector_dp_mode_valid(struct drm_connector *connector,
			   struct drm_display_mode *mode)
1437{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
struct amdgpu_connector_atom_dig *amdgpu_dig_connector = amdgpu_connector->con_priv;

/* XXX check mode bandwidth */

if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP14) ||
   (connector->connector_type == DRM_MODE_CONNECTOR_LVDS7)) {
struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);

if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
	return MODE_PANEL;

if (encoder) {
	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
	struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;

	/* AVIVO hardware supports downscaling modes larger than the panel
	 * to the panel size, but I'm not sure this is desirable.
	 */
	if ((mode->hdisplay > native_mode->hdisplay) ||
	    (mode->vdisplay > native_mode->vdisplay))
		return MODE_PANEL;

	/* if scaling is disabled, block non-native modes */
	if (amdgpu_encoder->rmx_type == RMX_OFF) {
		if ((mode->hdisplay != native_mode->hdisplay) ||
		    (mode->vdisplay != native_mode->vdisplay))
			return MODE_PANEL;
	}
}
return MODE_OK;
} else {
if ((amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT0x13) ||
    (amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP0x14)) {
	return amdgpu_atombios_dp_mode_valid_helper(connector, mode);
} else {
	if (connector->display_info.is_hdmi) {
		/* HDMI 1.3+ supports max clock of 340 Mhz */
		if (mode->clock > 340000)
			return MODE_CLOCK_HIGH;
	} else {
		if (mode->clock > 165000)
			return MODE_CLOCK_HIGH;
	}
}
}

return MODE_OK;
1486}

1488static int
1489amdgpu_connector_late_register(struct drm_connector *connector)
1490{
struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
int r = 0;

if (amdgpu_connector->ddc_bus->has_aux) {
amdgpu_connector->ddc_bus->aux.dev = amdgpu_connector->base.kdev;
r = drm_dp_aux_register(&amdgpu_connector->ddc_bus->aux);
}

return r;
1500}

1502static const struct drm_connector_helper_funcs amdgpu_connector_dp_helper_funcs = {
.get_modes = amdgpu_connector_dp_get_modes,
.mode_valid = amdgpu_connector_dp_mode_valid,
.best_encoder = amdgpu_connector_dvi_encoder,
1506};

1508static const struct drm_connector_funcs amdgpu_connector_dp_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = amdgpu_connector_dp_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
.set_property = amdgpu_connector_set_property,
.early_unregister = amdgpu_connector_unregister,
.destroy = amdgpu_connector_destroy,
.force = amdgpu_connector_dvi_force,
.late_register = amdgpu_connector_late_register,
1517};

1519static const struct drm_connector_funcs amdgpu_connector_edp_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = amdgpu_connector_dp_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
.set_property = amdgpu_connector_set_lcd_property,
.early_unregister = amdgpu_connector_unregister,
.destroy = amdgpu_connector_destroy,
.force = amdgpu_connector_dvi_force,
.late_register = amdgpu_connector_late_register,
1528};

1530void
1531amdgpu_connector_add(struct amdgpu_device *adev,
      uint32_t connector_id,
      uint32_t supported_device,
      int connector_type,
      struct amdgpu_i2c_bus_rec *i2c_bus,
      uint16_t connector_object_id,
      struct amdgpu_hpd *hpd,
      struct amdgpu_router *router)
1539{
struct drm_device *dev = adev_to_drm(adev);
struct drm_connector *connector;
struct drm_connector_list_iter iter;
struct amdgpu_connector *amdgpu_connector;
struct amdgpu_connector_atom_dig *amdgpu_dig_connector;
struct drm_encoder *encoder;
struct amdgpu_encoder *amdgpu_encoder;
struct i2c_adapter *ddc = NULL((void *)0);
uint32_t subpixel_order = SubPixelNone;
bool_Bool shared_ddc = false0;
bool_Bool is_dp_bridge = false0;
bool_Bool has_aux = false0;

if (connector_type == DRM_MODE_CONNECTOR_Unknown0)
1
Assuming 'connector_type' is not equal to DRM_MODE_CONNECTOR_Unknown→
2
←
Taking false branch→
return;

/* see if we already added it */
drm_connector_list_iter_begin(dev, &iter);
drm_for_each_connector_iter(connector, &iter)while ((connector = drm_connector_list_iter_next(&iter))) {
3
←
Loop condition is false. Execution continues on line 1577→
amdgpu_connector = to_amdgpu_connector(connector)({ const __typeof( ((struct amdgpu_connector *)0)->base ) *
__mptr = (connector); (struct amdgpu_connector *)( (char *)__mptr
 - __builtin_offsetof(struct amdgpu_connector, base) );});
if (amdgpu_connector->connector_id == connector_id) {
	amdgpu_connector->devices |= supported_device;
	drm_connector_list_iter_end(&iter);
	return;
}
if (amdgpu_connector->ddc_bus && i2c_bus->valid) {
	if (amdgpu_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
		amdgpu_connector->shared_ddc = true1;
		shared_ddc = true1;
	}
	if (amdgpu_connector->router_bus && router->ddc_valid &&
	    (amdgpu_connector->router.router_id == router->router_id)) {
		amdgpu_connector->shared_ddc = false0;
		shared_ddc = false0;
	}
}
}
drm_connector_list_iter_end(&iter);

/* check if it's a dp bridge */
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)for (encoder = ({ const __typeof( ((__typeof(*encoder) *)0)->
head ) *__mptr = ((&dev->mode_config.encoder_list)->
next); (__typeof(*encoder) *)( (char *)__mptr - __builtin_offsetof
(__typeof(*encoder), head) );}); &encoder->head != (&
dev->mode_config.encoder_list); encoder = ({ const __typeof
( ((__typeof(*encoder) *)0)->head ) *__mptr = (encoder->
head.next); (__typeof(*encoder) *)( (char *)__mptr - __builtin_offsetof
(__typeof(*encoder), head) );})) {
4
←
Loop condition is false. Execution continues on line 1594→
amdgpu_encoder = to_amdgpu_encoder(encoder)({ const __typeof( ((struct amdgpu_encoder *)0)->base ) *__mptr
 = (encoder); (struct amdgpu_encoder *)( (char *)__mptr - __builtin_offsetof
(struct amdgpu_encoder, base) );});
if (amdgpu_encoder->devices & supported_device) {
	switch (amdgpu_encoder->encoder_id) {
	case ENCODER_OBJECT_ID_TRAVIS0x23:
	case ENCODER_OBJECT_ID_NUTMEG0x22:
		is_dp_bridge = true1;
		break;
	default:
		break;
	}
}
}

amdgpu_connector = kzalloc(sizeof(struct amdgpu_connector), GFP_KERNEL(0x0001 | 0x0004));
5
←
Calling 'kzalloc'→
7
←
Returned allocated memory→
if (!amdgpu_connector)
8
←
Assuming 'amdgpu_connector' is non-null→
9
←
Taking false branch→
return;

connector = &amdgpu_connector->base;

amdgpu_connector->connector_id = connector_id;
amdgpu_connector->devices = supported_device;
amdgpu_connector->shared_ddc = shared_ddc;
amdgpu_connector->connector_object_id = connector_object_id;
amdgpu_connector->hpd = *hpd;

amdgpu_connector->router = *router;
if (router->ddc_valid || router->cd_valid) {
10
←
Assuming field 'ddc_valid' is false→
11
←
Assuming field 'cd_valid' is false→
12
←
Taking false branch→
amdgpu_connector->router_bus = amdgpu_i2c_lookup(adev, &router->i2c_info);
if (!amdgpu_connector->router_bus)
	DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n")__drm_err("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"
);
}

if (is_dp_bridge12.1
'is_dp_bridge' is false
1
'is_dp_bridge' is false
) {
13
←
Taking false branch→
amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004));
if (!amdgpu_dig_connector)
	goto failed;
amdgpu_connector->con_priv = amdgpu_dig_connector;
if (i2c_bus->valid) {
	amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
	if (amdgpu_connector->ddc_bus) {
		has_aux = true1;
		ddc = &amdgpu_connector->ddc_bus->adapter;
	} else {
		DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"
);
	}
}
switch (connector_type) {
case DRM_MODE_CONNECTOR_VGA1:
case DRM_MODE_CONNECTOR_DVIA4:
default:
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_dp_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base,
				 &amdgpu_connector_dp_helper_funcs);
	connector->interlace_allowed = true1;
	connector->doublescan_allowed = true1;
	amdgpu_connector->dac_load_detect = true1;
	drm_object_attach_property(&amdgpu_connector->base.base,
				      adev->mode_info.load_detect_property,
				      1);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   dev->mode_config.scaling_mode_property,
				   DRM_MODE_SCALE_NONE0);
	break;
case DRM_MODE_CONNECTOR_DVII2:
case DRM_MODE_CONNECTOR_DVID3:
case DRM_MODE_CONNECTOR_HDMIA11:
case DRM_MODE_CONNECTOR_HDMIB12:
case DRM_MODE_CONNECTOR_DisplayPort10:
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_dp_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base,
				 &amdgpu_connector_dp_helper_funcs);
	drm_object_attach_property(&amdgpu_connector->base.base,
				      adev->mode_info.underscan_property,
				      UNDERSCAN_OFF);
	drm_object_attach_property(&amdgpu_connector->base.base,
				      adev->mode_info.underscan_hborder_property,
				      0);
	drm_object_attach_property(&amdgpu_connector->base.base,
				      adev->mode_info.underscan_vborder_property,
				      0);

	drm_object_attach_property(&amdgpu_connector->base.base,
				   dev->mode_config.scaling_mode_property,
				   DRM_MODE_SCALE_NONE0);

	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.dither_property,
				   AMDGPU_FMT_DITHER_DISABLE);

	if (amdgpu_audio != 0) {
		drm_object_attach_property(&amdgpu_connector->base.base,
					   adev->mode_info.audio_property,
					   AMDGPU_AUDIO_AUTO);
		amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
	}

	subpixel_order = SubPixelHorizontalRGB;
	connector->interlace_allowed = true1;
	if (connector_type == DRM_MODE_CONNECTOR_HDMIB12)
		connector->doublescan_allowed = true1;
	else
		connector->doublescan_allowed = false0;
	if (connector_type == DRM_MODE_CONNECTOR_DVII2) {
		amdgpu_connector->dac_load_detect = true1;
		drm_object_attach_property(&amdgpu_connector->base.base,
					      adev->mode_info.load_detect_property,
					      1);
	}
	break;
case DRM_MODE_CONNECTOR_LVDS7:
case DRM_MODE_CONNECTOR_eDP14:
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_edp_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base,
				 &amdgpu_connector_dp_helper_funcs);
	drm_object_attach_property(&amdgpu_connector->base.base,
				      dev->mode_config.scaling_mode_property,
				      DRM_MODE_SCALE_FULLSCREEN1);
	subpixel_order = SubPixelHorizontalRGB;
	connector->interlace_allowed = false0;
	connector->doublescan_allowed = false0;
	break;
}
} else {
switch (connector_type) {
case DRM_MODE_CONNECTOR_VGA1:
	if (i2c_bus->valid) {
		amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
		if (!amdgpu_connector->ddc_bus)
			DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"
);
		else
			ddc = &amdgpu_connector->ddc_bus->adapter;
	}
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_vga_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
	amdgpu_connector->dac_load_detect = true1;
	drm_object_attach_property(&amdgpu_connector->base.base,
				      adev->mode_info.load_detect_property,
				      1);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   dev->mode_config.scaling_mode_property,
				   DRM_MODE_SCALE_NONE0);
	/* no HPD on analog connectors */
	amdgpu_connector->hpd.hpd = AMDGPU_HPD_NONE;
	connector->interlace_allowed = true1;
	connector->doublescan_allowed = true1;
	break;
case DRM_MODE_CONNECTOR_DVIA4:
	if (i2c_bus->valid) {
		amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
		if (!amdgpu_connector->ddc_bus)
			DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"
);
		else
			ddc = &amdgpu_connector->ddc_bus->adapter;
	}
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_vga_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
	amdgpu_connector->dac_load_detect = true1;
	drm_object_attach_property(&amdgpu_connector->base.base,
				      adev->mode_info.load_detect_property,
				      1);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   dev->mode_config.scaling_mode_property,
				   DRM_MODE_SCALE_NONE0);
	/* no HPD on analog connectors */
	amdgpu_connector->hpd.hpd = AMDGPU_HPD_NONE;
	connector->interlace_allowed = true1;
	connector->doublescan_allowed = true1;
	break;
case DRM_MODE_CONNECTOR_DVII2:
case DRM_MODE_CONNECTOR_DVID3:
	amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004));
	if (!amdgpu_dig_connector)
		goto failed;
	amdgpu_connector->con_priv = amdgpu_dig_connector;
	if (i2c_bus->valid) {
		amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
		if (!amdgpu_connector->ddc_bus)
			DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"
);
		else
			ddc = &amdgpu_connector->ddc_bus->adapter;
	}
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_dvi_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
	subpixel_order = SubPixelHorizontalRGB;
	drm_object_attach_property(&amdgpu_connector->base.base,
				      adev->mode_info.coherent_mode_property,
				      1);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.underscan_property,
				   UNDERSCAN_OFF);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.underscan_hborder_property,
				   0);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.underscan_vborder_property,
				   0);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   dev->mode_config.scaling_mode_property,
				   DRM_MODE_SCALE_NONE0);

	if (amdgpu_audio != 0) {
		drm_object_attach_property(&amdgpu_connector->base.base,
					   adev->mode_info.audio_property,
					   AMDGPU_AUDIO_AUTO);
		amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
	}
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.dither_property,
				   AMDGPU_FMT_DITHER_DISABLE);
	if (connector_type == DRM_MODE_CONNECTOR_DVII2) {
		amdgpu_connector->dac_load_detect = true1;
		drm_object_attach_property(&amdgpu_connector->base.base,
					   adev->mode_info.load_detect_property,
					   1);
	}
	connector->interlace_allowed = true1;
	if (connector_type == DRM_MODE_CONNECTOR_DVII2)
		connector->doublescan_allowed = true1;
	else
		connector->doublescan_allowed = false0;
	break;
case DRM_MODE_CONNECTOR_HDMIA11:
case DRM_MODE_CONNECTOR_HDMIB12:
	amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004));
	if (!amdgpu_dig_connector)
		goto failed;
	amdgpu_connector->con_priv = amdgpu_dig_connector;
	if (i2c_bus->valid) {
		amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
		if (!amdgpu_connector->ddc_bus)
			DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"
);
		else
			ddc = &amdgpu_connector->ddc_bus->adapter;
	}
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_dvi_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
	drm_object_attach_property(&amdgpu_connector->base.base,
				      adev->mode_info.coherent_mode_property,
				      1);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.underscan_property,
				   UNDERSCAN_OFF);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.underscan_hborder_property,
				   0);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.underscan_vborder_property,
				   0);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   dev->mode_config.scaling_mode_property,
				   DRM_MODE_SCALE_NONE0);
	if (amdgpu_audio != 0) {
		drm_object_attach_property(&amdgpu_connector->base.base,
					   adev->mode_info.audio_property,
					   AMDGPU_AUDIO_AUTO);
		amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
	}
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.dither_property,
				   AMDGPU_FMT_DITHER_DISABLE);
	subpixel_order = SubPixelHorizontalRGB;
	connector->interlace_allowed = true1;
	if (connector_type == DRM_MODE_CONNECTOR_HDMIB12)
		connector->doublescan_allowed = true1;
	else
		connector->doublescan_allowed = false0;
	break;
case DRM_MODE_CONNECTOR_DisplayPort10:
	amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004));
	if (!amdgpu_dig_connector)
		goto failed;
	amdgpu_connector->con_priv = amdgpu_dig_connector;
	if (i2c_bus->valid) {
		amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
		if (amdgpu_connector->ddc_bus) {
			has_aux = true1;
			ddc = &amdgpu_connector->ddc_bus->adapter;
		} else {
			DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"
);
		}
	}
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_dp_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
	subpixel_order = SubPixelHorizontalRGB;
	drm_object_attach_property(&amdgpu_connector->base.base,
				      adev->mode_info.coherent_mode_property,
				      1);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.underscan_property,
				   UNDERSCAN_OFF);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.underscan_hborder_property,
				   0);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.underscan_vborder_property,
				   0);
	drm_object_attach_property(&amdgpu_connector->base.base,
				   dev->mode_config.scaling_mode_property,
				   DRM_MODE_SCALE_NONE0);
	if (amdgpu_audio != 0) {
		drm_object_attach_property(&amdgpu_connector->base.base,
					   adev->mode_info.audio_property,
					   AMDGPU_AUDIO_AUTO);
		amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
	}
	drm_object_attach_property(&amdgpu_connector->base.base,
				   adev->mode_info.dither_property,
				   AMDGPU_FMT_DITHER_DISABLE);
	connector->interlace_allowed = true1;
	/* in theory with a DP to VGA converter... */
	connector->doublescan_allowed = false0;
	break;
case DRM_MODE_CONNECTOR_eDP14:
	amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004));
	if (!amdgpu_dig_connector)
		goto failed;
	amdgpu_connector->con_priv = amdgpu_dig_connector;
	if (i2c_bus->valid) {
		amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
		if (amdgpu_connector->ddc_bus) {
			has_aux = true1;
			ddc = &amdgpu_connector->ddc_bus->adapter;
		} else {
			DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"
);
		}
	}
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_edp_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
	drm_object_attach_property(&amdgpu_connector->base.base,
				      dev->mode_config.scaling_mode_property,
				      DRM_MODE_SCALE_FULLSCREEN1);
	subpixel_order = SubPixelHorizontalRGB;
	connector->interlace_allowed = false0;
	connector->doublescan_allowed = false0;
	break;
case DRM_MODE_CONNECTOR_LVDS7:
	amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL(0x0001 | 0x0004));
	if (!amdgpu_dig_connector)
		goto failed;
	amdgpu_connector->con_priv = amdgpu_dig_connector;
	if (i2c_bus->valid) {
		amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
		if (!amdgpu_connector->ddc_bus)
			DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n")__drm_err("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"
);
		else
			ddc = &amdgpu_connector->ddc_bus->adapter;
	}
	drm_connector_init_with_ddc(dev, &amdgpu_connector->base,
				    &amdgpu_connector_lvds_funcs,
				    connector_type,
				    ddc);
	drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_lvds_helper_funcs);
	drm_object_attach_property(&amdgpu_connector->base.base,
				      dev->mode_config.scaling_mode_property,
				      DRM_MODE_SCALE_FULLSCREEN1);
	subpixel_order = SubPixelHorizontalRGB;
	connector->interlace_allowed = false0;
	connector->doublescan_allowed = false0;
	break;
}
}

if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE) {
14
←
'Default' branch taken. Execution continues on line 1970→
15
←
Assuming field 'hpd' is equal to AMDGPU_HPD_NONE→
16
←
Taking true branch→
if (i2c_bus->valid) {
17
←
Assuming field 'valid' is false→
18
←
Taking false branch→
	connector->polled = DRM_CONNECTOR_POLL_CONNECT(1 << 1) |
	                    DRM_CONNECTOR_POLL_DISCONNECT(1 << 2);
}
} else
connector->polled = DRM_CONNECTOR_POLL_HPD(1 << 0);

connector->display_info.subpixel_order = subpixel_order;

if (has_aux18.1
'has_aux' is false
1
'has_aux' is false
)
amdgpu_atombios_dp_aux_init(amdgpu_connector);

if (connector_type18.2
'connector_type' is not equal to DRM_MODE_CONNECTOR_DisplayPort
2
'connector_type' is not equal to DRM_MODE_CONNECTOR_DisplayPort
 == DRM_MODE_CONNECTOR_DisplayPort10 ||
19
←
Taking false branch→
   connector_type18.3
'connector_type' is not equal to DRM_MODE_CONNECTOR_eDP
3
'connector_type' is not equal to DRM_MODE_CONNECTOR_eDP
 == DRM_MODE_CONNECTOR_eDP14) {
drm_connector_attach_dp_subconnector_property(&amdgpu_connector->base);
}

return;
20
←
Potential leak of memory pointed to by 'amdgpu_connector'

1990failed:
drm_connector_cleanup(connector);
kfree(connector);
1993}

←

/usr/src/sys/dev/pci/drm/include/linux/slab.h

1/* Public domain. */
2 
3#ifndef _LINUX_SLAB_H
4#define _LINUX_SLAB_H
5 
6#include <sys/types.h>
7#include <sys/malloc.h>
8 
9#include <linux/types.h>
10#include <linux/workqueue.h>
11#include <linux/gfp.h>
12 
13#include <linux/processor.h>	/* for CACHELINESIZE */
14 
15#define ARCH_KMALLOC_MINALIGN64 CACHELINESIZE64
16 
17#define ZERO_SIZE_PTR((void *)0) NULL((void *)0)
18 
19static inline void *
20kmalloc(size_t size, int flags)
21{
22	return malloc(size, M_DRM145, flags);
23}
24 
25static inline void *
26kmalloc_array(size_t n, size_t size, int flags)
27{
28	if (n != 0 && SIZE_MAX0xffffffffffffffffUL / n < size)
29		return NULL((void *)0);
30	return malloc(n * size, M_DRM145, flags);
31}
32 
33static inline void *
34kcalloc(size_t n, size_t size, int flags)
35{
36	if (n != 0 && SIZE_MAX0xffffffffffffffffUL / n < size)
37		return NULL((void *)0);
38	return malloc(n * size, M_DRM145, flags | M_ZERO0x0008);
39}
40 
41static inline void *
42kzalloc(size_t size, int flags)
43{
44	return malloc(size, M_DRM145, flags | M_ZERO0x0008);
6
←
Memory is allocated→
45}
46 
47static inline void
48kfree(const void *objp)
49{
50	free((void *)objp, M_DRM145, 0);
51}
52 
53#endif