/usr/src/sys/dev/ic/qla.c

Bug Summary

File:	dev/ic/qla.c
Warning:	line 1576, column 14 Assigned value is garbage or undefined
Annotated Source Code

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clang -cc1 -cc1 -triple amd64-unknown-openbsd7.4 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name qla.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=all -relaxed-aliasing -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -mcmodel=kernel -target-cpu x86-64 -target-feature +retpoline-indirect-calls -target-feature +retpoline-indirect-branches -target-feature -sse2 -target-feature -sse -target-feature -3dnow -target-feature -mmx -target-feature +save-args -target-feature +retpoline-external-thunk -disable-red-zone -no-implicit-float -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -nostdsysteminc -nobuiltininc -resource-dir /usr/local/llvm16/lib/clang/16 -I /usr/src/sys -I /usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -I /usr/src/sys/arch -I /usr/src/sys/dev/pci/drm/include -I /usr/src/sys/dev/pci/drm/include/uapi -I /usr/src/sys/dev/pci/drm/amd/include/asic_reg -I /usr/src/sys/dev/pci/drm/amd/include -I /usr/src/sys/dev/pci/drm/amd/amdgpu -I /usr/src/sys/dev/pci/drm/amd/display -I /usr/src/sys/dev/pci/drm/amd/display/include -I /usr/src/sys/dev/pci/drm/amd/display/dc -I /usr/src/sys/dev/pci/drm/amd/display/amdgpu_dm -I /usr/src/sys/dev/pci/drm/amd/pm/inc -I /usr/src/sys/dev/pci/drm/amd/pm/legacy-dpm -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu11 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu12 -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/smu13 -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/inc -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr -I /usr/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc -I /usr/src/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc -I /usr/src/sys/dev/pci/drm/amd/display/dc/inc/hw -I /usr/src/sys/dev/pci/drm/amd/display/dc/clk_mgr -I /usr/src/sys/dev/pci/drm/amd/display/modules/inc -I /usr/src/sys/dev/pci/drm/amd/display/modules/hdcp -I /usr/src/sys/dev/pci/drm/amd/display/dmub/inc -I /usr/src/sys/dev/pci/drm/i915 -D DDB -D DIAGNOSTIC -D KTRACE -D ACCOUNTING -D KMEMSTATS -D PTRACE -D POOL_DEBUG -D CRYPTO -D SYSVMSG -D SYSVSEM -D SYSVSHM -D UVM_SWAP_ENCRYPT -D FFS -D FFS2 -D FFS_SOFTUPDATES -D UFS_DIRHASH -D QUOTA -D EXT2FS -D MFS -D NFSCLIENT -D NFSSERVER -D CD9660 -D UDF -D MSDOSFS -D FIFO -D FUSE -D SOCKET_SPLICE -D TCP_ECN -D TCP_SIGNATURE -D INET6 -D IPSEC -D PPP_BSDCOMP -D PPP_DEFLATE -D PIPEX -D MROUTING -D MPLS -D BOOT_CONFIG -D USER_PCICONF -D APERTURE -D MTRR -D NTFS -D SUSPEND -D HIBERNATE -D PCIVERBOSE -D USBVERBOSE -D WSDISPLAY_COMPAT_USL -D WSDISPLAY_COMPAT_RAWKBD -D WSDISPLAY_DEFAULTSCREENS=6 -D X86EMU -D ONEWIREVERBOSE -D MULTIPROCESSOR -D MAXUSERS=80 -D _KERNEL -O2 -Wno-pointer-sign -Wno-address-of-packed-member -Wno-constant-conversion -Wno-unused-but-set-variable -Wno-gnu-folding-constant -fdebug-compilation-dir=/usr/src/sys/arch/amd64/compile/GENERIC.MP/obj -ferror-limit 19 -fwrapv -D_RET_PROTECTOR -ret-protector -fcf-protection=branch -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-valloc -fno-builtin-free -fno-builtin-strdup -fno-builtin-strndup -analyzer-output=html -faddrsig -o /home/ben/Projects/scan/2024-01-11-110808-61670-1 -x c /usr/src/sys/dev/ic/qla.c
1/*	$OpenBSD: qla.c,v 1.69 2022/04/16 19:19:59 naddy Exp $ */

3/*
* Copyright (c) 2011 David Gwynne <dlg@openbsd.org>
* Copyright (c) 2013, 2014 Jonathan Matthew <jmatthew@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/

20#include <sys/param.h>
21#include <sys/systm.h>
22#include <sys/atomic.h>
23#include <sys/device.h>
24#include <sys/ioctl.h>
25#include <sys/malloc.h>
26#include <sys/kernel.h>
27#include <sys/mutex.h>
28#include <sys/rwlock.h>
29#include <sys/sensors.h>
30#include <sys/queue.h>

32#include <machine/bus.h>

34#include <scsi/scsi_all.h>
35#include <scsi/scsiconf.h>

37#include <dev/ic/qlareg.h>
38#include <dev/ic/qlavar.h>

40#ifdef QLA_DEBUG
41#define DPRINTF(m, f...) do { if ((qladebug & (m)) == (m)) printf(f); } \
  while (0)
43#define QLA_D_MBOX		0x01
44#define QLA_D_INTR		0x02
45#define QLA_D_PORT		0x04
46#define QLA_D_IO		0x08
47#define QLA_D_IOCB		0x10
48int qladebug = QLA_D_PORT;
49#else
50#define DPRINTF(m, f...)
51#endif


54#ifndef ISP_NOFIRMWARE
55#include <dev/microcode/isp/asm_2100.h>
56#include <dev/microcode/isp/asm_2200.h>
57#include <dev/microcode/isp/asm_2300.h>
58#endif

60struct cfdriver qla_cd = {
NULL((void *)0),
"qla",
DV_DULL
64};

66void		qla_scsi_cmd(struct scsi_xfer *);
67int		qla_scsi_probe(struct scsi_link *);

69u_int16_t	qla_read(struct qla_softc *, bus_size_t);
70void		qla_write(struct qla_softc *, bus_size_t, u_int16_t);
71void		qla_host_cmd(struct qla_softc *sc, u_int16_t);

73u_int16_t	qla_read_queue_2100(struct qla_softc *, bus_size_t);

75int		qla_mbox(struct qla_softc *, int);
76int		qla_sns_req(struct qla_softc *, struct qla_dmamem *, int);
77void		qla_mbox_putaddr(u_int16_t *, struct qla_dmamem *);
78u_int16_t	qla_read_mbox(struct qla_softc *, int);
79void		qla_write_mbox(struct qla_softc *, int, u_int16_t);

81void		qla_handle_intr(struct qla_softc *, u_int16_t, u_int16_t);
82void		qla_set_ints(struct qla_softc *, int);
83int		qla_read_isr_1G(struct qla_softc *, u_int16_t *, u_int16_t *);
84int		qla_read_isr_2G(struct qla_softc *, u_int16_t *, u_int16_t *);
85void		qla_clear_isr(struct qla_softc *, u_int16_t);

87void		qla_update_start(struct qla_softc *, int);
88void		qla_update_done(struct qla_softc *, int);
89void		qla_do_update(void *);

91void		qla_put_marker(struct qla_softc *, void *);
92void		qla_put_cmd(struct qla_softc *, void *, struct scsi_xfer *,
    struct qla_ccb *);
94struct qla_ccb *qla_handle_resp(struct qla_softc *, u_int16_t);

96int		qla_get_port_name_list(struct qla_softc *, u_int32_t);
97struct qla_fc_port *qla_next_fabric_port(struct qla_softc *, u_int32_t *,
    u_int32_t *);
99int		qla_get_port_db(struct qla_softc *c, u_int16_t,
    struct qla_dmamem *);
101int		qla_add_loop_port(struct qla_softc *, struct qla_fc_port *);
102int		qla_add_fabric_port(struct qla_softc *, struct qla_fc_port *);
103int		qla_add_logged_in_port(struct qla_softc *, int, u_int32_t);
104int		qla_classify_port(struct qla_softc *, u_int32_t, u_int64_t,
    u_int64_t, struct qla_fc_port **);
106int		qla_get_loop_id(struct qla_softc *sc, int);
107void		qla_clear_port_lists(struct qla_softc *);
108int		qla_softreset(struct qla_softc *);
109void		qla_update_topology(struct qla_softc *);
110int		qla_update_fabric(struct qla_softc *);
111int		qla_fabric_plogi(struct qla_softc *, struct qla_fc_port *);
112void		qla_fabric_plogo(struct qla_softc *, struct qla_fc_port *);

114void		qla_update_start(struct qla_softc *, int);
115int		qla_async(struct qla_softc *, u_int16_t);

117int		qla_verify_firmware(struct qla_softc *sc, u_int16_t);
118int		qla_load_firmware_words(struct qla_softc *, const u_int16_t *,
    u_int16_t);
120int		qla_load_firmware_2100(struct qla_softc *);
121int		qla_load_firmware_2200(struct qla_softc *);
122int		qla_load_fwchunk_2300(struct qla_softc *,
    struct qla_dmamem *, const u_int16_t *, u_int32_t);
124int		qla_load_firmware_2300(struct qla_softc *);
125int		qla_load_firmware_2322(struct qla_softc *);
126int		qla_read_nvram(struct qla_softc *);

128struct qla_dmamem *qla_dmamem_alloc(struct qla_softc *, size_t);
129void		qla_dmamem_free(struct qla_softc *, struct qla_dmamem *);

131int		qla_alloc_ccbs(struct qla_softc *);
132void		qla_free_ccbs(struct qla_softc *);
133void		*qla_get_ccb(void *);
134void		qla_put_ccb(void *, void *);

136void		qla_dump_iocb(struct qla_softc *, void *);
137void		qla_dump_iocb_segs(struct qla_softc *, void *, int);

139static const struct qla_regs qla_regs_2100 = {
qla_read_queue_2100,
qla_read_isr_1G,
QLA_MBOX_BASE_21000x10 + 0x8,
QLA_MBOX_BASE_21000x10 + 0x8,
QLA_MBOX_BASE_21000x10 + 0xa,
QLA_MBOX_BASE_21000x10 + 0xa
146};

148static const struct qla_regs qla_regs_2200 = {
qla_read,
qla_read_isr_1G,
QLA_MBOX_BASE_22000x10 + 0x8,
QLA_MBOX_BASE_22000x10 + 0x8,
QLA_MBOX_BASE_22000x10 + 0xa,
QLA_MBOX_BASE_22000x10 + 0xa
155};

157static const struct qla_regs qla_regs_23XX = {
qla_read,
qla_read_isr_2G,
QLA_REQ_IN0x10,
QLA_REQ_OUT0x12,
QLA_RESP_IN0x14,
QLA_RESP_OUT0x16
164};

166#define qla_queue_read(_sc, _r)((*(_sc)->sc_regs->read)((_sc), (_r))) ((*(_sc)->sc_regs->read)((_sc), (_r)))
167#define qla_queue_write(_sc, _r, _v)qla_write((_sc), (_r), (_v)) qla_write((_sc), (_r), (_v))

169#define qla_read_isr(_sc, _isr, _info)((*(_sc)->sc_regs->read_isr)((_sc), (_isr), (_info))) \
  ((*(_sc)->sc_regs->read_isr)((_sc), (_isr), (_info)))

172const struct scsi_adapter qla_switch = {
qla_scsi_cmd, NULL((void *)0), qla_scsi_probe, NULL((void *)0), NULL((void *)0)
174};

176int
177qla_classify_port(struct qla_softc *sc, u_int32_t location,
  u_int64_t port_name, u_int64_t node_name, struct qla_fc_port **prev)
179{
struct qla_fc_port *port, *locmatch, *wwnmatch;
locmatch = NULL((void *)0);
wwnmatch = NULL((void *)0);

/* make sure we don't try to add a port or location twice */
TAILQ_FOREACH(port, &sc->sc_ports_new, update)for((port) = ((&sc->sc_ports_new)->tqh_first); (port
) != ((void *)0); (port) = ((port)->update.tqe_next)) {
if ((port->port_name == port_name &&
    port->node_name == node_name) ||
    port->location == location) {
	*prev = port;
	return (QLA_PORT_DISP_DUP);
}
}

/* if we're attaching, everything is new */
if (sc->sc_scsibus == NULL((void *)0)) {
*prev = NULL((void *)0);
return (QLA_PORT_DISP_NEW);
}

TAILQ_FOREACH(port, &sc->sc_ports, ports)for((port) = ((&sc->sc_ports)->tqh_first); (port) !=
 ((void *)0); (port) = ((port)->ports.tqe_next)) {
if (port->location == location)
	locmatch = port;

if (port->port_name == port_name &&
    port->node_name == node_name)
	wwnmatch = port;
}

if (locmatch == NULL((void *)0) && wwnmatch == NULL((void *)0)) {
*prev = NULL((void *)0);
return (QLA_PORT_DISP_NEW);
} else if (locmatch == wwnmatch) {
*prev = locmatch;
return (QLA_PORT_DISP_SAME);
} else if (wwnmatch != NULL((void *)0)) {
*prev = wwnmatch;
return (QLA_PORT_DISP_MOVED);
} else {
*prev = locmatch;
return (QLA_PORT_DISP_CHANGED);
}
222}

224int
225qla_get_loop_id(struct qla_softc *sc, int start)
226{
int i, last;

if (sc->sc_2k_logins) {
i = QLA_2KL_MIN_HANDLE0x81;
last = QLA_2KL_MAX_HANDLE0x7EF;
} else {
/* if we're an F port, we can have two ranges, but meh */
i = QLA_MIN_HANDLE0x81;
last = QLA_MAX_HANDLE0xFE;
}
if (i < start)
i = start;

for (; i <= last; i++) {
if (sc->sc_targets[i] == NULL((void *)0))
	return (i);
}

return (-1);
246}

248int
249qla_get_port_db(struct qla_softc *sc, u_int16_t loopid, struct qla_dmamem *mem)
250{
sc->sc_mbox[0] = QLA_MBOX_GET_PORT_DB0x0064;
if (sc->sc_2k_logins) {
sc->sc_mbox[1] = loopid;
} else {
sc->sc_mbox[1] = loopid << 8;
}

memset(QLA_DMA_KVA(mem), 0, sizeof(struct qla_get_port_db))__builtin_memset((((void *)(mem)->qdm_kva)), (0), (sizeof(
struct qla_get_port_db)));
qla_mbox_putaddr(sc->sc_mbox, mem);
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(mem), 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (sizeof(struct qla_get_port_db)), (0x01
))
   sizeof(struct qla_get_port_db), BUS_DMASYNC_PREREAD)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (sizeof(struct qla_get_port_db)), (0x01
));
if (qla_mbox(sc, 0x00cf)) {
DPRINTF(QLA_D_PORT, "%s: get port db %d failed: %x\n",
    DEVNAME(sc), loopid, sc->sc_mbox[0]);
return (1);
}

bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(mem), 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (sizeof(struct qla_get_port_db)), (0x02
))
   sizeof(struct qla_get_port_db), BUS_DMASYNC_POSTREAD)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (sizeof(struct qla_get_port_db)), (0x02
));
return (0);
271}

273int
274qla_add_loop_port(struct qla_softc *sc, struct qla_fc_port *port)
275{
struct qla_get_port_db *pdb;
struct qla_fc_port *pport = NULL((void *)0);
int disp;

if (qla_get_port_db(sc, port->loopid, sc->sc_scratch)) {
return (1);
}
pdb = QLA_DMA_KVA(sc->sc_scratch)((void *)(sc->sc_scratch)->qdm_kva);

if (letoh16(pdb->prli_svc_word3)((__uint16_t)(pdb->prli_svc_word3)) & QLA_SVC3_TARGET_ROLE0x0010)
port->flags |= QLA_PORT_FLAG_IS_TARGET1;

port->port_name = betoh64(pdb->port_name)(__uint64_t)(__builtin_constant_p(pdb->port_name) ? (__uint64_t
)((((__uint64_t)(pdb->port_name) & 0xff) << 56) |
 ((__uint64_t)(pdb->port_name) & 0xff00ULL) << 40
 | ((__uint64_t)(pdb->port_name) & 0xff0000ULL) <<
| ((__uint64_t)(pdb->port_name) & 0xff000000ULL) <<
| ((__uint64_t)(pdb->port_name) & 0xff00000000ULL) >>
| ((__uint64_t)(pdb->port_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(pdb->port_name) & 0xff000000000000ULL
) >> 40 | ((__uint64_t)(pdb->port_name) & 0xff00000000000000ULL
) >> 56) : __swap64md(pdb->port_name));
port->node_name = betoh64(pdb->node_name)(__uint64_t)(__builtin_constant_p(pdb->node_name) ? (__uint64_t
)((((__uint64_t)(pdb->node_name) & 0xff) << 56) |
 ((__uint64_t)(pdb->node_name) & 0xff00ULL) << 40
 | ((__uint64_t)(pdb->node_name) & 0xff0000ULL) <<
| ((__uint64_t)(pdb->node_name) & 0xff000000ULL) <<
| ((__uint64_t)(pdb->node_name) & 0xff00000000ULL) >>
| ((__uint64_t)(pdb->node_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(pdb->node_name) & 0xff000000000000ULL
) >> 40 | ((__uint64_t)(pdb->node_name) & 0xff00000000000000ULL
) >> 56) : __swap64md(pdb->node_name));
port->portid = (letoh16(pdb->port_id[0])((__uint16_t)(pdb->port_id[0])) << 16) |
   letoh16(pdb->port_id[1])((__uint16_t)(pdb->port_id[1]));

mtx_enter(&sc->sc_port_mtx);
disp = qla_classify_port(sc, port->location, port->port_name,
   port->node_name, &pport);
switch (disp) {
case QLA_PORT_DISP_CHANGED:
case QLA_PORT_DISP_MOVED:
case QLA_PORT_DISP_NEW:
TAILQ_INSERT_TAIL(&sc->sc_ports_new, port, update)do { (port)->update.tqe_next = ((void *)0); (port)->update
.tqe_prev = (&sc->sc_ports_new)->tqh_last; *(&sc
->sc_ports_new)->tqh_last = (port); (&sc->sc_ports_new
)->tqh_last = &(port)->update.tqe_next; } while (0);
sc->sc_targets[port->loopid] = port;
break;
case QLA_PORT_DISP_DUP:
free(port, M_DEVBUF2, sizeof *port);
break;
case QLA_PORT_DISP_SAME:
TAILQ_REMOVE(&sc->sc_ports_gone, pport, update)do { if (((pport)->update.tqe_next) != ((void *)0)) (pport
)->update.tqe_next->update.tqe_prev = (pport)->update
.tqe_prev; else (&sc->sc_ports_gone)->tqh_last = (pport
)->update.tqe_prev; *(pport)->update.tqe_prev = (pport)
->update.tqe_next; ((pport)->update.tqe_prev) = ((void *
)-1); ((pport)->update.tqe_next) = ((void *)-1); } while (
0);
free(port, M_DEVBUF2, sizeof *port);
break;
}
mtx_leave(&sc->sc_port_mtx);

switch (disp) {
case QLA_PORT_DISP_CHANGED:
case QLA_PORT_DISP_MOVED:
case QLA_PORT_DISP_NEW:
DPRINTF(QLA_D_PORT, "%s: %s %d; name %llx, port %06x\n",
    DEVNAME(sc), ISSET(port->flags, QLA_PORT_FLAG_IS_TARGET) ?
    "target" : "non-target", port->loopid, port->port_name,
    port->portid);
break;
}
return (0);
324}

326int
327qla_add_fabric_port(struct qla_softc *sc, struct qla_fc_port *port)
328{
struct qla_get_port_db *pdb;

if (qla_get_port_db(sc, port->loopid, sc->sc_scratch)) {
return (1);
}
pdb = QLA_DMA_KVA(sc->sc_scratch)((void *)(sc->sc_scratch)->qdm_kva);

if (letoh16(pdb->prli_svc_word3)((__uint16_t)(pdb->prli_svc_word3)) & QLA_SVC3_TARGET_ROLE0x0010)
port->flags |= QLA_PORT_FLAG_IS_TARGET1;

/*
* if we only know about this port because qla_get_port_name_list
* returned it, we don't have its port id or node name, so fill
* those in and update its location.
*/
if (port->location == QLA_LOCATION_FABRIC(2 << 24)) {
port->node_name = betoh64(pdb->node_name)(__uint64_t)(__builtin_constant_p(pdb->node_name) ? (__uint64_t
)((((__uint64_t)(pdb->node_name) & 0xff) << 56) |
 ((__uint64_t)(pdb->node_name) & 0xff00ULL) << 40
 | ((__uint64_t)(pdb->node_name) & 0xff0000ULL) <<
| ((__uint64_t)(pdb->node_name) & 0xff000000ULL) <<
| ((__uint64_t)(pdb->node_name) & 0xff00000000ULL) >>
| ((__uint64_t)(pdb->node_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(pdb->node_name) & 0xff000000000000ULL
) >> 40 | ((__uint64_t)(pdb->node_name) & 0xff00000000000000ULL
) >> 56) : __swap64md(pdb->node_name));
port->port_name = betoh64(pdb->port_name)(__uint64_t)(__builtin_constant_p(pdb->port_name) ? (__uint64_t
)((((__uint64_t)(pdb->port_name) & 0xff) << 56) |
 ((__uint64_t)(pdb->port_name) & 0xff00ULL) << 40
 | ((__uint64_t)(pdb->port_name) & 0xff0000ULL) <<
| ((__uint64_t)(pdb->port_name) & 0xff000000ULL) <<
| ((__uint64_t)(pdb->port_name) & 0xff00000000ULL) >>
| ((__uint64_t)(pdb->port_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(pdb->port_name) & 0xff000000000000ULL
) >> 40 | ((__uint64_t)(pdb->port_name) & 0xff00000000000000ULL
) >> 56) : __swap64md(pdb->port_name));
port->portid = (letoh16(pdb->port_id[0])((__uint16_t)(pdb->port_id[0])) << 16) |
    letoh16(pdb->port_id[1])((__uint16_t)(pdb->port_id[1]));
port->location = QLA_LOCATION_PORT_ID(port->portid)(port->portid | (2 << 24));
}

mtx_enter(&sc->sc_port_mtx);
TAILQ_INSERT_TAIL(&sc->sc_ports_new, port, update)do { (port)->update.tqe_next = ((void *)0); (port)->update
.tqe_prev = (&sc->sc_ports_new)->tqh_last; *(&sc
->sc_ports_new)->tqh_last = (port); (&sc->sc_ports_new
)->tqh_last = &(port)->update.tqe_next; } while (0);
sc->sc_targets[port->loopid] = port;
mtx_leave(&sc->sc_port_mtx);

DPRINTF(QLA_D_PORT, "%s: %s %d; name %llx\n",
   DEVNAME(sc), ISSET(port->flags, QLA_PORT_FLAG_IS_TARGET) ?
   "target" : "non-target", port->loopid, port->port_name);
return (0);
361}

363int
364qla_add_logged_in_port(struct qla_softc *sc, int loopid, u_int32_t portid)
365{
struct qla_fc_port *port;
struct qla_get_port_db *pdb;
u_int64_t node_name, port_name;
int flags, ret;

ret = qla_get_port_db(sc, loopid, sc->sc_scratch);
mtx_enter(&sc->sc_port_mtx);
if (ret != 0) {
/* put in a fake port to prevent use of this loop id */
printf("%s: loop id %d used, but can't see what's using it\n",
    DEVNAME(sc)((sc)->sc_dev.dv_xname), loopid);
node_name = 0;
port_name = 0;
flags = 0;
} else {
pdb = QLA_DMA_KVA(sc->sc_scratch)((void *)(sc->sc_scratch)->qdm_kva);
node_name = betoh64(pdb->node_name)(__uint64_t)(__builtin_constant_p(pdb->node_name) ? (__uint64_t
)((((__uint64_t)(pdb->node_name) & 0xff) << 56) |
 ((__uint64_t)(pdb->node_name) & 0xff00ULL) << 40
 | ((__uint64_t)(pdb->node_name) & 0xff0000ULL) <<
| ((__uint64_t)(pdb->node_name) & 0xff000000ULL) <<
| ((__uint64_t)(pdb->node_name) & 0xff00000000ULL) >>
| ((__uint64_t)(pdb->node_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(pdb->node_name) & 0xff000000000000ULL
) >> 40 | ((__uint64_t)(pdb->node_name) & 0xff00000000000000ULL
) >> 56) : __swap64md(pdb->node_name));
port_name = betoh64(pdb->port_name)(__uint64_t)(__builtin_constant_p(pdb->port_name) ? (__uint64_t
)((((__uint64_t)(pdb->port_name) & 0xff) << 56) |
 ((__uint64_t)(pdb->port_name) & 0xff00ULL) << 40
 | ((__uint64_t)(pdb->port_name) & 0xff0000ULL) <<
| ((__uint64_t)(pdb->port_name) & 0xff000000ULL) <<
| ((__uint64_t)(pdb->port_name) & 0xff00000000ULL) >>
| ((__uint64_t)(pdb->port_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(pdb->port_name) & 0xff000000000000ULL
) >> 40 | ((__uint64_t)(pdb->port_name) & 0xff00000000000000ULL
) >> 56) : __swap64md(pdb->port_name));
flags = 0;
if (letoh16(pdb->prli_svc_word3)((__uint16_t)(pdb->prli_svc_word3)) & QLA_SVC3_TARGET_ROLE0x0010)
	flags |= QLA_PORT_FLAG_IS_TARGET1;

/* see if we've already found this port */
TAILQ_FOREACH(port, &sc->sc_ports_found, update)for((port) = ((&sc->sc_ports_found)->tqh_first); (port
) != ((void *)0); (port) = ((port)->update.tqe_next)) {
	if ((port->node_name == node_name) &&
	    (port->port_name == port_name) &&
	    (port->portid == portid)) {
		mtx_leave(&sc->sc_port_mtx);
		DPRINTF(QLA_D_PORT, "%s: already found port "
		    "%06x\n", DEVNAME(sc), portid);
		return (0);
	}
}
}

port = malloc(sizeof(*port), M_DEVBUF2, M_ZERO0x0008 | M_NOWAIT0x0002);
if (port == NULL((void *)0)) {
mtx_leave(&sc->sc_port_mtx);
printf("%s: failed to allocate a port structure\n",
    DEVNAME(sc)((sc)->sc_dev.dv_xname));
return (1);
}
port->location = QLA_LOCATION_PORT_ID(portid)(portid | (2 << 24));
port->port_name = port_name;
port->node_name = node_name;
port->loopid = loopid;
port->portid = portid;
port->flags = flags;

TAILQ_INSERT_TAIL(&sc->sc_ports, port, ports)do { (port)->ports.tqe_next = ((void *)0); (port)->ports
.tqe_prev = (&sc->sc_ports)->tqh_last; *(&sc->
sc_ports)->tqh_last = (port); (&sc->sc_ports)->tqh_last
 = &(port)->ports.tqe_next; } while (0);
sc->sc_targets[port->loopid] = port;
mtx_leave(&sc->sc_port_mtx);

DPRINTF(QLA_D_PORT, "%s: added logged in port %06x at %d\n",
   DEVNAME(sc), portid, loopid);
return (0);
422}

424int
425qla_attach(struct qla_softc *sc)
426{
struct scsibus_attach_args saa;
struct qla_init_cb *icb;
429#ifndef ISP_NOFIRMWARE
int (*loadfirmware)(struct qla_softc *) = NULL((void *)0);
431#endif
u_int16_t firmware_addr = 0;
u_int64_t dva;
int i, rv;

TAILQ_INIT(&sc->sc_ports)do { (&sc->sc_ports)->tqh_first = ((void *)0); (&
sc->sc_ports)->tqh_last = &(&sc->sc_ports)->
tqh_first; } while (0);
TAILQ_INIT(&sc->sc_ports_new)do { (&sc->sc_ports_new)->tqh_first = ((void *)0); (
&sc->sc_ports_new)->tqh_last = &(&sc->sc_ports_new
)->tqh_first; } while (0);
TAILQ_INIT(&sc->sc_ports_gone)do { (&sc->sc_ports_gone)->tqh_first = ((void *)0);
 (&sc->sc_ports_gone)->tqh_last = &(&sc->
sc_ports_gone)->tqh_first; } while (0);
TAILQ_INIT(&sc->sc_ports_found)do { (&sc->sc_ports_found)->tqh_first = ((void *)0)
; (&sc->sc_ports_found)->tqh_last = &(&sc->
sc_ports_found)->tqh_first; } while (0);

switch (sc->sc_isp_gen) {
case QLA_GEN_ISP2100:
sc->sc_mbox_base = QLA_MBOX_BASE_21000x10;
sc->sc_regs = &qla_regs_2100;
445#ifndef ISP_NOFIRMWARE
loadfirmware = qla_load_firmware_2100;
447#endif
firmware_addr = QLA_2100_CODE_ORG0x1000;
break;

case QLA_GEN_ISP2200:
sc->sc_mbox_base = QLA_MBOX_BASE_22000x10;
sc->sc_regs = &qla_regs_2200;
454#ifndef ISP_NOFIRMWARE
loadfirmware = qla_load_firmware_2200;
456#endif
firmware_addr = QLA_2200_CODE_ORG0x1000;
break;

case QLA_GEN_ISP23XX:
sc->sc_mbox_base = QLA_MBOX_BASE_23XX0x40;
sc->sc_regs = &qla_regs_23XX;
463#ifndef ISP_NOFIRMWARE
if (sc->sc_isp_type != QLA_ISP2322)
	loadfirmware = qla_load_firmware_2300;
466#endif
firmware_addr = QLA_2300_CODE_ORG0x0800;
break;

default:
printf("unknown isp type\n");
return (ENXIO6);
}

/* after reset, mbox registers 1-3 should contain the string "ISP   " */
if (qla_read_mbox(sc, 1) != 0x4953 ||
   qla_read_mbox(sc, 2) != 0x5020 ||
   qla_read_mbox(sc, 3) != 0x2020) {
/* try releasing the risc processor */
qla_host_cmd(sc, QLA_HOST_CMD_RELEASE0x3);
}

qla_host_cmd(sc, QLA_HOST_CMD_PAUSE0x2);
if (qla_softreset(sc) != 0) {
printf("softreset failed\n");
return (ENXIO6);
}

if (qla_read_nvram(sc) == 0) {
sc->sc_nvram_valid = 1;
if (sc->sc_port_name == 0)
	sc->sc_port_name = betoh64(sc->sc_nvram.port_name)(__uint64_t)(__builtin_constant_p(sc->sc_nvram.port_name) ?
 (__uint64_t)((((__uint64_t)(sc->sc_nvram.port_name) &
 0xff) << 56) | ((__uint64_t)(sc->sc_nvram.port_name
) & 0xff00ULL) << 40 | ((__uint64_t)(sc->sc_nvram
.port_name) & 0xff0000ULL) << 24 | ((__uint64_t)(sc
->sc_nvram.port_name) & 0xff000000ULL) << 8 | ((
__uint64_t)(sc->sc_nvram.port_name) & 0xff00000000ULL)
 >> 8 | ((__uint64_t)(sc->sc_nvram.port_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(sc->sc_nvram.port_name) &
 0xff000000000000ULL) >> 40 | ((__uint64_t)(sc->sc_nvram
.port_name) & 0xff00000000000000ULL) >> 56) : __swap64md
(sc->sc_nvram.port_name));
if (sc->sc_node_name == 0)
	sc->sc_node_name = betoh64(sc->sc_nvram.node_name)(__uint64_t)(__builtin_constant_p(sc->sc_nvram.node_name) ?
 (__uint64_t)((((__uint64_t)(sc->sc_nvram.node_name) &
 0xff) << 56) | ((__uint64_t)(sc->sc_nvram.node_name
) & 0xff00ULL) << 40 | ((__uint64_t)(sc->sc_nvram
.node_name) & 0xff0000ULL) << 24 | ((__uint64_t)(sc
->sc_nvram.node_name) & 0xff000000ULL) << 8 | ((
__uint64_t)(sc->sc_nvram.node_name) & 0xff00000000ULL)
 >> 8 | ((__uint64_t)(sc->sc_nvram.node_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(sc->sc_nvram.node_name) &
 0xff000000000000ULL) >> 40 | ((__uint64_t)(sc->sc_nvram
.node_name) & 0xff00000000000000ULL) >> 56) : __swap64md
(sc->sc_nvram.node_name));
}

if (sc->sc_port_name == 0)
sc->sc_port_name = QLA_DEFAULT_PORT_NAME0x400000007F000003ULL;

500#ifdef ISP_NOFIRMWARE
if (qla_verify_firmware(sc, firmware_addr)) {
printf("%s: no firmware loaded\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
return (ENXIO6);
}
505#else
if (loadfirmware && (loadfirmware)(sc)) {
printf("%s: firmware load failed\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
return (ENXIO6);
}
510#endif

/* execute firmware */
sc->sc_mbox[0] = QLA_MBOX_EXEC_FIRMWARE0x0002;
sc->sc_mbox[1] = firmware_addr;
515#ifdef ISP_NOFIRMWARE
sc->sc_mbox[2] = 1;
517#else
if (loadfirmware)
sc->sc_mbox[2] = 0;
else
sc->sc_mbox[2] = 1;
522#endif
if (qla_mbox(sc, 0x0007)) {
printf("ISP couldn't exec firmware: %x\n", sc->sc_mbox[0]);
return (ENXIO6);
}

delay(250000)(*delay_func)(250000);		/* from isp(4) */

sc->sc_mbox[0] = QLA_MBOX_ABOUT_FIRMWARE0x0008;
if (qla_mbox(sc, 0x0001)) {
printf("ISP not talking after firmware exec: %x\n",
    sc->sc_mbox[0]);
return (ENXIO6);
}
printf("%s: firmware rev %d.%d.%d, attrs 0x%x\n", DEVNAME(sc)((sc)->sc_dev.dv_xname),
   sc->sc_mbox[1], sc->sc_mbox[2], sc->sc_mbox[3], sc->sc_mbox[6]);

if (sc->sc_mbox[6] & QLA_FW_ATTR_EXPANDED_LUN0x0002)
sc->sc_expanded_lun = 1;
if (sc->sc_mbox[6] & QLA_FW_ATTR_FABRIC0x0004)
sc->sc_fabric = 1;
if (sc->sc_mbox[6] & QLA_FW_ATTR_2K_LOGINS0x0100)
sc->sc_2k_logins = 1;

/* work out how many ccbs to allocate */
sc->sc_mbox[0] = QLA_MBOX_GET_FIRMWARE_STATUS0x001F;
if (qla_mbox(sc, 0x0001)) {
printf("couldn't get firmware status: %x\n", sc->sc_mbox[0]);
return (ENXIO6);
}
sc->sc_maxcmds = sc->sc_mbox[2];

if (qla_alloc_ccbs(sc)) {
/* error already printed */
return (ENOMEM12);
}
sc->sc_scratch = qla_dmamem_alloc(sc, QLA_SCRATCH_SIZE0x1000);
if (sc->sc_scratch == NULL((void *)0)) {
printf("%s: unable to allocate scratch\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
goto free_ccbs;
}

/* build init buffer thing */
icb = (struct qla_init_cb *)QLA_DMA_KVA(sc->sc_scratch)((void *)(sc->sc_scratch)->qdm_kva);
memset(icb, 0, sizeof(*icb))__builtin_memset((icb), (0), (sizeof(*icb)));
icb->icb_version = QLA_ICB_VERSION1;
/* port and node names are big-endian in the icb */
htobem32(&icb->icb_portname_hi, sc->sc_port_name >> 32)(*(__uint32_t *)(&icb->icb_portname_hi) = (__uint32_t)
(__builtin_constant_p(sc->sc_port_name >> 32) ? (__uint32_t
)(((__uint32_t)(sc->sc_port_name >> 32) & 0xff) <<
| ((__uint32_t)(sc->sc_port_name >> 32) & 0xff00
) << 8 | ((__uint32_t)(sc->sc_port_name >> 32)
 & 0xff0000) >> 8 | ((__uint32_t)(sc->sc_port_name
 >> 32) & 0xff000000) >> 24) : __swap32md(sc->
sc_port_name >> 32)));
htobem32(&icb->icb_portname_lo, sc->sc_port_name)(*(__uint32_t *)(&icb->icb_portname_lo) = (__uint32_t)
(__builtin_constant_p(sc->sc_port_name) ? (__uint32_t)(((__uint32_t
)(sc->sc_port_name) & 0xff) << 24 | ((__uint32_t
)(sc->sc_port_name) & 0xff00) << 8 | ((__uint32_t
)(sc->sc_port_name) & 0xff0000) >> 8 | ((__uint32_t
)(sc->sc_port_name) & 0xff000000) >> 24) : __swap32md
(sc->sc_port_name)));
htobem32(&icb->icb_nodename_hi, sc->sc_node_name >> 32)(*(__uint32_t *)(&icb->icb_nodename_hi) = (__uint32_t)
(__builtin_constant_p(sc->sc_node_name >> 32) ? (__uint32_t
)(((__uint32_t)(sc->sc_node_name >> 32) & 0xff) <<
| ((__uint32_t)(sc->sc_node_name >> 32) & 0xff00
) << 8 | ((__uint32_t)(sc->sc_node_name >> 32)
 & 0xff0000) >> 8 | ((__uint32_t)(sc->sc_node_name
 >> 32) & 0xff000000) >> 24) : __swap32md(sc->
sc_node_name >> 32)));
htobem32(&icb->icb_nodename_lo, sc->sc_node_name)(*(__uint32_t *)(&icb->icb_nodename_lo) = (__uint32_t)
(__builtin_constant_p(sc->sc_node_name) ? (__uint32_t)(((__uint32_t
)(sc->sc_node_name) & 0xff) << 24 | ((__uint32_t
)(sc->sc_node_name) & 0xff00) << 8 | ((__uint32_t
)(sc->sc_node_name) & 0xff0000) >> 8 | ((__uint32_t
)(sc->sc_node_name) & 0xff000000) >> 24) : __swap32md
(sc->sc_node_name)));
if (sc->sc_nvram_valid) {
icb->icb_fw_options = sc->sc_nvram.fw_options;
icb->icb_max_frame_len = sc->sc_nvram.frame_payload_size;
icb->icb_max_alloc = sc->sc_nvram.max_iocb_allocation;
icb->icb_exec_throttle = sc->sc_nvram.execution_throttle;
icb->icb_retry_count = sc->sc_nvram.retry_count;
icb->icb_retry_delay = sc->sc_nvram.retry_delay;
icb->icb_hardaddr = sc->sc_nvram.hard_address;
icb->icb_inquiry_data = sc->sc_nvram.inquiry_data;
icb->icb_login_timeout = sc->sc_nvram.login_timeout;
icb->icb_xfwoptions = sc->sc_nvram.add_fw_options;
icb->icb_zfwoptions = sc->sc_nvram.special_options;
} else {
/* defaults copied from isp(4) */
icb->icb_retry_count = 3;
icb->icb_retry_delay = 5;
icb->icb_exec_throttle = htole16(16)((__uint16_t)(16));
icb->icb_max_alloc = htole16(256)((__uint16_t)(256));
icb->icb_max_frame_len = htole16(1024)((__uint16_t)(1024));
icb->icb_fw_options = htole16(QLA_ICB_FW_FAIRNESS |((__uint16_t)(0x0002 | 0x0100 | 0x0001 | 0x0004))
    QLA_ICB_FW_ENABLE_PDB_CHANGED | QLA_ICB_FW_HARD_ADDR |((__uint16_t)(0x0002 | 0x0100 | 0x0001 | 0x0004))
    QLA_ICB_FW_FULL_DUPLEX)((__uint16_t)(0x0002 | 0x0100 | 0x0001 | 0x0004));
}
/* target mode stuff that we don't care about */
icb->icb_lun_enables = 0;
icb->icb_cmd_count = 0;
icb->icb_notify_count = 0;
icb->icb_lun_timeout = 0;

/* "zero interrupt operation" */
icb->icb_int_delaytimer = 0;

icb->icb_req_out = 0;
icb->icb_resp_in = 0;
htolem16(&icb->icb_req_queue_len, sc->sc_maxcmds)(*(__uint16_t *)(&icb->icb_req_queue_len) = ((__uint16_t
)(sc->sc_maxcmds)));
htolem16(&icb->icb_resp_queue_len, sc->sc_maxcmds)(*(__uint16_t *)(&icb->icb_resp_queue_len) = ((__uint16_t
)(sc->sc_maxcmds)));
dva = QLA_DMA_DVA(sc->sc_requests)((u_int64_t)(sc->sc_requests)->qdm_map->dm_segs[0].ds_addr
);
htolem32(&icb->icb_req_queue_addr_lo, dva)(*(__uint32_t *)(&icb->icb_req_queue_addr_lo) = ((__uint32_t
)(dva)));
htolem32(&icb->icb_req_queue_addr_hi, dva >> 32)(*(__uint32_t *)(&icb->icb_req_queue_addr_hi) = ((__uint32_t
)(dva >> 32)));
dva = QLA_DMA_DVA(sc->sc_responses)((u_int64_t)(sc->sc_responses)->qdm_map->dm_segs[0].
ds_addr);
htolem32(&icb->icb_resp_queue_addr_lo, dva)(*(__uint32_t *)(&icb->icb_resp_queue_addr_lo) = ((__uint32_t
)(dva)));
htolem32(&icb->icb_resp_queue_addr_hi, dva >> 32)(*(__uint32_t *)(&icb->icb_resp_queue_addr_hi) = ((__uint32_t
)(dva >> 32)));

/* adjust firmware options a bit */
icb->icb_fw_options |= htole16(QLA_ICB_FW_EXTENDED_INIT_CB)((__uint16_t)(0x8000));
icb->icb_fw_options &= ~htole16(QLA_ICB_FW_FAST_POST)((__uint16_t)(0x0008));

sc->sc_mbox[0] = QLA_MBOX_INIT_FIRMWARE0x0060;
sc->sc_mbox[4] = 0;
sc->sc_mbox[5] = 0;
qla_mbox_putaddr(sc->sc_mbox, sc->sc_scratch);
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(sc->sc_scratch), 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (sizeof(*icb)), (0x04))
   sizeof(*icb), BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (sizeof(*icb)), (0x04));
rv = qla_mbox(sc, 0x00fd);
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(sc->sc_scratch), 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (sizeof(*icb)), (0x08))
   sizeof(*icb), BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (sizeof(*icb)), (0x08));

if (rv != 0) {
printf("%s: ISP firmware init failed: %x\n", DEVNAME(sc)((sc)->sc_dev.dv_xname),
    sc->sc_mbox[0]);
goto free_scratch;
}

/* enable some more notifications */
sc->sc_mbox[0] = QLA_MBOX_SET_FIRMWARE_OPTIONS0x0038;
sc->sc_mbox[1] = QLA_FW_OPTION1_ASYNC_LIP_F80x0001 |
   QLA_FW_OPTION1_ASYNC_LIP_RESET0x0002 |
   QLA_FW_OPTION1_ASYNC_LIP_ERROR0x0080 |
   QLA_FW_OPTION1_ASYNC_LOGIN_RJT0x0800;
sc->sc_mbox[2] = 0;
sc->sc_mbox[3] = 0;
if (qla_mbox(sc, 0x000f)) {
printf("%s: setting firmware options failed: %x\n",
    DEVNAME(sc)((sc)->sc_dev.dv_xname), sc->sc_mbox[0]);
goto free_scratch;
}

sc->sc_update_taskq = taskq_create(DEVNAME(sc)((sc)->sc_dev.dv_xname), 1, IPL_BIO0x3, 0);
task_set(&sc->sc_update_task, qla_do_update, sc);

/* wait a bit for link to come up so we can scan and attach devices */
for (i = 0; i < QLA_WAIT_FOR_LOOP10 * 10000; i++) {
u_int16_t isr, info;

delay(100)(*delay_func)(100);

if (qla_read_isr(sc, &isr, &info)((*(sc)->sc_regs->read_isr)((sc), (&isr), (&info
))) == 0)
	continue;

qla_handle_intr(sc, isr, info);

if (sc->sc_loop_up)
	break;
}

if (sc->sc_loop_up) {
qla_do_update(sc);
} else {
DPRINTF(QLA_D_PORT, "%s: loop still down, giving up\n",
    DEVNAME(sc));
}

saa.saa_adapter = &qla_switch;
saa.saa_adapter_softc = sc;
if (sc->sc_2k_logins) {
saa.saa_adapter_buswidth = QLA_2KL_BUSWIDTH0x800;
} else {
saa.saa_adapter_buswidth = QLA_BUSWIDTH0x100;
}
saa.saa_adapter_target = SDEV_NO_ADAPTER_TARGET0xffff;
saa.saa_luns = 8;
saa.saa_openings = sc->sc_maxcmds;
saa.saa_pool = &sc->sc_iopool;
saa.saa_wwpn = sc->sc_port_name;
saa.saa_wwnn = sc->sc_node_name;
if (saa.saa_wwnn == 0) {
/*
 * mask out the port number from the port name to get
 * the node name.
 */
saa.saa_wwnn = saa.saa_wwpn;
saa.saa_wwnn &= ~(0xfULL << 56);
}
saa.saa_quirks = saa.saa_flags = 0;

sc->sc_scsibus = (struct scsibus_softc *)config_found(&sc->sc_dev,config_found_sm((&sc->sc_dev), (&saa), (scsiprint)
, ((void *)0))
   &saa, scsiprint)config_found_sm((&sc->sc_dev), (&saa), (scsiprint)
, ((void *)0));

return(0);

703free_scratch:
qla_dmamem_free(sc, sc->sc_scratch);
705free_ccbs:
qla_free_ccbs(sc);
return (ENXIO6);
708}

710int
711qla_detach(struct qla_softc *sc, int flags)
712{
return (0);
714}

716struct qla_ccb *
717qla_handle_resp(struct qla_softc *sc, u_int16_t id)
718{
struct qla_ccb *ccb;
struct qla_iocb_status *status;
struct scsi_xfer *xs;
u_int32_t handle;
u_int8_t *entry;

ccb = NULL((void *)0);
entry = QLA_DMA_KVA(sc->sc_responses)((void *)(sc->sc_responses)->qdm_kva) + (id * QLA_QUEUE_ENTRY_SIZE64);

bus_dmamap_sync(sc->sc_dmat,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_responses)->qdm_map)), (id * 64), (64), (0x02))
   QLA_DMA_MAP(sc->sc_responses), id * QLA_QUEUE_ENTRY_SIZE,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_responses)->qdm_map)), (id * 64), (64), (0x02))
   QLA_QUEUE_ENTRY_SIZE, BUS_DMASYNC_POSTREAD)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_responses)->qdm_map)), (id * 64), (64), (0x02));

qla_dump_iocb(sc, entry);
switch (entry[0]) {
case QLA_IOCB_STATUS0x03:
status = (struct qla_iocb_status *)entry;
handle = status->handle;
if (handle > sc->sc_maxcmds) {
	panic("bad completed command handle: %d (> %d)",
	    handle, sc->sc_maxcmds);
}

ccb = &sc->sc_ccbs[handle];
xs = ccb->ccb_xs;
if (xs == NULL((void *)0)) {
	DPRINTF(QLA_D_INTR, "%s: got status for inactive"
	    " ccb %d\n", DEVNAME(sc), handle);
	ccb = NULL((void *)0);
	break;
}
if (xs->io != ccb) {
	panic("completed command handle doesn't match xs "
	    "(handle %d, ccb %p, xs->io %p)", handle, ccb,
	    xs->io);
}

if (xs->datalen > 0) {
	if (ccb->ccb_dmamap->dm_nsegs >
	    QLA_IOCB_SEGS_PER_CMD2) {
		bus_dmamap_sync(sc->sc_dmat,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x08
))
		    QLA_DMA_MAP(sc->sc_segments),(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x08
))
		    ccb->ccb_seg_offset,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x08
))
		    sizeof(*ccb->ccb_t4segs) *(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x08
))
		    ccb->ccb_dmamap->dm_nsegs,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x08
))
		    BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x08
));
	}

	bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ccb->
ccb_dmamap), (0), (ccb->ccb_dmamap->dm_mapsize), ((xs->
flags & 0x00800) ? 0x02 : 0x08))
	    ccb->ccb_dmamap->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ccb->
ccb_dmamap), (0), (ccb->ccb_dmamap->dm_mapsize), ((xs->
flags & 0x00800) ? 0x02 : 0x08))
	    (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_POSTREAD :(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ccb->
ccb_dmamap), (0), (ccb->ccb_dmamap->dm_mapsize), ((xs->
flags & 0x00800) ? 0x02 : 0x08))
	    BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (ccb->
ccb_dmamap), (0), (ccb->ccb_dmamap->dm_mapsize), ((xs->
flags & 0x00800) ? 0x02 : 0x08));
	bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (ccb
->ccb_dmamap));
}

xs->status = letoh16(status->scsi_status)((__uint16_t)(status->scsi_status));
switch (letoh16(status->completion)((__uint16_t)(status->completion))) {
case QLA_IOCB_STATUS_COMPLETE0x0000:
	if (letoh16(status->scsi_status)((__uint16_t)(status->scsi_status)) &
	    QLA_SCSI_STATUS_SENSE_VALID0x0200) {
		memcpy(&xs->sense, status->sense_data,__builtin_memcpy((&xs->sense), (status->sense_data)
, (sizeof(xs->sense)))
		    sizeof(xs->sense))__builtin_memcpy((&xs->sense), (status->sense_data)
, (sizeof(xs->sense)));
		xs->error = XS_SENSE1;
	} else {
		xs->error = XS_NOERROR0;
	}
	xs->resid = 0;
	break;

case QLA_IOCB_STATUS_DMA_ERROR0x0002:
	DPRINTF(QLA_D_INTR, "%s: dma error\n", DEVNAME(sc));
	/* set resid apparently? */
	break;

case QLA_IOCB_STATUS_RESET0x0004:
	DPRINTF(QLA_D_IO, "%s: reset destroyed command\n",
	    DEVNAME(sc));
	sc->sc_marker_required = 1;
	xs->error = XS_RESET8;
	break;

case QLA_IOCB_STATUS_ABORTED0x0005:
	DPRINTF(QLA_D_IO, "%s: aborted\n", DEVNAME(sc));
	sc->sc_marker_required = 1;
	xs->error = XS_DRIVER_STUFFUP2;
	break;

case QLA_IOCB_STATUS_TIMEOUT0x0006:
	DPRINTF(QLA_D_IO, "%s: command timed out\n",
	    DEVNAME(sc));
	xs->error = XS_TIMEOUT4;
	break;

case QLA_IOCB_STATUS_DATA_OVERRUN0x0007:
case QLA_IOCB_STATUS_DATA_UNDERRUN0x0015:
	xs->resid = letoh32(status->resid)((__uint32_t)(status->resid));
	xs->error = XS_NOERROR0;
	break;

case QLA_IOCB_STATUS_QUEUE_FULL0x001C:
	DPRINTF(QLA_D_IO, "%s: queue full\n", DEVNAME(sc));
	xs->error = XS_BUSY5;
	break;

case QLA_IOCB_STATUS_PORT_UNAVAIL0x0028:
case QLA_IOCB_STATUS_PORT_LOGGED_OUT0x0029:
case QLA_IOCB_STATUS_PORT_CHANGED0x002A:
	DPRINTF(QLA_D_IO, "%s: dev gone\n", DEVNAME(sc));
	xs->error = XS_SELTIMEOUT3;
	break;

default:
	DPRINTF(QLA_D_INTR, "%s: unexpected completion"
	    " status %x\n", DEVNAME(sc), status->completion);
	xs->error = XS_DRIVER_STUFFUP2;
	break;
}
break;

case QLA_IOCB_STATUS_CONT0x10:
DPRINTF(QLA_D_INTR, "%s: ignoring status continuation iocb\n",
    DEVNAME(sc));
break;

/* check for requests that bounce back? */
default:
DPRINTF(QLA_D_INTR, "%s: unexpected response entry type %x\n",
    DEVNAME(sc), entry[0]);
break;
}

return (ccb);
851}

853void
854qla_handle_intr(struct qla_softc *sc, u_int16_t isr, u_int16_t info)
855{
int i;
u_int16_t rspin;
struct qla_ccb *ccb;

switch (isr) {
case QLA_INT_TYPE_ASYNC2:
qla_async(sc, info);
break;

case QLA_INT_TYPE_IO3:
rspin = qla_queue_read(sc, sc->sc_regs->res_in)((*(sc)->sc_regs->read)((sc), (sc->sc_regs->res_in
)));
if (rspin == sc->sc_last_resp_id) {
	/* seems to happen a lot on 2200s when mbox commands
	 * complete but it doesn't want to give us the register
	 * semaphore, or something.
	 *
	 * if we're waiting on a mailbox command, don't ack
	 * the interrupt yet.
	 */
	if (sc->sc_mbox_pending) {
		DPRINTF(QLA_D_MBOX, "%s: ignoring premature"
		    " mbox int\n", DEVNAME(sc));
		return;
	}

	break;
}

if (sc->sc_responses == NULL((void *)0))
	break;

DPRINTF(QLA_D_IO, "%s: response queue %x=>%x\n",
    DEVNAME(sc), sc->sc_last_resp_id, rspin);

do {
	ccb = qla_handle_resp(sc, sc->sc_last_resp_id);
	if (ccb)
		scsi_done(ccb->ccb_xs);

	sc->sc_last_resp_id++;
	sc->sc_last_resp_id %= sc->sc_maxcmds;
} while (sc->sc_last_resp_id != rspin);

qla_queue_write(sc, sc->sc_regs->res_out, rspin)qla_write((sc), (sc->sc_regs->res_out), (rspin));
break;

case QLA_INT_TYPE_MBOX1:
mtx_enter(&sc->sc_mbox_mtx);
if (sc->sc_mbox_pending) {
	DPRINTF(QLA_D_MBOX, "%s: mbox response %x\n",
	    DEVNAME(sc), info);
	for (i = 0; i < nitems(sc->sc_mbox)(sizeof((sc->sc_mbox)) / sizeof((sc->sc_mbox)[0])); i++) {
		sc->sc_mbox[i] = qla_read_mbox(sc, i);
	}
	sc->sc_mbox_pending = 2;
	wakeup(sc->sc_mbox);
	mtx_leave(&sc->sc_mbox_mtx);
} else {
	mtx_leave(&sc->sc_mbox_mtx);
	DPRINTF(QLA_D_MBOX, "%s: unexpected mbox interrupt:"
	    " %x\n", DEVNAME(sc), info);
}
break;

default:
/* maybe log something? */
break;
}

qla_clear_isr(sc, isr);
926}

928int
929qla_intr(void *xsc)
930{
struct qla_softc *sc = xsc;
u_int16_t isr;
u_int16_t info;

if (qla_read_isr(sc, &isr, &info)((*(sc)->sc_regs->read_isr)((sc), (&isr), (&info
))) == 0)
return (0);

qla_handle_intr(sc, isr, info);
return (1);
940}

942int
943qla_scsi_probe(struct scsi_link *link)
944{
struct qla_softc *sc = link->bus->sb_adapter_softc;
int rv = 0;

mtx_enter(&sc->sc_port_mtx);
if (sc->sc_targets[link->target] == NULL((void *)0))
rv = ENXIO6;
else if (!ISSET(sc->sc_targets[link->target]->flags,((sc->sc_targets[link->target]->flags) & (1))
   QLA_PORT_FLAG_IS_TARGET)((sc->sc_targets[link->target]->flags) & (1)))
rv = ENXIO6;
else {
link->port_wwn = sc->sc_targets[link->target]->port_name;
link->node_wwn = sc->sc_targets[link->target]->node_name;
}
mtx_leave(&sc->sc_port_mtx);

return (rv);
961}

963void
964qla_scsi_cmd(struct scsi_xfer *xs)
965{
struct scsi_link	*link = xs->sc_link;
struct qla_softc	*sc = link->bus->sb_adapter_softc;
struct qla_ccb		*ccb;
struct qla_iocb_req34	*iocb;
struct qla_ccb_list	list;
u_int16_t		req, rspin;
int			offset, error, done;
bus_dmamap_t		dmap;

if (xs->cmdlen > sizeof(iocb->req_cdb)) {
DPRINTF(QLA_D_IO, "%s: cdb too big (%d)\n", DEVNAME(sc),
    xs->cmdlen);
memset(&xs->sense, 0, sizeof(xs->sense))__builtin_memset((&xs->sense), (0), (sizeof(xs->sense
)));
xs->sense.error_code = SSD_ERRCODE_VALID0x80 | SSD_ERRCODE_CURRENT0x70;
xs->sense.flags = SKEY_ILLEGAL_REQUEST0x05;
xs->sense.add_sense_code = 0x20;
xs->error = XS_SENSE1;
scsi_done(xs);
return;
}

ccb = xs->io;
dmap = ccb->ccb_dmamap;
if (xs->datalen > 0) {
error = bus_dmamap_load(sc->sc_dmat, dmap, xs->data,(*(sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (dmap)
, (xs->data), (xs->datalen), (((void *)0)), ((xs->flags
 & 0x00001) ? 0x0001 : 0x0000))
    xs->datalen, NULL, (xs->flags & SCSI_NOSLEEP) ?(*(sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (dmap)
, (xs->data), (xs->datalen), (((void *)0)), ((xs->flags
 & 0x00001) ? 0x0001 : 0x0000))
    BUS_DMA_NOWAIT : BUS_DMA_WAITOK)(*(sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (dmap)
, (xs->data), (xs->datalen), (((void *)0)), ((xs->flags
 & 0x00001) ? 0x0001 : 0x0000));
if (error) {
	xs->error = XS_DRIVER_STUFFUP2;
	scsi_done(xs);
	return;
}

bus_dmamap_sync(sc->sc_dmat, dmap, 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (dmap)
, (0), (dmap->dm_mapsize), ((xs->flags & 0x00800) ?
 0x01 : 0x04))
    dmap->dm_mapsize,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (dmap)
, (0), (dmap->dm_mapsize), ((xs->flags & 0x00800) ?
 0x01 : 0x04))
    (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD :(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (dmap)
, (0), (dmap->dm_mapsize), ((xs->flags & 0x00800) ?
 0x01 : 0x04))
    BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (dmap)
, (0), (dmap->dm_mapsize), ((xs->flags & 0x00800) ?
 0x01 : 0x04));
}

mtx_enter(&sc->sc_queue_mtx);

/* put in a sync marker if required */
if (sc->sc_marker_required) {
req = sc->sc_next_req_id++;
if (sc->sc_next_req_id == sc->sc_maxcmds)
	sc->sc_next_req_id = 0;

DPRINTF(QLA_D_IO, "%s: writing marker at request %d\n",
    DEVNAME(sc), req);
offset = (req * QLA_QUEUE_ENTRY_SIZE64);
iocb = QLA_DMA_KVA(sc->sc_requests)((void *)(sc->sc_requests)->qdm_kva) + offset;
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(sc->sc_requests),(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_requests)->qdm_map)), (offset), (64), (0x08))
    offset, QLA_QUEUE_ENTRY_SIZE, BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_requests)->qdm_map)), (offset), (64), (0x08));
qla_put_marker(sc, iocb);
qla_queue_write(sc, sc->sc_regs->req_in, sc->sc_next_req_id)qla_write((sc), (sc->sc_regs->req_in), (sc->sc_next_req_id
));
sc->sc_marker_required = 0;
}

req = sc->sc_next_req_id++;
if (sc->sc_next_req_id == sc->sc_maxcmds)
sc->sc_next_req_id = 0;

offset = (req * QLA_QUEUE_ENTRY_SIZE64);
iocb = QLA_DMA_KVA(sc->sc_requests)((void *)(sc->sc_requests)->qdm_kva) + offset;
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(sc->sc_requests), offset,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_requests)->qdm_map)), (offset), (64), (0x08))
   QLA_QUEUE_ENTRY_SIZE, BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_requests)->qdm_map)), (offset), (64), (0x08));

ccb->ccb_xs = xs;

DPRINTF(QLA_D_IO, "%s: writing cmd at request %d\n", DEVNAME(sc), req);
qla_put_cmd(sc, iocb, xs, ccb);

qla_queue_write(sc, sc->sc_regs->req_in, sc->sc_next_req_id)qla_write((sc), (sc->sc_regs->req_in), (sc->sc_next_req_id
));

if (!ISSET(xs->flags, SCSI_POLL)((xs->flags) & (0x00002))) {
mtx_leave(&sc->sc_queue_mtx);
return;
}

done = 0;
SIMPLEQ_INIT(&list)do { (&list)->sqh_first = ((void *)0); (&list)->
sqh_last = &(&list)->sqh_first; } while (0);
do {
u_int16_t isr, info;

delay(100)(*delay_func)(100);

if (qla_read_isr(sc, &isr, &info)((*(sc)->sc_regs->read_isr)((sc), (&isr), (&info
))) == 0) {
	continue;
}

if (isr != QLA_INT_TYPE_IO3) {
	qla_handle_intr(sc, isr, info);
	continue;
}

rspin = qla_queue_read(sc, sc->sc_regs->res_in)((*(sc)->sc_regs->read)((sc), (sc->sc_regs->res_in
)));
while (rspin != sc->sc_last_resp_id) {
	ccb = qla_handle_resp(sc, sc->sc_last_resp_id);

	sc->sc_last_resp_id++;
	if (sc->sc_last_resp_id == sc->sc_maxcmds)
		sc->sc_last_resp_id = 0;

	if (ccb != NULL((void *)0))
		SIMPLEQ_INSERT_TAIL(&list, ccb, ccb_link)do { (ccb)->ccb_link.sqe_next = ((void *)0); *(&list)->
sqh_last = (ccb); (&list)->sqh_last = &(ccb)->ccb_link
.sqe_next; } while (0);
	if (ccb == xs->io)
		done = 1;
}
qla_queue_write(sc, sc->sc_regs->res_out, rspin)qla_write((sc), (sc->sc_regs->res_out), (rspin));
qla_clear_isr(sc, isr);
} while (done == 0);

mtx_leave(&sc->sc_queue_mtx);

while ((ccb = SIMPLEQ_FIRST(&list)((&list)->sqh_first)) != NULL((void *)0)) {
SIMPLEQ_REMOVE_HEAD(&list, ccb_link)do { if (((&list)->sqh_first = (&list)->sqh_first
->ccb_link.sqe_next) == ((void *)0)) (&list)->sqh_last
 = &(&list)->sqh_first; } while (0);
scsi_done(ccb->ccb_xs);
}
1084}

1086u_int16_t
1087qla_read(struct qla_softc *sc, bus_size_t offset)
1088{
u_int16_t v;
v = bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset)((sc->sc_iot)->read_2((sc->sc_ioh), (offset)));
bus_space_barrier(sc->sc_iot, sc->sc_ioh, offset, 2,
   BUS_SPACE_BARRIER_READ0x01 | BUS_SPACE_BARRIER_WRITE0x02);
return (v);
1094}

1096void
1097qla_write(struct qla_softc *sc, bus_size_t offset, u_int16_t value)
1098{
bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, value)((sc->sc_iot)->write_2((sc->sc_ioh), (offset), (value
)));
bus_space_barrier(sc->sc_iot, sc->sc_ioh, offset, 2,
   BUS_SPACE_BARRIER_READ0x01 | BUS_SPACE_BARRIER_WRITE0x02);
1102}

1104u_int16_t
1105qla_read_mbox(struct qla_softc *sc, int mbox)
1106{
/* could range-check mboxes according to chip type? */
return (qla_read(sc, sc->sc_mbox_base + (mbox * 2)));
1109}

1111void
1112qla_write_mbox(struct qla_softc *sc, int mbox, u_int16_t value)
1113{
qla_write(sc, sc->sc_mbox_base + (mbox * 2), value);
1115}

1117void
1118qla_host_cmd(struct qla_softc *sc, u_int16_t cmd)
1119{
qla_write(sc, QLA_HOST_CMD_CTRL0xC0, cmd << QLA_HOST_CMD_SHIFT12);
1121}

1123#define MBOX_COMMAND_TIMEOUT4000	4000

1125int
1126qla_mbox(struct qla_softc *sc, int maskin)
1127{
int i;
int result = 0;
int rv;

sc->sc_mbox_pending = 1;
for (i = 0; i < nitems(sc->sc_mbox)(sizeof((sc->sc_mbox)) / sizeof((sc->sc_mbox)[0])); i++) {
if (maskin & (1 << i)) {
	qla_write_mbox(sc, i, sc->sc_mbox[i]);
}
}
qla_host_cmd(sc, QLA_HOST_CMD_SET_HOST_INT0x5);

if (sc->sc_scsibus != NULL((void *)0)) {
mtx_enter(&sc->sc_mbox_mtx);
sc->sc_mbox_pending = 1;
while (sc->sc_mbox_pending == 1) {
	msleep_nsec(sc->sc_mbox, &sc->sc_mbox_mtx, PRIBIO16,
	    "qlambox", INFSLP0xffffffffffffffffULL);
}
result = sc->sc_mbox[0];
sc->sc_mbox_pending = 0;
mtx_leave(&sc->sc_mbox_mtx);
return (result == QLA_MBOX_COMPLETE0x4000 ? 0 : result);
}

for (i = 0; i < MBOX_COMMAND_TIMEOUT4000 && result == 0; i++) {
u_int16_t isr, info;

delay(100)(*delay_func)(100);

if (qla_read_isr(sc, &isr, &info)((*(sc)->sc_regs->read_isr)((sc), (&isr), (&info
))) == 0)
	continue;

switch (isr) {
case QLA_INT_TYPE_MBOX1:
	result = info;
	break;

default:
	qla_handle_intr(sc, isr, info);
	break;
}
}

if (result == 0) {
/* timed out; do something? */
DPRINTF(QLA_D_MBOX, "%s: mbox timed out\n", DEVNAME(sc));
rv = 1;
} else {
for (i = 0; i < nitems(sc->sc_mbox)(sizeof((sc->sc_mbox)) / sizeof((sc->sc_mbox)[0])); i++) {
	sc->sc_mbox[i] = qla_read_mbox(sc, i);
}
rv = (result == QLA_MBOX_COMPLETE0x4000 ? 0 : result);
}

qla_clear_isr(sc, QLA_INT_TYPE_MBOX1);
sc->sc_mbox_pending = 0;
return (rv);
1186}

1188void
1189qla_mbox_putaddr(u_int16_t *mbox, struct qla_dmamem *mem)
1190{
mbox[2] = (QLA_DMA_DVA(mem)((u_int64_t)(mem)->qdm_map->dm_segs[0].ds_addr) >> 16) & 0xffff;
mbox[3] = (QLA_DMA_DVA(mem)((u_int64_t)(mem)->qdm_map->dm_segs[0].ds_addr) >> 0) & 0xffff;
mbox[6] = (QLA_DMA_DVA(mem)((u_int64_t)(mem)->qdm_map->dm_segs[0].ds_addr) >> 48) & 0xffff;
mbox[7] = (QLA_DMA_DVA(mem)((u_int64_t)(mem)->qdm_map->dm_segs[0].ds_addr) >> 32) & 0xffff;
1195}

1197int
1198qla_sns_req(struct qla_softc *sc, struct qla_dmamem *mem, int reqsize)
1199{
struct qla_sns_req_hdr *header;
uint64_t dva;
int rv;

memset(&sc->sc_mbox, 0, sizeof(sc->sc_mbox))__builtin_memset((&sc->sc_mbox), (0), (sizeof(sc->sc_mbox
)));
sc->sc_mbox[0] = QLA_MBOX_SEND_SNS0x006E;
sc->sc_mbox[1] = reqsize / 2;
qla_mbox_putaddr(sc->sc_mbox, mem);

header = QLA_DMA_KVA(mem)((void *)(mem)->qdm_kva);
htolem16(&header->resp_len, (QLA_DMA_LEN(mem) - reqsize) / 2)(*(__uint16_t *)(&header->resp_len) = ((__uint16_t)(((
(mem)->qdm_size) - reqsize) / 2)));
dva = QLA_DMA_DVA(mem)((u_int64_t)(mem)->qdm_map->dm_segs[0].ds_addr) + reqsize;
htolem32(&header->resp_addr_lo, dva)(*(__uint32_t *)(&header->resp_addr_lo) = ((__uint32_t
)(dva)));
htolem32(&header->resp_addr_hi, dva >> 32)(*(__uint32_t *)(&header->resp_addr_hi) = ((__uint32_t
)(dva >> 32)));
header->subcmd_len = htole16((reqsize - sizeof(*header)) / 2)((__uint16_t)((reqsize - sizeof(*header)) / 2));

bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(mem), 0, QLA_DMA_LEN(mem),(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (((mem)->qdm_size)), (0x01 | 0x04))
   BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (((mem)->qdm_size)), (0x01 | 0x04));
rv = qla_mbox(sc, 0x00cf);
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(mem), 0, QLA_DMA_LEN(mem),(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (((mem)->qdm_size)), (0x02 | 0x08))
   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (((mem)->qdm_size)), (0x02 | 0x08));

return (rv);
1223}

1225void
1226qla_set_ints(struct qla_softc *sc, int enabled)
1227{
u_int16_t v = enabled ? (QLA_INT_REQ0x8000 | QLA_RISC_INT_REQ0x0008) : 0;
qla_write(sc, QLA_INT_CTRL0x08, v);
1230}

1232int
1233qla_read_isr_1G(struct qla_softc *sc, u_int16_t *isr, u_int16_t *info)
1234{
u_int16_t int_status;

if (qla_read(sc, QLA_SEMA0x0C) & QLA_SEMA_LOCK0x0001) {
*info = qla_read_mbox(sc, 0);
if (*info & QLA_MBOX_HAS_STATUS0x4000)
	*isr = QLA_INT_TYPE_MBOX1;
else
	*isr = QLA_INT_TYPE_ASYNC2;
} else {
int_status = qla_read(sc, QLA_INT_STATUS0x0A);
if ((int_status & QLA_INT_REQ0x8000) == 0)
	return (0);

*isr = QLA_INT_TYPE_IO3;
}

return (1);
1252}

1254int
1255qla_read_isr_2G(struct qla_softc *sc, u_int16_t *isr, u_int16_t *info)
1256{
u_int32_t v;

if ((qla_read(sc, QLA_INT_STATUS0x0A) & QLA_INT_REQ0x8000) == 0)
return (0);

v = bus_space_read_4(sc->sc_iot, sc->sc_ioh, QLA_RISC_STATUS_LOW)((sc->sc_iot)->read_4((sc->sc_ioh), (0x18)));
bus_space_barrier(sc->sc_iot, sc->sc_ioh, QLA_RISC_STATUS_LOW0x18,
   4, BUS_SPACE_BARRIER_READ0x01 | BUS_SPACE_BARRIER_WRITE0x02);

switch (v & QLA_INT_STATUS_MASK0x00FF) {
case QLA_23XX_INT_ROM_MBOX0x01:
case QLA_23XX_INT_ROM_MBOX_FAIL0x02:
case QLA_23XX_INT_MBOX0x10:
case QLA_23XX_INT_MBOX_FAIL0x11:
*isr = QLA_INT_TYPE_MBOX1;
break;

case QLA_23XX_INT_ASYNC0x12:
*isr = QLA_INT_TYPE_ASYNC2;
break;

case QLA_23XX_INT_RSPQ0x13:
*isr = QLA_INT_TYPE_IO3;
break;

default:
*isr = QLA_INT_TYPE_OTHER4;
break;
}

*info = (v >> QLA_INT_INFO_SHIFT16);

return (1);
1290}

1292void
1293qla_clear_isr(struct qla_softc *sc, u_int16_t isr)
1294{
qla_host_cmd(sc, QLA_HOST_CMD_CLR_RISC_INT0x7);
switch (isr) {
case QLA_INT_TYPE_MBOX1:
case QLA_INT_TYPE_ASYNC2:
qla_write(sc, QLA_SEMA0x0C, 0);
break;
default:
break;
}
1304}

1306u_int16_t
1307qla_read_queue_2100(struct qla_softc *sc, bus_size_t queue)
1308{
u_int16_t a, b, i;

for (i = 0; i < 1000; i++) {
a = qla_read(sc, queue);
b = qla_read(sc, queue);

if (a == b)
	return (a);
}

DPRINTF(QLA_D_INTR, "%s: queue ptr unstable\n", DEVNAME(sc));

return (a);
1322}

1324int
1325qla_softreset(struct qla_softc *sc)
1326{
int i;
qla_set_ints(sc, 0);

/* reset */
qla_write(sc, QLA_CTRL_STATUS0x06, QLA_CTRL_RESET0x0001);
delay(100)(*delay_func)(100);
/* clear data and control dma engines? */

/* wait for soft reset to clear */
for (i = 0; i < 1000; i++) {
if ((qla_read(sc, QLA_CTRL_STATUS0x06) & QLA_CTRL_RESET0x0001) == 0)
	break;

delay(100)(*delay_func)(100);
}

if (i == 1000) {
DPRINTF(QLA_D_INTR, "%s: reset didn't clear\n", DEVNAME(sc));
qla_set_ints(sc, 0);
return (ENXIO6);
}

/* reset FPM */
qla_write(sc, QLA_CTRL_STATUS0x06, QLA_CTRL_FPM0_REGS0x0020);
qla_write(sc, QLA_FPM_DIAG0x96, QLA_FPM_RESET0x0100);
qla_write(sc, QLA_FPM_DIAG0x96, 0);	/* isp(4) doesn't do this? */
qla_write(sc, QLA_CTRL_STATUS0x06, QLA_CTRL_RISC_REGS0x0000);

/* reset risc processor */
qla_host_cmd(sc, QLA_HOST_CMD_RESET0x1);
delay(100)(*delay_func)(100);
qla_write(sc, QLA_SEMA0x0C, 0);
qla_host_cmd(sc, QLA_HOST_CMD_MASK_PARITY0x4);	/* from isp(4) */
qla_host_cmd(sc, QLA_HOST_CMD_RELEASE0x3);

/* reset queue pointers */
qla_queue_write(sc, sc->sc_regs->req_in, 0)qla_write((sc), (sc->sc_regs->req_in), (0));
qla_queue_write(sc, sc->sc_regs->req_out, 0)qla_write((sc), (sc->sc_regs->req_out), (0));
qla_queue_write(sc, sc->sc_regs->res_in, 0)qla_write((sc), (sc->sc_regs->res_in), (0));
qla_queue_write(sc, sc->sc_regs->res_out, 0)qla_write((sc), (sc->sc_regs->res_out), (0));

qla_set_ints(sc, 1);
/* isp(4) sends QLA_HOST_CMD_BIOS here.. not documented? */

/* do a basic mailbox operation to check we're alive */
sc->sc_mbox[0] = QLA_MBOX_NOP0x0000;
if (qla_mbox(sc, 0x0001)) {
DPRINTF(QLA_D_INTR, "%s: ISP not responding after reset\n",
    DEVNAME(sc));
return (ENXIO6);
}

return (0);
1380}

1382void
1383qla_update_topology(struct qla_softc *sc)
1384{
sc->sc_mbox[0] = QLA_MBOX_GET_LOOP_ID0x0020;
if (qla_mbox(sc, 0x0001)) {
DPRINTF(QLA_D_PORT, "%s: unable to get loop id\n", DEVNAME(sc));
sc->sc_topology = QLA_TOPO_N_PORT_NO_TARGET4;
} else {
sc->sc_topology = sc->sc_mbox[6];
sc->sc_loop_id = sc->sc_mbox[1];

switch (sc->sc_topology) {
case QLA_TOPO_NL_PORT0:
case QLA_TOPO_N_PORT2:
	DPRINTF(QLA_D_PORT, "%s: loop id %d\n", DEVNAME(sc),
	    sc->sc_loop_id);
	break;

case QLA_TOPO_FL_PORT1:
case QLA_TOPO_F_PORT3:
	sc->sc_port_id = sc->sc_mbox[2] |
	    (sc->sc_mbox[3] << 16);
	DPRINTF(QLA_D_PORT, "%s: fabric port id %06x\n",
	    DEVNAME(sc), sc->sc_port_id);
	break;

case QLA_TOPO_N_PORT_NO_TARGET4:
default:
	DPRINTF(QLA_D_PORT, "%s: not connected\n", DEVNAME(sc));
	break;
}

switch (sc->sc_topology) {
case QLA_TOPO_NL_PORT0:
case QLA_TOPO_FL_PORT1:
	sc->sc_loop_max_id = 126;
	break;

case QLA_TOPO_N_PORT2:
	sc->sc_loop_max_id = 2;
	break;

default:
	sc->sc_loop_max_id = 0;
	break;
}
}
1429}

1431int
1432qla_update_fabric(struct qla_softc *sc)
1433{
struct qla_sns_rft_id *rft;

if (sc->sc_fabric == 0)
return (0);

switch (sc->sc_topology) {
case QLA_TOPO_F_PORT3:
case QLA_TOPO_FL_PORT1:
break;

default:
return (0);
}

/* get the name server's port db entry */
sc->sc_mbox[0] = QLA_MBOX_GET_PORT_DB0x0064;
if (sc->sc_2k_logins) {
sc->sc_mbox[1] = QLA_F_PORT_HANDLE0x7E;
} else {
sc->sc_mbox[1] = QLA_F_PORT_HANDLE0x7E << 8;
}
qla_mbox_putaddr(sc->sc_mbox, sc->sc_scratch);
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(sc->sc_scratch), 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (sizeof(struct qla_get_port_db
)), (0x01))
   sizeof(struct qla_get_port_db), BUS_DMASYNC_PREREAD)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (sizeof(struct qla_get_port_db
)), (0x01));
if (qla_mbox(sc, 0x00cf)) {
DPRINTF(QLA_D_PORT, "%s: get port db for SNS failed: %x\n",
    DEVNAME(sc), sc->sc_mbox[0]);
sc->sc_sns_port_name = 0;
} else {
struct qla_get_port_db *pdb;
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(sc->sc_scratch), 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (sizeof(struct qla_get_port_db
)), (0x02))
    sizeof(struct qla_get_port_db), BUS_DMASYNC_POSTREAD)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (sizeof(struct qla_get_port_db
)), (0x02));
pdb = QLA_DMA_KVA(sc->sc_scratch)((void *)(sc->sc_scratch)->qdm_kva);
DPRINTF(QLA_D_PORT, "%s: SNS port name %llx\n", DEVNAME(sc),
    betoh64(pdb->port_name));
sc->sc_sns_port_name = betoh64(pdb->port_name)(__uint64_t)(__builtin_constant_p(pdb->port_name) ? (__uint64_t
)((((__uint64_t)(pdb->port_name) & 0xff) << 56) |
 ((__uint64_t)(pdb->port_name) & 0xff00ULL) << 40
 | ((__uint64_t)(pdb->port_name) & 0xff0000ULL) <<
| ((__uint64_t)(pdb->port_name) & 0xff000000ULL) <<
| ((__uint64_t)(pdb->port_name) & 0xff00000000ULL) >>
| ((__uint64_t)(pdb->port_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(pdb->port_name) & 0xff000000000000ULL
) >> 40 | ((__uint64_t)(pdb->port_name) & 0xff00000000000000ULL
) >> 56) : __swap64md(pdb->port_name));
}

/*
* register fc4 types with the fabric
* some switches do this automatically, but apparently
* some don't.
*/
rft = QLA_DMA_KVA(sc->sc_scratch)((void *)(sc->sc_scratch)->qdm_kva);
memset(rft, 0, sizeof(*rft) + sizeof(struct qla_sns_req_hdr))__builtin_memset((rft), (0), (sizeof(*rft) + sizeof(struct qla_sns_req_hdr
)));
rft->subcmd = htole16(QLA_SNS_RFT_ID)((__uint16_t)(0x0217));
rft->max_word = htole16(sizeof(struct qla_sns_req_hdr) / 4)((__uint16_t)(sizeof(struct qla_sns_req_hdr) / 4));
rft->port_id = htole32(sc->sc_port_id)((__uint32_t)(sc->sc_port_id));
rft->fc4_types[0] = htole32(1 << QLA_FC4_SCSI)((__uint32_t)(1 << 8));
if (qla_sns_req(sc, sc->sc_scratch, sizeof(*rft))) {
DPRINTF(QLA_D_PORT, "%s: RFT_ID failed\n", DEVNAME(sc));
/* we might be able to continue after this fails */
}

return (1);
1489}

1491int
1492qla_get_port_name_list(struct qla_softc *sc, u_int32_t match)
1493{
int i;
struct qla_port_name_list *l;
struct qla_fc_port *port;

sc->sc_mbox[0] = QLA_MBOX_GET_PORT_NAME_LIST0x0075;
sc->sc_mbox[1] = 0x08;	/* include initiators */
if (match & QLA_LOCATION_FABRIC(2 << 24))
sc->sc_mbox[1] |= 0x02;	 /* return all loop ids */
qla_mbox_putaddr(sc->sc_mbox, sc->sc_scratch);
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(sc->sc_scratch), 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (((sc->sc_scratch)->qdm_size
)), (0x01))
   QLA_DMA_LEN(sc->sc_scratch), BUS_DMASYNC_PREREAD)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (((sc->sc_scratch)->qdm_size
)), (0x01));
if (qla_mbox(sc, 0x04f)) {
DPRINTF(QLA_D_PORT, "%s: get port name list failed: %x\n",
    DEVNAME(sc), sc->sc_mbox[0]);
return (1);
}
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(sc->sc_scratch), 0,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (((sc->sc_scratch)->qdm_size
)), (0x01))
   QLA_DMA_LEN(sc->sc_scratch), BUS_DMASYNC_PREREAD)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_scratch)->qdm_map)), (0), (((sc->sc_scratch)->qdm_size
)), (0x01));

i = 0;
l = QLA_DMA_KVA(sc->sc_scratch)((void *)(sc->sc_scratch)->qdm_kva);
mtx_enter(&sc->sc_port_mtx);
while (i * sizeof(*l) < sc->sc_mbox[1]) {
u_int16_t loopid;
u_int32_t loc;

loopid = letoh16(l[i].loop_id)((__uint16_t)(l[i].loop_id));
/* skip special ports */
switch (loopid) {
case QLA_F_PORT_HANDLE0x7E:
case QLA_SNS_HANDLE0x80:
case QLA_FABRIC_CTRL_HANDLE0x7F:
	loc = 0;
	break;
default:
	if (loopid <= sc->sc_loop_max_id) {
		loc = QLA_LOCATION_LOOP_ID(loopid)(loopid | (1 << 24));
	} else {
		/*
		 * we don't have the port id here, so just
		 * indicate it's a fabric port.
		 */
		loc = QLA_LOCATION_FABRIC(2 << 24);
	}
}

if (match & loc) {
	port = malloc(sizeof(*port), M_DEVBUF2, M_ZERO0x0008 |
	    M_NOWAIT0x0002);
	if (port == NULL((void *)0)) {
		printf("%s: failed to allocate port struct\n",
		    DEVNAME(sc)((sc)->sc_dev.dv_xname));
		break;
	}
	port->location = loc;
	port->loopid = loopid;
	port->port_name = letoh64(l[i].port_name)((__uint64_t)(l[i].port_name));
	DPRINTF(QLA_D_PORT, "%s: loop id %d, port name %llx\n",
	    DEVNAME(sc), port->loopid, port->port_name);
	TAILQ_INSERT_TAIL(&sc->sc_ports_found, port, update)do { (port)->update.tqe_next = ((void *)0); (port)->update
.tqe_prev = (&sc->sc_ports_found)->tqh_last; *(&
sc->sc_ports_found)->tqh_last = (port); (&sc->sc_ports_found
)->tqh_last = &(port)->update.tqe_next; } while (0);
}
i++;
}
mtx_leave(&sc->sc_port_mtx);

return (0);
1560}

1562struct qla_fc_port *
1563qla_next_fabric_port(struct qla_softc *sc, u_int32_t *firstport,
  u_int32_t *lastport)
1565{
struct qla_sns_ga_nxt *ga;
struct qla_sns_ga_nxt_resp *gar;
struct qla_fc_port *fport;
int result;

/* get the next port from the fabric nameserver */
ga = QLA_DMA_KVA(sc->sc_scratch)((void *)(sc->sc_scratch)->qdm_kva);
memset(ga, 0, sizeof(*ga) + sizeof(*gar))__builtin_memset((ga), (0), (sizeof(*ga) + sizeof(*gar)));
ga->subcmd = htole16(QLA_SNS_GA_NXT)((__uint16_t)(0x0100));
ga->max_word = htole16(sizeof(*gar) / 4)((__uint16_t)(sizeof(*gar) / 4));
ga->port_id = htole32(*lastport)((__uint32_t)(*lastport));
18
←
Assigned value is garbage or undefined
result = qla_sns_req(sc, sc->sc_scratch, sizeof(*ga));
if (result) {
DPRINTF(QLA_D_PORT, "%s: GA_NXT %06x failed: %x\n", DEVNAME(sc),
    *lastport, result);
*lastport = 0xffffffff;
return (NULL((void *)0));
}

gar = (struct qla_sns_ga_nxt_resp *)(ga + 1);
/* if the response is all zeroes, try again */
if (gar->port_type_id == 0 && gar->port_name == 0 &&
   gar->node_name == 0) {
DPRINTF(QLA_D_PORT, "%s: GA_NXT returned junk\n", DEVNAME(sc));
return (NULL((void *)0));
}

/* are we back at the start? */
*lastport = betoh32(gar->port_type_id)(__uint32_t)(__builtin_constant_p(gar->port_type_id) ? (__uint32_t
)(((__uint32_t)(gar->port_type_id) & 0xff) << 24
 | ((__uint32_t)(gar->port_type_id) & 0xff00) <<
| ((__uint32_t)(gar->port_type_id) & 0xff0000) >>
| ((__uint32_t)(gar->port_type_id) & 0xff000000) >>
 24) : __swap32md(gar->port_type_id)) & 0xffffff;
if (*lastport == *firstport) {
*lastport = 0xffffffff;
return (NULL((void *)0));
}
if (*firstport == 0xffffffff)
*firstport = *lastport;

DPRINTF(QLA_D_PORT, "%s: GA_NXT: port id: %06x, wwpn %llx, wwnn %llx\n",
   DEVNAME(sc), *lastport, betoh64(gar->port_name),
   betoh64(gar->node_name));

/* don't try to log in to ourselves */
if (*lastport == sc->sc_port_id) {
return (NULL((void *)0));
}

fport = malloc(sizeof(*fport), M_DEVBUF2, M_ZERO0x0008 | M_NOWAIT0x0002);
if (fport == NULL((void *)0)) {
printf("%s: failed to allocate a port struct\n",
    DEVNAME(sc)((sc)->sc_dev.dv_xname));
*lastport = 0xffffffff;
return (NULL((void *)0));
}
fport->port_name = betoh64(gar->port_name)(__uint64_t)(__builtin_constant_p(gar->port_name) ? (__uint64_t
)((((__uint64_t)(gar->port_name) & 0xff) << 56) |
 ((__uint64_t)(gar->port_name) & 0xff00ULL) << 40
 | ((__uint64_t)(gar->port_name) & 0xff0000ULL) <<
| ((__uint64_t)(gar->port_name) & 0xff000000ULL) <<
| ((__uint64_t)(gar->port_name) & 0xff00000000ULL) >>
| ((__uint64_t)(gar->port_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(gar->port_name) & 0xff000000000000ULL
) >> 40 | ((__uint64_t)(gar->port_name) & 0xff00000000000000ULL
) >> 56) : __swap64md(gar->port_name));
fport->node_name = betoh64(gar->node_name)(__uint64_t)(__builtin_constant_p(gar->node_name) ? (__uint64_t
)((((__uint64_t)(gar->node_name) & 0xff) << 56) |
 ((__uint64_t)(gar->node_name) & 0xff00ULL) << 40
 | ((__uint64_t)(gar->node_name) & 0xff0000ULL) <<
| ((__uint64_t)(gar->node_name) & 0xff000000ULL) <<
| ((__uint64_t)(gar->node_name) & 0xff00000000ULL) >>
| ((__uint64_t)(gar->node_name) & 0xff0000000000ULL
) >> 24 | ((__uint64_t)(gar->node_name) & 0xff000000000000ULL
) >> 40 | ((__uint64_t)(gar->node_name) & 0xff00000000000000ULL
) >> 56) : __swap64md(gar->node_name));
fport->location = QLA_LOCATION_PORT_ID(*lastport)(*lastport | (2 << 24));
fport->portid = *lastport;
return (fport);
1623}

1625int
1626qla_fabric_plogi(struct qla_softc *sc, struct qla_fc_port *port)
1627{
int loopid, mboxin, err;
u_int32_t id;

loopid = 0;
1632retry:
if (port->loopid == 0) {
mtx_enter(&sc->sc_port_mtx);
loopid = qla_get_loop_id(sc, loopid);
mtx_leave(&sc->sc_port_mtx);
if (loopid == -1) {
	DPRINTF(QLA_D_PORT, "%s: ran out of loop ids\n",
	    DEVNAME(sc));
	return (1);
}
}

mboxin = 0x000f;
sc->sc_mbox[0] = QLA_MBOX_FABRIC_PLOGI0x006F;
sc->sc_mbox[2] = (port->portid >> 16) & 0xff;
sc->sc_mbox[3] = port->portid & 0xffff;
if (sc->sc_2k_logins) {
sc->sc_mbox[1] = loopid;
sc->sc_mbox[10] = 0;
mboxin |= (1 << 10);
} else {
sc->sc_mbox[1] = loopid << 8;
}

err = qla_mbox(sc, mboxin);
switch (err) {
case 0:
DPRINTF(QLA_D_PORT, "%s: logged in to %06x as %d\n",
    DEVNAME(sc), port->portid, loopid);
port->flags &= ~QLA_PORT_FLAG_NEEDS_LOGIN2;
port->loopid = loopid;
return (0);

case QLA_MBOX_PORT_USED0x4007:
DPRINTF(QLA_D_PORT, "%s: already logged in to %06x as %d\n",
    DEVNAME(sc), port->portid, sc->sc_mbox[1]);
port->flags &= ~QLA_PORT_FLAG_NEEDS_LOGIN2;
port->loopid = sc->sc_mbox[1];
return (0);

case QLA_MBOX_LOOP_USED0x4008:
id = (sc->sc_mbox[1] << 16) | sc->sc_mbox[2];
if (qla_add_logged_in_port(sc, loopid, id)) {
	return (1);
}
port->loopid = 0;
loopid++;
goto retry;

default:
DPRINTF(QLA_D_PORT, "%s: error %x logging in to port %06x\n",
    DEVNAME(sc), err, port->portid);
port->loopid = 0;
return (1);
}
1687}

1689void
1690qla_fabric_plogo(struct qla_softc *sc, struct qla_fc_port *port)
1691{
int mboxin = 0x0003;
sc->sc_mbox[0] = QLA_MBOX_FABRIC_PLOGO0x0071;
if (sc->sc_2k_logins) {
sc->sc_mbox[1] = port->loopid;
sc->sc_mbox[10] = 0;
mboxin |= (1 << 10);
} else {
sc->sc_mbox[1] = port->loopid << 8;
}

if (qla_mbox(sc, mboxin))
DPRINTF(QLA_D_PORT, "%s: loop id %d logout failed\n",
    DEVNAME(sc), port->loopid);
1705}

1707void
1708qla_update_done(struct qla_softc *sc, int task)
1709{
atomic_clearbits_intx86_atomic_clearbits_u32(&sc->sc_update_tasks, task);
1711}

1713void
1714qla_update_start(struct qla_softc *sc, int task)
1715{
atomic_setbits_intx86_atomic_setbits_u32(&sc->sc_update_tasks, task);
task_add(sc->sc_update_taskq, &sc->sc_update_task);
1718}

1720void
1721qla_clear_port_lists(struct qla_softc *sc)
1722{
struct qla_fc_port *p;

while (!TAILQ_EMPTY(&sc->sc_ports_found)(((&sc->sc_ports_found)->tqh_first) == ((void *)0))) {
p = TAILQ_FIRST(&sc->sc_ports_found)((&sc->sc_ports_found)->tqh_first);
TAILQ_REMOVE(&sc->sc_ports_found, p, update)do { if (((p)->update.tqe_next) != ((void *)0)) (p)->update
.tqe_next->update.tqe_prev = (p)->update.tqe_prev; else
 (&sc->sc_ports_found)->tqh_last = (p)->update.tqe_prev
; *(p)->update.tqe_prev = (p)->update.tqe_next; ((p)->
update.tqe_prev) = ((void *)-1); ((p)->update.tqe_next) = (
(void *)-1); } while (0);
free(p, M_DEVBUF2, sizeof *p);
}

while (!TAILQ_EMPTY(&sc->sc_ports_new)(((&sc->sc_ports_new)->tqh_first) == ((void *)0))) {
p = TAILQ_FIRST(&sc->sc_ports_new)((&sc->sc_ports_new)->tqh_first);
TAILQ_REMOVE(&sc->sc_ports_new, p, update)do { if (((p)->update.tqe_next) != ((void *)0)) (p)->update
.tqe_next->update.tqe_prev = (p)->update.tqe_prev; else
 (&sc->sc_ports_new)->tqh_last = (p)->update.tqe_prev
; *(p)->update.tqe_prev = (p)->update.tqe_next; ((p)->
update.tqe_prev) = ((void *)-1); ((p)->update.tqe_next) = (
(void *)-1); } while (0);
free(p, M_DEVBUF2, sizeof *p);
}

while (!TAILQ_EMPTY(&sc->sc_ports_gone)(((&sc->sc_ports_gone)->tqh_first) == ((void *)0))) {
p = TAILQ_FIRST(&sc->sc_ports_gone)((&sc->sc_ports_gone)->tqh_first);
TAILQ_REMOVE(&sc->sc_ports_gone, p, update)do { if (((p)->update.tqe_next) != ((void *)0)) (p)->update
.tqe_next->update.tqe_prev = (p)->update.tqe_prev; else
 (&sc->sc_ports_gone)->tqh_last = (p)->update.tqe_prev
; *(p)->update.tqe_prev = (p)->update.tqe_next; ((p)->
update.tqe_prev) = ((void *)-1); ((p)->update.tqe_next) = (
(void *)-1); } while (0);
}
1741}

1743void
1744qla_do_update(void *xsc)
1745{
struct qla_softc *sc = xsc;
int firstport, lastport;
struct qla_fc_port *port, *fport;

DPRINTF(QLA_D_PORT, "%s: updating\n", DEVNAME(sc));
while (sc->sc_update_tasks != 0) {
1
Assuming field 'sc_update_tasks' is not equal to 0→
2
←
Loop condition is true.  Entering loop body→
if (sc->sc_update_tasks & QLA_UPDATE_TASK_CLEAR_ALL0x00000001) {
3
←
Assuming the condition is false→
4
←
Taking false branch→
	TAILQ_HEAD(, qla_fc_port)struct { struct qla_fc_port *tqh_first; struct qla_fc_port **
tqh_last; } detach;
	DPRINTF(QLA_D_PORT, "%s: detaching everything\n",
	    DEVNAME(sc));

	mtx_enter(&sc->sc_port_mtx);
	qla_clear_port_lists(sc);
	TAILQ_INIT(&detach)do { (&detach)->tqh_first = ((void *)0); (&detach)
->tqh_last = &(&detach)->tqh_first; } while (0);
	TAILQ_CONCAT(&detach, &sc->sc_ports, ports)do { if (!(((&sc->sc_ports)->tqh_first) == ((void *
)0))) { *(&detach)->tqh_last = (&sc->sc_ports)->
tqh_first; (&sc->sc_ports)->tqh_first->ports.tqe_prev
 = (&detach)->tqh_last; (&detach)->tqh_last = (
&sc->sc_ports)->tqh_last; do { ((&sc->sc_ports
))->tqh_first = ((void *)0); ((&sc->sc_ports))->
tqh_last = &((&sc->sc_ports))->tqh_first; } while
 (0); } } while (0);
	mtx_leave(&sc->sc_port_mtx);

	while (!TAILQ_EMPTY(&detach)(((&detach)->tqh_first) == ((void *)0))) {
		port = TAILQ_FIRST(&detach)((&detach)->tqh_first);
		TAILQ_REMOVE(&detach, port, ports)do { if (((port)->ports.tqe_next) != ((void *)0)) (port)->
ports.tqe_next->ports.tqe_prev = (port)->ports.tqe_prev
; else (&detach)->tqh_last = (port)->ports.tqe_prev
; *(port)->ports.tqe_prev = (port)->ports.tqe_next; ((port
)->ports.tqe_prev) = ((void *)-1); ((port)->ports.tqe_next
) = ((void *)-1); } while (0);
		if (port->flags & QLA_PORT_FLAG_IS_TARGET1) {
			scsi_detach_target(sc->sc_scsibus,
			    port->loopid, DETACH_FORCE0x01 |
			    DETACH_QUIET0x02);
		}
		sc->sc_targets[port->loopid] = NULL((void *)0);
		if (port->location & QLA_LOCATION_FABRIC(2 << 24))
			qla_fabric_plogo(sc, port);

		free(port, M_DEVBUF2, sizeof *port);
	}

	qla_update_done(sc, QLA_UPDATE_TASK_CLEAR_ALL0x00000001);
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_SOFTRESET0x00000002) {
5
←
Assuming the condition is false→
6
←
Taking false branch→
	/* what no */
	qla_update_done(sc, QLA_UPDATE_TASK_SOFTRESET0x00000002);
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_UPDATE_TOPO0x00000004) {
7
←
Assuming the condition is false→
8
←
Taking false branch→
	DPRINTF(QLA_D_PORT, "%s: updating topology\n",
	    DEVNAME(sc));
	qla_update_topology(sc);
	qla_update_done(sc, QLA_UPDATE_TASK_UPDATE_TOPO0x00000004);
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_GET_PORT_LIST0x00000008) {
9
←
Assuming the condition is false→
10
←
Taking false branch→
	DPRINTF(QLA_D_PORT, "%s: getting port name list\n",
	    DEVNAME(sc));
	mtx_enter(&sc->sc_port_mtx);
	qla_clear_port_lists(sc);
	mtx_leave(&sc->sc_port_mtx);

	qla_get_port_name_list(sc, QLA_LOCATION_LOOP(1 << 24) |
	    QLA_LOCATION_FABRIC(2 << 24));
	mtx_enter(&sc->sc_port_mtx);
	TAILQ_FOREACH(port, &sc->sc_ports, ports)for((port) = ((&sc->sc_ports)->tqh_first); (port) !=
 ((void *)0); (port) = ((port)->ports.tqe_next)) {
		TAILQ_INSERT_TAIL(&sc->sc_ports_gone, port,do { (port)->update.tqe_next = ((void *)0); (port)->update
.tqe_prev = (&sc->sc_ports_gone)->tqh_last; *(&
sc->sc_ports_gone)->tqh_last = (port); (&sc->sc_ports_gone
)->tqh_last = &(port)->update.tqe_next; } while (0)
		    update)do { (port)->update.tqe_next = ((void *)0); (port)->update
.tqe_prev = (&sc->sc_ports_gone)->tqh_last; *(&
sc->sc_ports_gone)->tqh_last = (port); (&sc->sc_ports_gone
)->tqh_last = &(port)->update.tqe_next; } while (0);
		if (port->location & QLA_LOCATION_FABRIC(2 << 24)) {
			port->flags |=
			    QLA_PORT_FLAG_NEEDS_LOGIN2;
		}
	}

	/* take care of ports that haven't changed first */
	TAILQ_FOREACH(fport, &sc->sc_ports_found, update)for((fport) = ((&sc->sc_ports_found)->tqh_first); (
fport) != ((void *)0); (fport) = ((fport)->update.tqe_next
)) {
		port = sc->sc_targets[fport->loopid];
		if (port == NULL((void *)0) || fport->port_name !=
		    port->port_name) {
			/* new or changed port, handled later */
			continue;
		}

		/*
		 * the port hasn't been logged out, which
		 * means we don't need to log in again, and,
		 * for loop ports, that the port still exists.
		 */
		port->flags &= ~QLA_PORT_FLAG_NEEDS_LOGIN2;
		if (port->location & QLA_LOCATION_LOOP(1 << 24))
			TAILQ_REMOVE(&sc->sc_ports_gone,do { if (((port)->update.tqe_next) != ((void *)0)) (port)->
update.tqe_next->update.tqe_prev = (port)->update.tqe_prev
; else (&sc->sc_ports_gone)->tqh_last = (port)->
update.tqe_prev; *(port)->update.tqe_prev = (port)->update
.tqe_next; ((port)->update.tqe_prev) = ((void *)-1); ((port
)->update.tqe_next) = ((void *)-1); } while (0)
			    port, update)do { if (((port)->update.tqe_next) != ((void *)0)) (port)->
update.tqe_next->update.tqe_prev = (port)->update.tqe_prev
; else (&sc->sc_ports_gone)->tqh_last = (port)->
update.tqe_prev; *(port)->update.tqe_prev = (port)->update
.tqe_next; ((port)->update.tqe_prev) = ((void *)-1); ((port
)->update.tqe_next) = ((void *)-1); } while (0);

		fport->location = 0;
	}
	mtx_leave(&sc->sc_port_mtx);
	qla_update_start(sc, QLA_UPDATE_TASK_PORT_LIST0x00000010);
	qla_update_done(sc, QLA_UPDATE_TASK_GET_PORT_LIST0x00000008);
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_PORT_LIST0x00000010) {
11
←
Assuming the condition is false→
12
←
Taking false branch→
	mtx_enter(&sc->sc_port_mtx);
	fport = TAILQ_FIRST(&sc->sc_ports_found)((&sc->sc_ports_found)->tqh_first);
	if (fport != NULL((void *)0)) {
		TAILQ_REMOVE(&sc->sc_ports_found, fport,do { if (((fport)->update.tqe_next) != ((void *)0)) (fport
)->update.tqe_next->update.tqe_prev = (fport)->update
.tqe_prev; else (&sc->sc_ports_found)->tqh_last = (
fport)->update.tqe_prev; *(fport)->update.tqe_prev = (fport
)->update.tqe_next; ((fport)->update.tqe_prev) = ((void
 *)-1); ((fport)->update.tqe_next) = ((void *)-1); } while
 (0)
		    update)do { if (((fport)->update.tqe_next) != ((void *)0)) (fport
)->update.tqe_next->update.tqe_prev = (fport)->update
.tqe_prev; else (&sc->sc_ports_found)->tqh_last = (
fport)->update.tqe_prev; *(fport)->update.tqe_prev = (fport
)->update.tqe_next; ((fport)->update.tqe_prev) = ((void
 *)-1); ((fport)->update.tqe_next) = ((void *)-1); } while
 (0);
	}
	mtx_leave(&sc->sc_port_mtx);

	if (fport == NULL((void *)0)) {
		DPRINTF(QLA_D_PORT, "%s: done with ports\n",
		    DEVNAME(sc));
		qla_update_done(sc,
		    QLA_UPDATE_TASK_PORT_LIST0x00000010);
		qla_update_start(sc,
		    QLA_UPDATE_TASK_SCAN_FABRIC0x00000020);
	} else if (fport->location & QLA_LOCATION_LOOP(1 << 24)) {
		DPRINTF(QLA_D_PORT, "%s: loop port %d\n",
		    DEVNAME(sc), fport->loopid);
		if (qla_add_loop_port(sc, fport) != 0)
			free(fport, M_DEVBUF2, sizeof *fport);
	} else if (fport->location & QLA_LOCATION_FABRIC(2 << 24)) {
		qla_add_fabric_port(sc, fport);
	} else {
		/* already processed */
		free(fport, M_DEVBUF2, sizeof *fport);
	}
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_SCAN_FABRIC0x00000020) {
13
←
Assuming the condition is false→
14
←
Taking false branch→
	DPRINTF(QLA_D_PORT, "%s: starting fabric scan\n",
	    DEVNAME(sc));
	lastport = sc->sc_port_id;
	firstport = 0xffffffff;
	if (qla_update_fabric(sc))
		qla_update_start(sc,
		    QLA_UPDATE_TASK_SCANNING_FABRIC0x00000040);
	qla_update_done(sc, QLA_UPDATE_TASK_SCAN_FABRIC0x00000020);
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_SCANNING_FABRIC0x00000040) {
15
←
Assuming the condition is true→
16
←
Taking true branch→
	fport = qla_next_fabric_port(sc, &firstport, &lastport);
17
←
Calling 'qla_next_fabric_port'→
	if (fport != NULL((void *)0)) {
		int disp;

		mtx_enter(&sc->sc_port_mtx);
		disp = qla_classify_port(sc, fport->location,
		    fport->port_name, fport->node_name, &port);
		switch (disp) {
		case QLA_PORT_DISP_CHANGED:
		case QLA_PORT_DISP_MOVED:
			/* we'll log out the old port later */
		case QLA_PORT_DISP_NEW:
			DPRINTF(QLA_D_PORT, "%s: new port "
			    "%06x\n", DEVNAME(sc),
			    fport->portid);
			TAILQ_INSERT_TAIL(&sc->sc_ports_found,do { (fport)->update.tqe_next = ((void *)0); (fport)->update
.tqe_prev = (&sc->sc_ports_found)->tqh_last; *(&
sc->sc_ports_found)->tqh_last = (fport); (&sc->sc_ports_found
)->tqh_last = &(fport)->update.tqe_next; } while (0
)
			    fport, update)do { (fport)->update.tqe_next = ((void *)0); (fport)->update
.tqe_prev = (&sc->sc_ports_found)->tqh_last; *(&
sc->sc_ports_found)->tqh_last = (fport); (&sc->sc_ports_found
)->tqh_last = &(fport)->update.tqe_next; } while (0
);
			break;
		case QLA_PORT_DISP_DUP:
			free(fport, M_DEVBUF2, sizeof *fport);
			break;
		case QLA_PORT_DISP_SAME:
			DPRINTF(QLA_D_PORT, "%s: existing port"
			    " %06x\n", DEVNAME(sc),
			    fport->portid);
			TAILQ_REMOVE(&sc->sc_ports_gone, port,do { if (((port)->update.tqe_next) != ((void *)0)) (port)->
update.tqe_next->update.tqe_prev = (port)->update.tqe_prev
; else (&sc->sc_ports_gone)->tqh_last = (port)->
update.tqe_prev; *(port)->update.tqe_prev = (port)->update
.tqe_next; ((port)->update.tqe_prev) = ((void *)-1); ((port
)->update.tqe_next) = ((void *)-1); } while (0)
			    update)do { if (((port)->update.tqe_next) != ((void *)0)) (port)->
update.tqe_next->update.tqe_prev = (port)->update.tqe_prev
; else (&sc->sc_ports_gone)->tqh_last = (port)->
update.tqe_prev; *(port)->update.tqe_prev = (port)->update
.tqe_next; ((port)->update.tqe_prev) = ((void *)-1); ((port
)->update.tqe_next) = ((void *)-1); } while (0);
			free(fport, M_DEVBUF2, sizeof *fport);
			break;
		}
		mtx_leave(&sc->sc_port_mtx);
	}
	if (lastport == 0xffffffff) {
		DPRINTF(QLA_D_PORT, "%s: finished\n",
		    DEVNAME(sc));
		qla_update_done(sc,
		    QLA_UPDATE_TASK_SCANNING_FABRIC0x00000040);
		qla_update_start(sc,
		    QLA_UPDATE_TASK_FABRIC_LOGIN0x00000080);
	}
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_FABRIC_LOGIN0x00000080) {
	mtx_enter(&sc->sc_port_mtx);
	port = TAILQ_FIRST(&sc->sc_ports_found)((&sc->sc_ports_found)->tqh_first);
	if (port != NULL((void *)0)) {
		TAILQ_REMOVE(&sc->sc_ports_found, port, update)do { if (((port)->update.tqe_next) != ((void *)0)) (port)->
update.tqe_next->update.tqe_prev = (port)->update.tqe_prev
; else (&sc->sc_ports_found)->tqh_last = (port)->
update.tqe_prev; *(port)->update.tqe_prev = (port)->update
.tqe_next; ((port)->update.tqe_prev) = ((void *)-1); ((port
)->update.tqe_next) = ((void *)-1); } while (0);
	}
	mtx_leave(&sc->sc_port_mtx);

	if (port != NULL((void *)0)) {
		DPRINTF(QLA_D_PORT, "%s: found port %06x\n",
		    DEVNAME(sc), port->portid);
		if (qla_fabric_plogi(sc, port) == 0) {
			qla_add_fabric_port(sc, port);
		} else {
			free(port, M_DEVBUF2, sizeof *port);
		}
	} else {
		DPRINTF(QLA_D_PORT, "%s: done with logins\n",
		    DEVNAME(sc));
		qla_update_done(sc,
		    QLA_UPDATE_TASK_FABRIC_LOGIN0x00000080);
		qla_update_start(sc,
		    QLA_UPDATE_TASK_ATTACH_TARGET0x00000400 |
		    QLA_UPDATE_TASK_DETACH_TARGET0x00000200);
	}
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_FABRIC_RELOGIN0x00000100) {
	TAILQ_FOREACH(port, &sc->sc_ports, ports)for((port) = ((&sc->sc_ports)->tqh_first); (port) !=
 ((void *)0); (port) = ((port)->ports.tqe_next)) {
		if (port->flags & QLA_PORT_FLAG_NEEDS_LOGIN2) {
			qla_fabric_plogi(sc, port);
			break;
		}
	}

	if (port == NULL((void *)0))
		qla_update_done(sc,
		    QLA_UPDATE_TASK_FABRIC_RELOGIN0x00000100);
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_DETACH_TARGET0x00000200) {
	mtx_enter(&sc->sc_port_mtx);
	port = TAILQ_FIRST(&sc->sc_ports_gone)((&sc->sc_ports_gone)->tqh_first);
	if (port != NULL((void *)0)) {
		sc->sc_targets[port->loopid] = NULL((void *)0);
		TAILQ_REMOVE(&sc->sc_ports_gone, port, update)do { if (((port)->update.tqe_next) != ((void *)0)) (port)->
update.tqe_next->update.tqe_prev = (port)->update.tqe_prev
; else (&sc->sc_ports_gone)->tqh_last = (port)->
update.tqe_prev; *(port)->update.tqe_prev = (port)->update
.tqe_next; ((port)->update.tqe_prev) = ((void *)-1); ((port
)->update.tqe_next) = ((void *)-1); } while (0);
		TAILQ_REMOVE(&sc->sc_ports, port, ports)do { if (((port)->ports.tqe_next) != ((void *)0)) (port)->
ports.tqe_next->ports.tqe_prev = (port)->ports.tqe_prev
; else (&sc->sc_ports)->tqh_last = (port)->ports
.tqe_prev; *(port)->ports.tqe_prev = (port)->ports.tqe_next
; ((port)->ports.tqe_prev) = ((void *)-1); ((port)->ports
.tqe_next) = ((void *)-1); } while (0);
	}
	mtx_leave(&sc->sc_port_mtx);

	if (port != NULL((void *)0)) {
		DPRINTF(QLA_D_PORT, "%s: detaching target %d\n",
		    DEVNAME(sc), port->loopid);
		if (sc->sc_scsibus != NULL((void *)0))
			scsi_detach_target(sc->sc_scsibus,
			    port->loopid, DETACH_FORCE0x01 |
			    DETACH_QUIET0x02);

		if (port->location & QLA_LOCATION_FABRIC(2 << 24))
			qla_fabric_plogo(sc, port);

		free(port, M_DEVBUF2, sizeof *port);
	} else {
		qla_update_done(sc,
		    QLA_UPDATE_TASK_DETACH_TARGET0x00000200);
	}
	continue;
}

if (sc->sc_update_tasks & QLA_UPDATE_TASK_ATTACH_TARGET0x00000400) {
	mtx_enter(&sc->sc_port_mtx);
	port = TAILQ_FIRST(&sc->sc_ports_new)((&sc->sc_ports_new)->tqh_first);
	if (port != NULL((void *)0)) {
		TAILQ_REMOVE(&sc->sc_ports_new, port, update)do { if (((port)->update.tqe_next) != ((void *)0)) (port)->
update.tqe_next->update.tqe_prev = (port)->update.tqe_prev
; else (&sc->sc_ports_new)->tqh_last = (port)->update
.tqe_prev; *(port)->update.tqe_prev = (port)->update.tqe_next
; ((port)->update.tqe_prev) = ((void *)-1); ((port)->update
.tqe_next) = ((void *)-1); } while (0);
		TAILQ_INSERT_TAIL(&sc->sc_ports, port, ports)do { (port)->ports.tqe_next = ((void *)0); (port)->ports
.tqe_prev = (&sc->sc_ports)->tqh_last; *(&sc->
sc_ports)->tqh_last = (port); (&sc->sc_ports)->tqh_last
 = &(port)->ports.tqe_next; } while (0);
	}
	mtx_leave(&sc->sc_port_mtx);

	if (port != NULL((void *)0)) {
		if (sc->sc_scsibus != NULL((void *)0))
			scsi_probe_target(sc->sc_scsibus,
			    port->loopid);
	} else {
		qla_update_done(sc,
		    QLA_UPDATE_TASK_ATTACH_TARGET0x00000400);
	}
	continue;
}

}

DPRINTF(QLA_D_PORT, "%s: done updating\n", DEVNAME(sc));
2022}

2024int
2025qla_async(struct qla_softc *sc, u_int16_t info)
2026{
u_int16_t id, exp;

switch (info) {
case QLA_ASYNC_SYSTEM_ERROR0x8002:
qla_update_start(sc, QLA_UPDATE_TASK_SOFTRESET0x00000002);
break;

case QLA_ASYNC_REQ_XFER_ERROR0x8003:
qla_update_start(sc, QLA_UPDATE_TASK_SOFTRESET0x00000002);
break;

case QLA_ASYNC_RSP_XFER_ERROR0x8004:
qla_update_start(sc, QLA_UPDATE_TASK_SOFTRESET0x00000002);
break;

case QLA_ASYNC_LIP_OCCURRED0x8010:
DPRINTF(QLA_D_PORT, "%s: lip occurred\n", DEVNAME(sc));
break;

case QLA_ASYNC_LOOP_UP0x8011:
DPRINTF(QLA_D_PORT, "%s: loop up\n", DEVNAME(sc));
sc->sc_loop_up = 1;
sc->sc_marker_required = 1;
qla_update_start(sc, QLA_UPDATE_TASK_UPDATE_TOPO0x00000004 |
    QLA_UPDATE_TASK_GET_PORT_LIST0x00000008);
break;

case QLA_ASYNC_LOOP_DOWN0x8012:
DPRINTF(QLA_D_PORT, "%s: loop down\n", DEVNAME(sc));
sc->sc_loop_up = 0;
qla_update_start(sc, QLA_UPDATE_TASK_CLEAR_ALL0x00000001);
break;

case QLA_ASYNC_LIP_RESET0x8013:
DPRINTF(QLA_D_PORT, "%s: lip reset\n", DEVNAME(sc));
sc->sc_marker_required = 1;
qla_update_start(sc, QLA_UPDATE_TASK_FABRIC_RELOGIN0x00000100);
break;

case QLA_ASYNC_PORT_DB_CHANGE0x8014:
DPRINTF(QLA_D_PORT, "%s: port db changed %x\n", DEVNAME(sc),
    qla_read_mbox(sc, 1));
qla_update_start(sc, QLA_UPDATE_TASK_GET_PORT_LIST0x00000008);
break;

case QLA_ASYNC_CHANGE_NOTIFY0x8015:
DPRINTF(QLA_D_PORT, "%s: name server change (%02x:%02x)\n",
    DEVNAME(sc), qla_read_mbox(sc, 1), qla_read_mbox(sc, 2));
qla_update_start(sc, QLA_UPDATE_TASK_GET_PORT_LIST0x00000008);
break;

case QLA_ASYNC_LIP_F80x8016:
DPRINTF(QLA_D_PORT, "%s: lip f8\n", DEVNAME(sc));
break;

case QLA_ASYNC_LOOP_INIT_ERROR0x8017:
DPRINTF(QLA_D_PORT, "%s: loop initialization error: %x\n",
    DEVNAME(sc), qla_read_mbox(sc, 1));
break;

case QLA_ASYNC_LOGIN_REJECT0x8018:
id = qla_read_mbox(sc, 1);
exp = qla_read_mbox(sc, 2);
DPRINTF(QLA_D_PORT, "%s: login reject from %x (reason %d,"
    " explanation %x)\n", DEVNAME(sc), id >> 8, id & 0xff, exp);
break;

case QLA_ASYNC_SCSI_CMD_COMPLETE0x8020:
/* shouldn't happen, we disable fast posting */
break;

case QLA_ASYNC_CTIO_COMPLETE0x8021:
/* definitely shouldn't happen, we don't do target mode */
break;

case QLA_ASYNC_POINT_TO_POINT0x8030:
DPRINTF(QLA_D_PORT, "%s: connected in point-to-point mode\n",
    DEVNAME(sc));
/* we get stuck handling these if we have the wrong loop
 * topology; should somehow reinit with different things
 * somehow.
 */
break;

case QLA_ASYNC_ZIO_RESP_UPDATE0x8040:
/* shouldn't happen, we don't do zio */
break;

case QLA_ASYNC_RND_ERROR0x8048:
/* do nothing? */
break;

case QLA_ASYNC_QUEUE_FULL0x8049:
break;

default:
DPRINTF(QLA_D_INTR, "%s: unknown async %x\n", DEVNAME(sc),
    info);
break;
}
return (1);
2128}

2130void
2131qla_dump_iocb(struct qla_softc *sc, void *buf)
2132{
2133#ifdef QLA_DEBUG
u_int8_t *iocb = buf;
int l;
int b;

if ((qladebug & QLA_D_IOCB) == 0)
return;

printf("%s: iocb:\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
for (l = 0; l < 4; l++) {
for (b = 0; b < 16; b++) {
	printf(" %2.2x", iocb[(l*16)+b]);
}
printf("\n");
}
2148#endif
2149}

2151void
2152qla_dump_iocb_segs(struct qla_softc *sc, void *segs, int n)
2153{
2154#ifdef QLA_DEBUG
u_int8_t *buf = segs;
int s, b;
if ((qladebug & QLA_D_IOCB) == 0)
return;

printf("%s: iocb segs:\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
for (s = 0; s < n; s++) {
for (b = 0; b < sizeof(struct qla_iocb_seg); b++) {
	printf(" %2.2x", buf[(s*(sizeof(struct qla_iocb_seg)))
	    + b]);
}
printf("\n");
}
2168#endif
2169}

2171void
2172qla_put_marker(struct qla_softc *sc, void *buf)
2173{
struct qla_iocb_marker *marker = buf;

marker->entry_type = QLA_IOCB_MARKER0x04;
marker->entry_count = 1;
marker->seqno = 0;
marker->flags = 0;

/* could be more specific here; isp(4) isn't */
marker->target = 0;
marker->modifier = QLA_IOCB_MARKER_SYNC_ALL2;
qla_dump_iocb(sc, buf);
2185}

2187static inline void
2188qla_put_data_seg(struct qla_iocb_seg *seg, bus_dmamap_t dmap, int num)
2189{
uint64_t addr = dmap->dm_segs[num].ds_addr;

htolem32(&seg->seg_addr_lo, addr)(*(__uint32_t *)(&seg->seg_addr_lo) = ((__uint32_t)(addr
)));
htolem32(&seg->seg_addr_hi, addr >> 32)(*(__uint32_t *)(&seg->seg_addr_hi) = ((__uint32_t)(addr
 >> 32)));
htolem32(&seg->seg_len, dmap->dm_segs[num].ds_len)(*(__uint32_t *)(&seg->seg_len) = ((__uint32_t)(dmap->
dm_segs[num].ds_len)));
2195}

2197void
2198qla_put_cmd(struct qla_softc *sc, void *buf, struct scsi_xfer *xs,
  struct qla_ccb *ccb)
2200{
struct qla_iocb_req34 *req = buf;
u_int16_t dir;
int seg;
int target = xs->sc_link->target;

req->seqno = 0;
req->flags = 0;
req->entry_count = 1;

if (xs->datalen == 0) {
dir = QLA_IOCB_CMD_NO_DATA0x0000;
req->req_seg_count = 0;
req->entry_type = QLA_IOCB_CMD_TYPE_30x19;
} else {
dir = xs->flags & SCSI_DATA_IN0x00800 ? QLA_IOCB_CMD_READ_DATA0x0020 :
    QLA_IOCB_CMD_WRITE_DATA0x0040;
htolem16(&req->req_seg_count, ccb->ccb_dmamap->dm_nsegs)(*(__uint16_t *)(&req->req_seg_count) = ((__uint16_t)(
ccb->ccb_dmamap->dm_nsegs)));
if (ccb->ccb_dmamap->dm_nsegs > QLA_IOCB_SEGS_PER_CMD2) {
	req->entry_type = QLA_IOCB_CMD_TYPE_40x15;
	for (seg = 0; seg < ccb->ccb_dmamap->dm_nsegs; seg++) {
		qla_put_data_seg(&ccb->ccb_t4segs[seg],
		    ccb->ccb_dmamap, seg);
	}
	req->req_type.req4.req4_seg_type = htole16(1)((__uint16_t)(1));
	req->req_type.req4.req4_seg_base = 0;
	req->req_type.req4.req4_seg_addr = ccb->ccb_seg_dva;
	memset(req->req_type.req4.req4_reserved, 0,__builtin_memset((req->req_type.req4.req4_reserved), (0), (
sizeof(req->req_type.req4.req4_reserved)))
	    sizeof(req->req_type.req4.req4_reserved))__builtin_memset((req->req_type.req4.req4_reserved), (0), (
sizeof(req->req_type.req4.req4_reserved)));
	bus_dmamap_sync(sc->sc_dmat,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x04
))
	    QLA_DMA_MAP(sc->sc_segments), ccb->ccb_seg_offset,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x04
))
	    sizeof(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x04
))
	    BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((sc->
sc_segments)->qdm_map)), (ccb->ccb_seg_offset), (sizeof
(*ccb->ccb_t4segs) * ccb->ccb_dmamap->dm_nsegs), (0x04
));
} else {
	req->entry_type = QLA_IOCB_CMD_TYPE_30x19;
	for (seg = 0; seg < ccb->ccb_dmamap->dm_nsegs; seg++) {
		qla_put_data_seg(&req->req_type.req3_segs[seg],
		    ccb->ccb_dmamap, seg);
	}
}
}

/* isp(4) uses head of queue for 'request sense' commands */
htolem16(&req->req_flags, QLA_IOCB_CMD_SIMPLE_QUEUE | dir)(*(__uint16_t *)(&req->req_flags) = ((__uint16_t)(0x0008
 | dir)));

/*
* timeout is in seconds.  make sure it's at least 1 if a timeout
* was specified in xs
*/
if (xs->timeout != 0)
htolem16(&req->req_time, MAX(1, xs->timeout/1000))(*(__uint16_t *)(&req->req_time) = ((__uint16_t)((((1)
>(xs->timeout/1000))?(1):(xs->timeout/1000)))));

/* lun and target layout vary with firmware attributes */
if (sc->sc_expanded_lun) {
if (sc->sc_2k_logins) {
	req->req_target = htole16(target)((__uint16_t)(target));
} else {
	req->req_target = htole16(target << 8)((__uint16_t)(target << 8));
}
req->req_scclun = htole16(xs->sc_link->lun)((__uint16_t)(xs->sc_link->lun));
} else {
req->req_target = htole16(target << 8 | xs->sc_link->lun)((__uint16_t)(target << 8 | xs->sc_link->lun));
}
memcpy(req->req_cdb, &xs->cmd, xs->cmdlen)__builtin_memcpy((req->req_cdb), (&xs->cmd), (xs->
cmdlen));
req->req_totalcnt = htole32(xs->datalen)((__uint32_t)(xs->datalen));

req->req_handle = ccb->ccb_id;

qla_dump_iocb(sc, buf);
2269}

2271int
2272qla_verify_firmware(struct qla_softc *sc, u_int16_t addr)
2273{
sc->sc_mbox[0] = QLA_MBOX_VERIFY_CSUM0x0007;
sc->sc_mbox[1] = addr;
return (qla_mbox(sc, 0x0003));
2277}

2279#ifndef ISP_NOFIRMWARE
2280int
2281qla_load_firmware_words(struct qla_softc *sc, const u_int16_t *src,
  u_int16_t dest)
2283{
u_int16_t i;

for (i = 0; i < src[3]; i++) {
sc->sc_mbox[0] = QLA_MBOX_WRITE_RAM_WORD0x0004;
sc->sc_mbox[1] = i + dest;
sc->sc_mbox[2] = src[i];
if (qla_mbox(sc, 0x07)) {
	printf("firmware load failed\n");
	return (1);
}
}

return (qla_verify_firmware(sc, dest));
2297}

2299int
2300qla_load_firmware_2100(struct qla_softc *sc)
2301{
return qla_load_firmware_words(sc, isp_2100_risc_code,
   QLA_2100_CODE_ORG0x1000);
2304}

2306int
2307qla_load_firmware_2200(struct qla_softc *sc)
2308{
return qla_load_firmware_words(sc, isp_2200_risc_code,
   QLA_2200_CODE_ORG0x1000);
2311}

2313int
2314qla_load_fwchunk_2300(struct qla_softc *sc, struct qla_dmamem *mem,
  const u_int16_t *src, u_int32_t dest)
2316{
u_int16_t origin, done, total;
int i;

origin = dest;
done = 0;
total = src[3];

while (done < total) {
u_int16_t *copy;
u_int32_t words;

/* limit transfer size otherwise it just doesn't work */
words = MIN(total - done, 1 << 10)(((total - done)<(1 << 10))?(total - done):(1 <<
 10));
copy = QLA_DMA_KVA(mem)((void *)(mem)->qdm_kva);
for (i = 0; i < words; i++) {
	copy[i] = htole16(src[done++])((__uint16_t)(src[done++]));
}
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(mem), 0, words * 2,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (words * 2), (0x04))
    BUS_DMASYNC_PREWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (words * 2), (0x04));

sc->sc_mbox[0] = QLA_MBOX_LOAD_RAM_EXT0x000B;
sc->sc_mbox[1] = dest;
sc->sc_mbox[4] = words;
sc->sc_mbox[8] = dest >> 16;
qla_mbox_putaddr(sc->sc_mbox, mem);
if (qla_mbox(sc, 0x01ff)) {
	printf("firmware load failed\n");
	return (1);
}
bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(mem), 0, words * 2,(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (words * 2), (0x08))
    BUS_DMASYNC_POSTWRITE)(*(sc->sc_dmat)->_dmamap_sync)((sc->sc_dmat), (((mem
)->qdm_map)), (0), (words * 2), (0x08));

dest += words;
}

return (qla_verify_firmware(sc, origin));
2353}

2355int
2356qla_load_firmware_2300(struct qla_softc *sc)
2357{
struct qla_dmamem *mem;
const u_int16_t *fw = isp_2300_risc_code;
int rv;

mem = qla_dmamem_alloc(sc, 65536);
rv = qla_load_fwchunk_2300(sc, mem, fw, QLA_2300_CODE_ORG0x0800);
qla_dmamem_free(sc, mem);

return (rv);
2367}

2369int
2370qla_load_firmware_2322(struct qla_softc *sc)
2371{
/* we don't have the 2322 firmware image yet */
2373#if 0
struct qla_dmamem *mem;
const u_int16_t *fw = isp_2322_risc_code;
u_int32_t addr;
int i;

mem = qla_dmamem_alloc(sc, 65536);
if (qla_load_fwchunk_2300(sc, mem, fw, QLA_2300_CODE_ORG0x0800)) {
qla_dmamem_free(sc, mem);
return (1);
}

for (i = 0; i < 2; i++) {
fw += fw[3];
addr = fw[5] | ((fw[4] & 0x3f) << 16);
if (qla_load_fwchunk_2300(sc, mem, fw, addr)) {
	qla_dmamem_free(sc, mem);
	return (1);
}
}

qla_dmamem_free(sc, mem);
2395#endif
return (0);
2397}

2399#endif	/* !ISP_NOFIRMWARE */

2401int
2402qla_read_nvram(struct qla_softc *sc)
2403{
u_int16_t data[sizeof(sc->sc_nvram) >> 1];
u_int16_t req, cmd, val;
u_int8_t csum;
int i, base, bit;

base = sc->sc_port * 0x80;

qla_write(sc, QLA_NVRAM0x0E, QLA_NVRAM_CHIP_SEL0x0002);
delay(10)(*delay_func)(10);
qla_write(sc, QLA_NVRAM0x0E, QLA_NVRAM_CHIP_SEL0x0002 | QLA_NVRAM_CLOCK0x0001);
delay(10)(*delay_func)(10);

for (i = 0; i < nitems(data)(sizeof((data)) / sizeof((data)[0])); i++) {
req = (i + base) | (QLA_NVRAM_CMD_READ6 << 8);

/* write each bit out through the nvram register */
for (bit = 10; bit >= 0; bit--) {
	cmd = QLA_NVRAM_CHIP_SEL0x0002;
	if ((req >> bit) & 1) {
		cmd |= QLA_NVRAM_DATA_OUT0x0004;
	}
	qla_write(sc, QLA_NVRAM0x0E, cmd);
	delay(10)(*delay_func)(10);
	qla_read(sc, QLA_NVRAM0x0E);

	qla_write(sc, QLA_NVRAM0x0E, cmd | QLA_NVRAM_CLOCK0x0001);
	delay(10)(*delay_func)(10);
	qla_read(sc, QLA_NVRAM0x0E);

	qla_write(sc, QLA_NVRAM0x0E, cmd);
	delay(10)(*delay_func)(10);
	qla_read(sc, QLA_NVRAM0x0E);
}

/* read the result back */
val = 0;
for (bit = 0; bit < 16; bit++) {
	val <<= 1;
	qla_write(sc, QLA_NVRAM0x0E, QLA_NVRAM_CHIP_SEL0x0002 |
	    QLA_NVRAM_CLOCK0x0001);
	delay(10)(*delay_func)(10);
	if (qla_read(sc, QLA_NVRAM0x0E) & QLA_NVRAM_DATA_IN0x0008)
		val |= 1;
	delay(10)(*delay_func)(10);

	qla_write(sc, QLA_NVRAM0x0E, QLA_NVRAM_CHIP_SEL0x0002);
	delay(10)(*delay_func)(10);
	qla_read(sc, QLA_NVRAM0x0E);
}

qla_write(sc, QLA_NVRAM0x0E, 0);
delay(10)(*delay_func)(10);
qla_read(sc, QLA_NVRAM0x0E);

data[i] = letoh16(val)((__uint16_t)(val));
}

csum = 0;
for (i = 0; i < nitems(data)(sizeof((data)) / sizeof((data)[0])); i++) {
csum += data[i] & 0xff;
csum += data[i] >> 8;
}

memcpy(&sc->sc_nvram, data, sizeof(sc->sc_nvram))__builtin_memcpy((&sc->sc_nvram), (data), (sizeof(sc->
sc_nvram)));
/* id field should be 'ISP ', version should be at least 1 */
if (sc->sc_nvram.id[0] != 'I' || sc->sc_nvram.id[1] != 'S' ||
   sc->sc_nvram.id[2] != 'P' || sc->sc_nvram.id[3] != ' ' ||
   sc->sc_nvram.nvram_version < 1 || (csum != 0)) {
/*
 * onboard 2200s on Sun hardware don't have an nvram
 * fitted, but will provide us with node and port name
 * through Open Firmware; don't complain in that case.
 */
if (sc->sc_node_name == 0 || sc->sc_port_name == 0)
	printf("%s: nvram corrupt\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
return (1);
}
return (0);
2482}

2484struct qla_dmamem *
2485qla_dmamem_alloc(struct qla_softc *sc, size_t size)
2486{
struct qla_dmamem *m;
int nsegs;

m = malloc(sizeof(*m), M_DEVBUF2, M_NOWAIT0x0002 | M_ZERO0x0008);
if (m == NULL((void *)0))
return (NULL((void *)0));

m->qdm_size = size;

if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), (size
), (1), (size), (0), (0x0001 | 0x0002), (&m->qdm_map))
   BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &m->qdm_map)(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), (size
), (1), (size), (0), (0x0001 | 0x0002), (&m->qdm_map)) != 0)
goto qdmfree;

if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &m->qdm_seg, 1,(*(sc->sc_dmat)->_dmamem_alloc)((sc->sc_dmat), (size
), ((1 << 12)), (0), (&m->qdm_seg), (1), (&nsegs
), (0x0001 | 0x1000))
   &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO)(*(sc->sc_dmat)->_dmamem_alloc)((sc->sc_dmat), (size
), ((1 << 12)), (0), (&m->qdm_seg), (1), (&nsegs
), (0x0001 | 0x1000)) != 0)
goto destroy;

if (bus_dmamem_map(sc->sc_dmat, &m->qdm_seg, nsegs, size, &m->qdm_kva,(*(sc->sc_dmat)->_dmamem_map)((sc->sc_dmat), (&m
->qdm_seg), (nsegs), (size), (&m->qdm_kva), (0x0001
))
   BUS_DMA_NOWAIT)(*(sc->sc_dmat)->_dmamem_map)((sc->sc_dmat), (&m
->qdm_seg), (nsegs), (size), (&m->qdm_kva), (0x0001
)) != 0)
goto free;

if (bus_dmamap_load(sc->sc_dmat, m->qdm_map, m->qdm_kva, size, NULL,(*(sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (m->
qdm_map), (m->qdm_kva), (size), (((void *)0)), (0x0001))
   BUS_DMA_NOWAIT)(*(sc->sc_dmat)->_dmamap_load)((sc->sc_dmat), (m->
qdm_map), (m->qdm_kva), (size), (((void *)0)), (0x0001)) != 0)
goto unmap;

return (m);

2514unmap:
bus_dmamem_unmap(sc->sc_dmat, m->qdm_kva, m->qdm_size)(*(sc->sc_dmat)->_dmamem_unmap)((sc->sc_dmat), (m->
qdm_kva), (m->qdm_size));
2516free:
bus_dmamem_free(sc->sc_dmat, &m->qdm_seg, 1)(*(sc->sc_dmat)->_dmamem_free)((sc->sc_dmat), (&
m->qdm_seg), (1));
2518destroy:
bus_dmamap_destroy(sc->sc_dmat, m->qdm_map)(*(sc->sc_dmat)->_dmamap_destroy)((sc->sc_dmat), (m->
qdm_map));
2520qdmfree:
free(m, M_DEVBUF2, sizeof(*m));

return (NULL((void *)0));
2524}

2526void
2527qla_dmamem_free(struct qla_softc *sc, struct qla_dmamem *m)
2528{
bus_dmamap_unload(sc->sc_dmat, m->qdm_map)(*(sc->sc_dmat)->_dmamap_unload)((sc->sc_dmat), (m->
qdm_map));
bus_dmamem_unmap(sc->sc_dmat, m->qdm_kva, m->qdm_size)(*(sc->sc_dmat)->_dmamem_unmap)((sc->sc_dmat), (m->
qdm_kva), (m->qdm_size));
bus_dmamem_free(sc->sc_dmat, &m->qdm_seg, 1)(*(sc->sc_dmat)->_dmamem_free)((sc->sc_dmat), (&
m->qdm_seg), (1));
bus_dmamap_destroy(sc->sc_dmat, m->qdm_map)(*(sc->sc_dmat)->_dmamap_destroy)((sc->sc_dmat), (m->
qdm_map));
free(m, M_DEVBUF2, sizeof(*m));
2534}

2536int
2537qla_alloc_ccbs(struct qla_softc *sc)
2538{
struct qla_ccb		*ccb;
u_int8_t		*cmd;
int			i;

SIMPLEQ_INIT(&sc->sc_ccb_free)do { (&sc->sc_ccb_free)->sqh_first = ((void *)0); (
&sc->sc_ccb_free)->sqh_last = &(&sc->sc_ccb_free
)->sqh_first; } while (0);
mtx_init(&sc->sc_ccb_mtx, IPL_BIO)do { (void)(((void *)0)); (void)(0); __mtx_init((&sc->
sc_ccb_mtx), ((((0x3)) > 0x0 && ((0x3)) < 0x9) ?
 0x9 : ((0x3)))); } while (0);
mtx_init(&sc->sc_queue_mtx, IPL_BIO)do { (void)(((void *)0)); (void)(0); __mtx_init((&sc->
sc_queue_mtx), ((((0x3)) > 0x0 && ((0x3)) < 0x9
) ? 0x9 : ((0x3)))); } while (0);
mtx_init(&sc->sc_port_mtx, IPL_BIO)do { (void)(((void *)0)); (void)(0); __mtx_init((&sc->
sc_port_mtx), ((((0x3)) > 0x0 && ((0x3)) < 0x9)
 ? 0x9 : ((0x3)))); } while (0);
mtx_init(&sc->sc_mbox_mtx, IPL_BIO)do { (void)(((void *)0)); (void)(0); __mtx_init((&sc->
sc_mbox_mtx), ((((0x3)) > 0x0 && ((0x3)) < 0x9)
 ? 0x9 : ((0x3)))); } while (0);

sc->sc_ccbs = mallocarray(sc->sc_maxcmds, sizeof(struct qla_ccb),
   M_DEVBUF2, M_WAITOK0x0001 | M_CANFAIL0x0004 | M_ZERO0x0008);
if (sc->sc_ccbs == NULL((void *)0)) {
printf("%s: unable to allocate ccbs\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
return (1);
}

sc->sc_requests = qla_dmamem_alloc(sc, sc->sc_maxcmds *
   QLA_QUEUE_ENTRY_SIZE64);
if (sc->sc_requests == NULL((void *)0)) {
printf("%s: unable to allocate ccb dmamem\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
goto free_ccbs;
}
sc->sc_responses = qla_dmamem_alloc(sc, sc->sc_maxcmds *
   QLA_QUEUE_ENTRY_SIZE64);
if (sc->sc_responses == NULL((void *)0)) {
printf("%s: unable to allocate rcb dmamem\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
goto free_req;
}
sc->sc_segments = qla_dmamem_alloc(sc, sc->sc_maxcmds * QLA_MAX_SEGS16 *
   sizeof(struct qla_iocb_seg));
if (sc->sc_segments == NULL((void *)0)) {
printf("%s: unable to allocate iocb segments\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
goto free_res;
}

cmd = QLA_DMA_KVA(sc->sc_requests)((void *)(sc->sc_requests)->qdm_kva);
memset(cmd, 0, QLA_QUEUE_ENTRY_SIZE * sc->sc_maxcmds)__builtin_memset((cmd), (0), (64 * sc->sc_maxcmds));
for (i = 0; i < sc->sc_maxcmds; i++) {
ccb = &sc->sc_ccbs[i];

if (bus_dmamap_create(sc->sc_dmat, MAXPHYS,(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), ((64
 * 1024)), (16), ((64 * 1024)), (0), (0x0001 | 0x0002), (&
ccb->ccb_dmamap))
    QLA_MAX_SEGS, MAXPHYS, 0,(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), ((64
 * 1024)), (16), ((64 * 1024)), (0), (0x0001 | 0x0002), (&
ccb->ccb_dmamap))
    BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), ((64
 * 1024)), (16), ((64 * 1024)), (0), (0x0001 | 0x0002), (&
ccb->ccb_dmamap))
    &ccb->ccb_dmamap)(*(sc->sc_dmat)->_dmamap_create)((sc->sc_dmat), ((64
 * 1024)), (16), ((64 * 1024)), (0), (0x0001 | 0x0002), (&
ccb->ccb_dmamap)) != 0) {
	printf("%s: unable to create dma map\n", DEVNAME(sc)((sc)->sc_dev.dv_xname));
	goto free_maps;
}

ccb->ccb_sc = sc;
ccb->ccb_id = i;

ccb->ccb_seg_offset = i * QLA_MAX_SEGS16 *
    sizeof(struct qla_iocb_seg);
htolem64(&ccb->ccb_seg_dva,(*(__uint64_t *)(&ccb->ccb_seg_dva) = ((__uint64_t)(((
u_int64_t)(sc->sc_segments)->qdm_map->dm_segs[0].ds_addr
) + ccb->ccb_seg_offset)))
    QLA_DMA_DVA(sc->sc_segments) + ccb->ccb_seg_offset)(*(__uint64_t *)(&ccb->ccb_seg_dva) = ((__uint64_t)(((
u_int64_t)(sc->sc_segments)->qdm_map->dm_segs[0].ds_addr
) + ccb->ccb_seg_offset)));
ccb->ccb_t4segs = QLA_DMA_KVA(sc->sc_segments)((void *)(sc->sc_segments)->qdm_kva) +
    ccb->ccb_seg_offset;

qla_put_ccb(sc, ccb);
}

scsi_iopool_init(&sc->sc_iopool, sc, qla_get_ccb, qla_put_ccb);
return (0);

2604free_maps:
while ((ccb = qla_get_ccb(sc)) != NULL((void *)0))
bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap)(*(sc->sc_dmat)->_dmamap_destroy)((sc->sc_dmat), (ccb
->ccb_dmamap));

qla_dmamem_free(sc, sc->sc_segments);
2609free_res:
qla_dmamem_free(sc, sc->sc_responses);
2611free_req:
qla_dmamem_free(sc, sc->sc_requests);
2613free_ccbs:
free(sc->sc_ccbs, M_DEVBUF2, 0);

return (1);
2617}

2619void
2620qla_free_ccbs(struct qla_softc *sc)
2621{
struct qla_ccb		*ccb;

scsi_iopool_destroy(&sc->sc_iopool);
while ((ccb = qla_get_ccb(sc)) != NULL((void *)0))
bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap)(*(sc->sc_dmat)->_dmamap_destroy)((sc->sc_dmat), (ccb
->ccb_dmamap));
qla_dmamem_free(sc, sc->sc_segments);
qla_dmamem_free(sc, sc->sc_responses);
qla_dmamem_free(sc, sc->sc_requests);
free(sc->sc_ccbs, M_DEVBUF2, 0);
2631}

2633void *
2634qla_get_ccb(void *xsc)
2635{
struct qla_softc	*sc = xsc;
struct qla_ccb		*ccb;

mtx_enter(&sc->sc_ccb_mtx);
ccb = SIMPLEQ_FIRST(&sc->sc_ccb_free)((&sc->sc_ccb_free)->sqh_first);
if (ccb != NULL((void *)0)) {
SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_free, ccb_link)do { if (((&sc->sc_ccb_free)->sqh_first = (&sc->
sc_ccb_free)->sqh_first->ccb_link.sqe_next) == ((void *
)0)) (&sc->sc_ccb_free)->sqh_last = &(&sc->
sc_ccb_free)->sqh_first; } while (0);
}
mtx_leave(&sc->sc_ccb_mtx);
return (ccb);
2646}

2648void
2649qla_put_ccb(void *xsc, void *io)
2650{
struct qla_softc	*sc = xsc;
struct qla_ccb		*ccb = io;

ccb->ccb_xs = NULL((void *)0);
mtx_enter(&sc->sc_ccb_mtx);
SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_link)do { if (((ccb)->ccb_link.sqe_next = (&sc->sc_ccb_free
)->sqh_first) == ((void *)0)) (&sc->sc_ccb_free)->
sqh_last = &(ccb)->ccb_link.sqe_next; (&sc->sc_ccb_free
)->sqh_first = (ccb); } while (0);
mtx_leave(&sc->sc_ccb_mtx);
2658}